From 006d153c01ab55d9b74ecbd20bb5cd0bd5c9509c Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Mon, 24 Sep 2007 17:00:45 +0900 Subject: [PATCH] --- yaml --- r: 68278 b: refs/heads/master c: ab27f62002f4dc8f759c1ec069024d8173e5dea0 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/sh/mm/cache-sh4.c | 15 +++++++++++++++ 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index ea6d052e700e..4758ca5d02a1 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8328a8ba92819792f37e3db002d404554e7a6f79 +refs/heads/master: ab27f62002f4dc8f759c1ec069024d8173e5dea0 diff --git a/trunk/arch/sh/mm/cache-sh4.c b/trunk/arch/sh/mm/cache-sh4.c index 6c36c2fb8199..226b190c5b9c 100644 --- a/trunk/arch/sh/mm/cache-sh4.c +++ b/trunk/arch/sh/mm/cache-sh4.c @@ -70,6 +70,20 @@ static void __init emit_cache_params(void) boot_cpu_data.dcache.alias_mask, boot_cpu_data.dcache.n_aliases); + /* + * Emit Secondary Cache parameters if the CPU has a probed L2. + */ + if (boot_cpu_data.flags & CPU_HAS_L2_CACHE) { + printk("S-cache : n_ways=%d n_sets=%d way_incr=%d\n", + boot_cpu_data.scache.ways, + boot_cpu_data.scache.sets, + boot_cpu_data.scache.way_incr); + printk("S-cache : entry_mask=0x%08x alias_mask=0x%08x n_aliases=%d\n", + boot_cpu_data.scache.entry_mask, + boot_cpu_data.scache.alias_mask, + boot_cpu_data.scache.n_aliases); + } + if (!__flush_dcache_segment_fn) panic("unknown number of cache ways\n"); } @@ -81,6 +95,7 @@ void __init p3_cache_init(void) { compute_alias(&boot_cpu_data.icache); compute_alias(&boot_cpu_data.dcache); + compute_alias(&boot_cpu_data.scache); switch (boot_cpu_data.dcache.ways) { case 1: