From 0074da1628e36d33f1c04d45d809d64b56c703be Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Thu, 15 Jul 2010 21:54:20 +0800 Subject: [PATCH] --- yaml --- r: 208647 b: refs/heads/master c: 4d4a339dd51390066d09701876a499996f1a5fdc h: refs/heads/master i: 208645: 8d5ea5970c12338018acf30d26c40fc5085b0496 208643: 97fb0f33d6fa69963fe924ba83acd69beb9298e9 208639: fd44b5ce596119c8e991e587265eaef2c9ffca0b v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-mmp/mmp2.c | 21 +++++++++++++++++++++ trunk/arch/arm/mach-mmp/time.c | 21 --------------------- 3 files changed, 22 insertions(+), 22 deletions(-) diff --git a/[refs] b/[refs] index d011c9b5b23f..8f6a7313036e 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8022887cda044524610ef2a5a45feb9d96b11b4f +refs/heads/master: 4d4a339dd51390066d09701876a499996f1a5fdc diff --git a/trunk/arch/arm/mach-mmp/mmp2.c b/trunk/arch/arm/mach-mmp/mmp2.c index 7f5eb059bb01..b3fddacc7cb5 100644 --- a/trunk/arch/arm/mach-mmp/mmp2.c +++ b/trunk/arch/arm/mach-mmp/mmp2.c @@ -17,6 +17,7 @@ #include +#include #include #include #include @@ -158,6 +159,26 @@ static int __init mmp2_init(void) } postcore_initcall(mmp2_init); +static void __init mmp2_timer_init(void) +{ + unsigned long clk_rst; + + __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS); + + /* + * enable bus/functional clock, enable 6.5MHz (divider 4), + * release reset + */ + clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); + __raw_writel(clk_rst, APBC_MMP2_TIMERS); + + timer_init(IRQ_MMP2_TIMER1); +} + +struct sys_timer mmp2_timer = { + .init = mmp2_timer_init, +}; + /* on-chip devices */ MMP2_DEVICE(uart1, "pxa2xx-uart", 0, UART1, 0xd4030000, 0x30, 4, 5); MMP2_DEVICE(uart2, "pxa2xx-uart", 1, UART2, 0xd4017000, 0x30, 20, 21); diff --git a/trunk/arch/arm/mach-mmp/time.c b/trunk/arch/arm/mach-mmp/time.c index cf75694e9687..66528193f939 100644 --- a/trunk/arch/arm/mach-mmp/time.c +++ b/trunk/arch/arm/mach-mmp/time.c @@ -200,24 +200,3 @@ void __init timer_init(int irq) clocksource_register(&cksrc); clockevents_register_device(&ckevt); } - -static void __init mmp2_timer_init(void) -{ - unsigned long clk_rst; - - __raw_writel(APBC_APBCLK | APBC_RST, APBC_MMP2_TIMERS); - - /* - * enable bus/functional clock, enable 6.5MHz (divider 4), - * release reset - */ - clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); - __raw_writel(clk_rst, APBC_MMP2_TIMERS); - - timer_init(IRQ_MMP2_TIMER1); -} - -struct sys_timer mmp2_timer = { - .init = mmp2_timer_init, -}; -