From 007906e6cc310e634f56e99eb3a6f9583f62b22b Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 4 Jun 2012 14:58:07 +0200 Subject: [PATCH] --- yaml --- r: 310994 b: refs/heads/master c: cdd781ab1906d039c2a93078385645d2d5af8491 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-imx/crm-regs-imx5.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index d3414b5b923d..51ad25d251ec 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 9ca41bccc39f5ebbbb515dfadb2e0f912168c8bd +refs/heads/master: cdd781ab1906d039c2a93078385645d2d5af8491 diff --git a/trunk/arch/arm/mach-imx/crm-regs-imx5.h b/trunk/arch/arm/mach-imx/crm-regs-imx5.h index 5e11ba7daee2..5e3f1f0f4cab 100644 --- a/trunk/arch/arm/mach-imx/crm-regs-imx5.h +++ b/trunk/arch/arm/mach-imx/crm-regs-imx5.h @@ -23,7 +23,7 @@ #define MX53_DPLL1_BASE MX53_IO_ADDRESS(MX53_PLL1_BASE_ADDR) #define MX53_DPLL2_BASE MX53_IO_ADDRESS(MX53_PLL2_BASE_ADDR) #define MX53_DPLL3_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR) -#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL3_BASE_ADDR) +#define MX53_DPLL4_BASE MX53_IO_ADDRESS(MX53_PLL4_BASE_ADDR) /* PLL Register Offsets */ #define MXC_PLL_DP_CTL 0x00