From 0129841c6d651e0249671be768880faa5550ff32 Mon Sep 17 00:00:00 2001
From: Rusty Russell <rusty@rustcorp.com.au>
Date: Wed, 14 Apr 2010 21:43:53 -0600
Subject: [PATCH] --- yaml --- r: 189896 b: refs/heads/master c:
 5094aeafbbd500509f648e3cd102b053bc7926b3 h: refs/heads/master v: v3

---
 [refs]                                   |  2 +-
 trunk/arch/m68k/include/asm/atomic_mm.h  |  8 ++------
 trunk/arch/m68k/include/asm/sigcontext.h |  4 +++-
 trunk/drivers/lguest/x86/core.c          | 12 ++++++++++++
 trunk/lib/vsprintf.c                     | 10 +++++-----
 5 files changed, 23 insertions(+), 13 deletions(-)

diff --git a/[refs] b/[refs]
index bff7257092d1..c5c5a65c121b 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: d471a4b9f2ac327c15300ba2b2bda2c6d6fd03bc
+refs/heads/master: 5094aeafbbd500509f648e3cd102b053bc7926b3
diff --git a/trunk/arch/m68k/include/asm/atomic_mm.h b/trunk/arch/m68k/include/asm/atomic_mm.h
index d9d2ed647435..88b7af20a996 100644
--- a/trunk/arch/m68k/include/asm/atomic_mm.h
+++ b/trunk/arch/m68k/include/asm/atomic_mm.h
@@ -148,18 +148,14 @@ static inline int atomic_xchg(atomic_t *v, int new)
 static inline int atomic_sub_and_test(int i, atomic_t *v)
 {
 	char c;
-	__asm__ __volatile__("subl %2,%1; seq %0"
-			     : "=d" (c), "+m" (*v)
-			     : "id" (i));
+	__asm__ __volatile__("subl %2,%1; seq %0" : "=d" (c), "+m" (*v): "g" (i));
 	return c != 0;
 }
 
 static inline int atomic_add_negative(int i, atomic_t *v)
 {
 	char c;
-	__asm__ __volatile__("addl %2,%1; smi %0"
-			     : "=d" (c), "+m" (*v)
-			     : "id" (i));
+	__asm__ __volatile__("addl %2,%1; smi %0" : "=d" (c), "+m" (*v): "g" (i));
 	return c != 0;
 }
 
diff --git a/trunk/arch/m68k/include/asm/sigcontext.h b/trunk/arch/m68k/include/asm/sigcontext.h
index a29dd74a17cb..1320eaa4cc2a 100644
--- a/trunk/arch/m68k/include/asm/sigcontext.h
+++ b/trunk/arch/m68k/include/asm/sigcontext.h
@@ -17,11 +17,13 @@ struct sigcontext {
 #ifndef __uClinux__
 # ifdef __mcoldfire__
 	unsigned long  sc_fpregs[2][2];	/* room for two fp registers */
+	unsigned long  sc_fpcntl[3];
+	unsigned char  sc_fpstate[16+6*8];
 # else
 	unsigned long  sc_fpregs[2*3];  /* room for two fp registers */
-# endif
 	unsigned long  sc_fpcntl[3];
 	unsigned char  sc_fpstate[216];
+# endif
 #endif
 };
 
diff --git a/trunk/drivers/lguest/x86/core.c b/trunk/drivers/lguest/x86/core.c
index fb2b7ef7868e..b4eb675a807e 100644
--- a/trunk/drivers/lguest/x86/core.c
+++ b/trunk/drivers/lguest/x86/core.c
@@ -287,6 +287,18 @@ static int emulate_insn(struct lg_cpu *cpu)
 	/* Decoding x86 instructions is icky. */
 	insn = lgread(cpu, physaddr, u8);
 
+	/*
+	 * Around 2.6.33, the kernel started using an emulation for the
+	 * cmpxchg8b instruction in early boot on many configurations.  This
+	 * code isn't paravirtualized, and it tries to disable interrupts.
+	 * Ignore it, which will Mostly Work.
+	 */
+	if (insn == 0xfa) {
+		/* "cli", or Clear Interrupt Enable instruction.  Skip it. */
+		cpu->regs->eip++;
+		return 1;
+	}
+
 	/*
 	 * 0x66 is an "operand prefix".  It means it's using the upper 16 bits
 	 * of the eax register.
diff --git a/trunk/lib/vsprintf.c b/trunk/lib/vsprintf.c
index 7376b7c55ffe..24112e5a5780 100644
--- a/trunk/lib/vsprintf.c
+++ b/trunk/lib/vsprintf.c
@@ -408,12 +408,12 @@ enum format_type {
 };
 
 struct printf_spec {
-	u8	type;		/* format_type enum */
-	u8	flags;		/* flags to number() */
-	u8	base;		/* number base, 8, 10 or 16 only */
-	u8	qualifier;	/* number qualifier, one of 'hHlLtzZ' */
+	u16	type;
 	s16	field_width;	/* width of output field */
-	s16	precision;	/* # of digits/chars */
+	u8	flags;		/* flags to number() */
+	u8	base;
+	s8	precision;	/* # of digits/chars */
+	u8	qualifier;
 };
 
 static char *number(char *buf, char *end, unsigned long long num,