From 014340b31457a18d271d6453e1fdf87d851fc734 Mon Sep 17 00:00:00 2001 From: Daniel Mack Date: Fri, 13 Mar 2009 15:17:32 +0100 Subject: [PATCH] --- yaml --- r: 137397 b: refs/heads/master c: d1b95607e1dde59e2ffae661732c8da34aba445c h: refs/heads/master i: 137395: 94dd5155211f09aca36360d511dca1364af532d7 v: v3 --- [refs] | 2 +- trunk/.mailmap | 4 +- trunk/CREDITS | 1 + trunk/Documentation/ABI/testing/sysfs-bus-pci | 43 - .../ABI/testing/sysfs-firmware-memmap | 2 +- trunk/Documentation/Changes | 4 +- trunk/Documentation/CodingStyle | 18 +- trunk/Documentation/DMA-API.txt | 2 +- trunk/Documentation/DocBook/Makefile | 2 +- .../Documentation/DocBook/device-drivers.tmpl | 418 - trunk/Documentation/DocBook/kernel-api.tmpl | 377 + trunk/Documentation/DocBook/uio-howto.tmpl | 88 - trunk/Documentation/IO-mapping.txt | 4 +- trunk/Documentation/PCI/PCIEBUS-HOWTO.txt | 2 +- trunk/Documentation/RCU/checklist.txt | 12 - trunk/Documentation/block/biodoc.txt | 11 +- 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.../blackfin/mach-bf548/include/mach/bf548.h | 12 - .../mach-bf548/include/mach/bfin_serial_5xx.h | 22 +- .../blackfin/mach-bf548/include/mach/gpio.h | 12 +- .../blackfin/mach-bf548/include/mach/irq.h | 8 +- .../mach-bf548/include/mach/portmux.h | 1 - trunk/arch/blackfin/mach-bf561/boards/Kconfig | 5 + .../arch/blackfin/mach-bf561/boards/Makefile | 1 + .../blackfin/mach-bf561/boards/cm_bf561.c | 15 +- .../mach-bf561/boards/generic_board.c | 113 + .../mach-bf561/include/mach/anomaly.h | 7 +- .../mach-bf561/include/mach/bfin_serial_5xx.h | 2 +- .../mach-bf561/include/mach/defBF561.h | 2 - .../mach-bf561/include/mach/portmux.h | 1 - trunk/arch/blackfin/mach-common/arch_checks.c | 9 - trunk/arch/blackfin/mach-common/cache.S | 22 - trunk/arch/blackfin/mach-common/clocks-init.c | 5 +- trunk/arch/blackfin/mach-common/dpmc_modes.S | 24 - trunk/arch/blackfin/mach-common/entry.S | 70 +- trunk/arch/blackfin/mach-common/head.S | 84 +- trunk/arch/blackfin/mach-common/interrupt.S | 14 +- .../arch/blackfin/mach-common/ints-priority.c | 137 +- trunk/arch/blackfin/mach-common/pm.c | 11 +- trunk/arch/blackfin/mach-common/smp.c | 6 +- trunk/arch/blackfin/mm/init.c | 2 +- trunk/arch/frv/mm/dma-alloc.c | 2 +- trunk/arch/ia64/Kconfig | 18 +- trunk/arch/ia64/configs/bigsur_defconfig | 2 +- trunk/arch/ia64/configs/xen_domu_defconfig | 1601 --- trunk/arch/ia64/configs/zx1_defconfig | 2 +- trunk/arch/ia64/hp/common/sba_iommu.c | 12 +- trunk/arch/ia64/include/asm/kvm.h | 4 - trunk/arch/ia64/include/asm/mmzone.h | 4 + trunk/arch/ia64/include/asm/sn/bte.h | 2 +- trunk/arch/ia64/kernel/iosapic.c | 2 +- trunk/arch/ia64/kernel/smpboot.c | 5 +- trunk/arch/ia64/kernel/unwind.c | 2 +- trunk/arch/ia64/kvm/kvm-ia64.c | 4 - trunk/arch/ia64/kvm/process.c | 17 +- trunk/arch/ia64/mm/numa.c | 4 +- trunk/arch/ia64/sn/kernel/bte.c | 7 +- trunk/arch/ia64/sn/kernel/io_acpi_init.c | 2 +- trunk/arch/ia64/sn/kernel/io_init.c | 2 +- trunk/arch/ia64/sn/pci/pcibr/pcibr_dma.c | 7 +- trunk/arch/ia64/xen/Kconfig | 3 +- trunk/arch/ia64/xen/xen_pv_ops.c | 4 +- trunk/arch/m32r/configs/m32104ut_defconfig | 2 +- trunk/arch/m68k/atari/ataints.c | 16 +- trunk/arch/m68k/atari/atakeyb.c | 4 +- trunk/arch/m68k/atari/config.c | 2 +- trunk/arch/m68k/atari/debug.c | 22 +- trunk/arch/m68k/atari/time.c | 8 +- trunk/arch/m68k/include/asm/atomic.h | 5 - trunk/arch/m68k/include/asm/bitops.h | 5 - trunk/arch/m68k/include/asm/bootinfo.h | 5 - trunk/arch/m68k/include/asm/bug.h | 5 - trunk/arch/m68k/include/asm/bugs.h | 5 - trunk/arch/m68k/include/asm/cache.h | 5 - trunk/arch/m68k/include/asm/cacheflush.h | 5 - trunk/arch/m68k/include/asm/checksum.h | 5 - trunk/arch/m68k/include/asm/current.h | 5 - trunk/arch/m68k/include/asm/delay.h | 5 - trunk/arch/m68k/include/asm/div64.h | 5 - trunk/arch/m68k/include/asm/dma-mapping.h | 5 - trunk/arch/m68k/include/asm/dma.h | 5 - trunk/arch/m68k/include/asm/elf.h | 5 - trunk/arch/m68k/include/asm/entry.h | 5 - trunk/arch/m68k/include/asm/fb.h | 5 - trunk/arch/m68k/include/asm/fpu.h | 5 - trunk/arch/m68k/include/asm/hardirq.h | 5 - trunk/arch/m68k/include/asm/hw_irq.h | 5 - trunk/arch/m68k/include/asm/io.h | 5 - trunk/arch/m68k/include/asm/irq.h | 5 - trunk/arch/m68k/include/asm/kmap_types.h | 5 - trunk/arch/m68k/include/asm/machdep.h | 5 - trunk/arch/m68k/include/asm/mc146818rtc.h | 5 - trunk/arch/m68k/include/asm/mmu.h | 5 - trunk/arch/m68k/include/asm/mmu_context.h | 5 - trunk/arch/m68k/include/asm/module.h | 5 - trunk/arch/m68k/include/asm/page.h | 5 - trunk/arch/m68k/include/asm/page_offset.h | 5 - trunk/arch/m68k/include/asm/param.h | 5 - trunk/arch/m68k/include/asm/pci.h | 5 - trunk/arch/m68k/include/asm/pgalloc.h | 5 - trunk/arch/m68k/include/asm/pgtable.h | 5 - trunk/arch/m68k/include/asm/processor.h | 5 - trunk/arch/m68k/include/asm/ptrace.h | 5 - trunk/arch/m68k/include/asm/scatterlist.h | 5 - trunk/arch/m68k/include/asm/segment.h | 5 - trunk/arch/m68k/include/asm/setup.h | 5 - trunk/arch/m68k/include/asm/sigcontext.h | 5 - trunk/arch/m68k/include/asm/siginfo.h | 5 - trunk/arch/m68k/include/asm/signal.h | 5 - trunk/arch/m68k/include/asm/string.h | 5 - trunk/arch/m68k/include/asm/swab.h | 5 - trunk/arch/m68k/include/asm/system.h | 5 - trunk/arch/m68k/include/asm/thread_info.h | 5 - trunk/arch/m68k/include/asm/timex.h | 5 - trunk/arch/m68k/include/asm/tlbflush.h | 5 - trunk/arch/m68k/include/asm/traps.h | 5 - trunk/arch/m68k/include/asm/uaccess.h | 5 - trunk/arch/m68k/include/asm/ucontext.h | 5 - trunk/arch/m68k/include/asm/unaligned.h | 5 - trunk/arch/m68k/include/asm/unistd.h | 5 - trunk/arch/m68knommu/Kconfig | 27 +- trunk/arch/m68knommu/Makefile | 1 + trunk/arch/m68knommu/include/asm/Kbuild | 1 + .../{m68k => m68knommu}/include/asm/MC68328.h | 0 .../{m68k => m68knommu}/include/asm/MC68332.h | 0 .../include/asm/MC68EZ328.h | 0 .../include/asm/MC68VZ328.h | 0 .../{m68k => m68knommu}/include/asm/anchor.h | 0 .../include/asm/atomic.h} | 0 .../{m68k => m68knommu}/include/asm/auxvec.h | 0 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| 2 +- trunk/arch/mips/kernel/scall64-n32.S | 28 +- trunk/arch/mips/kernel/scall64-o32.S | 40 +- trunk/arch/mips/kernel/signal.c | 5 +- trunk/arch/mips/kernel/signal32.c | 28 +- trunk/arch/mips/kernel/syscall.c | 26 +- trunk/arch/mips/kernel/traps.c | 16 +- trunk/arch/mips/lib/memcpy-inatomic.S | 2 +- trunk/arch/mips/lib/memcpy.S | 2 +- trunk/arch/mips/mm/c-r4k.c | 22 +- trunk/arch/mips/mm/cache.c | 5 +- trunk/arch/mips/mm/fault.c | 21 +- trunk/arch/mips/pci/pci-rc32434.c | 11 - trunk/arch/mips/rb532/devices.c | 57 +- trunk/arch/mips/rb532/gpio.c | 90 +- trunk/arch/mips/rb532/irq.c | 27 - trunk/arch/mips/rb532/serial.c | 2 +- trunk/arch/mips/txx9/generic/setup_tx4939.c | 22 - trunk/arch/mips/txx9/rbtx4939/setup.c | 1 - trunk/arch/mn10300/Kconfig | 1 - trunk/arch/mn10300/unit-asb2305/pci.c | 2 +- trunk/arch/parisc/include/asm/dma-mapping.h | 2 +- trunk/arch/parisc/kernel/pci-dma.c | 2 +- trunk/arch/powerpc/Kconfig | 4 + trunk/arch/powerpc/boot/cuboot-warp.c | 43 + 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trunk/net/core/net-sysfs.c | 4 +- trunk/net/core/net_namespace.c | 91 +- trunk/net/core/skbuff.c | 93 +- trunk/net/core/sock.c | 3 +- trunk/net/ipv4/cipso_ipv4.c | 9 +- trunk/net/ipv4/icmp.c | 2 +- trunk/net/ipv4/ipconfig.c | 6 +- trunk/net/ipv4/tcp.c | 3 +- trunk/net/ipv4/tcp_input.c | 9 +- trunk/net/ipv4/tcp_ipv4.c | 2 +- trunk/net/ipv4/tcp_output.c | 13 +- trunk/net/ipv4/tcp_scalable.c | 2 +- trunk/net/ipv4/udp.c | 68 +- trunk/net/ipv6/addrconf.c | 55 +- trunk/net/ipv6/af_inet6.c | 28 +- trunk/net/ipv6/icmp.c | 4 +- trunk/net/ipv6/inet6_hashtables.c | 4 +- trunk/net/ipv6/ip6_flowlabel.c | 8 +- trunk/net/ipv6/ip6_input.c | 2 +- trunk/net/ipv6/ip6_output.c | 67 +- trunk/net/ipv6/ip6_tunnel.c | 2 +- trunk/net/ipv6/ip6mr.c | 24 +- .../netfilter/nf_conntrack_proto_icmpv6.c | 30 +- trunk/net/ipv6/route.c | 2 +- trunk/net/key/af_key.c | 1 - trunk/net/mac80211/mlme.c | 4 +- trunk/net/mac80211/sta_info.h | 1 + trunk/net/mac80211/tx.c | 8 +- trunk/net/netfilter/nf_conntrack_netlink.c | 18 +- trunk/net/netfilter/nfnetlink_log.c | 8 +- trunk/net/netfilter/x_tables.c | 199 +- trunk/net/netfilter/xt_recent.c | 2 +- trunk/net/netfilter/xt_sctp.c | 2 +- trunk/net/netlink/af_netlink.c | 10 +- trunk/net/packet/af_packet.c | 17 +- trunk/net/phonet/pep-gprs.c | 1 + trunk/net/phonet/pep.c | 2 +- trunk/net/rxrpc/af_rxrpc.c | 5 +- trunk/net/sched/act_police.c | 13 +- trunk/net/sched/sch_drr.c | 6 +- trunk/net/sctp/input.c | 13 - trunk/net/sctp/output.c | 7 +- trunk/net/sctp/outqueue.c | 3 +- trunk/net/sctp/protocol.c | 16 +- trunk/net/sctp/sm_sideeffect.c | 54 +- trunk/net/sctp/sm_statefuns.c | 16 +- trunk/net/sunrpc/Kconfig | 78 - trunk/net/wimax/debugfs.c | 11 + trunk/net/wimax/id-table.c | 9 +- trunk/net/wimax/stack.c | 13 - trunk/net/wireless/reg.c | 145 +- trunk/net/xfrm/xfrm_user.c | 11 +- trunk/scripts/Makefile.build | 55 +- trunk/scripts/Makefile.modinst | 3 +- trunk/scripts/bootgraph.pl | 4 +- trunk/scripts/checkpatch.pl | 26 +- trunk/scripts/config | 4 - trunk/scripts/genksyms/genksyms.c | 21 +- trunk/scripts/genksyms/keywords.c_shipped | 189 +- trunk/scripts/genksyms/keywords.gperf | 2 + trunk/scripts/kallsyms.c | 21 +- trunk/scripts/kernel-doc | 40 +- trunk/scripts/markup_oops.pl | 161 +- trunk/scripts/mksysmap | 7 +- trunk/scripts/mod/file2alias.c | 18 +- trunk/scripts/package/mkspec | 8 - trunk/scripts/setlocalversion | 9 +- trunk/scripts/strip-symbols | 22 + trunk/scripts/tags.sh | 12 +- trunk/security/keys/keyctl.c | 1 - trunk/security/selinux/netlabel.c | 9 +- trunk/security/smack/smack_lsm.c | 43 +- trunk/security/smack/smackfs.c | 66 +- trunk/sound/arm/aaci.c | 6 +- trunk/sound/arm/pxa2xx-ac97-lib.c | 1 + trunk/sound/arm/pxa2xx-ac97.c | 2 + trunk/sound/arm/pxa2xx-pcm-lib.c | 3 +- trunk/sound/core/jack.c | 2 +- trunk/sound/core/oss/pcm_oss.c | 2 +- trunk/sound/core/oss/rate.c | 2 +- trunk/sound/drivers/mtpav.c | 3 +- trunk/sound/oss/dmasound/dmasound_atari.c | 16 +- trunk/sound/pci/Kconfig | 4 +- trunk/sound/pci/aw2/aw2-alsa.c | 2 +- trunk/sound/pci/emu10k1/emu10k1_main.c | 1 - trunk/sound/pci/hda/hda_codec.c | 19 +- trunk/sound/pci/hda/hda_codec.h | 1 - trunk/sound/pci/hda/hda_hwdep.c | 17 +- trunk/sound/pci/hda/hda_intel.c | 10 +- trunk/sound/pci/hda/hda_local.h | 2 - trunk/sound/pci/hda/hda_proc.c | 3 +- trunk/sound/pci/hda/patch_analog.c | 15 +- trunk/sound/pci/hda/patch_conexant.c | 14 +- trunk/sound/pci/hda/patch_intelhdmi.c | 61 +- trunk/sound/pci/hda/patch_realtek.c | 13 - trunk/sound/pci/hda/patch_sigmatel.c | 79 +- trunk/sound/pci/intel8x0.c | 2 +- trunk/sound/pci/oxygen/virtuoso.c | 20 +- trunk/sound/pci/pcxhr/pcxhr.h | 12 +- trunk/sound/soc/atmel/atmel-pcm.c | 2 + trunk/sound/soc/atmel/atmel_ssc_dai.c | 2 +- trunk/sound/soc/atmel/atmel_ssc_dai.h | 2 +- trunk/sound/soc/codecs/tlv320aic3x.c | 11 +- trunk/sound/soc/codecs/wm8350.c | 2 +- trunk/sound/soc/codecs/wm8753.c | 9 +- trunk/sound/soc/codecs/wm8990.c | 7 +- trunk/sound/soc/fsl/mpc8610_hpcd.c | 18 +- trunk/sound/soc/omap/omap-mcbsp.c | 4 - trunk/sound/soc/omap/omap-pcm.c | 5 +- trunk/sound/soc/omap/sdp3430.c | 4 +- trunk/sound/soc/pxa/corgi.c | 2 + trunk/sound/soc/pxa/e800_wm9712.c | 2 + trunk/sound/soc/pxa/em-x270.c | 2 + trunk/sound/soc/pxa/poodle.c | 2 + trunk/sound/soc/pxa/pxa-ssp.c | 2 +- trunk/sound/soc/pxa/pxa2xx-ac97.c | 2 +- trunk/sound/soc/pxa/pxa2xx-i2s.c | 2 +- trunk/sound/soc/pxa/spitz.c | 2 + trunk/sound/soc/pxa/tosa.c | 2 + trunk/sound/soc/soc-core.c | 5 +- trunk/sound/usb/usbaudio.c | 21 +- trunk/sound/usb/usbmidi.c | 1 - trunk/virt/kvm/iommu.c | 6 +- trunk/virt/kvm/kvm_main.c | 43 +- 2952 files changed, 42778 insertions(+), 90513 deletions(-) delete mode 100644 trunk/Documentation/DocBook/device-drivers.tmpl delete mode 100644 trunk/Documentation/block/queue-sysfs.txt create mode 100644 trunk/Documentation/dvb/README.flexcop delete mode 100644 trunk/Documentation/hwmon/hpfall.c delete mode 100644 trunk/Documentation/networking/ipv6.txt delete mode 100644 trunk/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt create mode 100644 trunk/Documentation/powerpc/mpc52xx-device-tree-bindings.txt delete mode 100644 trunk/arch/arm/configs/acs5k_defconfig delete mode 100644 trunk/arch/arm/configs/acs5k_tiny_defconfig delete mode 100644 trunk/arch/arm/configs/em_x270_defconfig rename trunk/arch/arm/configs/{cm_x2xx_defconfig => xm_x2xx_defconfig} (83%) delete mode 100644 trunk/arch/arm/include/asm/stacktrace.h delete mode 100644 trunk/arch/arm/include/asm/unwind.h create mode 100644 trunk/arch/arm/kernel/stacktrace.h delete mode 100644 trunk/arch/arm/kernel/unwind.c delete mode 100644 trunk/arch/arm/mach-ep93xx/dma-m2p.c delete mode 100644 trunk/arch/arm/mach-ep93xx/include/mach/dma.h create mode 100644 trunk/arch/arm/mach-ep93xx/include/mach/gesbc9312.h rename trunk/arch/arm/{plat-mxc => mach-imx}/include/mach/imxfb.h (96%) create mode 100644 trunk/arch/arm/mach-integrator/clock.h delete mode 100644 trunk/arch/arm/mach-kirkwood/mpp.c delete mode 100644 trunk/arch/arm/mach-kirkwood/mpp.h delete mode 100644 trunk/arch/arm/mach-kirkwood/sheevaplug-setup.c delete mode 100644 trunk/arch/arm/mach-ks8695/board-acs5k.c delete mode 100644 trunk/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c delete mode 100644 trunk/arch/arm/mach-mx1/scb9328.c delete mode 100644 trunk/arch/arm/mach-mx2/clock_imx21.c delete mode 100644 trunk/arch/arm/mach-mx3/clock-imx35.c delete mode 100644 trunk/arch/arm/mach-mx3/mx31moboard-devboard.c delete mode 100644 trunk/arch/arm/mach-mx3/mx31moboard-marxbot.c delete mode 100644 trunk/arch/arm/mach-mx3/qong.c rename trunk/arch/arm/mach-omap2/{sdrc2xxx.c => memory.c} (67%) create mode 100644 trunk/arch/arm/mach-omap2/memory.h delete mode 100644 trunk/arch/arm/mach-omap2/sdrc.c delete mode 100644 trunk/arch/arm/mach-orion5x/ts78xx-fpga.h delete mode 100644 trunk/arch/arm/mach-pxa/am300epd.c delete mode 100644 trunk/arch/arm/mach-pxa/csb701.c delete mode 100644 trunk/arch/arm/mach-pxa/csb726.c delete mode 100644 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(100%) rename trunk/arch/{m68k/include/asm/atomic_no.h => m68knommu/include/asm/atomic.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/auxvec.h (100%) rename trunk/arch/{m68k/include/asm/bitops_no.h => m68knommu/include/asm/bitops.h} (100%) rename trunk/arch/{m68k/include/asm/bootinfo_no.h => m68knommu/include/asm/bootinfo.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/bootstd.h (100%) rename trunk/arch/{m68k/include/asm/bug_no.h => m68knommu/include/asm/bug.h} (100%) rename trunk/arch/{m68k/include/asm/bugs_no.h => m68knommu/include/asm/bugs.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/byteorder.h rename trunk/arch/{m68k/include/asm/cache_no.h => m68knommu/include/asm/cache.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/cachectl.h rename trunk/arch/{m68k/include/asm/cacheflush_no.h => m68knommu/include/asm/cacheflush.h} (90%) rename trunk/arch/{m68k/include/asm/checksum_no.h => m68knommu/include/asm/checksum.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/coldfire.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/commproc.h (100%) create mode 100644 trunk/arch/m68knommu/include/asm/cputime.h rename trunk/arch/{m68k/include/asm/current_no.h => m68knommu/include/asm/current.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/dbg.h (100%) rename trunk/arch/{m68k/include/asm/delay_no.h => m68knommu/include/asm/delay.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/device.h (100%) rename trunk/arch/{m68k/include/asm/div64_no.h => m68knommu/include/asm/div64.h} (100%) rename trunk/arch/{m68k/include/asm/dma-mapping_no.h => m68knommu/include/asm/dma-mapping.h} (68%) rename trunk/arch/{m68k/include/asm/dma_no.h => m68knommu/include/asm/dma.h} (100%) rename trunk/arch/{m68k/include/asm/elf_no.h => m68knommu/include/asm/elf.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/elia.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/emergency-restart.h (100%) rename trunk/arch/{m68k/include/asm/entry_no.h => m68knommu/include/asm/entry.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/errno.h rename trunk/arch/{m68k/include/asm/fb_no.h => m68knommu/include/asm/fb.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/fcntl.h rename trunk/arch/{m68k => m68knommu}/include/asm/flat.h (100%) rename trunk/arch/{m68k/include/asm/fpu_no.h => m68knommu/include/asm/fpu.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/futex.h (100%) rename trunk/arch/{m68k/include/asm/hardirq_no.h => m68knommu/include/asm/hardirq.h} (100%) rename trunk/arch/{m68k/include/asm/hw_irq_no.h => m68knommu/include/asm/hw_irq.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/hwtest.h rename trunk/arch/{m68k/include/asm/io_no.h => m68knommu/include/asm/io.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/ioctl.h (100%) create mode 100644 trunk/arch/m68knommu/include/asm/ioctls.h create mode 100644 trunk/arch/m68knommu/include/asm/ipcbuf.h rename trunk/arch/{m68k/include/asm/irq_no.h => m68knommu/include/asm/irq.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/irq_regs.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/kdebug.h (100%) rename trunk/arch/{m68k/include/asm/kmap_types_no.h => m68knommu/include/asm/kmap_types.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/linkage.h create mode 100644 trunk/arch/m68knommu/include/asm/local.h rename trunk/arch/{m68k => m68knommu}/include/asm/m5206sim.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m520xsim.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m523xsim.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m5249sim.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m5272sim.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m527xsim.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m528xsim.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m5307sim.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m532xsim.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m5407sim.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m68360.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m68360_enet.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m68360_pram.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m68360_quicc.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/m68360_regs.h (100%) rename trunk/arch/{m68k/include/asm/machdep_no.h => m68knommu/include/asm/machdep.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/math-emu.h rename trunk/arch/{m68k/include/asm/mc146818rtc_no.h => m68knommu/include/asm/mc146818rtc.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/mcfcache.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/mcfdma.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/mcfmbus.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/mcfne.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/mcfpci.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/mcfpit.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/mcfsim.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/mcfsmc.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/mcftimer.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/mcfuart.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/mcfwdebug.h (100%) create mode 100644 trunk/arch/m68knommu/include/asm/md.h create mode 100644 trunk/arch/m68knommu/include/asm/mman.h rename trunk/arch/{m68k/include/asm/mmu_no.h => m68knommu/include/asm/mmu.h} (100%) rename trunk/arch/{m68k/include/asm/mmu_context_no.h => m68knommu/include/asm/mmu_context.h} (100%) rename trunk/arch/{m68k/include/asm/module_no.h => m68knommu/include/asm/module.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/movs.h create mode 100644 trunk/arch/m68knommu/include/asm/msgbuf.h rename trunk/arch/{m68k => m68knommu}/include/asm/mutex.h (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/nettel.h (100%) create mode 100644 trunk/arch/m68knommu/include/asm/openprom.h create mode 100644 trunk/arch/m68knommu/include/asm/oplib.h rename trunk/arch/{m68k/include/asm/page_no.h => m68knommu/include/asm/page.h} (100%) rename trunk/arch/{m68k/include/asm/page_offset_no.h => m68knommu/include/asm/page_offset.h} (100%) rename trunk/arch/{m68k/include/asm/param_no.h => m68knommu/include/asm/param.h} (100%) rename trunk/arch/{m68k/include/asm/pci_no.h => m68knommu/include/asm/pci.h} (96%) create mode 100644 trunk/arch/m68knommu/include/asm/percpu.h rename trunk/arch/{m68k/include/asm/pgalloc_no.h => m68knommu/include/asm/pgalloc.h} (100%) rename trunk/arch/{m68k/include/asm/pgtable_no.h => m68knommu/include/asm/pgtable.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/poll.h create mode 100644 trunk/arch/m68knommu/include/asm/posix_types.h rename trunk/arch/{m68k/include/asm/processor_no.h => m68knommu/include/asm/processor.h} (100%) rename trunk/arch/{m68k/include/asm/ptrace_no.h => m68knommu/include/asm/ptrace.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/quicc_simple.h (100%) create mode 100644 trunk/arch/m68knommu/include/asm/resource.h create mode 100644 trunk/arch/m68knommu/include/asm/rtc.h rename trunk/arch/{m68k/include/asm/scatterlist_no.h => m68knommu/include/asm/scatterlist.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/sections.h rename trunk/arch/{m68k/include/asm/segment_no.h => m68knommu/include/asm/segment.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/sembuf.h rename trunk/arch/{m68k/include/asm/setup_no.h => m68knommu/include/asm/setup.h} (84%) create mode 100644 trunk/arch/m68knommu/include/asm/shm.h create mode 100644 trunk/arch/m68knommu/include/asm/shmbuf.h create mode 100644 trunk/arch/m68knommu/include/asm/shmparam.h rename trunk/arch/{m68k/include/asm/sigcontext_no.h => m68knommu/include/asm/sigcontext.h} (100%) rename trunk/arch/{m68k/include/asm/siginfo_no.h => m68knommu/include/asm/siginfo.h} (100%) rename trunk/arch/{m68k/include/asm/signal_no.h => m68knommu/include/asm/signal.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/smp.h (100%) create mode 100644 trunk/arch/m68knommu/include/asm/socket.h create mode 100644 trunk/arch/m68knommu/include/asm/sockios.h create mode 100644 trunk/arch/m68knommu/include/asm/spinlock.h create mode 100644 trunk/arch/m68knommu/include/asm/stat.h create mode 100644 trunk/arch/m68knommu/include/asm/statfs.h rename trunk/arch/{m68k/include/asm/string_no.h => m68knommu/include/asm/string.h} (100%) rename trunk/arch/{m68k/include/asm/swab_no.h => m68knommu/include/asm/swab.h} (100%) rename trunk/arch/{m68k/include/asm/system_no.h => m68knommu/include/asm/system.h} (99%) create mode 100644 trunk/arch/m68knommu/include/asm/termbits.h create mode 100644 trunk/arch/m68knommu/include/asm/termios.h rename trunk/arch/{m68k/include/asm/thread_info_no.h => m68knommu/include/asm/thread_info.h} (100%) rename trunk/arch/{m68k/include/asm/timex_no.h => m68knommu/include/asm/timex.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/tlb.h rename trunk/arch/{m68k/include/asm/tlbflush_no.h => m68knommu/include/asm/tlbflush.h} (100%) rename trunk/arch/{m68k => m68knommu}/include/asm/topology.h (100%) rename trunk/arch/{m68k/include/asm/traps_no.h => m68knommu/include/asm/traps.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/types.h rename trunk/arch/{m68k/include/asm/uaccess_no.h => m68knommu/include/asm/uaccess.h} (100%) rename trunk/arch/{m68k/include/asm/ucontext_no.h => m68knommu/include/asm/ucontext.h} (100%) rename trunk/arch/{m68k/include/asm/unaligned_no.h => m68knommu/include/asm/unaligned.h} (100%) rename trunk/arch/{m68k/include/asm/unistd_no.h => m68knommu/include/asm/unistd.h} (100%) create mode 100644 trunk/arch/m68knommu/include/asm/user.h create mode 100644 trunk/arch/m68knommu/kernel/comempci.c create mode 100644 trunk/arch/powerpc/platforms/44x/warp-nand.c delete mode 100644 trunk/arch/sparc/include/asm/nmi.h delete mode 100644 trunk/arch/sparc/include/asm/pcr.h delete mode 100644 trunk/arch/sparc/kernel/nmi.c delete mode 100644 trunk/arch/sparc/kernel/pcr.c create mode 100644 trunk/arch/x86/scripts/strip-symbols delete mode 100644 trunk/drivers/dma/ipu/Makefile delete mode 100644 trunk/drivers/dma/ipu/ipu_idmac.c delete mode 100644 trunk/drivers/dma/ipu/ipu_intern.h delete mode 100644 trunk/drivers/dma/ipu/ipu_irq.c rename trunk/drivers/{misc/eeprom => i2c/chips}/at24.c (100%) rename trunk/drivers/{misc/eeprom => i2c/chips}/eeprom.c (100%) delete mode 100644 trunk/drivers/ide/at91_ide.c delete mode 100644 trunk/drivers/ide/cs5536.c delete mode 100644 trunk/drivers/media/dvb/firewire/Kconfig delete mode 100644 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100644 trunk/drivers/net/atl1c/atl1c_hw.h delete mode 100644 trunk/drivers/net/atl1c/atl1c_main.c delete mode 100644 trunk/drivers/rtc/rtc-dm355evm.c rename trunk/drivers/{misc/eeprom => spi}/at25.c (100%) delete mode 100644 trunk/drivers/staging/android/lowmemorykiller.txt delete mode 100644 trunk/drivers/usb/host/fhci-dbg.c delete mode 100644 trunk/drivers/usb/host/fhci-hcd.c delete mode 100644 trunk/drivers/usb/host/fhci-hub.c delete mode 100644 trunk/drivers/usb/host/fhci-mem.c delete mode 100644 trunk/drivers/usb/host/fhci-q.c delete mode 100644 trunk/drivers/usb/host/fhci-sched.c delete mode 100644 trunk/drivers/usb/host/fhci-tds.c delete mode 100644 trunk/drivers/usb/host/fhci.h rename trunk/drivers/video/backlight/{da903x_bl.c => da903x.c} (100%) delete mode 100644 trunk/drivers/video/broadsheetfb.c delete mode 100644 trunk/drivers/video/mx3fb.c delete mode 100644 trunk/fs/9p/Kconfig delete mode 100644 trunk/fs/adfs/Kconfig delete mode 100644 trunk/fs/affs/Kconfig delete mode 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mode 100644 trunk/fs/omfs/Kconfig delete mode 100644 trunk/fs/qnx4/Kconfig delete mode 100644 trunk/fs/reiserfs/Kconfig delete mode 100644 trunk/fs/romfs/Kconfig delete mode 100644 trunk/fs/smbfs/Kconfig delete mode 100644 trunk/fs/squashfs/Kconfig delete mode 100644 trunk/fs/sysfs/Kconfig delete mode 100644 trunk/fs/sysv/Kconfig delete mode 100644 trunk/fs/udf/Kconfig delete mode 100644 trunk/fs/ufs/Kconfig rename trunk/{arch/m68k/include/asm => include/asm-m68k}/Kbuild (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/a.out-core.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/a.out.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/adb_iop.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/amigahw.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/amigaints.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/amigayle.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/amipcmcia.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/apollodma.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/apollohw.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/atafd.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/atafdreg.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/atari_joystick.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/atari_stdma.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/atari_stram.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/atarihw.h (99%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/atariints.h (97%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/atarikb.h (100%) rename trunk/{arch/m68k/include/asm/atomic_mm.h => include/asm-m68k/atomic.h} (100%) create mode 100644 trunk/include/asm-m68k/auxvec.h rename trunk/{arch/m68k/include/asm/bitops_mm.h => include/asm-m68k/bitops.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/blinken.h (100%) rename trunk/{arch/m68k/include/asm/bootinfo_mm.h => include/asm-m68k/bootinfo.h} (100%) rename trunk/{arch/m68k/include/asm/bug_mm.h => include/asm-m68k/bug.h} (100%) rename trunk/{arch/m68k/include/asm/bugs_mm.h => include/asm-m68k/bugs.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/bvme6000hw.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/byteorder.h (100%) rename trunk/{arch/m68k/include/asm/cache_mm.h => include/asm-m68k/cache.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/cachectl.h (100%) rename trunk/{arch/m68k/include/asm/cacheflush_mm.h => include/asm-m68k/cacheflush.h} (100%) rename trunk/{arch/m68k/include/asm/checksum_mm.h => include/asm-m68k/checksum.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/contregs.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/cputime.h (100%) rename trunk/{arch/m68k/include/asm/current_mm.h => include/asm-m68k/current.h} (100%) rename trunk/{arch/m68k/include/asm/delay_mm.h => include/asm-m68k/delay.h} (100%) create mode 100644 trunk/include/asm-m68k/device.h rename trunk/{arch/m68k/include/asm/div64_mm.h => include/asm-m68k/div64.h} (100%) rename trunk/{arch/m68k/include/asm/dma-mapping_mm.h => include/asm-m68k/dma-mapping.h} (100%) rename trunk/{arch/m68k/include/asm/dma_mm.h => include/asm-m68k/dma.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/dsp56k.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/dvma.h (100%) rename trunk/{arch/m68k/include/asm/elf_mm.h => include/asm-m68k/elf.h} (100%) create mode 100644 trunk/include/asm-m68k/emergency-restart.h rename trunk/{arch/m68k/include/asm/entry_mm.h => include/asm-m68k/entry.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/errno.h (100%) rename trunk/{arch/m68k/include/asm/fb_mm.h => include/asm-m68k/fb.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/fbio.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/fcntl.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/floppy.h (100%) rename trunk/{arch/m68k/include/asm/fpu_mm.h => include/asm-m68k/fpu.h} (100%) create mode 100644 trunk/include/asm-m68k/futex.h rename trunk/{arch/m68k/include/asm/hardirq_mm.h => include/asm-m68k/hardirq.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/hp300hw.h (100%) rename trunk/{arch/m68k/include/asm/hw_irq_mm.h => include/asm-m68k/hw_irq.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/hwtest.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/ide.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/idprom.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/intersil.h (100%) rename trunk/{arch/m68k/include/asm/io_mm.h => include/asm-m68k/io.h} (100%) create mode 100644 trunk/include/asm-m68k/ioctl.h rename trunk/{arch/m68k/include/asm => include/asm-m68k}/ioctls.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/ipcbuf.h (100%) rename trunk/{arch/m68k/include/asm/irq_mm.h => include/asm-m68k/irq.h} (100%) create mode 100644 trunk/include/asm-m68k/irq_regs.h create mode 100644 trunk/include/asm-m68k/kdebug.h rename trunk/{arch/m68k/include/asm/kmap_types_mm.h => include/asm-m68k/kmap_types.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/linkage.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/local.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/mac_asc.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/mac_baboon.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/mac_iop.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/mac_mouse.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/mac_oss.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/mac_psc.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/mac_via.h (100%) rename trunk/{arch/m68k/include/asm/machdep_mm.h => include/asm-m68k/machdep.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/machines.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/machw.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/macintosh.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/macints.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/math-emu.h (100%) rename trunk/{arch/m68k/include/asm/mc146818rtc_mm.h => include/asm-m68k/mc146818rtc.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/md.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/mman.h (100%) rename trunk/{arch/m68k/include/asm/mmu_mm.h => include/asm-m68k/mmu.h} (100%) rename trunk/{arch/m68k/include/asm/mmu_context_mm.h => include/asm-m68k/mmu_context.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/mmzone.h (100%) rename trunk/{arch/m68k/include/asm/module_mm.h => include/asm-m68k/module.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/motorola_pgalloc.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/motorola_pgtable.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/movs.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/msgbuf.h (100%) create mode 100644 trunk/include/asm-m68k/mutex.h rename trunk/{arch/m68k/include/asm => include/asm-m68k}/mvme147hw.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/mvme16xhw.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/nubus.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/openprom.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/oplib.h (100%) rename trunk/{arch/m68k/include/asm/page_mm.h => include/asm-m68k/page.h} (100%) rename trunk/{arch/m68k/include/asm/page_offset_mm.h => include/asm-m68k/page_offset.h} (100%) rename trunk/{arch/m68k/include/asm/param_mm.h => include/asm-m68k/param.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/parport.h (100%) rename trunk/{arch/m68k/include/asm/pci_mm.h => include/asm-m68k/pci.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/percpu.h (100%) rename trunk/{arch/m68k/include/asm/pgalloc_mm.h => include/asm-m68k/pgalloc.h} (100%) rename trunk/{arch/m68k/include/asm/pgtable_mm.h => include/asm-m68k/pgtable.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/poll.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/posix_types.h (100%) rename trunk/{arch/m68k/include/asm/processor_mm.h => include/asm-m68k/processor.h} (100%) rename trunk/{arch/m68k/include/asm/ptrace_mm.h => include/asm-m68k/ptrace.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/q40_master.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/q40ints.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/raw_io.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/resource.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/rtc.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/sbus.h (100%) rename trunk/{arch/m68k/include/asm/scatterlist_mm.h => include/asm-m68k/scatterlist.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/sections.h (100%) rename trunk/{arch/m68k/include/asm/segment_mm.h => include/asm-m68k/segment.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/sembuf.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/serial.h (100%) rename trunk/{arch/m68k/include/asm/setup_mm.h => include/asm-m68k/setup.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/shm.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/shmbuf.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/shmparam.h (100%) rename trunk/{arch/m68k/include/asm/sigcontext_mm.h => include/asm-m68k/sigcontext.h} (100%) rename trunk/{arch/m68k/include/asm/siginfo_mm.h => include/asm-m68k/siginfo.h} (100%) rename trunk/{arch/m68k/include/asm/signal_mm.h => include/asm-m68k/signal.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/socket.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/sockios.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/spinlock.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/stat.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/statfs.h (100%) rename trunk/{arch/m68k/include/asm/string_mm.h => include/asm-m68k/string.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/sun3-head.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/sun3_pgalloc.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/sun3_pgtable.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/sun3ints.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/sun3mmu.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/sun3x.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/sun3xflop.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/sun3xprom.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/suspend.h (100%) rename trunk/{arch/m68k/include/asm/swab_mm.h => include/asm-m68k/swab.h} (100%) rename trunk/{arch/m68k/include/asm/system_mm.h => include/asm-m68k/system.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/termbits.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/termios.h (100%) rename trunk/{arch/m68k/include/asm/thread_info_mm.h => include/asm-m68k/thread_info.h} (100%) rename trunk/{arch/m68k/include/asm/timex_mm.h => include/asm-m68k/timex.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/tlb.h (100%) rename trunk/{arch/m68k/include/asm/tlbflush_mm.h => include/asm-m68k/tlbflush.h} (100%) create mode 100644 trunk/include/asm-m68k/topology.h rename trunk/{arch/m68k/include/asm/traps_mm.h => include/asm-m68k/traps.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/types.h (100%) rename trunk/{arch/m68k/include/asm/uaccess_mm.h => include/asm-m68k/uaccess.h} (100%) rename trunk/{arch/m68k/include/asm/ucontext_mm.h => include/asm-m68k/ucontext.h} (100%) rename trunk/{arch/m68k/include/asm/unaligned_mm.h => include/asm-m68k/unaligned.h} (100%) rename trunk/{arch/m68k/include/asm/unistd_mm.h => include/asm-m68k/unistd.h} (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/user.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/virtconvert.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/xor.h (100%) rename trunk/{arch/m68k/include/asm => include/asm-m68k}/zorro.h (100%) delete mode 100644 trunk/include/video/broadsheetfb.h delete mode 100644 trunk/net/sunrpc/Kconfig create mode 100644 trunk/scripts/strip-symbols diff --git a/[refs] b/[refs] index fb49cb0d39a6..c66ef3ea8e52 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7d83f8fca517b123cf0136503a9e50974f65ec49 +refs/heads/master: d1b95607e1dde59e2ffae661732c8da34aba445c diff --git a/trunk/.mailmap b/trunk/.mailmap index a62e6a84fd1e..4e83e7b52d15 100644 --- a/trunk/.mailmap +++ b/trunk/.mailmap @@ -92,7 +92,6 @@ Rudolf Marek Rui Saraiva Sachin P Sant Sam Ravnborg -Sascha Hauer S.Çağlar Onur Simon Kelley Stéphane Witzmann @@ -101,7 +100,6 @@ Tejun Heo Thomas Graf Tony Luck Tsuneo Yoshioka -Uwe Kleine-König -Uwe Kleine-König Uwe Kleine-König +Uwe Kleine-König Valdis Kletnieks diff --git a/trunk/CREDITS b/trunk/CREDITS index 5e0736722afd..2b39168c06aa 100644 --- a/trunk/CREDITS +++ b/trunk/CREDITS @@ -2166,6 +2166,7 @@ D: Initial implementation of VC's, pty's and select() N: Pavel Machek E: pavel@ucw.cz +E: pavel@suse.cz D: Softcursor for vga, hypertech cdrom support, vcsa bugfix, nbd D: sun4/330 port, capabilities for elf, speedup for rm on ext2, USB, D: work on suspend-to-ram/disk, killing duplicates from ioctl32 diff --git a/trunk/Documentation/ABI/testing/sysfs-bus-pci b/trunk/Documentation/ABI/testing/sysfs-bus-pci index e638e15a8895..ceddcff4082a 100644 --- a/trunk/Documentation/ABI/testing/sysfs-bus-pci +++ b/trunk/Documentation/ABI/testing/sysfs-bus-pci @@ -1,46 +1,3 @@ -What: /sys/bus/pci/drivers/.../bind -Date: December 2003 -Contact: linux-pci@vger.kernel.org -Description: - Writing a device location to this file will cause - the driver to attempt to bind to the device found at - this location. This is useful for overriding default - bindings. The format for the location is: DDDD:BB:DD.F. - That is Domain:Bus:Device.Function and is the same as - found in /sys/bus/pci/devices/. For example: - # echo 0000:00:19.0 > /sys/bus/pci/drivers/foo/bind - (Note: kernels before 2.6.28 may require echo -n). - -What: /sys/bus/pci/drivers/.../unbind -Date: December 2003 -Contact: linux-pci@vger.kernel.org -Description: - Writing a device location to this file will cause the - driver to attempt to unbind from the device found at - this location. This may be useful when overriding default - bindings. The format for the location is: DDDD:BB:DD.F. - That is Domain:Bus:Device.Function and is the same as - found in /sys/bus/pci/devices/. For example: - # echo 0000:00:19.0 > /sys/bus/pci/drivers/foo/unbind - (Note: kernels before 2.6.28 may require echo -n). - -What: /sys/bus/pci/drivers/.../new_id -Date: December 2003 -Contact: linux-pci@vger.kernel.org -Description: - Writing a device ID to this file will attempt to - dynamically add a new device ID to a PCI device driver. - This may allow the driver to support more hardware than - was included in the driver's static device ID support - table at compile time. The format for the device ID is: - VVVV DDDD SVVV SDDD CCCC MMMM PPPP. That is Vendor ID, - Device ID, Subsystem Vendor ID, Subsystem Device ID, - Class, Class Mask, and Private Driver Data. The Vendor ID - and Device ID fields are required, the rest are optional. - Upon successfully adding an ID, the driver will probe - for the device and attempt to bind to it. For example: - # echo "8086 10f5" > /sys/bus/pci/drivers/foo/new_id - What: /sys/bus/pci/devices/.../vpd Date: February 2008 Contact: Ben Hutchings diff --git a/trunk/Documentation/ABI/testing/sysfs-firmware-memmap b/trunk/Documentation/ABI/testing/sysfs-firmware-memmap index eca0d65087dc..0d99ee6ae02e 100644 --- a/trunk/Documentation/ABI/testing/sysfs-firmware-memmap +++ b/trunk/Documentation/ABI/testing/sysfs-firmware-memmap @@ -1,6 +1,6 @@ What: /sys/firmware/memmap/ Date: June 2008 -Contact: Bernhard Walle +Contact: Bernhard Walle Description: On all platforms, the firmware provides a memory map which the kernel reads. The resources from that memory map are registered diff --git a/trunk/Documentation/Changes b/trunk/Documentation/Changes index b95082be4d5e..cb2b141b1c3e 100644 --- a/trunk/Documentation/Changes +++ b/trunk/Documentation/Changes @@ -33,12 +33,10 @@ o Gnu make 3.79.1 # make --version o binutils 2.12 # ld -v o util-linux 2.10o # fdformat --version o module-init-tools 0.9.10 # depmod -V -o e2fsprogs 1.41.4 # e2fsck -V +o e2fsprogs 1.29 # tune2fs o jfsutils 1.1.3 # fsck.jfs -V o reiserfsprogs 3.6.3 # reiserfsck -V 2>&1|grep reiserfsprogs o xfsprogs 2.6.0 # xfs_db -V -o squashfs-tools 4.0 # mksquashfs -version -o btrfs-progs 0.18 # btrfsck o pcmciautils 004 # pccardctl -V o quota-tools 3.09 # quota -V o PPP 2.4.0 # pppd --version diff --git a/trunk/Documentation/CodingStyle b/trunk/Documentation/CodingStyle index 72968cd5eaf3..1875e502f872 100644 --- a/trunk/Documentation/CodingStyle +++ b/trunk/Documentation/CodingStyle @@ -483,25 +483,17 @@ values. To do the latter, you can stick the following in your .emacs file: (* (max steps 1) c-basic-offset))) -(add-hook 'c-mode-common-hook - (lambda () - ;; Add kernel style - (c-add-style - "linux-tabs-only" - '("linux" (c-offsets-alist - (arglist-cont-nonempty - c-lineup-gcc-asm-reg - c-lineup-arglist-tabs-only)))))) - (add-hook 'c-mode-hook (lambda () (let ((filename (buffer-file-name))) ;; Enable kernel mode for the appropriate files (when (and filename - (string-match (expand-file-name "~/src/linux-trees") - filename)) + (string-match "~/src/linux-trees" filename)) (setq indent-tabs-mode t) - (c-set-style "linux-tabs-only"))))) + (c-set-style "linux") + (c-set-offset 'arglist-cont-nonempty + '(c-lineup-gcc-asm-reg + c-lineup-arglist-tabs-only)))))) This will make emacs go better with the kernel coding style for C files below ~/src/linux-trees. diff --git a/trunk/Documentation/DMA-API.txt b/trunk/Documentation/DMA-API.txt index 2a3fcc55e981..52441694fe03 100644 --- a/trunk/Documentation/DMA-API.txt +++ b/trunk/Documentation/DMA-API.txt @@ -5,7 +5,7 @@ This document describes the DMA API. For a more gentle introduction phrased in terms of the pci_ equivalents (and actual examples) see -Documentation/PCI/PCI-DMA-mapping.txt. +DMA-mapping.txt This API is split into two pieces. Part I describes the API and the corresponding pci_ API. Part II describes the extensions to the API diff --git a/trunk/Documentation/DocBook/Makefile b/trunk/Documentation/DocBook/Makefile index 1462ed86d40a..dc3154e49279 100644 --- a/trunk/Documentation/DocBook/Makefile +++ b/trunk/Documentation/DocBook/Makefile @@ -6,7 +6,7 @@ # To add a new book the only step required is to add the book to the # list of DOCBOOKS. -DOCBOOKS := z8530book.xml mcabook.xml device-drivers.xml \ +DOCBOOKS := z8530book.xml mcabook.xml \ kernel-hacking.xml kernel-locking.xml deviceiobook.xml \ procfs-guide.xml writing_usb_driver.xml networking.xml \ kernel-api.xml filesystems.xml lsm.xml usb.xml kgdb.xml \ diff --git a/trunk/Documentation/DocBook/device-drivers.tmpl b/trunk/Documentation/DocBook/device-drivers.tmpl deleted file mode 100644 index 94a20fe8fedf..000000000000 --- a/trunk/Documentation/DocBook/device-drivers.tmpl +++ /dev/null @@ -1,418 +0,0 @@ - - - - - - Linux Device Drivers - - - - This documentation is free software; you can redistribute - it and/or modify it under the terms of the GNU General Public - License as published by the Free Software Foundation; either - version 2 of the License, or (at your option) any later - version. - - - - This program is distributed in the hope that it will be - useful, but WITHOUT ANY WARRANTY; without even the implied - warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - See the GNU General Public License for more details. - - - - You should have received a copy of the GNU General Public - License along with this program; if not, write to the Free - Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, - MA 02111-1307 USA - - - - For more details see the file COPYING in the source - distribution of Linux. - - - - - - - - Driver Basics - Driver Entry and Exit points -!Iinclude/linux/init.h - - - Atomic and pointer manipulation -!Iarch/x86/include/asm/atomic_32.h -!Iarch/x86/include/asm/unaligned.h - - - Delaying, scheduling, and timer routines -!Iinclude/linux/sched.h -!Ekernel/sched.c -!Ekernel/timer.c - - High-resolution timers -!Iinclude/linux/ktime.h -!Iinclude/linux/hrtimer.h -!Ekernel/hrtimer.c - - Workqueues and Kevents -!Ekernel/workqueue.c - - Internal Functions -!Ikernel/exit.c -!Ikernel/signal.c -!Iinclude/linux/kthread.h -!Ekernel/kthread.c - - - Kernel objects manipulation - -!Elib/kobject.c - - - Kernel utility functions -!Iinclude/linux/kernel.h -!Ekernel/printk.c -!Ekernel/panic.c -!Ekernel/sys.c -!Ekernel/rcupdate.c - - - Device Resource Management -!Edrivers/base/devres.c - - - - - - Device drivers infrastructure - Device Drivers Base - -!Edrivers/base/driver.c -!Edrivers/base/core.c -!Edrivers/base/class.c -!Edrivers/base/firmware_class.c -!Edrivers/base/transport_class.c - -!Edrivers/base/sys.c - -!Edrivers/base/platform.c -!Edrivers/base/bus.c - - Device Drivers Power Management -!Edrivers/base/power/main.c - - Device Drivers ACPI Support - -!Edrivers/acpi/scan.c -!Idrivers/acpi/scan.c - - - Device drivers PnP support -!Idrivers/pnp/core.c - -!Edrivers/pnp/card.c -!Idrivers/pnp/driver.c -!Edrivers/pnp/manager.c -!Edrivers/pnp/support.c - - Userspace IO devices -!Edrivers/uio/uio.c -!Iinclude/linux/uio_driver.h - - - - - Parallel Port Devices -!Iinclude/linux/parport.h -!Edrivers/parport/ieee1284.c -!Edrivers/parport/share.c -!Idrivers/parport/daisy.c - - - - Message-based devices - Fusion message devices -!Edrivers/message/fusion/mptbase.c -!Idrivers/message/fusion/mptbase.c -!Edrivers/message/fusion/mptscsih.c -!Idrivers/message/fusion/mptscsih.c -!Idrivers/message/fusion/mptctl.c -!Idrivers/message/fusion/mptspi.c -!Idrivers/message/fusion/mptfc.c -!Idrivers/message/fusion/mptlan.c - - I2O message devices -!Iinclude/linux/i2o.h -!Idrivers/message/i2o/core.h -!Edrivers/message/i2o/iop.c -!Idrivers/message/i2o/iop.c -!Idrivers/message/i2o/config-osm.c -!Edrivers/message/i2o/exec-osm.c -!Idrivers/message/i2o/exec-osm.c -!Idrivers/message/i2o/bus-osm.c -!Edrivers/message/i2o/device.c -!Idrivers/message/i2o/device.c -!Idrivers/message/i2o/driver.c -!Idrivers/message/i2o/pci.c -!Idrivers/message/i2o/i2o_block.c -!Idrivers/message/i2o/i2o_scsi.c -!Idrivers/message/i2o/i2o_proc.c - - - - - Sound Devices -!Iinclude/sound/core.h -!Esound/sound_core.c -!Iinclude/sound/pcm.h -!Esound/core/pcm.c -!Esound/core/device.c -!Esound/core/info.c -!Esound/core/rawmidi.c -!Esound/core/sound.c -!Esound/core/memory.c -!Esound/core/pcm_memory.c -!Esound/core/init.c -!Esound/core/isadma.c -!Esound/core/control.c -!Esound/core/pcm_lib.c -!Esound/core/hwdep.c -!Esound/core/pcm_native.c -!Esound/core/memalloc.c - - - - - 16x50 UART Driver -!Iinclude/linux/serial_core.h -!Edrivers/serial/serial_core.c -!Edrivers/serial/8250.c - - - - Frame Buffer Library - - - The frame buffer drivers depend heavily on four data structures. - These structures are declared in include/linux/fb.h. They are - fb_info, fb_var_screeninfo, fb_fix_screeninfo and fb_monospecs. - The last three can be made available to and from userland. - - - - fb_info defines the current state of a particular video card. - Inside fb_info, there exists a fb_ops structure which is a - collection of needed functions to make fbdev and fbcon work. - fb_info is only visible to the kernel. - - - - fb_var_screeninfo is used to describe the features of a video card - that are user defined. With fb_var_screeninfo, things such as - depth and the resolution may be defined. - - - - The next structure is fb_fix_screeninfo. This defines the - properties of a card that are created when a mode is set and can't - be changed otherwise. A good example of this is the start of the - frame buffer memory. This "locks" the address of the frame buffer - memory, so that it cannot be changed or moved. - - - - The last structure is fb_monospecs. In the old API, there was - little importance for fb_monospecs. This allowed for forbidden things - such as setting a mode of 800x600 on a fix frequency monitor. With - the new API, fb_monospecs prevents such things, and if used - correctly, can prevent a monitor from being cooked. fb_monospecs - will not be useful until kernels 2.5.x. - - - Frame Buffer Memory -!Edrivers/video/fbmem.c - - - Frame Buffer Colormap -!Edrivers/video/fbcmap.c - - - Frame Buffer Video Mode Database -!Idrivers/video/modedb.c -!Edrivers/video/modedb.c - - Frame Buffer Macintosh Video Mode Database -!Edrivers/video/macmodes.c - - Frame Buffer Fonts - - Refer to the file drivers/video/console/fonts.c for more information. - - - - - - - Input Subsystem -!Iinclude/linux/input.h -!Edrivers/input/input.c -!Edrivers/input/ff-core.c -!Edrivers/input/ff-memless.c - - - - Serial Peripheral Interface (SPI) - - SPI is the "Serial Peripheral Interface", widely used with - embedded systems because it is a simple and efficient - interface: basically a multiplexed shift register. - Its three signal wires hold a clock (SCK, often in the range - of 1-20 MHz), a "Master Out, Slave In" (MOSI) data line, and - a "Master In, Slave Out" (MISO) data line. - SPI is a full duplex protocol; for each bit shifted out the - MOSI line (one per clock) another is shifted in on the MISO line. - Those bits are assembled into words of various sizes on the - way to and from system memory. - An additional chipselect line is usually active-low (nCS); - four signals are normally used for each peripheral, plus - sometimes an interrupt. - - - The SPI bus facilities listed here provide a generalized - interface to declare SPI busses and devices, manage them - according to the standard Linux driver model, and perform - input/output operations. - At this time, only "master" side interfaces are supported, - where Linux talks to SPI peripherals and does not implement - such a peripheral itself. - (Interfaces to support implementing SPI slaves would - necessarily look different.) - - - The programming interface is structured around two kinds of driver, - and two kinds of device. - A "Controller Driver" abstracts the controller hardware, which may - be as simple as a set of GPIO pins or as complex as a pair of FIFOs - connected to dual DMA engines on the other side of the SPI shift - register (maximizing throughput). Such drivers bridge between - whatever bus they sit on (often the platform bus) and SPI, and - expose the SPI side of their device as a - struct spi_master. - SPI devices are children of that master, represented as a - struct spi_device and manufactured from - struct spi_board_info descriptors which - are usually provided by board-specific initialization code. - A struct spi_driver is called a - "Protocol Driver", and is bound to a spi_device using normal - driver model calls. - - - The I/O model is a set of queued messages. Protocol drivers - submit one or more struct spi_message - objects, which are processed and completed asynchronously. - (There are synchronous wrappers, however.) Messages are - built from one or more struct spi_transfer - objects, each of which wraps a full duplex SPI transfer. - A variety of protocol tweaking options are needed, because - different chips adopt very different policies for how they - use the bits transferred with SPI. - -!Iinclude/linux/spi/spi.h -!Fdrivers/spi/spi.c spi_register_board_info -!Edrivers/spi/spi.c - - - - I<superscript>2</superscript>C and SMBus Subsystem - - - I2C (or without fancy typography, "I2C") - is an acronym for the "Inter-IC" bus, a simple bus protocol which is - widely used where low data rate communications suffice. - Since it's also a licensed trademark, some vendors use another - name (such as "Two-Wire Interface", TWI) for the same bus. - I2C only needs two signals (SCL for clock, SDA for data), conserving - board real estate and minimizing signal quality issues. - Most I2C devices use seven bit addresses, and bus speeds of up - to 400 kHz; there's a high speed extension (3.4 MHz) that's not yet - found wide use. - I2C is a multi-master bus; open drain signaling is used to - arbitrate between masters, as well as to handshake and to - synchronize clocks from slower clients. - - - - The Linux I2C programming interfaces support only the master - side of bus interactions, not the slave side. - The programming interface is structured around two kinds of driver, - and two kinds of device. - An I2C "Adapter Driver" abstracts the controller hardware; it binds - to a physical device (perhaps a PCI device or platform_device) and - exposes a struct i2c_adapter representing - each I2C bus segment it manages. - On each I2C bus segment will be I2C devices represented by a - struct i2c_client. Those devices will - be bound to a struct i2c_driver, - which should follow the standard Linux driver model. - (At this writing, a legacy model is more widely used.) - There are functions to perform various I2C protocol operations; at - this writing all such functions are usable only from task context. - - - - The System Management Bus (SMBus) is a sibling protocol. Most SMBus - systems are also I2C conformant. The electrical constraints are - tighter for SMBus, and it standardizes particular protocol messages - and idioms. Controllers that support I2C can also support most - SMBus operations, but SMBus controllers don't support all the protocol - options that an I2C controller will. - There are functions to perform various SMBus protocol operations, - either using I2C primitives or by issuing SMBus commands to - i2c_adapter devices which don't support those I2C operations. - - -!Iinclude/linux/i2c.h -!Fdrivers/i2c/i2c-boardinfo.c i2c_register_board_info -!Edrivers/i2c/i2c-core.c - - - diff --git a/trunk/Documentation/DocBook/kernel-api.tmpl b/trunk/Documentation/DocBook/kernel-api.tmpl index bc962cda6504..5818ff75786a 100644 --- a/trunk/Documentation/DocBook/kernel-api.tmpl +++ b/trunk/Documentation/DocBook/kernel-api.tmpl @@ -38,6 +38,58 @@ + + Driver Basics + Driver Entry and Exit points +!Iinclude/linux/init.h + + + Atomic and pointer manipulation +!Iarch/x86/include/asm/atomic_32.h +!Iarch/x86/include/asm/unaligned.h + + + Delaying, scheduling, and timer routines +!Iinclude/linux/sched.h +!Ekernel/sched.c +!Ekernel/timer.c + + High-resolution timers +!Iinclude/linux/ktime.h +!Iinclude/linux/hrtimer.h +!Ekernel/hrtimer.c + + Workqueues and Kevents +!Ekernel/workqueue.c + + Internal Functions +!Ikernel/exit.c +!Ikernel/signal.c +!Iinclude/linux/kthread.h +!Ekernel/kthread.c + + + Kernel objects manipulation + +!Elib/kobject.c + + + Kernel utility functions +!Iinclude/linux/kernel.h +!Ekernel/printk.c +!Ekernel/panic.c +!Ekernel/sys.c +!Ekernel/rcupdate.c + + + Device Resource Management +!Edrivers/base/devres.c + + + + Data Types Doubly Linked Lists @@ -246,6 +298,62 @@ X!Earch/x86/kernel/mca_32.c !Ikernel/acct.c + + Device drivers infrastructure + Device Drivers Base + +!Edrivers/base/driver.c +!Edrivers/base/core.c +!Edrivers/base/class.c +!Edrivers/base/firmware_class.c +!Edrivers/base/transport_class.c + +!Edrivers/base/sys.c + +!Edrivers/base/platform.c +!Edrivers/base/bus.c + + Device Drivers Power Management +!Edrivers/base/power/main.c + + Device Drivers ACPI Support + +!Edrivers/acpi/scan.c +!Idrivers/acpi/scan.c + + + Device drivers PnP support +!Idrivers/pnp/core.c + +!Edrivers/pnp/card.c +!Idrivers/pnp/driver.c +!Edrivers/pnp/manager.c +!Edrivers/pnp/support.c + + Userspace IO devices +!Edrivers/uio/uio.c +!Iinclude/linux/uio_driver.h + + + Block Devices !Eblock/blk-core.c @@ -273,6 +381,275 @@ X!Earch/x86/kernel/mca_32.c !Edrivers/char/misc.c + + Parallel Port Devices +!Iinclude/linux/parport.h +!Edrivers/parport/ieee1284.c +!Edrivers/parport/share.c +!Idrivers/parport/daisy.c + + + + Message-based devices + Fusion message devices +!Edrivers/message/fusion/mptbase.c +!Idrivers/message/fusion/mptbase.c +!Edrivers/message/fusion/mptscsih.c +!Idrivers/message/fusion/mptscsih.c +!Idrivers/message/fusion/mptctl.c +!Idrivers/message/fusion/mptspi.c +!Idrivers/message/fusion/mptfc.c +!Idrivers/message/fusion/mptlan.c + + I2O message devices +!Iinclude/linux/i2o.h +!Idrivers/message/i2o/core.h +!Edrivers/message/i2o/iop.c +!Idrivers/message/i2o/iop.c +!Idrivers/message/i2o/config-osm.c +!Edrivers/message/i2o/exec-osm.c +!Idrivers/message/i2o/exec-osm.c +!Idrivers/message/i2o/bus-osm.c +!Edrivers/message/i2o/device.c +!Idrivers/message/i2o/device.c +!Idrivers/message/i2o/driver.c +!Idrivers/message/i2o/pci.c +!Idrivers/message/i2o/i2o_block.c +!Idrivers/message/i2o/i2o_scsi.c +!Idrivers/message/i2o/i2o_proc.c + + + + + Sound Devices +!Iinclude/sound/core.h +!Esound/sound_core.c +!Iinclude/sound/pcm.h +!Esound/core/pcm.c +!Esound/core/device.c +!Esound/core/info.c +!Esound/core/rawmidi.c +!Esound/core/sound.c +!Esound/core/memory.c +!Esound/core/pcm_memory.c +!Esound/core/init.c +!Esound/core/isadma.c +!Esound/core/control.c +!Esound/core/pcm_lib.c +!Esound/core/hwdep.c +!Esound/core/pcm_native.c +!Esound/core/memalloc.c + + + + + 16x50 UART Driver +!Iinclude/linux/serial_core.h +!Edrivers/serial/serial_core.c +!Edrivers/serial/8250.c + + + + Frame Buffer Library + + + The frame buffer drivers depend heavily on four data structures. + These structures are declared in include/linux/fb.h. They are + fb_info, fb_var_screeninfo, fb_fix_screeninfo and fb_monospecs. + The last three can be made available to and from userland. + + + + fb_info defines the current state of a particular video card. + Inside fb_info, there exists a fb_ops structure which is a + collection of needed functions to make fbdev and fbcon work. + fb_info is only visible to the kernel. + + + + fb_var_screeninfo is used to describe the features of a video card + that are user defined. With fb_var_screeninfo, things such as + depth and the resolution may be defined. + + + + The next structure is fb_fix_screeninfo. This defines the + properties of a card that are created when a mode is set and can't + be changed otherwise. A good example of this is the start of the + frame buffer memory. This "locks" the address of the frame buffer + memory, so that it cannot be changed or moved. + + + + The last structure is fb_monospecs. In the old API, there was + little importance for fb_monospecs. This allowed for forbidden things + such as setting a mode of 800x600 on a fix frequency monitor. With + the new API, fb_monospecs prevents such things, and if used + correctly, can prevent a monitor from being cooked. fb_monospecs + will not be useful until kernels 2.5.x. + + + Frame Buffer Memory +!Edrivers/video/fbmem.c + + + Frame Buffer Colormap +!Edrivers/video/fbcmap.c + + + Frame Buffer Video Mode Database +!Idrivers/video/modedb.c +!Edrivers/video/modedb.c + + Frame Buffer Macintosh Video Mode Database +!Edrivers/video/macmodes.c + + Frame Buffer Fonts + + Refer to the file drivers/video/console/fonts.c for more information. + + + + + + + Input Subsystem +!Iinclude/linux/input.h +!Edrivers/input/input.c +!Edrivers/input/ff-core.c +!Edrivers/input/ff-memless.c + + + + Serial Peripheral Interface (SPI) + + SPI is the "Serial Peripheral Interface", widely used with + embedded systems because it is a simple and efficient + interface: basically a multiplexed shift register. + Its three signal wires hold a clock (SCK, often in the range + of 1-20 MHz), a "Master Out, Slave In" (MOSI) data line, and + a "Master In, Slave Out" (MISO) data line. + SPI is a full duplex protocol; for each bit shifted out the + MOSI line (one per clock) another is shifted in on the MISO line. + Those bits are assembled into words of various sizes on the + way to and from system memory. + An additional chipselect line is usually active-low (nCS); + four signals are normally used for each peripheral, plus + sometimes an interrupt. + + + The SPI bus facilities listed here provide a generalized + interface to declare SPI busses and devices, manage them + according to the standard Linux driver model, and perform + input/output operations. + At this time, only "master" side interfaces are supported, + where Linux talks to SPI peripherals and does not implement + such a peripheral itself. + (Interfaces to support implementing SPI slaves would + necessarily look different.) + + + The programming interface is structured around two kinds of driver, + and two kinds of device. + A "Controller Driver" abstracts the controller hardware, which may + be as simple as a set of GPIO pins or as complex as a pair of FIFOs + connected to dual DMA engines on the other side of the SPI shift + register (maximizing throughput). Such drivers bridge between + whatever bus they sit on (often the platform bus) and SPI, and + expose the SPI side of their device as a + struct spi_master. + SPI devices are children of that master, represented as a + struct spi_device and manufactured from + struct spi_board_info descriptors which + are usually provided by board-specific initialization code. + A struct spi_driver is called a + "Protocol Driver", and is bound to a spi_device using normal + driver model calls. + + + The I/O model is a set of queued messages. Protocol drivers + submit one or more struct spi_message + objects, which are processed and completed asynchronously. + (There are synchronous wrappers, however.) Messages are + built from one or more struct spi_transfer + objects, each of which wraps a full duplex SPI transfer. + A variety of protocol tweaking options are needed, because + different chips adopt very different policies for how they + use the bits transferred with SPI. + +!Iinclude/linux/spi/spi.h +!Fdrivers/spi/spi.c spi_register_board_info +!Edrivers/spi/spi.c + + + + I<superscript>2</superscript>C and SMBus Subsystem + + + I2C (or without fancy typography, "I2C") + is an acronym for the "Inter-IC" bus, a simple bus protocol which is + widely used where low data rate communications suffice. + Since it's also a licensed trademark, some vendors use another + name (such as "Two-Wire Interface", TWI) for the same bus. + I2C only needs two signals (SCL for clock, SDA for data), conserving + board real estate and minimizing signal quality issues. + Most I2C devices use seven bit addresses, and bus speeds of up + to 400 kHz; there's a high speed extension (3.4 MHz) that's not yet + found wide use. + I2C is a multi-master bus; open drain signaling is used to + arbitrate between masters, as well as to handshake and to + synchronize clocks from slower clients. + + + + The Linux I2C programming interfaces support only the master + side of bus interactions, not the slave side. + The programming interface is structured around two kinds of driver, + and two kinds of device. + An I2C "Adapter Driver" abstracts the controller hardware; it binds + to a physical device (perhaps a PCI device or platform_device) and + exposes a struct i2c_adapter representing + each I2C bus segment it manages. + On each I2C bus segment will be I2C devices represented by a + struct i2c_client. Those devices will + be bound to a struct i2c_driver, + which should follow the standard Linux driver model. + (At this writing, a legacy model is more widely used.) + There are functions to perform various I2C protocol operations; at + this writing all such functions are usable only from task context. + + + + The System Management Bus (SMBus) is a sibling protocol. Most SMBus + systems are also I2C conformant. The electrical constraints are + tighter for SMBus, and it standardizes particular protocol messages + and idioms. Controllers that support I2C can also support most + SMBus operations, but SMBus controllers don't support all the protocol + options that an I2C controller will. + There are functions to perform various SMBus protocol operations, + either using I2C primitives or by issuing SMBus commands to + i2c_adapter devices which don't support those I2C operations. + + +!Iinclude/linux/i2c.h +!Fdrivers/i2c/i2c-boardinfo.c i2c_register_board_info +!Edrivers/i2c/i2c-core.c + + Clock Framework diff --git a/trunk/Documentation/DocBook/uio-howto.tmpl b/trunk/Documentation/DocBook/uio-howto.tmpl index 52e1b79ce0e6..b787e4721c90 100644 --- a/trunk/Documentation/DocBook/uio-howto.tmpl +++ b/trunk/Documentation/DocBook/uio-howto.tmpl @@ -41,12 +41,6 @@ GPL version 2. - - 0.7 - 2008-12-23 - hjk - Added generic platform drivers and offset attribute. - 0.6 2008-12-05 @@ -318,16 +312,6 @@ interested in translating it, please email me pointed to by addr. - - - offset: The offset, in bytes, that has to be - added to the pointer returned by mmap() to get - to the actual device memory. This is important if the device's memory - is not page aligned. Remember that pointers returned by - mmap() are always page aligned, so it is good - style to always add this offset. - - @@ -610,78 +594,6 @@ framework to set up sysfs files for this region. Simply leave it alone. - -Using uio_pdrv for platform devices - - In many cases, UIO drivers for platform devices can be handled in a - generic way. In the same place where you define your - struct platform_device, you simply also implement - your interrupt handler and fill your - struct uio_info. A pointer to this - struct uio_info is then used as - platform_data for your platform device. - - - You also need to set up an array of struct resource - containing addresses and sizes of your memory mappings. This - information is passed to the driver using the - .resource and .num_resources - elements of struct platform_device. - - - You now have to set the .name element of - struct platform_device to - "uio_pdrv" to use the generic UIO platform device - driver. This driver will fill the mem[] array - according to the resources given, and register the device. - - - The advantage of this approach is that you only have to edit a file - you need to edit anyway. You do not have to create an extra driver. - - - - -Using uio_pdrv_genirq for platform devices - - Especially in embedded devices, you frequently find chips where the - irq pin is tied to its own dedicated interrupt line. In such cases, - where you can be really sure the interrupt is not shared, we can take - the concept of uio_pdrv one step further and use a - generic interrupt handler. That's what - uio_pdrv_genirq does. - - - The setup for this driver is the same as described above for - uio_pdrv, except that you do not implement an - interrupt handler. The .handler element of - struct uio_info must remain - NULL. The .irq_flags element - must not contain IRQF_SHARED. - - - You will set the .name element of - struct platform_device to - "uio_pdrv_genirq" to use this driver. - - - The generic interrupt handler of uio_pdrv_genirq - will simply disable the interrupt line using - disable_irq_nosync(). After doing its work, - userspace can reenable the interrupt by writing 0x00000001 to the UIO - device file. The driver already implements an - irq_control() to make this possible, you must not - implement your own. - - - Using uio_pdrv_genirq not only saves a few lines of - interrupt handler code. You also do not need to know anything about - the chip's internal registers to create the kernel part of the driver. - All you need to know is the irq number of the pin the chip is - connected to. - - - diff --git a/trunk/Documentation/IO-mapping.txt b/trunk/Documentation/IO-mapping.txt index 78a440695e11..86edb61bdee6 100644 --- a/trunk/Documentation/IO-mapping.txt +++ b/trunk/Documentation/IO-mapping.txt @@ -1,6 +1,6 @@ [ NOTE: The virt_to_bus() and bus_to_virt() functions have been - superseded by the functionality provided by the PCI DMA interface - (see Documentation/PCI/PCI-DMA-mapping.txt). They continue + superseded by the functionality provided by the PCI DMA + interface (see Documentation/DMA-mapping.txt). They continue to be documented below for historical purposes, but new code must not use them. --davidm 00/12/12 ] diff --git a/trunk/Documentation/PCI/PCIEBUS-HOWTO.txt b/trunk/Documentation/PCI/PCIEBUS-HOWTO.txt index 6bd5f372adec..9a07e38631b0 100644 --- a/trunk/Documentation/PCI/PCIEBUS-HOWTO.txt +++ b/trunk/Documentation/PCI/PCIEBUS-HOWTO.txt @@ -93,7 +93,7 @@ the PCI Express Port Bus driver from loading a service driver. int pcie_port_service_register(struct pcie_port_service_driver *new) -This API replaces the Linux Driver Model's pci_register_driver API. A +This API replaces the Linux Driver Model's pci_module_init API. A service driver should always calls pcie_port_service_register at module init. Note that after service driver being loaded, calls such as pci_enable_device(dev) and pci_set_master(dev) are no longer diff --git a/trunk/Documentation/RCU/checklist.txt b/trunk/Documentation/RCU/checklist.txt index accfe2f5247d..6e253407b3dc 100644 --- a/trunk/Documentation/RCU/checklist.txt +++ b/trunk/Documentation/RCU/checklist.txt @@ -298,15 +298,3 @@ over a rather long period of time, but improvements are always welcome! Note that, rcu_assign_pointer() and rcu_dereference() relate to SRCU just as they do to other forms of RCU. - -15. The whole point of call_rcu(), synchronize_rcu(), and friends - is to wait until all pre-existing readers have finished before - carrying out some otherwise-destructive operation. It is - therefore critically important to -first- remove any path - that readers can follow that could be affected by the - destructive operation, and -only- -then- invoke call_rcu(), - synchronize_rcu(), or friends. - - Because these primitives only wait for pre-existing readers, - it is the caller's responsibility to guarantee safety to - any subsequent readers. diff --git a/trunk/Documentation/block/biodoc.txt b/trunk/Documentation/block/biodoc.txt index ecad6ee75705..3c5434c83daf 100644 --- a/trunk/Documentation/block/biodoc.txt +++ b/trunk/Documentation/block/biodoc.txt @@ -186,9 +186,8 @@ a virtual address mapping (unlike the earlier scheme of virtual address do not have a corresponding kernel virtual address space mapping) and low-memory pages. -Note: Please refer to Documentation/PCI/PCI-DMA-mapping.txt for a discussion -on PCI high mem DMA aspects and mapping of scatter gather lists, and support -for 64 bit PCI. +Note: Please refer to DMA-mapping.txt for a discussion on PCI high mem DMA +aspects and mapping of scatter gather lists, and support for 64 bit PCI. Special handling is required only for cases where i/o needs to happen on pages at physical memory addresses beyond what the device can support. In these @@ -954,14 +953,14 @@ elevator_allow_merge_fn called whenever the block layer determines results in some sort of conflict internally, this hook allows it to do that. -elevator_dispatch_fn* fills the dispatch queue with ready requests. +elevator_dispatch_fn fills the dispatch queue with ready requests. I/O schedulers are free to postpone requests by not filling the dispatch queue unless @force is non-zero. Once dispatched, I/O schedulers are not allowed to manipulate the requests - they belong to generic dispatch queue. -elevator_add_req_fn* called to add a new request into the scheduler +elevator_add_req_fn called to add a new request into the scheduler elevator_queue_empty_fn returns true if the merge queue is empty. Drivers shouldn't use this, but rather check @@ -991,7 +990,7 @@ elevator_activate_req_fn Called when device driver first sees a request. elevator_deactivate_req_fn Called when device driver decides to delay a request by requeueing it. -elevator_init_fn* +elevator_init_fn elevator_exit_fn Allocate and free any elevator specific storage for a queue. diff --git a/trunk/Documentation/block/queue-sysfs.txt b/trunk/Documentation/block/queue-sysfs.txt deleted file mode 100644 index e164403f60e1..000000000000 --- a/trunk/Documentation/block/queue-sysfs.txt +++ /dev/null @@ -1,63 +0,0 @@ -Queue sysfs files -================= - -This text file will detail the queue files that are located in the sysfs tree -for each block device. Note that stacked devices typically do not export -any settings, since their queue merely functions are a remapping target. -These files are the ones found in the /sys/block/xxx/queue/ directory. - -Files denoted with a RO postfix are readonly and the RW postfix means -read-write. - -hw_sector_size (RO) -------------------- -This is the hardware sector size of the device, in bytes. - -max_hw_sectors_kb (RO) ----------------------- -This is the maximum number of kilobytes supported in a single data transfer. - -max_sectors_kb (RW) -------------------- -This is the maximum number of kilobytes that the block layer will allow -for a filesystem request. Must be smaller than or equal to the maximum -size allowed by the hardware. - -nomerges (RW) -------------- -This enables the user to disable the lookup logic involved with IO merging -requests in the block layer. Merging may still occur through a direct -1-hit cache, since that comes for (almost) free. The IO scheduler will not -waste cycles doing tree/hash lookups for merges if nomerges is 1. Defaults -to 0, enabling all merges. - -nr_requests (RW) ----------------- -This controls how many requests may be allocated in the block layer for -read or write requests. Note that the total allocated number may be twice -this amount, since it applies only to reads or writes (not the accumulated -sum). - -read_ahead_kb (RW) ------------------- -Maximum number of kilobytes to read-ahead for filesystems on this block -device. - -rq_affinity (RW) ----------------- -If this option is enabled, the block layer will migrate request completions -to the CPU that originally submitted the request. For some workloads -this provides a significant reduction in CPU cycles due to caching effects. - -scheduler (RW) --------------- -When read, this file will display the current and available IO schedulers -for this block device. The currently active IO scheduler will be enclosed -in [] brackets. Writing an IO scheduler name to this file will switch -control of this block device to that new IO scheduler. Note that writing -an IO scheduler name to this file will attempt to load that IO scheduler -module, if it isn't already present in the system. - - - -Jens Axboe , February 2009 diff --git a/trunk/Documentation/cgroups/cgroups.txt b/trunk/Documentation/cgroups/cgroups.txt index 93feb8444489..d9e5d6f41b92 100644 --- a/trunk/Documentation/cgroups/cgroups.txt +++ b/trunk/Documentation/cgroups/cgroups.txt @@ -252,8 +252,10 @@ cgroup file system directories. When a task is moved from one cgroup to another, it gets a new css_set pointer - if there's an already existing css_set with the desired collection of cgroups then that group is reused, else a new -css_set is allocated. The appropriate existing css_set is located by -looking into a hash table. +css_set is allocated. Note that the current implementation uses a +linear search to locate an appropriate existing css_set, so isn't +very efficient. A future version will use a hash table for better +performance. To allow access from a cgroup to the css_sets (and hence tasks) that comprise it, a set of cg_cgroup_link objects form a lattice; diff --git a/trunk/Documentation/cgroups/cpusets.txt b/trunk/Documentation/cgroups/cpusets.txt index 0611e9528c7c..5c86c258c791 100644 --- a/trunk/Documentation/cgroups/cpusets.txt +++ b/trunk/Documentation/cgroups/cpusets.txt @@ -142,7 +142,7 @@ into the rest of the kernel, none in performance critical paths: - in fork and exit, to attach and detach a task from its cpuset. - in sched_setaffinity, to mask the requested CPUs by what's allowed in that tasks cpuset. - - in sched.c migrate_live_tasks(), to keep migrating tasks within + - in sched.c migrate_all_tasks(), to keep migrating tasks within the CPUs allowed by their cpuset, if possible. - in the mbind and set_mempolicy system calls, to mask the requested Memory Nodes by what's allowed in that tasks cpuset. @@ -175,10 +175,6 @@ files describing that cpuset: - mem_exclusive flag: is memory placement exclusive? - mem_hardwall flag: is memory allocation hardwalled - memory_pressure: measure of how much paging pressure in cpuset - - memory_spread_page flag: if set, spread page cache evenly on allowed nodes - - memory_spread_slab flag: if set, spread slab cache evenly on allowed nodes - - sched_load_balance flag: if set, load balance within CPUs on that cpuset - - sched_relax_domain_level: the searching range when migrating tasks In addition, the root cpuset only has the following file: - memory_pressure_enabled flag: compute memory_pressure? @@ -256,7 +252,7 @@ is causing. This is useful both on tightly managed systems running a wide mix of submitted jobs, which may choose to terminate or re-prioritize jobs that -are trying to use more memory than allowed on the nodes assigned to them, +are trying to use more memory than allowed on the nodes assigned them, and with tightly coupled, long running, massively parallel scientific computing jobs that will dramatically fail to meet required performance goals if they start to use more memory than allowed to them. @@ -382,7 +378,7 @@ as cpusets and sched_setaffinity. The algorithmic cost of load balancing and its impact on key shared kernel data structures such as the task list increases more than linearly with the number of CPUs being balanced. So the scheduler -has support to partition the systems CPUs into a number of sched +has support to partition the systems CPUs into a number of sched domains such that it only load balances within each sched domain. Each sched domain covers some subset of the CPUs in the system; no two sched domains overlap; some CPUs might not be in any sched @@ -489,22 +485,17 @@ of CPUs allowed to a cpuset having 'sched_load_balance' enabled. The internal kernel cpuset to scheduler interface passes from the cpuset code to the scheduler code a partition of the load balanced CPUs in the system. This partition is a set of subsets (represented -as an array of struct cpumask) of CPUs, pairwise disjoint, that cover -all the CPUs that must be load balanced. - -The cpuset code builds a new such partition and passes it to the -scheduler sched domain setup code, to have the sched domains rebuilt -as necessary, whenever: - - the 'sched_load_balance' flag of a cpuset with non-empty CPUs changes, - - or CPUs come or go from a cpuset with this flag enabled, - - or 'sched_relax_domain_level' value of a cpuset with non-empty CPUs - and with this flag enabled changes, - - or a cpuset with non-empty CPUs and with this flag enabled is removed, - - or a cpu is offlined/onlined. +as an array of cpumask_t) of CPUs, pairwise disjoint, that cover all +the CPUs that must be load balanced. + +Whenever the 'sched_load_balance' flag changes, or CPUs come or go +from a cpuset with this flag enabled, or a cpuset with this flag +enabled is removed, the cpuset code builds a new such partition and +passes it to the scheduler sched domain setup code, to have the sched +domains rebuilt as necessary. This partition exactly defines what sched domains the scheduler should -setup - one sched domain for each element (struct cpumask) in the -partition. +setup - one sched domain for each element (cpumask_t) in the partition. The scheduler remembers the currently active sched domain partitions. When the scheduler routine partition_sched_domains() is invoked from @@ -568,7 +559,7 @@ domain, the largest value among those is used. Be careful, if one requests 0 and others are -1 then 0 is used. Note that modifying this file will have both good and bad effects, -and whether it is acceptable or not depends on your situation. +and whether it is acceptable or not will be depend on your situation. Don't modify this file if you are not sure. If your situation is: @@ -609,15 +600,19 @@ to allocate a page of memory for that task. If a cpuset has its 'cpus' modified, then each task in that cpuset will have its allowed CPU placement changed immediately. Similarly, -if a tasks pid is written to another cpusets 'tasks' file, then its -allowed CPU placement is changed immediately. If such a task had been -bound to some subset of its cpuset using the sched_setaffinity() call, -the task will be allowed to run on any CPU allowed in its new cpuset, -negating the effect of the prior sched_setaffinity() call. +if a tasks pid is written to a cpusets 'tasks' file, in either its +current cpuset or another cpuset, then its allowed CPU placement is +changed immediately. If such a task had been bound to some subset +of its cpuset using the sched_setaffinity() call, the task will be +allowed to run on any CPU allowed in its new cpuset, negating the +affect of the prior sched_setaffinity() call. In summary, the memory placement of a task whose cpuset is changed is updated by the kernel, on the next allocation of a page for that task, -and the processor placement is updated immediately. +but the processor placement is not updated, until that tasks pid is +rewritten to the 'tasks' file of its cpuset. This is done to avoid +impacting the scheduler code in the kernel with a check for changes +in a tasks processor placement. Normally, once a page is allocated (given a physical page of main memory) then that page stays on whatever node it @@ -686,14 +681,10 @@ and then start a subshell 'sh' in that cpuset: # The next line should display '/Charlie' cat /proc/self/cpuset -There are ways to query or modify cpusets: - - via the cpuset file system directly, using the various cd, mkdir, echo, - cat, rmdir commands from the shell, or their equivalent from C. - - via the C library libcpuset. - - via the C library libcgroup. - (http://sourceforge.net/proects/libcg/) - - via the python application cset. - (http://developer.novell.com/wiki/index.php/Cpuset) +In the future, a C library interface to cpusets will likely be +available. For now, the only way to query or modify cpusets is +via the cpuset file system, using the various cd, mkdir, echo, cat, +rmdir commands from the shell, or their equivalent from C. The sched_setaffinity calls can also be done at the shell prompt using SGI's runon or Robert Love's taskset. The mbind and set_mempolicy @@ -765,7 +756,7 @@ mount -t cpuset X /dev/cpuset is equivalent to -mount -t cgroup -ocpuset,noprefix X /dev/cpuset +mount -t cgroup -ocpuset X /dev/cpuset echo "/sbin/cpuset_release_agent" > /dev/cpuset/release_agent 2.2 Adding/removing cpus diff --git a/trunk/Documentation/cgroups/memcg_test.txt b/trunk/Documentation/cgroups/memcg_test.txt index 523a9c16c400..19533f93b7a2 100644 --- a/trunk/Documentation/cgroups/memcg_test.txt +++ b/trunk/Documentation/cgroups/memcg_test.txt @@ -1,6 +1,6 @@ Memory Resource Controller(Memcg) Implementation Memo. -Last Updated: 2009/1/19 -Base Kernel Version: based on 2.6.29-rc2. +Last Updated: 2008/12/15 +Base Kernel Version: based on 2.6.28-rc8-mm. Because VM is getting complex (one of reasons is memcg...), memcg's behavior is complex. This is a document for memcg's internal behavior. @@ -340,23 +340,3 @@ Under below explanation, we assume CONFIG_MEM_RES_CTRL_SWAP=y. # mount -t cgroup none /cgroup -t cpuset,memory,cpu,devices and do task move, mkdir, rmdir etc...under this. - - 9.7 swapoff. - Besides management of swap is one of complicated parts of memcg, - call path of swap-in at swapoff is not same as usual swap-in path.. - It's worth to be tested explicitly. - - For example, test like following is good. - (Shell-A) - # mount -t cgroup none /cgroup -t memory - # mkdir /cgroup/test - # echo 40M > /cgroup/test/memory.limit_in_bytes - # echo 0 > /cgroup/test/tasks - Run malloc(100M) program under this. You'll see 60M of swaps. - (Shell-B) - # move all tasks in /cgroup/test to /cgroup - # /sbin/swapoff -a - # rmdir /test/cgroup - # kill malloc task. - - Of course, tmpfs v.s. swapoff test should be tested, too. diff --git a/trunk/Documentation/connector/cn_test.c b/trunk/Documentation/connector/cn_test.c index 6977c178729a..be7af146dd30 100644 --- a/trunk/Documentation/connector/cn_test.c +++ b/trunk/Documentation/connector/cn_test.c @@ -137,7 +137,7 @@ static void cn_test_timer_func(unsigned long __data) memcpy(m + 1, data, m->len); - cn_netlink_send(m, 0, GFP_ATOMIC); + cn_netlink_send(m, 0, gfp_any()); kfree(m); } @@ -160,8 +160,10 @@ static int cn_test_init(void) goto err_out; } - setup_timer(&cn_test_timer, cn_test_timer_func, 0); + init_timer(&cn_test_timer); + cn_test_timer.function = cn_test_timer_func; cn_test_timer.expires = jiffies + HZ; + cn_test_timer.data = 0; add_timer(&cn_test_timer); return 0; diff --git a/trunk/Documentation/cpu-freq/user-guide.txt b/trunk/Documentation/cpu-freq/user-guide.txt index 917918f84fc7..e3443ddcfb89 100644 --- a/trunk/Documentation/cpu-freq/user-guide.txt +++ b/trunk/Documentation/cpu-freq/user-guide.txt @@ -195,3 +195,19 @@ scaling_setspeed. By "echoing" a new frequency into this you can change the speed of the CPU, but only within the limits of scaling_min_freq and scaling_max_freq. + + +3.2 Deprecated Interfaces +------------------------- + +Depending on your kernel configuration, you might find the following +cpufreq-related files: +/proc/cpufreq +/proc/sys/cpu/*/speed +/proc/sys/cpu/*/speed-min +/proc/sys/cpu/*/speed-max + +These are files for deprecated interfaces to cpufreq, which offer far +less functionality. Because of this, these interfaces aren't described +here. + diff --git a/trunk/Documentation/driver-model/device.txt b/trunk/Documentation/driver-model/device.txt index a7cbfff40d07..a05ec50f8004 100644 --- a/trunk/Documentation/driver-model/device.txt +++ b/trunk/Documentation/driver-model/device.txt @@ -127,11 +127,9 @@ void unlock_device(struct device * dev); Attributes ~~~~~~~~~~ struct device_attribute { - struct attribute attr; - ssize_t (*show)(struct device *dev, struct device_attribute *attr, - char *buf); - ssize_t (*store)(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count); + struct attribute attr; + ssize_t (*show)(struct device * dev, char * buf, size_t count, loff_t off); + ssize_t (*store)(struct device * dev, const char * buf, size_t count, loff_t off); }; Attributes of devices can be exported via drivers using a simple diff --git a/trunk/Documentation/dvb/README.flexcop b/trunk/Documentation/dvb/README.flexcop new file mode 100644 index 000000000000..5515469de7cf --- /dev/null +++ b/trunk/Documentation/dvb/README.flexcop @@ -0,0 +1,205 @@ +This README escorted the skystar2-driver rewriting procedure. It describes the +state of the new flexcop-driver set and some internals are written down here +too. + +This document hopefully describes things about the flexcop and its +device-offsprings. Goal was to write an easy-to-write and easy-to-read set of +drivers based on the skystar2.c and other information. + +Remark: flexcop-pci.c was a copy of skystar2.c, but every line has been +touched and rewritten. + +History & News +============== + 2005-04-01 - correct USB ISOC transfers (thanks to Vadim Catana) + + + + +General coding processing +========================= + +We should proceed as follows (as long as no one complains): + +0) Think before start writing code! + +1) rewriting the skystar2.c with the help of the flexcop register descriptions +and splitting up the files to a pci-bus-part and a flexcop-part. +The new driver will be called b2c2-flexcop-pci.ko/b2c2-flexcop-usb.ko for the +device-specific part and b2c2-flexcop.ko for the common flexcop-functions. + +2) Search for errors in the leftover of flexcop-pci.c (compare with pluto2.c +and other pci drivers) + +3) make some beautification (see 'Improvements when rewriting (refactoring) is +done') + +4) Testing the new driver and maybe substitute the skystar2.c with it, to reach +a wider tester audience. + +5) creating an usb-bus-part using the already written flexcop code for the pci +card. + +Idea: create a kernel-object for the flexcop and export all important +functions. This option saves kernel-memory, but maybe a lot of functions have +to be exported to kernel namespace. + + +Current situation +================= + +0) Done :) +1) Done (some minor issues left) +2) Done +3) Not ready yet, more information is necessary +4) next to be done (see the table below) +5) USB driver is working (yes, there are some minor issues) + +What seems to be ready? +----------------------- + +1) Rewriting +1a) i2c is cut off from the flexcop-pci.c and seems to work +1b) moved tuner and demod stuff from flexcop-pci.c to flexcop-tuner-fe.c +1c) moved lnb and diseqc stuff from flexcop-pci.c to flexcop-tuner-fe.c +1e) eeprom (reading MAC address) +1d) sram (no dynamic sll size detection (commented out) (using default as JJ told me)) +1f) misc. register accesses for reading parameters (e.g. resetting, revision) +1g) pid/mac filter (flexcop-hw-filter.c) +1i) dvb-stuff initialization in flexcop.c (done) +1h) dma stuff (now just using the size-irq, instead of all-together, to be done) +1j) remove flexcop initialization from flexcop-pci.c completely (done) +1l) use a well working dma IRQ method (done, see 'Known bugs and problems and TODO') +1k) cleanup flexcop-files (remove unused EXPORT_SYMBOLs, make static from +non-static where possible, moved code to proper places) + +2) Search for errors in the leftover of flexcop-pci.c (partially done) +5a) add MAC address reading +5c) feeding of ISOC data to the software demux (format of the isochronous data +and speed optimization, no real error) (thanks to Vadim Catana) + +What to do in the near future? +-------------------------------------- +(no special order here) + +5) USB driver +5b) optimize isoc-transfer (submitting/killing isoc URBs when transfer is starting) + +Testing changes +--------------- + +O = item is working +P = item is partially working +X = item is not working +N = item does not apply here + = item need to be examined + + | PCI | USB +item | mt352 | nxt2002 | stv0299 | mt312 | mt352 | nxt2002 | stv0299 | mt312 +-------+-------+---------+---------+-------+-------+---------+---------+------- +1a) | O | | | | N | N | N | N +1b) | O | | | | | | O | +1c) | N | N | | | N | N | O | +1d) | O | O +1e) | O | O +1f) | P +1g) | O +1h) | P | +1i) | O | N +1j) | O | N +1l) | O | N +2) | O | N +5a) | N | O +5b)* | N | +5c) | N | O + +* - not done yet + +Known bugs and problems and TODO +-------------------------------- + +1g/h/l) when pid filtering is enabled on the pci card + +DMA usage currently: + The DMA is splitted in 2 equal-sized subbuffers. The Flexcop writes to first + address and triggers an IRQ when it's full and starts writing to the second + address. When the second address is full, the IRQ is triggered again, and + the flexcop writes to first address again, and so on. + The buffersize of each address is currently 640*188 bytes. + + Problem is, when using hw-pid-filtering and doing some low-bandwidth + operation (like scanning) the buffers won't be filled enough to trigger + the IRQ. That's why: + + When PID filtering is activated, the timer IRQ is used. Every 1.97 ms the IRQ + is triggered. Is the current write address of DMA1 different to the one + during the last IRQ, then the data is passed to the demuxer. + + There is an additional DMA-IRQ-method: packet count IRQ. This isn't + implemented correctly yet. + + The solution is to disable HW PID filtering, but I don't know how the DVB + API software demux behaves on slow systems with 45MBit/s TS. + +Solved bugs :) +-------------- +1g) pid-filtering (somehow pid index 4 and 5 (EMM_PID and ECM_PID) aren't +working) +SOLUTION: also index 0 was affected, because net_translation is done for +these indexes by default + +5b) isochronous transfer does only work in the first attempt (for the Sky2PC +USB, Air2PC is working) SOLUTION: the flexcop was going asleep and never really +woke up again (don't know if this need fixes, see +flexcop-fe-tuner.c:flexcop_sleep) + +NEWS: when the driver is loaded and unloaded and loaded again (w/o doing +anything in the while the driver is loaded the first time), no transfers take +place anymore. + +Improvements when rewriting (refactoring) is done +================================================= + +- split sleeping of the flexcop (misc_204.ACPI3_sig = 1;) from lnb_control + (enable sleeping for other demods than dvb-s) +- add support for CableStar (stv0297 Microtune 203x/ALPS) (almost done, incompatibilities with the Nexus-CA) + +Debugging +--------- +- add verbose debugging to skystar2.c (dump the reg_dw_data) and compare it + with this flexcop, this is important, because i2c is now using the + flexcop_ibi_value union from flexcop-reg.h (do you have a better idea for + that, please tell us so). + +Everything which is identical in the following table, can be put into a common +flexcop-module. + + PCI USB +------------------------------------------------------------------------------- +Different: +Register access: accessing IO memory USB control message +I2C bus: I2C bus of the FC USB control message +Data transfer: DMA isochronous transfer +EEPROM transfer: through i2c bus not clear yet + +Identical: +Streaming: accessing registers +PID Filtering: accessing registers +Sram destinations: accessing registers +Tuner/Demod: I2C bus +DVB-stuff: can be written for common use + +Acknowledgements (just for the rewriting part) +================ + +Bjarne Steinsbo thought a lot in the first place of the pci part for this code +sharing idea. + +Andreas Oberritter for providing a recent PCI initialization template +(pluto2.c). + +Boleslaw Ciesielski for pointing out a problem with firmware loader. + +Vadim Catana for correcting the USB transfer. + +comments, critics and ideas to linux-dvb@linuxtv.org. diff --git a/trunk/Documentation/dvb/technisat.txt b/trunk/Documentation/dvb/technisat.txt index 3f435ffb289c..cdf6ee4b2da1 100644 --- a/trunk/Documentation/dvb/technisat.txt +++ b/trunk/Documentation/dvb/technisat.txt @@ -1,5 +1,5 @@ -How to set up the Technisat/B2C2 Flexcop devices -================================================ +How to set up the Technisat devices +=================================== 1) Find out what device you have ================================ @@ -16,60 +16,54 @@ DVB: registering frontend 0 (Conexant CX24123/CX24109)... If the Technisat is the only TV device in your box get rid of unnecessary modules and check this one: "Multimedia devices" => "Customise analog and hybrid tuner modules to build" -In this directory uncheck every driver which is activated there (except "Simple tuner support" for case 9 only). +In this directory uncheck every driver which is activated there. Then please activate: 2a) Main module part: a.)"Multimedia devices" => "DVB/ATSC adapters" => "Technisat/B2C2 FlexcopII(b) and FlexCopIII adapters" -b.)"Multimedia devices" => "DVB/ATSC adapters" => "Technisat/B2C2 FlexcopII(b) and FlexCopIII adapters" => "Technisat/B2C2 Air/Sky/Cable2PC PCI" in case of a PCI card -OR +b.)"Multimedia devices" => "DVB/ATSC adapters" => "Technisat/B2C2 FlexcopII(b) and FlexCopIII adapters" => "Technisat/B2C2 Air/Sky/Cable2PC PCI" in case of a PCI card OR c.)"Multimedia devices" => "DVB/ATSC adapters" => "Technisat/B2C2 FlexcopII(b) and FlexCopIII adapters" => "Technisat/B2C2 Air/Sky/Cable2PC USB" in case of an USB 1.1 adapter d.)"Multimedia devices" => "DVB/ATSC adapters" => "Technisat/B2C2 FlexcopII(b) and FlexCopIII adapters" => "Enable debug for the B2C2 FlexCop drivers" Notice: d.) is helpful for troubleshooting 2b) Frontend module part: -1.) SkyStar DVB-S Revision 2.3: +1.) Revision 2.3: a.)"Multimedia devices" => "Customise DVB frontends" => "Customise the frontend modules to build" b.)"Multimedia devices" => "Customise DVB frontends" => "Zarlink VP310/MT312/ZL10313 based" -2.) SkyStar DVB-S Revision 2.6: +2.) Revision 2.6: a.)"Multimedia devices" => "Customise DVB frontends" => "Customise the frontend modules to build" b.)"Multimedia devices" => "Customise DVB frontends" => "ST STV0299 based" -3.) SkyStar DVB-S Revision 2.7: +3.) Revision 2.7: a.)"Multimedia devices" => "Customise DVB frontends" => "Customise the frontend modules to build" b.)"Multimedia devices" => "Customise DVB frontends" => "Samsung S5H1420 based" c.)"Multimedia devices" => "Customise DVB frontends" => "Integrant ITD1000 Zero IF tuner for DVB-S/DSS" d.)"Multimedia devices" => "Customise DVB frontends" => "ISL6421 SEC controller" -4.) SkyStar DVB-S Revision 2.8: +4.) Revision 2.8: a.)"Multimedia devices" => "Customise DVB frontends" => "Customise the frontend modules to build" b.)"Multimedia devices" => "Customise DVB frontends" => "Conexant CX24113/CX24128 tuner for DVB-S/DSS" c.)"Multimedia devices" => "Customise DVB frontends" => "Conexant CX24123 based" d.)"Multimedia devices" => "Customise DVB frontends" => "ISL6421 SEC controller" -5.) AirStar DVB-T card: +5.) DVB-T card: a.)"Multimedia devices" => "Customise DVB frontends" => "Customise the frontend modules to build" b.)"Multimedia devices" => "Customise DVB frontends" => "Zarlink MT352 based" -6.) CableStar DVB-C card: +6.) DVB-C card: a.)"Multimedia devices" => "Customise DVB frontends" => "Customise the frontend modules to build" b.)"Multimedia devices" => "Customise DVB frontends" => "ST STV0297 based" -7.) AirStar ATSC card 1st generation: +7.) ATSC card 1st generation: a.)"Multimedia devices" => "Customise DVB frontends" => "Customise the frontend modules to build" b.)"Multimedia devices" => "Customise DVB frontends" => "Broadcom BCM3510" -8.) AirStar ATSC card 2nd generation: +8.) ATSC card 2nd generation: a.)"Multimedia devices" => "Customise DVB frontends" => "Customise the frontend modules to build" b.)"Multimedia devices" => "Customise DVB frontends" => "NxtWave Communications NXT2002/NXT2004 based" -c.)"Multimedia devices" => "Customise DVB frontends" => "Generic I2C PLL based tuners" +c.)"Multimedia devices" => "Customise DVB frontends" => "LG Electronics LGDT3302/LGDT3303 based" -9.) AirStar ATSC card 3rd generation: -a.)"Multimedia devices" => "Customise DVB frontends" => "Customise the frontend modules to build" -b.)"Multimedia devices" => "Customise DVB frontends" => "LG Electronics LGDT3302/LGDT3303 based" -c.)"Multimedia devices" => "Customise analog and hybrid tuner modules to build" => "Simple tuner support" - -Author: Uwe Bugla February 2009 +Author: Uwe Bugla December 2008 diff --git a/trunk/Documentation/feature-removal-schedule.txt b/trunk/Documentation/feature-removal-schedule.txt index 20d3b94703a4..5ddbe350487a 100644 --- a/trunk/Documentation/feature-removal-schedule.txt +++ b/trunk/Documentation/feature-removal-schedule.txt @@ -335,12 +335,3 @@ Why: In 2.6.18 the Secmark concept was introduced to replace the "compat_net" Secmark, it is time to deprecate the older mechanism and start the process of removing the old code. Who: Paul Moore ---------------------------- - -What: sysfs ui for changing p4-clockmod parameters -When: September 2009 -Why: See commits 129f8ae9b1b5be94517da76009ea956e89104ce8 and - e088e4c9cdb618675874becb91b2fd581ee707e6. - Removal is subject to fixing any remaining bugs in ACPI which may - cause the thermal throttling not to happen at the right time. -Who: Dave Jones , Matthew Garrett diff --git a/trunk/Documentation/filesystems/nfs-rdma.txt b/trunk/Documentation/filesystems/nfs-rdma.txt index 85eaeaddd27c..44bd766f2e5d 100644 --- a/trunk/Documentation/filesystems/nfs-rdma.txt +++ b/trunk/Documentation/filesystems/nfs-rdma.txt @@ -251,7 +251,7 @@ NFS/RDMA Setup Instruct the server to listen on the RDMA transport: - $ echo rdma 20049 > /proc/fs/nfsd/portlist + $ echo rdma 2050 > /proc/fs/nfsd/portlist - On the client system @@ -263,7 +263,7 @@ NFS/RDMA Setup Regardless of how the client was built (module or built-in), use this command to mount the NFS/RDMA server: - $ mount -o rdma,port=20049 :/ /mnt + $ mount -o rdma,port=2050 :/ /mnt To verify that the mount is using RDMA, run "cat /proc/mounts" and check the "proto" field for the given mount. diff --git a/trunk/Documentation/filesystems/proc.txt b/trunk/Documentation/filesystems/proc.txt index a87be42f8211..bbebc3a43ac0 100644 --- a/trunk/Documentation/filesystems/proc.txt +++ b/trunk/Documentation/filesystems/proc.txt @@ -2027,34 +2027,6 @@ increase the likelihood of this process being killed by the oom-killer. Valid values are in the range -16 to +15, plus the special value -17, which disables oom-killing altogether for this process. -The process to be killed in an out-of-memory situation is selected among all others -based on its badness score. This value equals the original memory size of the process -and is then updated according to its CPU time (utime + stime) and the -run time (uptime - start time). The longer it runs the smaller is the score. -Badness score is divided by the square root of the CPU time and then by -the double square root of the run time. - -Swapped out tasks are killed first. Half of each child's memory size is added to -the parent's score if they do not share the same memory. Thus forking servers -are the prime candidates to be killed. Having only one 'hungry' child will make -parent less preferable than the child. - -/proc//oom_score shows process' current badness score. - -The following heuristics are then applied: - * if the task was reniced, its score doubles - * superuser or direct hardware access tasks (CAP_SYS_ADMIN, CAP_SYS_RESOURCE - or CAP_SYS_RAWIO) have their score divided by 4 - * if oom condition happened in one cpuset and checked task does not belong - to it, its score is divided by 8 - * the resulting score is multiplied by two to the power of oom_adj, i.e. - points <<= oom_adj when it is positive and - points >>= -(oom_adj) otherwise - -The task with the highest badness score is then selected and its children -are killed, process itself will be killed in an OOM situation when it does -not have children or some of them disabled oom like described above. - 2.13 /proc//oom_score - Display current oom-killer score ------------------------------------------------------------- diff --git a/trunk/Documentation/filesystems/squashfs.txt b/trunk/Documentation/filesystems/squashfs.txt index b324c033035a..3e79e4a7a392 100644 --- a/trunk/Documentation/filesystems/squashfs.txt +++ b/trunk/Documentation/filesystems/squashfs.txt @@ -22,7 +22,7 @@ Squashfs filesystem features versus Cramfs: Squashfs Cramfs -Max filesystem size: 2^64 256 MiB +Max filesystem size: 2^64 16 MiB Max file size: ~ 2 TiB 16 MiB Max files: unlimited unlimited Max directories: unlimited unlimited diff --git a/trunk/Documentation/filesystems/sysfs-pci.txt b/trunk/Documentation/filesystems/sysfs-pci.txt index 9f8740ca3f3b..68ef48839c04 100644 --- a/trunk/Documentation/filesystems/sysfs-pci.txt +++ b/trunk/Documentation/filesystems/sysfs-pci.txt @@ -9,7 +9,6 @@ that support it. For example, a given bus might look like this: | |-- class | |-- config | |-- device - | |-- enable | |-- irq | |-- local_cpus | |-- resource @@ -33,7 +32,6 @@ files, each with their own function. class PCI class (ascii, ro) config PCI config space (binary, rw) device PCI device (ascii, ro) - enable Whether the device is enabled (ascii, rw) irq IRQ number (ascii, ro) local_cpus nearby CPU mask (cpumask, ro) resource PCI resource host addresses (ascii, ro) @@ -59,19 +57,10 @@ used to do actual device programming from userspace. Note that some platforms don't support mmapping of certain resources, so be sure to check the return value from any attempted mmap. -The 'enable' file provides a counter that indicates how many times the device -has been enabled. If the 'enable' file currently returns '4', and a '1' is -echoed into it, it will then return '5'. Echoing a '0' into it will decrease -the count. Even when it returns to 0, though, some of the initialisation -may not be reversed. - The 'rom' file is special in that it provides read-only access to the device's ROM file, if available. It's disabled by default, however, so applications should write the string "1" to the file to enable it before attempting a read -call, and disable it following the access by writing "0" to the file. Note -that the device must be enabled for a rom read to return data succesfully. -In the event a driver is not bound to the device, it can be enabled using the -'enable' file, documented above. +call, and disable it following the access by writing "0" to the file. Accessing legacy resources through sysfs ---------------------------------------- diff --git a/trunk/Documentation/filesystems/sysfs.txt b/trunk/Documentation/filesystems/sysfs.txt index 7e81e37c0b1e..9e9c348275a9 100644 --- a/trunk/Documentation/filesystems/sysfs.txt +++ b/trunk/Documentation/filesystems/sysfs.txt @@ -2,10 +2,8 @@ sysfs - _The_ filesystem for exporting kernel objects. Patrick Mochel -Mike Murphy -Revised: 22 February 2009 -Original: 10 January 2003 +10 January 2003 What it is: @@ -66,13 +64,12 @@ An attribute definition is simply: struct attribute { char * name; - struct module *owner; mode_t mode; }; -int sysfs_create_file(struct kobject * kobj, const struct attribute * attr); -void sysfs_remove_file(struct kobject * kobj, const struct attribute * attr); +int sysfs_create_file(struct kobject * kobj, struct attribute * attr); +void sysfs_remove_file(struct kobject * kobj, struct attribute * attr); A bare attribute contains no means to read or write the value of the @@ -83,11 +80,9 @@ a specific object type. For example, the driver model defines struct device_attribute like: struct device_attribute { - struct attribute attr; - ssize_t (*show)(struct device *dev, struct device_attribute *attr, - char *buf); - ssize_t (*store)(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count); + struct attribute attr; + ssize_t (*show)(struct device * dev, char * buf); + ssize_t (*store)(struct device * dev, const char * buf); }; int device_create_file(struct device *, struct device_attribute *); @@ -95,8 +90,12 @@ void device_remove_file(struct device *, struct device_attribute *); It also defines this helper for defining device attributes: -#define DEVICE_ATTR(_name, _mode, _show, _store) \ -struct device_attribute dev_attr_##_name = __ATTR(_name, _mode, _show, _store) +#define DEVICE_ATTR(_name, _mode, _show, _store) \ +struct device_attribute dev_attr_##_name = { \ + .attr = {.name = __stringify(_name) , .mode = _mode }, \ + .show = _show, \ + .store = _store, \ +}; For example, declaring @@ -108,9 +107,9 @@ static struct device_attribute dev_attr_foo = { .attr = { .name = "foo", .mode = S_IWUSR | S_IRUGO, - .show = show_foo, - .store = store_foo, }, + .show = show_foo, + .store = store_foo, }; @@ -162,12 +161,10 @@ To read or write attributes, show() or store() methods must be specified when declaring the attribute. The method types should be as simple as those defined for device attributes: -ssize_t (*show)(struct device * dev, struct device_attribute * attr, - char * buf); -ssize_t (*store)(struct device * dev, struct device_attribute * attr, - const char * buf); + ssize_t (*show)(struct device * dev, char * buf); + ssize_t (*store)(struct device * dev, const char * buf); -IOW, they should take only an object, an attribute, and a buffer as parameters. +IOW, they should take only an object and a buffer as parameters. sysfs allocates a buffer of size (PAGE_SIZE) and passes it to the @@ -302,16 +299,14 @@ The following interface layers currently exist in sysfs: Structure: struct device_attribute { - struct attribute attr; - ssize_t (*show)(struct device *dev, struct device_attribute *attr, - char *buf); - ssize_t (*store)(struct device *dev, struct device_attribute *attr, - const char *buf, size_t count); + struct attribute attr; + ssize_t (*show)(struct device * dev, char * buf); + ssize_t (*store)(struct device * dev, const char * buf); }; Declaring: -DEVICE_ATTR(_name, _mode, _show, _store); +DEVICE_ATTR(_name, _str, _mode, _show, _store); Creation/Removal: @@ -347,8 +342,7 @@ Structure: struct driver_attribute { struct attribute attr; ssize_t (*show)(struct device_driver *, char * buf); - ssize_t (*store)(struct device_driver *, const char * buf, - size_t count); + ssize_t (*store)(struct device_driver *, const char * buf); }; Declaring: diff --git a/trunk/Documentation/filesystems/ubifs.txt b/trunk/Documentation/filesystems/ubifs.txt index 12fedb7834c6..84da2a4ba25a 100644 --- a/trunk/Documentation/filesystems/ubifs.txt +++ b/trunk/Documentation/filesystems/ubifs.txt @@ -79,6 +79,13 @@ Mount options (*) == default. +norm_unmount (*) commit on unmount; the journal is committed + when the file-system is unmounted so that the + next mount does not have to replay the journal + and it becomes very fast; +fast_unmount do not commit on unmount; this option makes + unmount faster, but the next mount slower + because of the need to replay the journal. bulk_read read more in one go to take advantage of flash media that read faster sequentially no_bulk_read (*) do not bulk-read diff --git a/trunk/Documentation/hwmon/hpfall.c b/trunk/Documentation/hwmon/hpfall.c deleted file mode 100644 index bbea1ccfd46a..000000000000 --- a/trunk/Documentation/hwmon/hpfall.c +++ /dev/null @@ -1,101 +0,0 @@ -/* Disk protection for HP machines. - * - * Copyright 2008 Eric Piel - * Copyright 2009 Pavel Machek - * - * GPLv2. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -void write_int(char *path, int i) -{ - char buf[1024]; - int fd = open(path, O_RDWR); - if (fd < 0) { - perror("open"); - exit(1); - } - sprintf(buf, "%d", i); - if (write(fd, buf, strlen(buf)) != strlen(buf)) { - perror("write"); - exit(1); - } - close(fd); -} - -void set_led(int on) -{ - write_int("/sys/class/leds/hp::hddprotect/brightness", on); -} - -void protect(int seconds) -{ - write_int("/sys/block/sda/device/unload_heads", seconds*1000); -} - -int on_ac(void) -{ -// /sys/class/power_supply/AC0/online -} - -int lid_open(void) -{ -// /proc/acpi/button/lid/LID/state -} - -void ignore_me(void) -{ - protect(0); - set_led(0); - -} - -int main(int argc, char* argv[]) -{ - int fd, ret; - - fd = open("/dev/freefall", O_RDONLY); - if (fd < 0) { - perror("open"); - return EXIT_FAILURE; - } - - signal(SIGALRM, ignore_me); - - for (;;) { - unsigned char count; - - ret = read(fd, &count, sizeof(count)); - alarm(0); - if ((ret == -1) && (errno == EINTR)) { - /* Alarm expired, time to unpark the heads */ - continue; - } - - if (ret != sizeof(count)) { - perror("read"); - break; - } - - protect(21); - set_led(1); - if (1 || on_ac() || lid_open()) { - alarm(2); - } else { - alarm(20); - } - } - - close(fd); - return EXIT_SUCCESS; -} diff --git a/trunk/Documentation/hwmon/lis3lv02d b/trunk/Documentation/hwmon/lis3lv02d index 287f8c902656..0fcfc4a7ccdc 100644 --- a/trunk/Documentation/hwmon/lis3lv02d +++ b/trunk/Documentation/hwmon/lis3lv02d @@ -33,14 +33,6 @@ rate - reports the sampling rate of the accelerometer device in HZ This driver also provides an absolute input class device, allowing the laptop to act as a pinball machine-esque joystick. -Another feature of the driver is misc device called "freefall" that -acts similar to /dev/rtc and reacts on free-fall interrupts received -from the device. It supports blocking operations, poll/select and -fasync operation modes. You must read 1 bytes from the device. The -result is number of free-fall interrupts since the last successful -read (or 255 if number of interrupts would not fit). - - Axes orientation ---------------- diff --git a/trunk/Documentation/ja_JP/stable_kernel_rules.txt b/trunk/Documentation/ja_JP/stable_kernel_rules.txt index 14265837c4ce..b3ffe870de33 100644 --- a/trunk/Documentation/ja_JP/stable_kernel_rules.txt +++ b/trunk/Documentation/ja_JP/stable_kernel_rules.txt @@ -12,11 +12,11 @@ file at first. ================================== これは、 -linux-2.6.29/Documentation/stable_kernel_rules.txt +linux-2.6.24/Documentation/stable_kernel_rules.txt の和訳です。 翻訳団体： JF プロジェクト < http://www.linux.or.jp/JF/ > -翻訳日： 2009/1/14 +翻訳日： 2007/12/30 翻訳者： Tsugikazu Shibata 校正者： 武井伸光さん、 かねこさん (Seiji Kaneko) @@ -38,15 +38,12 @@ linux-2.6.29/Documentation/stable_kernel_rules.txt - ビルドエラー(CONFIG_BROKENになっているものを除く), oops, ハング、デー タ破壊、現実のセキュリティ問題、その他 "ああ、これはダメだね"という ようなものを修正しなければならない。短く言えば、重大な問題。 - - 新しい device ID とクオークも受け入れられる。 - どのように競合状態が発生するかの説明も一緒に書かれていない限り、 "理論的には競合状態になる"ようなものは不可。 - いかなる些細な修正も含めることはできない。(スペルの修正、空白のクリー ンアップなど) + - 対応するサブシステムメンテナが受け入れたものでなければならない。 - Documentation/SubmittingPatches の規則に従ったものでなければならない。 - - パッチ自体か同等の修正が Linus のツリーに既に存在しなければならない。 -　 Linus のツリーでのコミットID を -stable へのパッチ投稿の際に引用す - ること。 -stable ツリーにパッチを送付する手続き- @@ -55,10 +52,8 @@ linux-2.6.29/Documentation/stable_kernel_rules.txt - 送信者はパッチがキューに受け付けられた際には ACK を、却下された場合 には NAK を受け取る。この反応は開発者たちのスケジュールによって、数 日かかる場合がある。 - - もし受け取られたら、パッチは他の開発者たちと関連するサブシステムの - メンテナーによるレビューのために -stable キューに追加される。 - - パッチに stable@kernel.org のアドレスが付加されているときには、それ - が Linus のツリーに入る時に自動的に stable チームに email される。 + - もし受け取られたら、パッチは他の開発者たちのレビューのために + -stable キューに追加される。 - セキュリティパッチはこのエイリアス (stable@kernel.org) に送られるべ きではなく、代わりに security@kernel.org のアドレスに送られる。 diff --git a/trunk/Documentation/kbuild/kbuild.txt b/trunk/Documentation/kbuild/kbuild.txt index f3355b6812df..923f9ddee8f6 100644 --- a/trunk/Documentation/kbuild/kbuild.txt +++ b/trunk/Documentation/kbuild/kbuild.txt @@ -3,7 +3,7 @@ Environment variables KCPPFLAGS -------------------------------------------------- Additional options to pass when preprocessing. The preprocessing options -will be used in all cases where kbuild does preprocessing including +will be used in all cases where kbuild do preprocessing including building C files and assembler files. KAFLAGS @@ -16,7 +16,7 @@ Additional options to the C compiler. KBUILD_VERBOSE -------------------------------------------------- -Set the kbuild verbosity. Can be assigned same values as "V=...". +Set the kbuild verbosity. Can be assinged same values as "V=...". See make help for the full list. Setting "V=..." takes precedence over KBUILD_VERBOSE. @@ -35,14 +35,14 @@ KBUILD_OUTPUT -------------------------------------------------- Specify the output directory when building the kernel. The output directory can also be specificed using "O=...". -Setting "O=..." takes precedence over KBUILD_OUTPUT. +Setting "O=..." takes precedence over KBUILD_OUTPUT ARCH -------------------------------------------------- Set ARCH to the architecture to be built. In most cases the name of the architecture is the same as the directory name found in the arch/ directory. -But some architectures such as x86 and sparc have aliases. +But some architectures suach as x86 and sparc has aliases. x86: i386 for 32 bit, x86_64 for 64 bit sparc: sparc for 32 bit, sparc64 for 64 bit @@ -63,7 +63,7 @@ CF is often used on the command-line like this: INSTALL_PATH -------------------------------------------------- INSTALL_PATH specifies where to place the updated kernel and system map -images. Default is /boot, but you can set it to other values. +images. Default is /boot, but you can set it to other values MODLIB @@ -90,7 +90,7 @@ INSTALL_MOD_STRIP will used as the options to the strip command. INSTALL_FW_PATH -------------------------------------------------- -INSTALL_FW_PATH specifies where to install the firmware blobs. +INSTALL_FW_PATH specify where to install the firmware blobs. The default value is: $(INSTALL_MOD_PATH)/lib/firmware @@ -99,7 +99,7 @@ The value can be overridden in which case the default value is ignored. INSTALL_HDR_PATH -------------------------------------------------- -INSTALL_HDR_PATH specifies where to install user space headers when +INSTALL_HDR_PATH specify where to install user space headers when executing "make headers_*". The default value is: @@ -112,23 +112,22 @@ The value can be overridden in which case the default value is ignored. KBUILD_MODPOST_WARN -------------------------------------------------- -KBUILD_MODPOST_WARN can be set to avoid errors in case of undefined -symbols in the final module linking stage. It changes such errors -into warnings. +KBUILD_MODPOST_WARN can be set to avoid error out in case of undefined +symbols in the final module linking stage. -KBUILD_MODPOST_NOFINAL +KBUILD_MODPOST_FINAL -------------------------------------------------- KBUILD_MODPOST_NOFINAL can be set to skip the final link of modules. -This is solely useful to speed up test compiles. +This is solely usefull to speed up test compiles. KBUILD_EXTRA_SYMBOLS -------------------------------------------------- -For modules that use symbols from other modules. +For modules use symbols from another modules. See more details in modules.txt. ALLSOURCE_ARCHS -------------------------------------------------- -For tags/TAGS/cscope targets, you can specify more than one arch -to be included in the databases, separated by blank space. E.g.: +For tags/TAGS/cscope targets, you can specify more than one archs +to be included in the databases, separated by blankspace. e.g. $ make ALLSOURCE_ARCHS="x86 mips arm" tags diff --git a/trunk/Documentation/kernel-doc-nano-HOWTO.txt b/trunk/Documentation/kernel-doc-nano-HOWTO.txt index 026ec7d57384..d73fbd2b2b45 100644 --- a/trunk/Documentation/kernel-doc-nano-HOWTO.txt +++ b/trunk/Documentation/kernel-doc-nano-HOWTO.txt @@ -43,8 +43,7 @@ Only comments so marked will be considered by the kernel-doc scripts, and any comment so marked must be in kernel-doc format. Do not use "/**" to be begin a comment block unless the comment block contains kernel-doc formatted comments. The closing comment marker for -kernel-doc comments can be either "*/" or "**/", but "*/" is -preferred in the Linux kernel tree. +kernel-doc comments can be either "*/" or "**/". Kernel-doc comments should be placed just before the function or data structure being described. @@ -64,7 +63,7 @@ Example kernel-doc function comment: * comment lines. * * The longer description can have multiple paragraphs. - */ + **/ The first line, with the short description, must be on a single line. @@ -86,7 +85,7 @@ Example kernel-doc data structure comment. * perhaps with more lines and words. * * Longer description of this structure. - */ + **/ The kernel-doc function comments describe each parameter to the function, in order, with the @name lines. diff --git a/trunk/Documentation/kernel-parameters.txt b/trunk/Documentation/kernel-parameters.txt index 54f21a5c262b..8511d3532c27 100644 --- a/trunk/Documentation/kernel-parameters.txt +++ b/trunk/Documentation/kernel-parameters.txt @@ -114,7 +114,7 @@ In addition, the following text indicates that the option: Parameters denoted with BOOT are actually interpreted by the boot loader, and have no meaning to the kernel directly. Do not modify the syntax of boot loader parameters without extreme -need or coordination with . +need or coordination with . There are also arch-specific kernel-parameters not documented here. See for example . @@ -134,7 +134,7 @@ and is between 256 and 4096 characters. It is defined in the file acpi= [HW,ACPI,X86-64,i386] Advanced Configuration and Power Interface - Format: { force | off | ht | strict | noirq | rsdt } + Format: { force | off | ht | strict | noirq } force -- enable ACPI if default was off off -- disable ACPI if default was on noirq -- do not use ACPI for IRQ routing @@ -577,6 +577,9 @@ and is between 256 and 4096 characters. It is defined in the file a memory unit (amount[KMG]). See also Documentation/kdump/kdump.txt for a example. + cs4232= [HW,OSS] + Format: ,,,,, + cs89x0_dma= [HW,NET] Format: @@ -729,6 +732,10 @@ and is between 256 and 4096 characters. It is defined in the file Default value is 0. Value can be changed at runtime via /selinux/enforce. + es1371= [HW,OSS] + Format: ,[,[]] + See also header of sound/oss/es1371.c. + ether= [HW,NET] Ethernet cards parameters This option is obsoleted by the "netdev=" option, which has equivalent usage. See its documentation for details. @@ -868,10 +875,8 @@ and is between 256 and 4096 characters. It is defined in the file icn= [HW,ISDN] Format: [,[,[,]]] - ide-core.nodma= [HW] (E)IDE subsystem - Format: =0.0 to prevent dma on hda, =0.1 hdb =1.0 hdc - .vlb_clock .pci_clock .noflush .noprobe .nowerr .cdrom - .chs .ignore_cable are additional options + ide= [HW] (E)IDE subsystem + Format: ide=nodma or ide=doubler See Documentation/ide/ide.txt. idebus= [HW] (E)IDE subsystem - VLB/PCI bus speed @@ -939,8 +944,6 @@ and is between 256 and 4096 characters. It is defined in the file intel_iommu= [DMAR] Intel IOMMU driver (DMAR) option - on - Enable intel iommu driver. off Disable intel iommu driver. igfx_off [Default Off] @@ -2451,7 +2454,7 @@ and is between 256 and 4096 characters. It is defined in the file See Documentation/fb/modedb.txt. vga= [BOOT,X86-32] Select a particular video mode - See Documentation/x86/boot.txt and + See Documentation/x86/i386/boot.txt and Documentation/svga.txt. Use vga=ask for menu. This is actually a boot loader parameter; the value is diff --git a/trunk/Documentation/lguest/Makefile b/trunk/Documentation/lguest/Makefile index 1f4f9e888bd1..725eef81cd48 100644 --- a/trunk/Documentation/lguest/Makefile +++ b/trunk/Documentation/lguest/Makefile @@ -1,5 +1,5 @@ # This creates the demonstration utility "lguest" which runs a Linux guest. -CFLAGS:=-Wall -Wmissing-declarations -Wmissing-prototypes -O3 -I../../include -I../../arch/x86/include -U_FORTIFY_SOURCE +CFLAGS:=-Wall -Wmissing-declarations -Wmissing-prototypes -O3 -I../../include -I../../arch/x86/include LDLIBS:=-lz all: lguest diff --git a/trunk/Documentation/networking/alias.txt b/trunk/Documentation/networking/alias.txt index 85046f53fcfc..cd12c2ff518a 100644 --- a/trunk/Documentation/networking/alias.txt +++ b/trunk/Documentation/networking/alias.txt @@ -2,14 +2,14 @@ IP-Aliasing: ============ -IP-aliases are an obsolete way to manage multiple IP-addresses/masks -per interface. Newer tools such as iproute2 support multiple -address/prefixes per interface, but aliases are still supported -for backwards compatibility. - -An alias is formed by adding a colon and a string when running ifconfig. +IP-aliases are additional IP-addresses/masks hooked up to a base +interface by adding a colon and a string when running ifconfig. This string is usually numeric, but this is not a must. +IP-Aliases are avail if CONFIG_INET (`standard' IPv4 networking) +is configured in the kernel. + + o Alias creation. Alias creation is done by 'magic' interface naming: eg. to create a 200.1.1.1 alias for eth0 ... @@ -38,3 +38,16 @@ o Relationship with main device If the base device is shut down the added aliases will be deleted too. + + +Contact +------- +Please finger or e-mail me: + Juan Jose Ciarlante + +Updated by Erik Schoenfelder + +; local variables: +; mode: indented-text +; mode: auto-fill +; end: diff --git a/trunk/Documentation/networking/ipv6.txt b/trunk/Documentation/networking/ipv6.txt deleted file mode 100644 index 268e5c103dd8..000000000000 --- a/trunk/Documentation/networking/ipv6.txt +++ /dev/null @@ -1,35 +0,0 @@ - -Options for the ipv6 module are supplied as parameters at load time. - -Module options may be given as command line arguments to the insmod -or modprobe command, but are usually specified in either the -/etc/modules.conf or /etc/modprobe.conf configuration file, or in a -distro-specific configuration file. - -The available ipv6 module parameters are listed below. If a parameter -is not specified the default value is used. - -The parameters are as follows: - -disable - - Specifies whether to load the IPv6 module, but disable all - its functionality. This might be used when another module - has a dependency on the IPv6 module being loaded, but no - IPv6 addresses or operations are desired. - - The possible values and their effects are: - - 0 - IPv6 is enabled. - - This is the default value. - - 1 - IPv6 is disabled. - - No IPv6 addresses will be added to interfaces, and - it will not be possible to open an IPv6 socket. - - A reboot is required to enable IPv6. - diff --git a/trunk/Documentation/networking/netconsole.txt b/trunk/Documentation/networking/netconsole.txt index 8d022073e3ef..3c2f2b328638 100644 --- a/trunk/Documentation/networking/netconsole.txt +++ b/trunk/Documentation/networking/netconsole.txt @@ -51,8 +51,7 @@ Built-in netconsole starts immediately after the TCP stack is initialized and attempts to bring up the supplied dev at the supplied address. -The remote host can run either 'netcat -u -l -p ', -'nc -l -u ' or syslogd. +The remote host can run either 'netcat -u -l -p ' or syslogd. Dynamic reconfiguration: ======================== diff --git a/trunk/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt b/trunk/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt deleted file mode 100644 index 8447fd7090d0..000000000000 --- a/trunk/Documentation/powerpc/dts-bindings/fsl/mpc5200.txt +++ /dev/null @@ -1,180 +0,0 @@ -MPC5200 Device Tree Bindings ----------------------------- - -(c) 2006-2009 Secret Lab Technologies Ltd -Grant Likely - -Naming conventions ------------------- -For mpc5200 on-chip devices, the format for each compatible value is --[-]. The OS should be able to match a device driver -to the device based solely on the compatible value. If two drivers -match on the compatible list; the 'most compatible' driver should be -selected. - -The split between the MPC5200 and the MPC5200B leaves a bit of a -conundrum. How should the compatible property be set up to provide -maximum compatibility information; but still accurately describe the -chip? For the MPC5200; the answer is easy. Most of the SoC devices -originally appeared on the MPC5200. Since they didn't exist anywhere -else; the 5200 compatible properties will contain only one item; -"fsl,mpc5200-". - -The 5200B is almost the same as the 5200, but not quite. It fixes -silicon bugs and it adds a small number of enhancements. Most of the -devices either provide exactly the same interface as on the 5200. A few -devices have extra functions but still have a backwards compatible mode. -To express this information as completely as possible, 5200B device trees -should have two items in the compatible list: - compatible = "fsl,mpc5200b-","fsl,mpc5200-"; - -It is *strongly* recommended that 5200B device trees follow this convention -(instead of only listing the base mpc5200 item). - -ie. ethernet on mpc5200: compatible = "fsl,mpc5200-fec"; - ethernet on mpc5200b: compatible = "fsl,mpc5200b-fec", "fsl,mpc5200-fec"; - -Modal devices, like PSCs, also append the configured function to the -end of the compatible field. ie. A PSC in i2s mode would specify -"fsl,mpc5200-psc-i2s", not "fsl,mpc5200-i2s". This convention is chosen to -avoid naming conflicts with non-psc devices providing the same -function. For example, "fsl,mpc5200-spi" and "fsl,mpc5200-psc-spi" describe -the mpc5200 simple spi device and a PSC spi mode respectively. - -At the time of writing, exact chip may be either 'fsl,mpc5200' or -'fsl,mpc5200b'. - -The soc node ------------- -This node describes the on chip SOC peripherals. Every mpc5200 based -board will have this node, and as such there is a common naming -convention for SOC devices. - -Required properties: -name description ----- ----------- -ranges Memory range of the internal memory mapped registers. - Should be <0 [baseaddr] 0xc000> -reg Should be <[baseaddr] 0x100> -compatible mpc5200: "fsl,mpc5200-immr" - mpc5200b: "fsl,mpc5200b-immr" -system-frequency 'fsystem' frequency in Hz; XLB, IPB, USB and PCI - clocks are derived from the fsystem clock. -bus-frequency IPB bus frequency in Hz. Clock rate - used by most of the soc devices. - -soc child nodes ---------------- -Any on chip SOC devices available to Linux must appear as soc5200 child nodes. - -Note: The tables below show the value for the mpc5200. A mpc5200b device -tree should use the "fsl,mpc5200b-","fsl,mpc5200-" form. - -Required soc5200 child nodes: -name compatible Description ----- ---------- ----------- -cdm@ fsl,mpc5200-cdm Clock Distribution -interrupt-controller@ fsl,mpc5200-pic need an interrupt - controller to boot -bestcomm@ fsl,mpc5200-bestcomm Bestcomm DMA controller - -Recommended soc5200 child nodes; populate as needed for your board -name compatible Description ----- ---------- ----------- -timer@ fsl,mpc5200-gpt General purpose timers -gpio@ fsl,mpc5200-gpio MPC5200 simple gpio controller -gpio@ fsl,mpc5200-gpio-wkup MPC5200 wakeup gpio controller -rtc@ fsl,mpc5200-rtc Real time clock -mscan@ fsl,mpc5200-mscan CAN bus controller -pci@ fsl,mpc5200-pci PCI bridge -serial@ fsl,mpc5200-psc-uart PSC in serial mode -i2s@ fsl,mpc5200-psc-i2s PSC in i2s mode -ac97@ fsl,mpc5200-psc-ac97 PSC in ac97 mode -spi@ fsl,mpc5200-psc-spi PSC in spi mode -irda@ fsl,mpc5200-psc-irda PSC in IrDA mode -spi@ fsl,mpc5200-spi MPC5200 spi device -ethernet@ fsl,mpc5200-fec MPC5200 ethernet device -ata@ fsl,mpc5200-ata IDE ATA interface -i2c@ fsl,mpc5200-i2c I2C controller -usb@ fsl,mpc5200-ohci,ohci-be USB controller -xlb@ fsl,mpc5200-xlb XLB arbitrator - -fsl,mpc5200-gpt nodes ---------------------- -On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board -design supports the internal wdt, then the device node for GPT0 should -include the empty property 'fsl,has-wdt'. - -An mpc5200-gpt can be used as a single line GPIO controller. To do so, -add the following properties to the gpt node: - gpio-controller; - #gpio-cells = <2>; -When referencing the GPIO line from another node, the first cell must always -be zero and the second cell represents the gpio flags and described in the -gpio device tree binding. - -An mpc5200-gpt can be used as a single line edge sensitive interrupt -controller. To do so, add the following properties to the gpt node: - interrupt-controller; - #interrupt-cells = <1>; -When referencing the IRQ line from another node, the cell represents the -sense mode; 1 for edge rising, 2 for edge falling. - -fsl,mpc5200-psc nodes ---------------------- -The PSCs should include a cell-index which is the index of the PSC in -hardware. cell-index is used to determine which shared SoC registers to -use when setting up PSC clocking. cell-index number starts at '0'. ie: - PSC1 has 'cell-index = <0>' - PSC4 has 'cell-index = <3>' - -PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in -i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the -compatible field. - - -fsl,mpc5200-gpio and fsl,mpc5200-gpio-wkup nodes ------------------------------------------------- -Each GPIO controller node should have the empty property gpio-controller and -#gpio-cells set to 2. First cell is the GPIO number which is interpreted -according to the bit numbers in the GPIO control registers. The second cell -is for flags which is currently unused. - -fsl,mpc5200-fec nodes ---------------------- -The FEC node can specify one of the following properties to configure -the MII link: -- fsl,7-wire-mode - An empty property that specifies the link uses 7-wire - mode instead of MII -- current-speed - Specifies that the MII should be configured for a fixed - speed. This property should contain two cells. The - first cell specifies the speed in Mbps and the second - should be '0' for half duplex and '1' for full duplex -- phy-handle - Contains a phandle to an Ethernet PHY. - -Interrupt controller (fsl,mpc5200-pic) node -------------------------------------------- -The mpc5200 pic binding splits hardware IRQ numbers into two levels. The -split reflects the layout of the PIC hardware itself, which groups -interrupts into one of three groups; CRIT, MAIN or PERP. Also, the -Bestcomm dma engine has it's own set of interrupt sources which are -cascaded off of peripheral interrupt 0, which the driver interprets as a -fourth group, SDMA. - -The interrupts property for device nodes using the mpc5200 pic consists -of three cells; - - L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3] - L2 := interrupt number; directly mapped from the value in the - "ICTL PerStat, MainStat, CritStat Encoded Register" - level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3] - -For external IRQs, use the following interrupt property values (how to -specify external interrupts is a frequently asked question): -External interrupts: - external irq0: interrupts = <0 0 n>; - external irq1: interrupts = <1 1 n>; - external irq2: interrupts = <1 2 n>; - external irq3: interrupts = <1 3 n>; -'n' is sense (0: level high, 1: edge rising, 2: edge falling 3: level low) - diff --git a/trunk/Documentation/powerpc/mpc52xx-device-tree-bindings.txt b/trunk/Documentation/powerpc/mpc52xx-device-tree-bindings.txt new file mode 100644 index 000000000000..6f12f1c79c0c --- /dev/null +++ b/trunk/Documentation/powerpc/mpc52xx-device-tree-bindings.txt @@ -0,0 +1,277 @@ +MPC5200 Device Tree Bindings +---------------------------- + +(c) 2006-2007 Secret Lab Technologies Ltd +Grant Likely + +********** DRAFT *********** +* WARNING: Do not depend on the stability of these bindings just yet. +* The MPC5200 device tree conventions are still in flux +* Keep an eye on the linuxppc-dev mailing list for more details +********** DRAFT *********** + +I - Introduction +================ +Boards supported by the arch/powerpc architecture require device tree be +passed by the boot loader to the kernel at boot time. The device tree +describes what devices are present on the board and how they are +connected. The device tree can either be passed as a binary blob (as +described in Documentation/powerpc/booting-without-of.txt), or passed +by Open Firmware (IEEE 1275) compatible firmware using an OF compatible +client interface API. + +This document specifies the requirements on the device-tree for mpc5200 +based boards. These requirements are above and beyond the details +specified in either the Open Firmware spec or booting-without-of.txt + +All new mpc5200-based boards are expected to match this document. In +cases where this document is not sufficient to support a new board port, +this document should be updated as part of adding the new board support. + +II - Philosophy +=============== +The core of this document is naming convention. The whole point of +defining this convention is to reduce or eliminate the number of +special cases required to support a 5200 board. If all 5200 boards +follow the same convention, then generic 5200 support code will work +rather than coding special cases for each new board. + +This section tries to capture the thought process behind why the naming +convention is what it is. + +1. names +--------- +There is strong convention/requirements already established for children +of the root node. 'cpus' describes the processor cores, 'memory' +describes memory, and 'chosen' provides boot configuration. Other nodes +are added to describe devices attached to the processor local bus. + +Following convention already established with other system-on-chip +processors, 5200 device trees should use the name 'soc5200' for the +parent node of on chip devices, and the root node should be its parent. + +Child nodes are typically named after the configured function. ie. +the FEC node is named 'ethernet', and a PSC in uart mode is named 'serial'. + +2. device_type property +----------------------- +similar to the node name convention above; the device_type reflects the +configured function of a device. ie. 'serial' for a uart and 'spi' for +an spi controller. However, while node names *should* reflect the +configured function, device_type *must* match the configured function +exactly. + +3. compatible property +---------------------- +Since device_type isn't enough to match devices to drivers, there also +needs to be a naming convention for the compatible property. Compatible +is an list of device descriptions sorted from specific to generic. For +the mpc5200, the required format for each compatible value is +-[-]. The OS should be able to match a device driver +to the device based solely on the compatible value. If two drivers +match on the compatible list; the 'most compatible' driver should be +selected. + +The split between the MPC5200 and the MPC5200B leaves a bit of a +conundrum. How should the compatible property be set up to provide +maximum compatibility information; but still accurately describe the +chip? For the MPC5200; the answer is easy. Most of the SoC devices +originally appeared on the MPC5200. Since they didn't exist anywhere +else; the 5200 compatible properties will contain only one item; +"mpc5200-". + +The 5200B is almost the same as the 5200, but not quite. It fixes +silicon bugs and it adds a small number of enhancements. Most of the +devices either provide exactly the same interface as on the 5200. A few +devices have extra functions but still have a backwards compatible mode. +To express this information as completely as possible, 5200B device trees +should have two items in the compatible list; +"mpc5200b-\0mpc5200-". It is *strongly* recommended +that 5200B device trees follow this convention (instead of only listing +the base mpc5200 item). + +If another chip appear on the market with one of the mpc5200 SoC +devices, then the compatible list should include mpc5200-. + +ie. ethernet on mpc5200: compatible = "mpc5200-ethernet" + ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc5200-ethernet" + +Modal devices, like PSCs, also append the configured function to the +end of the compatible field. ie. A PSC in i2s mode would specify +"mpc5200-psc-i2s", not "mpc5200-i2s". This convention is chosen to +avoid naming conflicts with non-psc devices providing the same +function. For example, "mpc5200-spi" and "mpc5200-psc-spi" describe +the mpc5200 simple spi device and a PSC spi mode respectively. + +If the soc device is more generic and present on other SOCs, the +compatible property can specify the more generic device type also. + +ie. mscan: compatible = "mpc5200-mscan\0fsl,mscan"; + +At the time of writing, exact chip may be either 'mpc5200' or +'mpc5200b'. + +Device drivers should always try to match as generically as possible. + +III - Structure +=============== +The device tree for an mpc5200 board follows the structure defined in +booting-without-of.txt with the following additional notes: + +0) the root node +---------------- +Typical root description node; see booting-without-of + +1) The cpus node +---------------- +The cpus node follows the basic layout described in booting-without-of. +The bus-frequency property holds the XLB bus frequency +The clock-frequency property holds the core frequency + +2) The memory node +------------------ +Typical memory description node; see booting-without-of. + +3) The soc5200 node +------------------- +This node describes the on chip SOC peripherals. Every mpc5200 based +board will have this node, and as such there is a common naming +convention for SOC devices. + +Required properties: +name type description +---- ---- ----------- +device_type string must be "soc" +ranges int should be <0 baseaddr baseaddr+10000> +reg int must be +compatible string mpc5200: "mpc5200-soc" + mpc5200b: "mpc5200b-soc\0mpc5200-soc" +system-frequency int Fsystem frequency; source of all + other clocks. +bus-frequency int IPB bus frequency in HZ. Clock rate + used by most of the soc devices. +#interrupt-cells int must be <3>. + +Recommended properties: +name type description +---- ---- ----------- +model string Exact model of the chip; + ie: model="fsl,mpc5200" +revision string Silicon revision of chip + ie: revision="M08A" + +The 'model' and 'revision' properties are *strongly* recommended. Having +them presence acts as a bit of a safety net for working around as yet +undiscovered bugs on one version of silicon. For example, device drivers +can use the model and revision properties to decide if a bug fix should +be turned on. + +4) soc5200 child nodes +---------------------- +Any on chip SOC devices available to Linux must appear as soc5200 child nodes. + +Note: The tables below show the value for the mpc5200. A mpc5200b device +tree should use the "mpc5200b-\0mpc5200- form. + +Required soc5200 child nodes: +name device_type compatible Description +---- ----------- ---------- ----------- +cdm@ cdm mpc5200-cmd Clock Distribution +pic@ interrupt-controller mpc5200-pic need an interrupt + controller to boot +bestcomm@ dma-controller mpc5200-bestcomm 5200 pic also requires + the bestcomm device + +Recommended soc5200 child nodes; populate as needed for your board +name device_type compatible Description +---- ----------- ---------- ----------- +gpt@ gpt fsl,mpc5200-gpt General purpose timers +gpt@ gpt fsl,mpc5200-gpt-gpio General purpose + timers in GPIO mode +gpio@ fsl,mpc5200-gpio MPC5200 simple gpio + controller +gpio@ fsl,mpc5200-gpio-wkup MPC5200 wakeup gpio + controller +rtc@ rtc mpc5200-rtc Real time clock +mscan@ mscan mpc5200-mscan CAN bus controller +pci@ pci mpc5200-pci PCI bridge +serial@ serial mpc5200-psc-uart PSC in serial mode +i2s@ sound mpc5200-psc-i2s PSC in i2s mode +ac97@ sound mpc5200-psc-ac97 PSC in ac97 mode +spi@ spi mpc5200-psc-spi PSC in spi mode +irda@ irda mpc5200-psc-irda PSC in IrDA mode +spi@ spi mpc5200-spi MPC5200 spi device +ethernet@ network mpc5200-fec MPC5200 ethernet device +ata@ ata mpc5200-ata IDE ATA interface +i2c@ i2c mpc5200-i2c I2C controller +usb@ usb-ohci-be mpc5200-ohci,ohci-be USB controller +xlb@ xlb mpc5200-xlb XLB arbitrator + +Important child node properties +name type description +---- ---- ----------- +cell-index int When multiple devices are present, is the + index of the device in the hardware (ie. There + are 6 PSC on the 5200 numbered PSC1 to PSC6) + PSC1 has 'cell-index = <0>' + PSC4 has 'cell-index = <3>' + +5) General Purpose Timer nodes (child of soc5200 node) +On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board +design supports the internal wdt, then the device node for GPT0 should +include the empty property 'fsl,has-wdt'. + +6) PSC nodes (child of soc5200 node) +PSC nodes can define the optional 'port-number' property to force assignment +order of serial ports. For example, PSC5 might be physically connected to +the port labeled 'COM1' and PSC1 wired to 'COM1'. In this case, PSC5 would +have a "port-number = <0>" property, and PSC1 would have "port-number = <1>". + +PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in +i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the +compatible field. + +7) GPIO controller nodes +Each GPIO controller node should have the empty property gpio-controller and +#gpio-cells set to 2. First cell is the GPIO number which is interpreted +according to the bit numbers in the GPIO control registers. The second cell +is for flags which is currently unsused. + +8) FEC nodes +The FEC node can specify one of the following properties to configure +the MII link: +"fsl,7-wire-mode" - An empty property that specifies the link uses 7-wire + mode instead of MII +"current-speed" - Specifies that the MII should be configured for a fixed + speed. This property should contain two cells. The + first cell specifies the speed in Mbps and the second + should be '0' for half duplex and '1' for full duplex +"phy-handle" - Contains a phandle to an Ethernet PHY. + +IV - Extra Notes +================ + +1. Interrupt mapping +-------------------- +The mpc5200 pic driver splits hardware IRQ numbers into two levels. The +split reflects the layout of the PIC hardware itself, which groups +interrupts into one of three groups; CRIT, MAIN or PERP. Also, the +Bestcomm dma engine has it's own set of interrupt sources which are +cascaded off of peripheral interrupt 0, which the driver interprets as a +fourth group, SDMA. + +The interrupts property for device nodes using the mpc5200 pic consists +of three cells; + + L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3] + L2 := interrupt number; directly mapped from the value in the + "ICTL PerStat, MainStat, CritStat Encoded Register" + level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3] + +2. Shared registers +------------------- +Some SoC devices share registers between them. ie. the i2c devices use +a single clock control register, and almost all device are affected by +the port_config register. Devices which need to manipulate shared regs +should look to the parent SoC node. The soc node is responsible +for arbitrating all shared register access. diff --git a/trunk/Documentation/scsi/cxgb3i.txt b/trunk/Documentation/scsi/cxgb3i.txt index 7ac8032ee9b2..8141fa01978e 100644 --- a/trunk/Documentation/scsi/cxgb3i.txt +++ b/trunk/Documentation/scsi/cxgb3i.txt @@ -4,7 +4,7 @@ Introduction ============ The Chelsio T3 ASIC based Adapters (S310, S320, S302, S304, Mezz cards, etc. -series of products) support iSCSI acceleration and iSCSI Direct Data Placement +series of products) supports iSCSI acceleration and iSCSI Direct Data Placement (DDP) where the hardware handles the expensive byte touching operations, such as CRC computation and verification, and direct DMA to the final host memory destination: @@ -31,9 +31,9 @@ destination: the TCP segments onto the wire. It handles TCP retransmission if needed. - On receiving, S3 h/w recovers the iSCSI PDU by reassembling TCP + On receving, S3 h/w recovers the iSCSI PDU by reassembling TCP segments, separating the header and data, calculating and verifying - the digests, then forwarding the header to the host. The payload data, + the digests, then forwards the header to the host. The payload data, if possible, will be directly placed into the pre-posted host DDP buffer. Otherwise, the payload data will be sent to the host too. @@ -68,8 +68,9 @@ The following steps need to be taken to accelerates the open-iscsi initiator: sure the ip address is unique in the network. 3. edit /etc/iscsi/iscsid.conf - The default setting for MaxRecvDataSegmentLength (131072) is too big; - replace with a value no bigger than 15360 (for example 8192): + The default setting for MaxRecvDataSegmentLength (131072) is too big, + replace "node.conn[0].iscsi.MaxRecvDataSegmentLength" to be a value no + bigger than 15360 (for example 8192): node.conn[0].iscsi.MaxRecvDataSegmentLength = 8192 diff --git a/trunk/Documentation/sound/alsa/HD-Audio-Models.txt b/trunk/Documentation/sound/alsa/HD-Audio-Models.txt index 0f5d26bea80f..64eb1100eec1 100644 --- a/trunk/Documentation/sound/alsa/HD-Audio-Models.txt +++ b/trunk/Documentation/sound/alsa/HD-Audio-Models.txt @@ -349,7 +349,6 @@ STAC92HD73* STAC92HD83* =========== ref Reference board - mic-ref Reference board with power managment for ports STAC9872 ======== diff --git a/trunk/Documentation/tracers/mmiotrace.txt b/trunk/Documentation/tracers/mmiotrace.txt index 5731c67abc55..cde23b4a12a1 100644 --- a/trunk/Documentation/tracers/mmiotrace.txt +++ b/trunk/Documentation/tracers/mmiotrace.txt @@ -78,10 +78,12 @@ to view your kernel log and look for "mmiotrace has lost events" warning. If events were lost, the trace is incomplete. You should enlarge the buffers and try again. Buffers are enlarged by first seeing how large the current buffers are: -$ cat /debug/tracing/buffer_size_kb +$ cat /debug/tracing/trace_entries gives you a number. Approximately double this number and write it back, for instance: -$ echo 128000 > /debug/tracing/buffer_size_kb +$ echo 0 > /debug/tracing/tracing_enabled +$ echo 128000 > /debug/tracing/trace_entries +$ echo 1 > /debug/tracing/tracing_enabled Then start again from the top. If you are doing a trace for a driver project, e.g. Nouveau, you should also diff --git a/trunk/Documentation/usb/dma.txt b/trunk/Documentation/usb/dma.txt index cfdcd16e3abf..e8b50b7de9d9 100644 --- a/trunk/Documentation/usb/dma.txt +++ b/trunk/Documentation/usb/dma.txt @@ -6,9 +6,8 @@ in the kernel usb programming guide (kerneldoc, from the source code). API OVERVIEW The big picture is that USB drivers can continue to ignore most DMA issues, -though they still must provide DMA-ready buffers (see -Documentation/PCI/PCI-DMA-mapping.txt). That's how they've worked through -the 2.4 (and earlier) kernels. +though they still must provide DMA-ready buffers (see DMA-mapping.txt). +That's how they've worked through the 2.4 (and earlier) kernels. OR: they can now be DMA-aware. @@ -63,8 +62,8 @@ and effects like cache-trashing can impose subtle penalties. force a consistent memory access ordering by using memory barriers. It's not using a streaming DMA mapping, so it's good for small transfers on systems where the I/O would otherwise thrash an IOMMU mapping. (See - Documentation/PCI/PCI-DMA-mapping.txt for definitions of "coherent" and - "streaming" DMA mappings.) + Documentation/DMA-mapping.txt for definitions of "coherent" and "streaming" + DMA mappings.) Asking for 1/Nth of a page (as well as asking for N pages) is reasonably space-efficient. @@ -94,7 +93,7 @@ WORKING WITH EXISTING BUFFERS Existing buffers aren't usable for DMA without first being mapped into the DMA address space of the device. However, most buffers passed to your driver can safely be used with such DMA mapping. (See the first section -of Documentation/PCI/PCI-DMA-mapping.txt, titled "What memory is DMA-able?") +of DMA-mapping.txt, titled "What memory is DMA-able?") - When you're using scatterlists, you can map everything at once. On some systems, this kicks in an IOMMU and turns the scatterlists into single diff --git a/trunk/Documentation/video4linux/v4lgrab.c b/trunk/Documentation/video4linux/v4lgrab.c index d6e70bef8ad0..079b628481cf 100644 --- a/trunk/Documentation/video4linux/v4lgrab.c +++ b/trunk/Documentation/video4linux/v4lgrab.c @@ -4,21 +4,12 @@ * * Compile with: * gcc -s -Wall -Wstrict-prototypes v4lgrab.c -o v4lgrab - * Use as: - * v4lgrab >image.ppm + * Use as: + * v4lgrab >image.ppm * * Copyright (C) 1998-05-03, Phil Blundell - * Copied from http://www.tazenda.demon.co.uk/phil/vgrabber.c - * with minor modifications (Dave Forrest, drf5n@virginia.edu). - * - * - * For some cameras you may need to pre-load libv4l to perform - * the necessary decompression, e.g.: - * - * export LD_PRELOAD=/usr/lib/libv4l/v4l1compat.so - * ./v4lgrab >image.ppm - * - * see http://hansdegoede.livejournal.com/3636.html for details. + * Copied from http://www.tazenda.demon.co.uk/phil/vgrabber.c + * with minor modifications (Dave Forrest, drf5n@virginia.edu). * */ @@ -33,7 +24,7 @@ #include #include -#define VIDEO_DEV "/dev/video0" +#define FILE "/dev/video0" /* Stole this from tvset.c */ @@ -99,7 +90,7 @@ int get_brightness_adj(unsigned char *image, long size, int *brightness) { int main(int argc, char ** argv) { - int fd = open(VIDEO_DEV, O_RDONLY), f; + int fd = open(FILE, O_RDONLY), f; struct video_capability cap; struct video_window win; struct video_picture vpic; @@ -109,13 +100,13 @@ int main(int argc, char ** argv) unsigned int i, src_depth; if (fd < 0) { - perror(VIDEO_DEV); + perror(FILE); exit(1); } if (ioctl(fd, VIDIOCGCAP, &cap) < 0) { perror("VIDIOGCAP"); - fprintf(stderr, "(" VIDEO_DEV " not a video4linux device?)\n"); + fprintf(stderr, "(" FILE " not a video4linux device?)\n"); close(fd); exit(1); } diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 9633fb0a92b0..3fe4dc2c2564 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -622,7 +622,7 @@ P: Dirk Opfer M: dirk@opfer-online.de S: Maintained -ARM/PALMTX,PALMT5,PALMLD SUPPORT +ARM/PALMTX SUPPORT P: Marek Vasut M: marek.vasut@gmail.com W: http://hackndev.com @@ -692,13 +692,6 @@ M: kernel@wantstofly.org L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) S: Maintained -ARM/NUVOTON W90X900 ARM ARCHITECTURE -P: Wan ZongShun -M: mcuos.com@gmail.com -L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only) -W: http://www.mcuos.com -S: Maintained - ARPD SUPPORT P: Jonathan Layes L: netdev@vger.kernel.org @@ -918,7 +911,7 @@ S: Maintained BLACKFIN ARCHITECTURE P: Bryan Wu M: cooloney@kernel.org -L: uclinux-dist-devel@blackfin.uclinux.org +L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only) W: http://blackfin.uclinux.org S: Supported @@ -1028,14 +1021,6 @@ M: mb@bu3sch.de W: http://bu3sch.de/btgpio.php S: Maintained -BTRFS FILE SYSTEM -P: Chris Mason -M: chris.mason@oracle.com -L: linux-btrfs@vger.kernel.org -W: http://btrfs.wiki.kernel.org/ -T: git kernel.org:/pub/scm/linux/kernel/git/mason/btrfs-unstable.git -S: Maintained - BTTV VIDEO4LINUX DRIVER P: Mauro Carvalho Chehab M: mchehab@infradead.org @@ -1209,8 +1194,6 @@ S: Supported CONTROL GROUPS (CGROUPS) P: Paul Menage M: menage@google.com -P: Li Zefan -M: lizf@cn.fujitsu.com L: containers@lists.linux-foundation.org S: Maintained @@ -1912,10 +1895,10 @@ W: http://gigaset307x.sourceforge.net/ S: Maintained HARD DRIVE ACTIVE PROTECTION SYSTEM (HDAPS) DRIVER -P: Frank Seidel -M: frank@f-seidel.de -L: lm-sensors@lm-sensors.org -W: http://www.kernel.org/pub/linux/kernel/people/fseidel/hdaps/ +P: Robert Love +M: rlove@rlove.org +M: linux-kernel@vger.kernel.org +W: http://www.kernel.org/pub/linux/kernel/people/rml/hdaps/ S: Maintained GSPCA FINEPIX SUBDRIVER @@ -2008,7 +1991,7 @@ S: Maintained HIBERNATION (aka Software Suspend, aka swsusp) P: Pavel Machek -M: pavel@ucw.cz +M: pavel@suse.cz P: Rafael J. Wysocki M: rjw@sisk.pl L: linux-pm@lists.linux-foundation.org @@ -2119,8 +2102,7 @@ M: khali@linux-fr.org P: Ben Dooks (embedded platforms) M: ben-linux@fluff.org L: linux-i2c@vger.kernel.org -W: http://i2c.wiki.kernel.org/ -T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-i2c/ +T: quilt http://khali.linux-fr.org/devel/linux-2.6/jdelvare-i2c/ S: Maintained I2C-TINY-USB DRIVER @@ -2229,7 +2211,7 @@ P: Sean Hefty M: sean.hefty@intel.com P: Hal Rosenstock M: hal.rosenstock@gmail.com -L: general@lists.openfabrics.org (moderated for non-subscribers) +L: general@lists.openfabrics.org W: http://www.openib.org/ T: git kernel.org:/pub/scm/linux/kernel/git/roland/infiniband.git S: Supported @@ -2464,7 +2446,7 @@ S: Maintained ISDN SUBSYSTEM P: Karsten Keil -M: isdn@linux-pingi.de +M: kkeil@suse.de L: isdn4linux@listserv.isdn4linux.de (subscribers-only) W: http://www.isdn4linux.de T: git kernel.org:/pub/scm/linux/kernel/kkeil/isdn-2.6.git @@ -2853,6 +2835,8 @@ S: Maintained MAC80211 P: Johannes Berg M: johannes@sipsolutions.net +P: Michael Wu +M: flamingice@sourmilk.net L: linux-wireless@vger.kernel.org W: http://linuxwireless.org/ T: git kernel.org:/pub/scm/linux/kernel/git/linville/wireless-2.6.git @@ -3334,8 +3318,8 @@ P: Jeremy Fitzhardinge M: jeremy@xensource.com P: Chris Wright M: chrisw@sous-sol.org -P: Alok Kataria -M: akataria@vmware.com +P: Zachary Amsden +M: zach@vmware.com P: Rusty Russell M: rusty@rustcorp.com.au L: virtualization@lists.osdl.org @@ -3546,12 +3530,6 @@ S: Maintained PXA MMCI DRIVER S: Orphan -PXA RTC DRIVER -P: Robert Jarzmik -M: robert.jarzmik@free.fr -L: rtc-linux@googlegroups.com -S: Maintained - QLOGIC QLA2XXX FC-SCSI DRIVER P: Andrew Vasquez M: linux-driver@qlogic.com @@ -4179,7 +4157,7 @@ SUSPEND TO RAM P: Len Brown M: len.brown@intel.com P: Pavel Machek -M: pavel@ucw.cz +M: pavel@suse.cz P: Rafael J. Wysocki M: rjw@sisk.pl L: linux-pm@lists.linux-foundation.org @@ -4300,8 +4278,8 @@ P: Rajiv Andrade M: srajiv@linux.vnet.ibm.com W: http://tpmdd.sourceforge.net P: Marcel Selhorst -M: m.selhorst@sirrix.com -W: http://www.sirrix.com +M: tpm@selhorst.net +W: http://www.prosec.rub.de/tpm/ L: tpmdd-devel@lists.sourceforge.net (moderated for non-subscribers) S: Maintained @@ -4864,7 +4842,6 @@ P: Ingo Molnar M: mingo@redhat.com P: H. Peter Anvin M: hpa@zytor.com -M: x86@kernel.org L: linux-kernel@vger.kernel.org T: git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86.git S: Maintained @@ -4931,11 +4908,11 @@ L: zd1211-devs@lists.sourceforge.net (subscribers-only) S: Maintained ZR36067 VIDEO FOR LINUX DRIVER +P: Ronald Bultje +M: rbultje@ronald.bitfreak.net L: mjpeg-users@lists.sourceforge.net -L: linux-media@vger.kernel.org W: http://mjpeg.sourceforge.net/driver-zoran/ -T: Mercurial http://linuxtv.org/hg/v4l-dvb -S: Odd Fixes +S: Maintained ZS DECSTATION Z85C30 SERIAL DRIVER P: Maciej W. Rozycki diff --git a/trunk/Makefile b/trunk/Makefile index d04ee0ad1dcc..207303da3971 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 SUBLEVEL = 29 -EXTRAVERSION = -rc7 +EXTRAVERSION = -rc2 NAME = Erotic Pickled Herring # *DOCUMENTATION* @@ -213,10 +213,6 @@ endif # Where to locate arch specific headers hdr-arch := $(SRCARCH) -ifeq ($(ARCH),m68knommu) - hdr-arch := m68k -endif - KCONFIG_CONFIG ?= .config # SHELL used by kbuild @@ -389,7 +385,6 @@ PHONY += outputmakefile # output directory. outputmakefile: ifneq ($(KBUILD_SRC),) - $(Q)ln -fsn $(srctree) source $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkmakefile \ $(srctree) $(objtree) $(VERSION) $(PATCHLEVEL) endif @@ -611,20 +606,25 @@ export INSTALL_PATH ?= /boot MODLIB = $(INSTALL_MOD_PATH)/lib/modules/$(KERNELRELEASE) export MODLIB -# -# INSTALL_MOD_STRIP, if defined, will cause modules to be -# stripped after they are installed. If INSTALL_MOD_STRIP is '1', then -# the default option --strip-debug will be used. Otherwise, -# INSTALL_MOD_STRIP will used as the options to the strip command. +strip-symbols := $(srctree)/scripts/strip-symbols \ + $(wildcard $(srctree)/arch/$(ARCH)/scripts/strip-symbols) +# +# INSTALL_MOD_STRIP, if defined, will cause modules to be stripped while +# they get installed. If INSTALL_MOD_STRIP is '1', then the default +# options (see below) will be used. Otherwise, INSTALL_MOD_STRIP will +# be used as the option(s) to the objcopy command. ifdef INSTALL_MOD_STRIP ifeq ($(INSTALL_MOD_STRIP),1) -mod_strip_cmd = $(STRIP) --strip-debug +mod_strip_cmd = $(OBJCOPY) --strip-debug +ifeq ($(CONFIG_KALLSYMS_ALL),$(CONFIG_KALLSYMS_STRIP_GENERATED)) +mod_strip_cmd += --wildcard $(addprefix --strip-symbols ,$(strip-symbols)) +endif else -mod_strip_cmd = $(STRIP) $(INSTALL_MOD_STRIP) +mod_strip_cmd = $(OBJCOPY) $(INSTALL_MOD_STRIP) endif # INSTALL_MOD_STRIP=1 else -mod_strip_cmd = true +mod_strip_cmd = false endif # INSTALL_MOD_STRIP export mod_strip_cmd @@ -754,6 +754,7 @@ last_kallsyms := 2 endif kallsyms.o := .tmp_kallsyms$(last_kallsyms).o +kallsyms.h := $(wildcard include/config/kallsyms/*.h) $(wildcard include/config/kallsyms/*/*.h) define verify_kallsyms $(Q)$(if $($(quiet)cmd_sysmap), \ @@ -778,24 +779,41 @@ endef # Generate .S file with all kernel symbols quiet_cmd_kallsyms = KSYM $@ - cmd_kallsyms = $(NM) -n $< | $(KALLSYMS) \ - $(if $(CONFIG_KALLSYMS_ALL),--all-symbols) > $@ + cmd_kallsyms = { test $* -eq 0 || $(NM) -n $<; } \ + | $(KALLSYMS) $(if $(CONFIG_KALLSYMS_ALL),--all-symbols) >$@ -.tmp_kallsyms1.o .tmp_kallsyms2.o .tmp_kallsyms3.o: %.o: %.S scripts FORCE +quiet_cmd_kstrip = STRIP $@ + cmd_kstrip = $(OBJCOPY) --wildcard $(addprefix --strip$(if $(CONFIG_RELOCATABLE),-unneeded)-symbols ,$(filter %/scripts/strip-symbols,$^)) $< $@ + +$(foreach n,0 1 2 3,.tmp_kallsyms$(n).o): KBUILD_AFLAGS += -Wa,--strip-local-absolute +$(foreach n,0 1 2 3,.tmp_kallsyms$(n).o): %.o: %.S scripts FORCE $(call if_changed_dep,as_o_S) -.tmp_kallsyms%.S: .tmp_vmlinux% $(KALLSYMS) +ifeq ($(CONFIG_KALLSYMS_STRIP_GENERATED),y) +strip-ext := .stripped +endif + +.tmp_kallsyms%.S: .tmp_vmlinux%$(strip-ext) $(KALLSYMS) $(kallsyms.h) $(call cmd,kallsyms) +# make -jN seems to have problems with intermediate files, see bug #3330. +.SECONDARY: $(foreach n,1 2 3,.tmp_vmlinux$(n).stripped) +.tmp_vmlinux%.stripped: .tmp_vmlinux% $(strip-symbols) $(kallsyms.h) + $(call cmd,kstrip) + +ifneq ($(CONFIG_DEBUG_INFO),y) +.tmp_vmlinux%: LDFLAGS_vmlinux += -S +endif # .tmp_vmlinux1 must be complete except kallsyms, so update vmlinux version -.tmp_vmlinux1: $(vmlinux-lds) $(vmlinux-all) FORCE - $(call if_changed_rule,ksym_ld) +.tmp_vmlinux%: $(vmlinux-lds) $(vmlinux-all) FORCE + $(if $(filter 1,$*),$(call if_changed_rule,ksym_ld),$(call if_changed,vmlinux__)) -.tmp_vmlinux2: $(vmlinux-lds) $(vmlinux-all) .tmp_kallsyms1.o FORCE - $(call if_changed,vmlinux__) +.tmp_vmlinux0$(strip-ext): + $(Q)echo "placeholder" >$@ -.tmp_vmlinux3: $(vmlinux-lds) $(vmlinux-all) .tmp_kallsyms2.o FORCE - $(call if_changed,vmlinux__) +.tmp_vmlinux1: .tmp_kallsyms0.o +.tmp_vmlinux2: .tmp_kallsyms1.o +.tmp_vmlinux3: .tmp_kallsyms2.o # Needs to visit scripts/ before $(KALLSYMS) can be used. $(KALLSYMS): scripts ; @@ -947,6 +965,7 @@ ifneq ($(KBUILD_SRC),) mkdir -p include2; \ ln -fsn $(srctree)/include/asm-$(SRCARCH) include2/asm; \ fi + ln -fsn $(srctree) source endif # prepare2 creates a makefile if using a separate output directory diff --git a/trunk/README b/trunk/README index d6c6c742c1d7..90a07658ede1 100644 --- a/trunk/README +++ b/trunk/README @@ -188,7 +188,7 @@ CONFIGURING the kernel: values to random values. You can find more information on using the Linux kernel config tools - in Documentation/kbuild/kconfig.txt. + in Documentation/kbuild/make-configs.txt. NOTES on "make config": - having unnecessary drivers will make the kernel bigger, and can diff --git a/trunk/arch/alpha/Kconfig b/trunk/arch/alpha/Kconfig index 9fb8aae5c391..6110197757a3 100644 --- a/trunk/arch/alpha/Kconfig +++ b/trunk/arch/alpha/Kconfig @@ -8,7 +8,6 @@ config ALPHA select HAVE_AOUT select HAVE_IDE select HAVE_OPROFILE - select HAVE_SYSCALL_WRAPPERS help The Alpha is a 64-bit general-purpose processor designed and marketed by the Digital Equipment Corporation of blessed memory, diff --git a/trunk/arch/alpha/include/asm/bug.h b/trunk/arch/alpha/include/asm/bug.h index 1720c8ad86fe..695a5ee4b5d3 100644 --- a/trunk/arch/alpha/include/asm/bug.h +++ b/trunk/arch/alpha/include/asm/bug.h @@ -8,12 +8,17 @@ /* ??? Would be nice to use .gprel32 here, but we can't be sure that the function loaded the GP, so this could fail in modules. */ -#define BUG() do { \ - __asm__ __volatile__( \ - "call_pal %0 # bugchk\n\t" \ - ".long %1\n\t.8byte %2" \ - : : "i"(PAL_bugchk), "i"(__LINE__), "i"(__FILE__)); \ - for ( ; ; ); } while (0) +static inline void ATTRIB_NORET __BUG(const char *file, int line) +{ + __asm__ __volatile__( + "call_pal %0 # bugchk\n\t" + ".long %1\n\t.8byte %2" + : : "i" (PAL_bugchk), "i"(line), "i"(file)); + for ( ; ; ) + ; +} + +#define BUG() __BUG(__FILE__, __LINE__) #define HAVE_ARCH_BUG #endif diff --git a/trunk/arch/alpha/include/asm/dma-mapping.h b/trunk/arch/alpha/include/asm/dma-mapping.h index 04eb5681448c..a5801ae02e4b 100644 --- a/trunk/arch/alpha/include/asm/dma-mapping.h +++ b/trunk/arch/alpha/include/asm/dma-mapping.h @@ -29,8 +29,6 @@ #else /* no PCI - no IOMMU. */ -#include /* for virt_to_phys() */ - struct scatterlist; void *dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *dma_handle, gfp_t gfp); diff --git a/trunk/arch/alpha/kernel/entry.S b/trunk/arch/alpha/kernel/entry.S index e4a54b615894..aa2e50cf9857 100644 --- a/trunk/arch/alpha/kernel/entry.S +++ b/trunk/arch/alpha/kernel/entry.S @@ -933,7 +933,7 @@ sys_execve: osf_sigprocmask: .prologue 0 mov $sp, $18 - jmp $31, sys_osf_sigprocmask + jmp $31, do_osf_sigprocmask .end osf_sigprocmask .align 4 diff --git a/trunk/arch/alpha/kernel/osf_sys.c b/trunk/arch/alpha/kernel/osf_sys.c index ae41f097864b..18a3ea1aac51 100644 --- a/trunk/arch/alpha/kernel/osf_sys.c +++ b/trunk/arch/alpha/kernel/osf_sys.c @@ -54,7 +54,8 @@ extern int do_pipe(int *); * identical to OSF as we don't return 0 on success, but doing otherwise * would require changes to libc. Hopefully this is good enough. */ -SYSCALL_DEFINE1(osf_brk, unsigned long, brk) +asmlinkage unsigned long +osf_brk(unsigned long brk) { unsigned long retval = sys_brk(brk); if (brk && brk != retval) @@ -65,9 +66,9 @@ SYSCALL_DEFINE1(osf_brk, unsigned long, brk) /* * This is pure guess-work.. */ -SYSCALL_DEFINE4(osf_set_program_attributes, unsigned long, text_start, - unsigned long, text_len, unsigned long, bss_start, - unsigned long, bss_len) +asmlinkage int +osf_set_program_attributes(unsigned long text_start, unsigned long text_len, + unsigned long bss_start, unsigned long bss_len) { struct mm_struct *mm; @@ -145,9 +146,9 @@ osf_filldir(void *__buf, const char *name, int namlen, loff_t offset, return -EFAULT; } -SYSCALL_DEFINE4(osf_getdirentries, unsigned int, fd, - struct osf_dirent __user *, dirent, unsigned int, count, - long __user *, basep) +asmlinkage int +osf_getdirentries(unsigned int fd, struct osf_dirent __user *dirent, + unsigned int count, long __user *basep) { int error; struct file *file; @@ -176,9 +177,9 @@ SYSCALL_DEFINE4(osf_getdirentries, unsigned int, fd, #undef NAME_OFFSET -SYSCALL_DEFINE6(osf_mmap, unsigned long, addr, unsigned long, len, - unsigned long, prot, unsigned long, flags, unsigned long, fd, - unsigned long, off) +asmlinkage unsigned long +osf_mmap(unsigned long addr, unsigned long len, unsigned long prot, + unsigned long flags, unsigned long fd, unsigned long off) { struct file *file = NULL; unsigned long ret = -EBADF; @@ -253,8 +254,8 @@ do_osf_statfs(struct dentry * dentry, struct osf_statfs __user *buffer, return error; } -SYSCALL_DEFINE3(osf_statfs, char __user *, pathname, - struct osf_statfs __user *, buffer, unsigned long, bufsiz) +asmlinkage int +osf_statfs(char __user *pathname, struct osf_statfs __user *buffer, unsigned long bufsiz) { struct path path; int retval; @@ -267,8 +268,8 @@ SYSCALL_DEFINE3(osf_statfs, char __user *, pathname, return retval; } -SYSCALL_DEFINE3(osf_fstatfs, unsigned long, fd, - struct osf_statfs __user *, buffer, unsigned long, bufsiz) +asmlinkage int +osf_fstatfs(unsigned long fd, struct osf_statfs __user *buffer, unsigned long bufsiz) { struct file *file; int retval; @@ -367,8 +368,8 @@ osf_procfs_mount(char *dirname, struct procfs_args __user *args, int flags) return do_mount("", dirname, "proc", flags, NULL); } -SYSCALL_DEFINE4(osf_mount, unsigned long, typenr, char __user *, path, - int, flag, void __user *, data) +asmlinkage int +osf_mount(unsigned long typenr, char __user *path, int flag, void __user *data) { int retval = -EINVAL; char *name; @@ -398,7 +399,8 @@ SYSCALL_DEFINE4(osf_mount, unsigned long, typenr, char __user *, path, return retval; } -SYSCALL_DEFINE1(osf_utsname, char __user *, name) +asmlinkage int +osf_utsname(char __user *name) { int error; @@ -421,12 +423,14 @@ SYSCALL_DEFINE1(osf_utsname, char __user *, name) return error; } -SYSCALL_DEFINE0(getpagesize) +asmlinkage unsigned long +sys_getpagesize(void) { return PAGE_SIZE; } -SYSCALL_DEFINE0(getdtablesize) +asmlinkage unsigned long +sys_getdtablesize(void) { return sysctl_nr_open; } @@ -434,7 +438,8 @@ SYSCALL_DEFINE0(getdtablesize) /* * For compatibility with OSF/1 only. Use utsname(2) instead. */ -SYSCALL_DEFINE2(osf_getdomainname, char __user *, name, int, namelen) +asmlinkage int +osf_getdomainname(char __user *name, int namelen) { unsigned len; int i; @@ -522,8 +527,8 @@ enum pl_code { PL_DEL = 5, PL_FDEL = 6 }; -SYSCALL_DEFINE2(osf_proplist_syscall, enum pl_code, code, - union pl_args __user *, args) +asmlinkage long +osf_proplist_syscall(enum pl_code code, union pl_args __user *args) { long error; int __user *min_buf_size_ptr; @@ -562,8 +567,8 @@ SYSCALL_DEFINE2(osf_proplist_syscall, enum pl_code, code, return error; } -SYSCALL_DEFINE2(osf_sigstack, struct sigstack __user *, uss, - struct sigstack __user *, uoss) +asmlinkage int +osf_sigstack(struct sigstack __user *uss, struct sigstack __user *uoss) { unsigned long usp = rdusp(); unsigned long oss_sp = current->sas_ss_sp + current->sas_ss_size; @@ -603,7 +608,8 @@ SYSCALL_DEFINE2(osf_sigstack, struct sigstack __user *, uss, return error; } -SYSCALL_DEFINE3(osf_sysinfo, int, command, char __user *, buf, long, count) +asmlinkage long +osf_sysinfo(int command, char __user *buf, long count) { char *sysinfo_table[] = { utsname()->sysname, @@ -641,8 +647,9 @@ SYSCALL_DEFINE3(osf_sysinfo, int, command, char __user *, buf, long, count) return err; } -SYSCALL_DEFINE5(osf_getsysinfo, unsigned long, op, void __user *, buffer, - unsigned long, nbytes, int __user *, start, void __user *, arg) +asmlinkage unsigned long +osf_getsysinfo(unsigned long op, void __user *buffer, unsigned long nbytes, + int __user *start, void __user *arg) { unsigned long w; struct percpu_struct *cpu; @@ -698,8 +705,9 @@ SYSCALL_DEFINE5(osf_getsysinfo, unsigned long, op, void __user *, buffer, return -EOPNOTSUPP; } -SYSCALL_DEFINE5(osf_setsysinfo, unsigned long, op, void __user *, buffer, - unsigned long, nbytes, int __user *, start, void __user *, arg) +asmlinkage unsigned long +osf_setsysinfo(unsigned long op, void __user *buffer, unsigned long nbytes, + int __user *start, void __user *arg) { switch (op) { case SSI_IEEE_FP_CONTROL: { @@ -872,8 +880,8 @@ jiffies_to_timeval32(unsigned long jiffies, struct timeval32 *value) value->tv_sec = jiffies / HZ; } -SYSCALL_DEFINE2(osf_gettimeofday, struct timeval32 __user *, tv, - struct timezone __user *, tz) +asmlinkage int +osf_gettimeofday(struct timeval32 __user *tv, struct timezone __user *tz) { if (tv) { struct timeval ktv; @@ -888,8 +896,8 @@ SYSCALL_DEFINE2(osf_gettimeofday, struct timeval32 __user *, tv, return 0; } -SYSCALL_DEFINE2(osf_settimeofday, struct timeval32 __user *, tv, - struct timezone __user *, tz) +asmlinkage int +osf_settimeofday(struct timeval32 __user *tv, struct timezone __user *tz) { struct timespec kts; struct timezone ktz; @@ -908,7 +916,8 @@ SYSCALL_DEFINE2(osf_settimeofday, struct timeval32 __user *, tv, return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL); } -SYSCALL_DEFINE2(osf_getitimer, int, which, struct itimerval32 __user *, it) +asmlinkage int +osf_getitimer(int which, struct itimerval32 __user *it) { struct itimerval kit; int error; @@ -920,8 +929,8 @@ SYSCALL_DEFINE2(osf_getitimer, int, which, struct itimerval32 __user *, it) return error; } -SYSCALL_DEFINE3(osf_setitimer, int, which, struct itimerval32 __user *, in, - struct itimerval32 __user *, out) +asmlinkage int +osf_setitimer(int which, struct itimerval32 __user *in, struct itimerval32 __user *out) { struct itimerval kin, kout; int error; @@ -943,8 +952,8 @@ SYSCALL_DEFINE3(osf_setitimer, int, which, struct itimerval32 __user *, in, } -SYSCALL_DEFINE2(osf_utimes, char __user *, filename, - struct timeval32 __user *, tvs) +asmlinkage int +osf_utimes(char __user *filename, struct timeval32 __user *tvs) { struct timespec tv[2]; @@ -970,8 +979,9 @@ SYSCALL_DEFINE2(osf_utimes, char __user *, filename, #define MAX_SELECT_SECONDS \ ((unsigned long) (MAX_SCHEDULE_TIMEOUT / HZ)-1) -SYSCALL_DEFINE5(osf_select, int, n, fd_set __user *, inp, fd_set __user *, outp, - fd_set __user *, exp, struct timeval32 __user *, tvp) +asmlinkage int +osf_select(int n, fd_set __user *inp, fd_set __user *outp, fd_set __user *exp, + struct timeval32 __user *tvp) { struct timespec end_time, *to = NULL; if (tvp) { @@ -1016,7 +1026,8 @@ struct rusage32 { long ru_nivcsw; /* involuntary " */ }; -SYSCALL_DEFINE2(osf_getrusage, int, who, struct rusage32 __user *, ru) +asmlinkage int +osf_getrusage(int who, struct rusage32 __user *ru) { struct rusage32 r; @@ -1042,8 +1053,9 @@ SYSCALL_DEFINE2(osf_getrusage, int, who, struct rusage32 __user *, ru) return copy_to_user(ru, &r, sizeof(r)) ? -EFAULT : 0; } -SYSCALL_DEFINE4(osf_wait4, pid_t, pid, int __user *, ustatus, int, options, - struct rusage32 __user *, ur) +asmlinkage long +osf_wait4(pid_t pid, int __user *ustatus, int options, + struct rusage32 __user *ur) { struct rusage r; long ret, err; @@ -1089,8 +1101,8 @@ SYSCALL_DEFINE4(osf_wait4, pid_t, pid, int __user *, ustatus, int, options, * seems to be a timeval pointer, and I suspect the second * one is the time remaining.. Ho humm.. No documentation. */ -SYSCALL_DEFINE2(osf_usleep_thread, struct timeval32 __user *, sleep, - struct timeval32 __user *, remain) +asmlinkage int +osf_usleep_thread(struct timeval32 __user *sleep, struct timeval32 __user *remain) { struct timeval tmp; unsigned long ticks; @@ -1143,7 +1155,8 @@ struct timex32 { int :32; int :32; int :32; int :32; }; -SYSCALL_DEFINE1(old_adjtimex, struct timex32 __user *, txc_p) +asmlinkage int +sys_old_adjtimex(struct timex32 __user *txc_p) { struct timex txc; int ret; @@ -1254,8 +1267,8 @@ osf_fix_iov_len(const struct iovec __user *iov, unsigned long count) return 0; } -SYSCALL_DEFINE3(osf_readv, unsigned long, fd, - const struct iovec __user *, vector, unsigned long, count) +asmlinkage ssize_t +osf_readv(unsigned long fd, const struct iovec __user * vector, unsigned long count) { if (unlikely(personality(current->personality) == PER_OSF4)) if (osf_fix_iov_len(vector, count)) @@ -1263,8 +1276,8 @@ SYSCALL_DEFINE3(osf_readv, unsigned long, fd, return sys_readv(fd, vector, count); } -SYSCALL_DEFINE3(osf_writev, unsigned long, fd, - const struct iovec __user *, vector, unsigned long, count) +asmlinkage ssize_t +osf_writev(unsigned long fd, const struct iovec __user * vector, unsigned long count) { if (unlikely(personality(current->personality) == PER_OSF4)) if (osf_fix_iov_len(vector, count)) diff --git a/trunk/arch/alpha/kernel/pci-noop.c b/trunk/arch/alpha/kernel/pci-noop.c index c19a376520f4..8ac08311f5a5 100644 --- a/trunk/arch/alpha/kernel/pci-noop.c +++ b/trunk/arch/alpha/kernel/pci-noop.c @@ -109,8 +109,7 @@ sys_pciconfig_write(unsigned long bus, unsigned long dfn, /* Stubs for the routines in pci_iommu.c: */ void * -__pci_alloc_consistent(struct pci_dev *pdev, size_t size, - dma_addr_t *dma_addrp, gfp_t gfp) +pci_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp) { return NULL; } diff --git a/trunk/arch/alpha/kernel/process.c b/trunk/arch/alpha/kernel/process.c index 8d0097f10208..f238370c907d 100644 --- a/trunk/arch/alpha/kernel/process.c +++ b/trunk/arch/alpha/kernel/process.c @@ -93,8 +93,8 @@ common_shutdown_1(void *generic_ptr) if (cpuid != boot_cpuid) { flags |= 0x00040000UL; /* "remain halted" */ *pflags = flags; - set_cpu_present(cpuid, false); - set_cpu_possible(cpuid, false); + cpu_clear(cpuid, cpu_present_map); + cpu_clear(cpuid, cpu_possible_map); halt(); } #endif @@ -120,8 +120,8 @@ common_shutdown_1(void *generic_ptr) #ifdef CONFIG_SMP /* Wait for the secondaries to halt. */ - set_cpu_present(boot_cpuid, false); - set_cpu_possible(boot_cpuid, false); + cpu_clear(boot_cpuid, cpu_present_map); + cpu_clear(boot_cpuid, cpu_possible_map); while (cpus_weight(cpu_present_map)) barrier(); #endif diff --git a/trunk/arch/alpha/kernel/signal.c b/trunk/arch/alpha/kernel/signal.c index df65eaa84c4c..410af4f3140e 100644 --- a/trunk/arch/alpha/kernel/signal.c +++ b/trunk/arch/alpha/kernel/signal.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include @@ -52,8 +51,8 @@ static void do_signal(struct pt_regs *, struct switch_stack *, * Note that we don't need to acquire the kernel lock for SMP * operation, as all of this is local to this thread. */ -SYSCALL_DEFINE3(osf_sigprocmask, int, how, unsigned long, newmask, - struct pt_regs *, regs) +asmlinkage unsigned long +do_osf_sigprocmask(int how, unsigned long newmask, struct pt_regs *regs) { unsigned long oldmask = -EINVAL; @@ -82,9 +81,9 @@ SYSCALL_DEFINE3(osf_sigprocmask, int, how, unsigned long, newmask, return oldmask; } -SYSCALL_DEFINE3(osf_sigaction, int, sig, - const struct osf_sigaction __user *, act, - struct osf_sigaction __user *, oact) +asmlinkage int +osf_sigaction(int sig, const struct osf_sigaction __user *act, + struct osf_sigaction __user *oact) { struct k_sigaction new_ka, old_ka; int ret; @@ -113,9 +112,10 @@ SYSCALL_DEFINE3(osf_sigaction, int, sig, return ret; } -SYSCALL_DEFINE5(rt_sigaction, int, sig, const struct sigaction __user *, act, - struct sigaction __user *, oact, - size_t, sigsetsize, void __user *, restorer) +asmlinkage long +sys_rt_sigaction(int sig, const struct sigaction __user *act, + struct sigaction __user *oact, + size_t sigsetsize, void __user *restorer) { struct k_sigaction new_ka, old_ka; int ret; diff --git a/trunk/arch/alpha/kernel/smp.c b/trunk/arch/alpha/kernel/smp.c index b1fe5674c3a1..d953e510f68d 100644 --- a/trunk/arch/alpha/kernel/smp.c +++ b/trunk/arch/alpha/kernel/smp.c @@ -121,11 +121,10 @@ smp_callin(void) { int cpuid = hard_smp_processor_id(); - if (cpu_online(cpuid)) { + if (cpu_test_and_set(cpuid, cpu_online_map)) { printk("??, cpu 0x%x already present??\n", cpuid); BUG(); } - set_cpu_online(cpuid, true); /* Turn on machine checks. */ wrmces(7); @@ -436,8 +435,8 @@ setup_smp(void) ((char *)cpubase + i*hwrpb->processor_size); if ((cpu->flags & 0x1cc) == 0x1cc) { smp_num_probed++; - set_cpu_possible(i, true); - set_cpu_present(i, true); + cpu_set(i, cpu_possible_map); + cpu_set(i, cpu_present_map); cpu->pal_revision = boot_cpu_palrev; } @@ -470,8 +469,8 @@ smp_prepare_cpus(unsigned int max_cpus) /* Nothing to do on a UP box, or when told not to. */ if (smp_num_probed == 1 || max_cpus == 0) { - init_cpu_possible(cpumask_of(boot_cpuid)); - init_cpu_present(cpumask_of(boot_cpuid)); + cpu_possible_map = cpumask_of_cpu(boot_cpuid); + cpu_present_map = cpumask_of_cpu(boot_cpuid); printk(KERN_INFO "SMP mode deactivated.\n"); return; } diff --git a/trunk/arch/alpha/kernel/systbls.S b/trunk/arch/alpha/kernel/systbls.S index 95c9aef1c106..9d9e3a98bb95 100644 --- a/trunk/arch/alpha/kernel/systbls.S +++ b/trunk/arch/alpha/kernel/systbls.S @@ -17,7 +17,7 @@ sys_call_table: .quad sys_write .quad alpha_ni_syscall /* 5 */ .quad sys_close - .quad sys_osf_wait4 + .quad osf_wait4 .quad alpha_ni_syscall .quad sys_link .quad sys_unlink /* 10 */ @@ -27,11 +27,11 @@ sys_call_table: .quad sys_mknod .quad sys_chmod /* 15 */ .quad sys_chown - .quad sys_osf_brk + .quad osf_brk .quad alpha_ni_syscall .quad sys_lseek .quad sys_getxpid /* 20 */ - .quad sys_osf_mount + .quad osf_mount .quad sys_umount .quad sys_setuid .quad sys_getxuid @@ -53,7 +53,7 @@ sys_call_table: .quad alpha_ni_syscall /* 40 */ .quad sys_dup .quad sys_alpha_pipe - .quad sys_osf_set_program_attributes + .quad osf_set_program_attributes .quad alpha_ni_syscall .quad sys_open /* 45 */ .quad alpha_ni_syscall @@ -81,7 +81,7 @@ sys_call_table: .quad sys_newlstat .quad alpha_ni_syscall .quad alpha_ni_syscall /* 70 */ - .quad sys_osf_mmap + .quad osf_mmap .quad alpha_ni_syscall .quad sys_munmap .quad sys_mprotect @@ -94,17 +94,17 @@ sys_call_table: .quad sys_setgroups /* 80 */ .quad alpha_ni_syscall .quad sys_setpgid - .quad sys_osf_setitimer + .quad osf_setitimer .quad alpha_ni_syscall .quad alpha_ni_syscall /* 85 */ - .quad sys_osf_getitimer + .quad osf_getitimer .quad sys_gethostname .quad sys_sethostname .quad sys_getdtablesize .quad sys_dup2 /* 90 */ .quad sys_newfstat .quad sys_fcntl - .quad sys_osf_select + .quad osf_select .quad sys_poll .quad sys_fsync /* 95 */ .quad sys_setpriority @@ -123,22 +123,22 @@ sys_call_table: .quad alpha_ni_syscall .quad alpha_ni_syscall /* 110 */ .quad sys_sigsuspend - .quad sys_osf_sigstack + .quad osf_sigstack .quad sys_recvmsg .quad sys_sendmsg .quad alpha_ni_syscall /* 115 */ - .quad sys_osf_gettimeofday - .quad sys_osf_getrusage + .quad osf_gettimeofday + .quad osf_getrusage .quad sys_getsockopt .quad alpha_ni_syscall #ifdef CONFIG_OSF4_COMPAT - .quad sys_osf_readv /* 120 */ - .quad sys_osf_writev + .quad osf_readv /* 120 */ + .quad osf_writev #else .quad sys_readv /* 120 */ .quad sys_writev #endif - .quad sys_osf_settimeofday + .quad osf_settimeofday .quad sys_fchown .quad sys_fchmod .quad sys_recvfrom /* 125 */ @@ -154,7 +154,7 @@ sys_call_table: .quad sys_socketpair /* 135 */ .quad sys_mkdir .quad sys_rmdir - .quad sys_osf_utimes + .quad osf_utimes .quad alpha_ni_syscall .quad alpha_ni_syscall /* 140 */ .quad sys_getpeername @@ -172,16 +172,16 @@ sys_call_table: .quad alpha_ni_syscall .quad alpha_ni_syscall .quad alpha_ni_syscall /* 155 */ - .quad sys_osf_sigaction + .quad osf_sigaction .quad alpha_ni_syscall .quad alpha_ni_syscall - .quad sys_osf_getdirentries - .quad sys_osf_statfs /* 160 */ - .quad sys_osf_fstatfs + .quad osf_getdirentries + .quad osf_statfs /* 160 */ + .quad osf_fstatfs .quad alpha_ni_syscall .quad alpha_ni_syscall .quad alpha_ni_syscall - .quad sys_osf_getdomainname /* 165 */ + .quad osf_getdomainname /* 165 */ .quad sys_setdomainname .quad alpha_ni_syscall .quad alpha_ni_syscall @@ -224,7 +224,7 @@ sys_call_table: .quad sys_semctl .quad sys_semget /* 205 */ .quad sys_semop - .quad sys_osf_utsname + .quad osf_utsname .quad sys_lchown .quad sys_shmat .quad sys_shmctl /* 210 */ @@ -258,23 +258,23 @@ sys_call_table: .quad alpha_ni_syscall .quad alpha_ni_syscall .quad alpha_ni_syscall /* 240 */ - .quad sys_osf_sysinfo + .quad osf_sysinfo .quad alpha_ni_syscall .quad alpha_ni_syscall - .quad sys_osf_proplist_syscall + .quad osf_proplist_syscall .quad alpha_ni_syscall /* 245 */ .quad alpha_ni_syscall .quad alpha_ni_syscall .quad alpha_ni_syscall .quad alpha_ni_syscall .quad alpha_ni_syscall /* 250 */ - .quad sys_osf_usleep_thread + .quad osf_usleep_thread .quad alpha_ni_syscall .quad alpha_ni_syscall .quad sys_sysfs .quad alpha_ni_syscall /* 255 */ - .quad sys_osf_getsysinfo - .quad sys_osf_setsysinfo + .quad osf_getsysinfo + .quad osf_setsysinfo .quad alpha_ni_syscall .quad alpha_ni_syscall .quad alpha_ni_syscall /* 260 */ diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 12abdd43201f..dbfdf87f993f 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -241,7 +241,6 @@ config ARCH_VERSATILE config ARCH_AT91 bool "Atmel AT91" select GENERIC_GPIO - select ARCH_REQUIRE_GPIOLIB select HAVE_CLK help This enables support for systems based on the Atmel AT91RM9200, @@ -1093,7 +1092,7 @@ source "drivers/cpufreq/Kconfig" config CPU_FREQ_SA1100 bool - depends on CPU_FREQ && (SA1100_H3100 || SA1100_H3600 || SA1100_LART || SA1100_PLEB || SA1100_BADGE4 || SA1100_HACKKIT) + depends on CPU_FREQ && (SA1100_H3100 || SA1100_H3600 || SA1100_H3800 || SA1100_LART || SA1100_PLEB || SA1100_BADGE4 || SA1100_HACKKIT) default y config CPU_FREQ_SA1110 diff --git a/trunk/arch/arm/Kconfig.debug b/trunk/arch/arm/Kconfig.debug index a71fd941ade7..192ee01a9ba2 100644 --- a/trunk/arch/arm/Kconfig.debug +++ b/trunk/arch/arm/Kconfig.debug @@ -2,29 +2,18 @@ menu "Kernel hacking" source "lib/Kconfig.debug" -# RMK wants arm kernels compiled with frame pointers or stack unwinding. +# RMK wants arm kernels compiled with frame pointers so hardwire this to y. # If you know what you are doing and are willing to live without stack # traces, you can get a slightly smaller kernel by setting this option to # n, but then RMK will have to kill you ;). config FRAME_POINTER bool - default y if !ARM_UNWIND - help - If you say N here, the resulting kernel will be slightly smaller and - faster. However, if neither FRAME_POINTER nor ARM_UNWIND are enabled, - when a problem occurs with the kernel, the information that is - reported is severely limited. - -config ARM_UNWIND - bool "Enable stack unwinding support" - depends on AEABI && EXPERIMENTAL default y help - This option enables stack unwinding support in the kernel - using the information automatically generated by the - compiler. The resulting kernel image is slightly bigger but - the performance is not affected. Currently, this feature - only works with EABI compilers. If unsure say Y. + If you say N here, the resulting kernel will be slightly smaller and + faster. However, when a problem occurs with the kernel, the + information that is reported is severely limited. Most people + should say Y here. config DEBUG_USER bool "Verbose user fault messages" @@ -77,7 +66,7 @@ config DEBUG_ICEDCC Say Y here if you want the debug print routines to direct their output to the EmbeddedICE macrocell's DCC channel using co-processor 14. This is known to work on the ARM9 style ICE - channel and on the XScale with the PEEDI. + channel. It does include a timeout to ensure that the system does not totally freeze when there is nothing connected to read. diff --git a/trunk/arch/arm/Makefile b/trunk/arch/arm/Makefile index e7ef876e574b..24e0f0187697 100644 --- a/trunk/arch/arm/Makefile +++ b/trunk/arch/arm/Makefile @@ -85,10 +85,6 @@ else CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,) endif -ifeq ($(CONFIG_ARM_UNWIND),y) -CFLAGS_ABI +=-funwind-tables -endif - # Need -Uarm for gcc < 3.x KBUILD_CFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) $(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,)) -msoft-float -Uarm KBUILD_AFLAGS +=$(CFLAGS_ABI) $(arch-y) $(tune-y) -msoft-float diff --git a/trunk/arch/arm/boot/compressed/head.S b/trunk/arch/arm/boot/compressed/head.S index d1b678dc120b..77d614232d81 100644 --- a/trunk/arch/arm/boot/compressed/head.S +++ b/trunk/arch/arm/boot/compressed/head.S @@ -27,12 +27,6 @@ .macro writeb, ch, rb mcr p14, 0, \ch, c0, c5, 0 .endm -#elif defined(CONFIG_CPU_XSCALE) - .macro loadsp, rb - .endm - .macro writeb, ch, rb - mcr p14, 0, \ch, c8, c0, 0 - .endm #else .macro loadsp, rb .endm diff --git a/trunk/arch/arm/boot/compressed/misc.c b/trunk/arch/arm/boot/compressed/misc.c index 393c81641314..3fc08413fff0 100644 --- a/trunk/arch/arm/boot/compressed/misc.c +++ b/trunk/arch/arm/boot/compressed/misc.c @@ -46,21 +46,6 @@ static void icedcc_putc(int ch) asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); } -#elif defined(CONFIG_CPU_XSCALE) - -static void icedcc_putc(int ch) -{ - int status, i = 0x4000000; - - do { - if (--i < 0) - return; - - asm volatile ("mrc p14, 0, %0, c14, c0, 0" : "=r" (status)); - } while (status & (1 << 28)); - - asm("mcr p14, 0, %0, c8, c0, 0" : : "r" (ch)); -} #else diff --git a/trunk/arch/arm/boot/compressed/vmlinux.lds.in b/trunk/arch/arm/boot/compressed/vmlinux.lds.in index a5924b9b88bd..153a07e7222b 100644 --- a/trunk/arch/arm/boot/compressed/vmlinux.lds.in +++ b/trunk/arch/arm/boot/compressed/vmlinux.lds.in @@ -11,11 +11,6 @@ OUTPUT_ARCH(arm) ENTRY(_start) SECTIONS { - /DISCARD/ : { - *(.ARM.exidx*) - *(.ARM.extab*) - } - . = TEXT_START; _text = .; diff --git a/trunk/arch/arm/common/clkdev.c b/trunk/arch/arm/common/clkdev.c index 1037bba18329..17a17b49a45b 100644 --- a/trunk/arch/arm/common/clkdev.c +++ b/trunk/arch/arm/common/clkdev.c @@ -24,15 +24,6 @@ static LIST_HEAD(clocks); static DEFINE_MUTEX(clocks_mutex); -/* - * Find the correct struct clk for the device and connection ID. - * We do slightly fuzzy matching here: - * An entry with a NULL ID is assumed to be a wildcard. - * If an entry has a device ID, it must match - * If an entry has a connection ID, it must match - * Then we take the most specific entry - with the following - * order of precidence: dev+con > dev only > con only. - */ static struct clk *clk_find(const char *dev_id, const char *con_id) { struct clk_lookup *p; @@ -40,17 +31,13 @@ static struct clk *clk_find(const char *dev_id, const char *con_id) int match, best = 0; list_for_each_entry(p, &clocks, node) { + if ((p->dev_id && !dev_id) || (p->con_id && !con_id)) + continue; match = 0; - if (p->dev_id) { - if (!dev_id || strcmp(p->dev_id, dev_id)) - continue; - match += 2; - } - if (p->con_id) { - if (!con_id || strcmp(p->con_id, con_id)) - continue; - match += 1; - } + if (p->dev_id) + match += 2 * (strcmp(p->dev_id, dev_id) == 0); + if (p->con_id) + match += 1 * (strcmp(p->con_id, con_id) == 0); if (match == 0) continue; diff --git a/trunk/arch/arm/common/sharpsl_pm.c b/trunk/arch/arm/common/sharpsl_pm.c index 140f1d721d50..780bbf7cb26f 100644 --- a/trunk/arch/arm/common/sharpsl_pm.c +++ b/trunk/arch/arm/common/sharpsl_pm.c @@ -29,8 +29,8 @@ #include #include #include +#include #include -#include #include #include diff --git a/trunk/arch/arm/configs/acs5k_defconfig b/trunk/arch/arm/configs/acs5k_defconfig deleted file mode 100644 index 1cab4e79d368..000000000000 --- a/trunk/arch/arm/configs/acs5k_defconfig +++ /dev/null @@ -1,1233 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.27-simtec-micrel1 -# Tue Dec 16 13:31:34 2008 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -# CONFIG_GENERIC_TIME is not set -# CONFIG_GENERIC_CLOCKEVENTS is not set -CONFIG_MMU=y -# CONFIG_NO_IOPORT is not set -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ARCH_SUPPORTS_AOUT=y -CONFIG_ZONE_DMA=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set -# CONFIG_IKCONFIG is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CGROUPS is not set -# CONFIG_GROUP_SCHED is not set -CONFIG_SYSFS_DEPRECATED=y -CONFIG_SYSFS_DEPRECATED_V2=y -# CONFIG_RELAY is not set -CONFIG_NAMESPACES=y -# CONFIG_UTS_NS is not set -# CONFIG_IPC_NS is not set -# CONFIG_USER_NS is not set -# CONFIG_PID_NS is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -# CONFIG_EMBEDDED is not set -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_COMPAT_BRK=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_ANON_INODES=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set -# CONFIG_HAVE_IOREMAP_PROT is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -# CONFIG_HAVE_ARCH_TRACEHOOK is not set -# CONFIG_HAVE_DMA_ATTRS is not set -# CONFIG_USE_GENERIC_SMP_HELPERS is not set -# CONFIG_HAVE_CLK is not set -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" -CONFIG_CLASSIC_RCU=y - -# -# System Type -# -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS7500 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_KIRKWOOD is not set -CONFIG_ARCH_KS8695=y -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_DAVINCI is not set -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_MSM7X00A is not set - -# -# Boot options -# - -# -# Power management -# - -# -# Kendin/Micrel KS8695 Implementations -# -CONFIG_MACH_KS8695=y -CONFIG_MACH_DSM320=y -CONFIG_MACH_ACS5K=y - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_ARM922T=y -CONFIG_CPU_32v4T=y -CONFIG_CPU_ABRT_EV4T=y -CONFIG_CPU_PABRT_NOIFAR=y -CONFIG_CPU_CACHE_V4WT=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -# CONFIG_ARM_THUMB is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_OUTER_CACHE is not set - -# -# Bus support -# -CONFIG_PCI=y -CONFIG_PCI_SYSCALL=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_PCI_LEGACY=y -CONFIG_PCI_DEBUG=y -CONFIG_PCCARD=y -# CONFIG_PCMCIA_DEBUG is not set -CONFIG_PCMCIA=y -CONFIG_PCMCIA_LOAD_CIS=y -CONFIG_PCMCIA_IOCTL=y -CONFIG_CARDBUS=y - -# -# PC-card bridges -# -CONFIG_YENTA=y -CONFIG_YENTA_O2=y -CONFIG_YENTA_RICOH=y -CONFIG_YENTA_TI=y -CONFIG_YENTA_ENE_TUNE=y -CONFIG_YENTA_TOSHIBA=y -# CONFIG_PD6729 is not set -# CONFIG_I82092 is not set -CONFIG_PCCARD_NONSTATIC=y - -# -# Kernel Features -# -# CONFIG_TICK_ONESHOT is not set -# CONFIG_PREEMPT is not set -CONFIG_HZ=100 -CONFIG_AEABI=y -CONFIG_OABI_COMPAT=y -CONFIG_ARCH_FLATMEM_HAS_HOLES=y -# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4096 -# CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -# CONFIG_LEDS is not set -CONFIG_ALIGNMENT_TRAP=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="mem=32M console=ttyS0,115200 initrd=0x20410000,3145728 root=/dev/ram0 rw" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -# CONFIG_FPE_NWFPE is not set -# CONFIG_FPE_FASTFPE is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Power management options -# -# CONFIG_PM is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set - -# -# Wireless -# -# CONFIG_CFG80211 is not set -CONFIG_WIRELESS_EXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -# CONFIG_MAC80211 is not set -# CONFIG_IEEE80211 is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_GEN_PROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_NOSWAP=y -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_GEOMETRY is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_OTP is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PHYSMAP_START=0x8000000 -CONFIG_MTD_PHYSMAP_LEN=0 -CONFIG_MTD_PHYSMAP_BANKWIDTH=4 -# CONFIG_MTD_ARM_INTEGRATOR is not set -# CONFIG_MTD_IMPA7 is not set -# CONFIG_MTD_INTEL_VR_NOR is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_ONENAND is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_CPQ_DA is not set -# CONFIG_BLK_CPQ_CISS_DA is not set -# CONFIG_BLK_DEV_DAC960 is not set -# CONFIG_BLK_DEV_UMEM is not set -# CONFIG_BLK_DEV_COW_COMMON is not set -# CONFIG_BLK_DEV_LOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_SX8 is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=8192 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -CONFIG_MISC_DEVICES=y -# CONFIG_PHANTOM is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_SGI_IOC4 is not set -# CONFIG_TIFM_CORE is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_HP_ILO is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set -# CONFIG_SCSI_DMA is not set -# CONFIG_SCSI_NETLINK is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# - -# -# Enable only one of the two stacks, unless you know what you are doing -# -# CONFIG_FIREWIRE is not set -# CONFIG_IEEE1394 is not set -# CONFIG_I2O is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -# CONFIG_ARCNET is not set -# CONFIG_PHYLIB is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_ARM_KS8695_ETHER=y -# CONFIG_AX88796 is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_SMC91X is not set -# CONFIG_DM9000 is not set -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_NET_PCI is not set -# CONFIG_B44 is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_TR is not set - -# -# Wireless LAN -# -# CONFIG_WLAN_PRE80211 is not set -CONFIG_WLAN_80211=y -# CONFIG_PCMCIA_RAYCS is not set -# CONFIG_IPW2100 is not set -# CONFIG_IPW2200 is not set -# CONFIG_LIBERTAS is not set -# CONFIG_HERMES is not set -# CONFIG_ATMEL is not set -# CONFIG_AIRO_CS is not set -# CONFIG_PCMCIA_WL3501 is not set -CONFIG_PRISM54=m -# CONFIG_IWLWIFI_LEDS is not set -# CONFIG_HOSTAP is not set -# CONFIG_NET_PCMCIA is not set -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_NOZOMI is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_KS8695=y -CONFIG_SERIAL_KS8695_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=m -# CONFIG_NVRAM is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# PCMCIA character devices -# -# CONFIG_SYNCLINK_CS is not set -# CONFIG_CARDMAN_4000 is not set -# CONFIG_CARDMAN_4040 is not set -# CONFIG_IPWIRELESS is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_DEVPORT=y -CONFIG_ACS5KCAN=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# PC SMBus host controller drivers -# -# CONFIG_I2C_ALI1535 is not set -# CONFIG_I2C_ALI1563 is not set -# CONFIG_I2C_ALI15X3 is not set -# CONFIG_I2C_AMD756 is not set -# CONFIG_I2C_AMD8111 is not set -# CONFIG_I2C_I801 is not set -# CONFIG_I2C_ISCH is not set -# CONFIG_I2C_PIIX4 is not set -# CONFIG_I2C_NFORCE2 is not set -# CONFIG_I2C_SIS5595 is not set -# CONFIG_I2C_SIS630 is not set -# CONFIG_I2C_SIS96X is not set -# CONFIG_I2C_VIA is not set -# CONFIG_I2C_VIAPRO is not set - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -CONFIG_I2C_GPIO=y -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set - -# -# Graphics adapter I2C/DDC channel drivers -# -# CONFIG_I2C_VOODOO3 is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_DS1682 is not set -# CONFIG_AT24 is not set -# CONFIG_SENSORS_EEPROM is not set -# CONFIG_SENSORS_PCF8574 is not set -# CONFIG_PCF8575 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_TPS65010 is not set -# CONFIG_SENSORS_MAX6875 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -# CONFIG_SPI is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -# CONFIG_GPIO_PCF857X is not set - -# -# PCI GPIO expanders: -# -# CONFIG_GPIO_BT8XX is not set - -# -# SPI GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -CONFIG_HWMON=y -# CONFIG_HWMON_VID is not set -# CONFIG_SENSORS_AD7414 is not set -# CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set -# CONFIG_SENSORS_ADM1025 is not set -# CONFIG_SENSORS_ADM1026 is not set -# CONFIG_SENSORS_ADM1029 is not set -# CONFIG_SENSORS_ADM1031 is not set -# CONFIG_SENSORS_ADM9240 is not set -# CONFIG_SENSORS_ADT7470 is not set -# CONFIG_SENSORS_ADT7473 is not set -# CONFIG_SENSORS_ATXP1 is not set -# CONFIG_SENSORS_DS1621 is not set -# CONFIG_SENSORS_I5K_AMB is not set -# CONFIG_SENSORS_F71805F is not set -# CONFIG_SENSORS_F71882FG is not set -# CONFIG_SENSORS_F75375S is not set -# CONFIG_SENSORS_GL518SM is not set -# CONFIG_SENSORS_GL520SM is not set -# CONFIG_SENSORS_IT87 is not set -# CONFIG_SENSORS_LM63 is not set -# CONFIG_SENSORS_LM75 is not set -# CONFIG_SENSORS_LM77 is not set -# CONFIG_SENSORS_LM78 is not set -# CONFIG_SENSORS_LM80 is not set -# CONFIG_SENSORS_LM83 is not set -# CONFIG_SENSORS_LM85 is not set -# CONFIG_SENSORS_LM87 is not set -# CONFIG_SENSORS_LM90 is not set -# CONFIG_SENSORS_LM92 is not set -# CONFIG_SENSORS_LM93 is not set -# CONFIG_SENSORS_MAX1619 is not set -# CONFIG_SENSORS_MAX6650 is not set -# CONFIG_SENSORS_PC87360 is not set -# CONFIG_SENSORS_PC87427 is not set -# CONFIG_SENSORS_SIS5595 is not set -# CONFIG_SENSORS_DME1737 is not set -# CONFIG_SENSORS_SMSC47M1 is not set -# CONFIG_SENSORS_SMSC47M192 is not set -# CONFIG_SENSORS_SMSC47B397 is not set -# CONFIG_SENSORS_ADS7828 is not set -# CONFIG_SENSORS_THMC50 is not set -# CONFIG_SENSORS_VIA686A is not set -# CONFIG_SENSORS_VT1211 is not set -# CONFIG_SENSORS_VT8231 is not set -# CONFIG_SENSORS_W83781D is not set -# CONFIG_SENSORS_W83791D is not set -# CONFIG_SENSORS_W83792D is not set -# CONFIG_SENSORS_W83793 is not set -# CONFIG_SENSORS_W83L785TS is not set -# CONFIG_SENSORS_W83L786NG is not set -# CONFIG_SENSORS_W83627HF is not set -# CONFIG_SENSORS_W83627EHF is not set -# CONFIG_HWMON_DEBUG_CHIP is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_KS8695_WATCHDOG=y -# CONFIG_ALIM7101_WDT is not set - -# -# PCI-based Watchdog Cards -# -# CONFIG_PCIPCWATCHDOG is not set -# CONFIG_WDTPCI is not set - -# -# Sonics Silicon Backplane -# -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set - -# -# Multimedia devices -# - -# -# Multimedia core support -# -# CONFIG_VIDEO_DEV is not set -# CONFIG_DVB_CORE is not set -# CONFIG_VIDEO_MEDIA is not set - -# -# Multimedia drivers -# -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_DRM is not set -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -# CONFIG_FB is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -# CONFIG_SOUND is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -CONFIG_HID_DEBUG=y -# CONFIG_HIDRAW is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -# CONFIG_USB is not set - -# -# Enable Host or Gadget support to see Inventra options -# - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# -# CONFIG_USB_GADGET is not set -# CONFIG_MMC is not set -# CONFIG_NEW_LEDS is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -CONFIG_RTC_DRV_PCF8563=y -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set - -# -# SPI RTC drivers -# - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set - -# -# Voltage and Current regulators -# -# CONFIG_REGULATOR is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_UIO is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -# CONFIG_EXT3_FS is not set -# CONFIG_EXT4DEV_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -# CONFIG_JFFS2_FS_XATTR is not set -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -CONFIG_JFFS2_RUBIN=y -# CONFIG_JFFS2_CMODE_NONE is not set -CONFIG_JFFS2_CMODE_PRIORITY=y -# CONFIG_JFFS2_CMODE_SIZE is not set -# CONFIG_JFFS2_CMODE_FAVOURLZO is not set -CONFIG_CRAMFS=y -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -CONFIG_ROOT_NFS=y -# CONFIG_NFSD is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -# CONFIG_CIFS is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_NLS is not set -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -# CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -CONFIG_DEBUG_MEMORY_INIT=y -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -CONFIG_FRAME_POINTER=y -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -CONFIG_HAVE_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -# CONFIG_FTRACE is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_CONTEXT_SWITCH_TRACER is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_DEBUG_USER=y -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -CONFIG_DEBUG_LL=y -# CONFIG_DEBUG_ICEDCC is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -# CONFIG_CRYPTO_MANAGER is not set -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -# CONFIG_CRYPTO_CBC is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -# CONFIG_CRYPTO_ECB is not set -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set - -# -# Digest -# -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_LZO is not set -CONFIG_CRYPTO_HW=y -# CONFIG_CRYPTO_DEV_HIFN_795X is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -# CONFIG_GENERIC_FIND_FIRST_BIT is not set -# CONFIG_GENERIC_FIND_NEXT_BIT is not set -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y diff --git a/trunk/arch/arm/configs/acs5k_tiny_defconfig b/trunk/arch/arm/configs/acs5k_tiny_defconfig deleted file mode 100644 index 8e3d084afd78..000000000000 --- a/trunk/arch/arm/configs/acs5k_tiny_defconfig +++ /dev/null @@ -1,941 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.27-simtec-micrel1 -# Tue Jan 6 13:23:07 2009 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -# CONFIG_GENERIC_TIME is not set -# CONFIG_GENERIC_CLOCKEVENTS is not set -CONFIG_MMU=y -# CONFIG_NO_IOPORT is not set -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ARCH_SUPPORTS_AOUT=y -CONFIG_ZONE_DMA=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -CONFIG_LOCALVERSION_AUTO=y -# CONFIG_SWAP is not set -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set -# CONFIG_IKCONFIG is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CGROUPS is not set -# CONFIG_GROUP_SCHED is not set -CONFIG_SYSFS_DEPRECATED=y -CONFIG_SYSFS_DEPRECATED_V2=y -# CONFIG_RELAY is not set -CONFIG_NAMESPACES=y -# CONFIG_UTS_NS is not set -# CONFIG_IPC_NS is not set -# CONFIG_USER_NS is not set -# CONFIG_PID_NS is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -# CONFIG_EMBEDDED is not set -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_COMPAT_BRK=y -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_ANON_INODES=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set -# CONFIG_HAVE_IOREMAP_PROT is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -# CONFIG_HAVE_ARCH_TRACEHOOK is not set -# CONFIG_HAVE_DMA_ATTRS is not set -# CONFIG_USE_GENERIC_SMP_HELPERS is not set -# CONFIG_HAVE_CLK is not set -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y -# CONFIG_TINY_SHMEM is not set -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_KMOD=y -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -CONFIG_DEFAULT_AS=y -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="anticipatory" -CONFIG_CLASSIC_RCU=y - -# -# System Type -# -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS7500 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_KIRKWOOD is not set -CONFIG_ARCH_KS8695=y -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_PNX4008 is not set -# CONFIG_ARCH_PXA is not set -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_DAVINCI is not set -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_MSM7X00A is not set - -# -# Boot options -# - -# -# Power management -# - -# -# Kendin/Micrel KS8695 Implementations -# -# CONFIG_MACH_KS8695 is not set -# CONFIG_MACH_DSM320 is not set -CONFIG_MACH_ACS5K=y - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_ARM922T=y -CONFIG_CPU_32v4T=y -CONFIG_CPU_ABRT_EV4T=y -CONFIG_CPU_PABRT_NOIFAR=y -CONFIG_CPU_CACHE_V4WT=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_COPY_V4WB=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -# CONFIG_ARM_THUMB is not set -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_WRITETHROUGH is not set -# CONFIG_OUTER_CACHE is not set - -# -# Bus support -# -# CONFIG_PCI is not set -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -# CONFIG_TICK_ONESHOT is not set -# CONFIG_PREEMPT is not set -CONFIG_HZ=100 -CONFIG_AEABI=y -CONFIG_OABI_COMPAT=y -CONFIG_ARCH_FLATMEM_HAS_HOLES=y -# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4096 -# CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -# CONFIG_LEDS is not set -CONFIG_ALIGNMENT_TRAP=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="console=ttyAM0,115200 init=/bin/sh" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_FPE_NWFPE=y -# CONFIG_FPE_NWFPE_XP is not set -# CONFIG_FPE_FASTFPE is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Power management options -# -# CONFIG_PM is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -CONFIG_INET_DIAG=y -CONFIG_INET_TCP_DIAG=y -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set - -# -# Wireless -# -# CONFIG_CFG80211 is not set -# CONFIG_WIRELESS_EXT is not set -# CONFIG_MAC80211 is not set -# CONFIG_IEEE80211 is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_GEN_PROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_NOSWAP=y -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_GEOMETRY is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_OTP is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PHYSMAP_START=0x8000000 -CONFIG_MTD_PHYSMAP_LEN=0 -CONFIG_MTD_PHYSMAP_BANKWIDTH=4 -# CONFIG_MTD_ARM_INTEGRATOR is not set -# CONFIG_MTD_IMPA7 is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_ONENAND is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -# CONFIG_BLK_DEV is not set -# CONFIG_MISC_DEVICES is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set -# CONFIG_SCSI_DMA is not set -# CONFIG_SCSI_NETLINK is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -# CONFIG_PHYLIB is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -CONFIG_ARM_KS8695_ETHER=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -# CONFIG_DM9000 is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_B44 is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set - -# -# Wireless LAN -# -# CONFIG_WLAN_PRE80211 is not set -CONFIG_WLAN_80211=y -# CONFIG_LIBERTAS is not set -# CONFIG_IWLWIFI_LEDS is not set -# CONFIG_HOSTAP is not set -# CONFIG_WAN is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -# CONFIG_INPUT_EVDEV is not set -# CONFIG_INPUT_EVBUG is not set - -# -# Input Device Drivers -# -# CONFIG_INPUT_KEYBOARD is not set -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -# CONFIG_INPUT_TOUCHSCREEN is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_KS8695=y -CONFIG_SERIAL_KS8695_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_IPMI_HANDLER is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_NVRAM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_ACS5KCAN=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_ALGOBIT=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -CONFIG_I2C_GPIO=y -# CONFIG_I2C_OCORES is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_DS1682 is not set -# CONFIG_AT24 is not set -# CONFIG_SENSORS_EEPROM is not set -# CONFIG_SENSORS_PCF8574 is not set -# CONFIG_PCF8575 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_TPS65010 is not set -# CONFIG_SENSORS_MAX6875 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -# CONFIG_SPI is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -CONFIG_GPIO_SYSFS=y - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -CONFIG_GPIO_PCA953X=y -# CONFIG_GPIO_PCF857X is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -CONFIG_WATCHDOG=y -# CONFIG_WATCHDOG_NOWAYOUT is not set - -# -# Watchdog Device Drivers -# -# CONFIG_SOFT_WATCHDOG is not set -CONFIG_KS8695_WATCHDOG=y - -# -# Sonics Silicon Backplane -# -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set - -# -# Multimedia devices -# - -# -# Multimedia core support -# -# CONFIG_VIDEO_DEV is not set -# CONFIG_DVB_CORE is not set -# CONFIG_VIDEO_MEDIA is not set - -# -# Multimedia drivers -# -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -# CONFIG_FB is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -# CONFIG_SOUND is not set -# CONFIG_HID_SUPPORT is not set -# CONFIG_USB_SUPPORT is not set -# CONFIG_MMC is not set -# CONFIG_NEW_LEDS is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -CONFIG_RTC_DRV_PCF8563=y -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set - -# -# SPI RTC drivers -# - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_V3020 is not set - -# -# on-CPU RTC drivers -# -# CONFIG_DMADEVICES is not set - -# -# Voltage and Current regulators -# -# CONFIG_REGULATOR is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -# CONFIG_UIO is not set - -# -# File systems -# -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_EXT4DEV_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -# CONFIG_JFFS2_FS_XATTR is not set -CONFIG_JFFS2_COMPRESSION_OPTIONS=y -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -CONFIG_JFFS2_RUBIN=y -# CONFIG_JFFS2_CMODE_NONE is not set -CONFIG_JFFS2_CMODE_PRIORITY=y -# CONFIG_JFFS2_CMODE_SIZE is not set -# CONFIG_JFFS2_CMODE_FAVOURLZO is not set -# CONFIG_CRAMFS is not set -CONFIG_SQUASHFS=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# CONFIG_NETWORK_FILESYSTEMS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_NLS is not set -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -CONFIG_SCHED_DEBUG=y -# CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -CONFIG_DEBUG_MUTEXES=y -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -CONFIG_DEBUG_MEMORY_INIT=y -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -CONFIG_FRAME_POINTER=y -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -CONFIG_HAVE_FTRACE=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -# CONFIG_FTRACE is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_CONTEXT_SWITCH_TRACER is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_DEBUG_USER=y -# CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_LL is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set -# CONFIG_CRYPTO is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -# CONFIG_GENERIC_FIND_FIRST_BIT is not set -# CONFIG_GENERIC_FIND_NEXT_BIT is not set -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y diff --git a/trunk/arch/arm/configs/afeb9260_defconfig b/trunk/arch/arm/configs/afeb9260_defconfig index f7a272cb3da0..ce909586a34f 100644 --- a/trunk/arch/arm/configs/afeb9260_defconfig +++ b/trunk/arch/arm/configs/afeb9260_defconfig @@ -719,8 +719,8 @@ CONFIG_I2C_GPIO=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -CONFIG_EEPROM_AT24=y -# CONFIG_EEPROM_LEGACY is not set +CONFIG_AT24=y +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set @@ -744,7 +744,7 @@ CONFIG_SPI_ATMEL=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set CONFIG_SPI_SPIDEV=y # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set diff --git a/trunk/arch/arm/configs/ams_delta_defconfig b/trunk/arch/arm/configs/ams_delta_defconfig index 764732529ea3..2c4aa11f0b0d 100644 --- a/trunk/arch/arm/configs/ams_delta_defconfig +++ b/trunk/arch/arm/configs/ams_delta_defconfig @@ -767,7 +767,7 @@ CONFIG_I2C_OMAP=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/assabet_defconfig b/trunk/arch/arm/configs/assabet_defconfig index c66dd399e426..b1cd331aaecf 100644 --- a/trunk/arch/arm/configs/assabet_defconfig +++ b/trunk/arch/arm/configs/assabet_defconfig @@ -89,6 +89,7 @@ CONFIG_SA1100_ASSABET=y # CONFIG_SA1100_COLLIE is not set # CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set # CONFIG_SA1100_BADGE4 is not set # CONFIG_SA1100_JORNADA720 is not set # CONFIG_SA1100_HACKKIT is not set diff --git a/trunk/arch/arm/configs/at91cap9adk_defconfig b/trunk/arch/arm/configs/at91cap9adk_defconfig index bc6bd9f6174d..bf97801a1068 100644 --- a/trunk/arch/arm/configs/at91cap9adk_defconfig +++ b/trunk/arch/arm/configs/at91cap9adk_defconfig @@ -676,7 +676,7 @@ CONFIG_I2C_CHARDEV=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -703,7 +703,7 @@ CONFIG_SPI_ATMEL=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set diff --git a/trunk/arch/arm/configs/at91rm9200dk_defconfig b/trunk/arch/arm/configs/at91rm9200dk_defconfig index 238b218394e3..868fb7b9530b 100644 --- a/trunk/arch/arm/configs/at91rm9200dk_defconfig +++ b/trunk/arch/arm/configs/at91rm9200dk_defconfig @@ -636,7 +636,7 @@ CONFIG_I2C_GPIO=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/at91rm9200ek_defconfig b/trunk/arch/arm/configs/at91rm9200ek_defconfig index 9f7a99ace514..de43fc675616 100644 --- a/trunk/arch/arm/configs/at91rm9200ek_defconfig +++ b/trunk/arch/arm/configs/at91rm9200ek_defconfig @@ -610,7 +610,7 @@ CONFIG_I2C_GPIO=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/at91sam9260ek_defconfig b/trunk/arch/arm/configs/at91sam9260ek_defconfig index 98e2f3de4bc5..38e6a0abeb4e 100644 --- a/trunk/arch/arm/configs/at91sam9260ek_defconfig +++ b/trunk/arch/arm/configs/at91sam9260ek_defconfig @@ -582,7 +582,7 @@ CONFIG_I2C_GPIO=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -608,7 +608,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set -CONFIG_AT91SAM9X_WATCHDOG=y +CONFIG_AT91SAM9_WATCHDOG=y # # USB-based Watchdog Cards diff --git a/trunk/arch/arm/configs/at91sam9261ek_defconfig b/trunk/arch/arm/configs/at91sam9261ek_defconfig index 149456142392..93b779f94b41 100644 --- a/trunk/arch/arm/configs/at91sam9261ek_defconfig +++ b/trunk/arch/arm/configs/at91sam9261ek_defconfig @@ -660,7 +660,7 @@ CONFIG_I2C_GPIO=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -687,7 +687,7 @@ CONFIG_SPI_ATMEL=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set @@ -700,7 +700,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set -CONFIG_AT91SAM9X_WATCHDOG=y +CONFIG_AT91SAM9_WATCHDOG=y # # USB-based Watchdog Cards diff --git a/trunk/arch/arm/configs/at91sam9263ek_defconfig b/trunk/arch/arm/configs/at91sam9263ek_defconfig index 21599f3c6275..a7ddd94363ca 100644 --- a/trunk/arch/arm/configs/at91sam9263ek_defconfig +++ b/trunk/arch/arm/configs/at91sam9263ek_defconfig @@ -670,7 +670,7 @@ CONFIG_I2C_GPIO=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -697,7 +697,7 @@ CONFIG_SPI_ATMEL=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set @@ -710,7 +710,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set -CONFIG_AT91SAM9X_WATCHDOG=y +CONFIG_AT91SAM9_WATCHDOG=y # # USB-based Watchdog Cards diff --git a/trunk/arch/arm/configs/at91sam9g20ek_defconfig b/trunk/arch/arm/configs/at91sam9g20ek_defconfig index 7e018a04c31b..df0d6ee672b3 100644 --- a/trunk/arch/arm/configs/at91sam9g20ek_defconfig +++ b/trunk/arch/arm/configs/at91sam9g20ek_defconfig @@ -665,7 +665,7 @@ CONFIG_SPI_ATMEL=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set CONFIG_SPI_SPIDEV=y # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set diff --git a/trunk/arch/arm/configs/at91sam9rlek_defconfig b/trunk/arch/arm/configs/at91sam9rlek_defconfig index e2df81a3e804..811bebbdc784 100644 --- a/trunk/arch/arm/configs/at91sam9rlek_defconfig +++ b/trunk/arch/arm/configs/at91sam9rlek_defconfig @@ -566,7 +566,7 @@ CONFIG_I2C_GPIO=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -593,7 +593,7 @@ CONFIG_SPI_ATMEL=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set @@ -606,7 +606,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set -CONFIG_AT91SAM9X_WATCHDOG=y +CONFIG_AT91SAM9_WATCHDOG=y # # Sonics Silicon Backplane diff --git a/trunk/arch/arm/configs/ateb9200_defconfig b/trunk/arch/arm/configs/ateb9200_defconfig index a19e824cf7f8..85c80f723d8e 100644 --- a/trunk/arch/arm/configs/ateb9200_defconfig +++ b/trunk/arch/arm/configs/ateb9200_defconfig @@ -723,7 +723,7 @@ CONFIG_I2C_GPIO=m # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/badge4_defconfig b/trunk/arch/arm/configs/badge4_defconfig index f264846218a2..b2bbf217c707 100644 --- a/trunk/arch/arm/configs/badge4_defconfig +++ b/trunk/arch/arm/configs/badge4_defconfig @@ -91,6 +91,7 @@ CONFIG_ARCH_SA1100=y # CONFIG_SA1100_COLLIE is not set # CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set CONFIG_SA1100_BADGE4=y # CONFIG_SA1100_JORNADA720 is not set # CONFIG_SA1100_HACKKIT is not set @@ -749,7 +750,7 @@ CONFIG_I2C_ELEKTOR=m # Other I2C Chip support # # CONFIG_SENSORS_DS1337 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_SENSORS_RTC8564 is not set diff --git a/trunk/arch/arm/configs/cam60_defconfig b/trunk/arch/arm/configs/cam60_defconfig index 8448108347cf..f945105d6cd6 100644 --- a/trunk/arch/arm/configs/cam60_defconfig +++ b/trunk/arch/arm/configs/cam60_defconfig @@ -722,7 +722,7 @@ CONFIG_I2C_ALGOBIT=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -749,7 +749,7 @@ CONFIG_SPI_ATMEL=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set diff --git a/trunk/arch/arm/configs/cerfcube_defconfig b/trunk/arch/arm/configs/cerfcube_defconfig index 2b4c0668b1b4..ee130b528bd4 100644 --- a/trunk/arch/arm/configs/cerfcube_defconfig +++ b/trunk/arch/arm/configs/cerfcube_defconfig @@ -93,6 +93,7 @@ CONFIG_SA1100_CERF_FLASH_16MB=y # CONFIG_SA1100_COLLIE is not set # CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set # CONFIG_SA1100_BADGE4 is not set # CONFIG_SA1100_JORNADA720 is not set # CONFIG_SA1100_HACKKIT is not set diff --git a/trunk/arch/arm/configs/cm_x300_defconfig b/trunk/arch/arm/configs/cm_x300_defconfig index 227da0843ead..46f1c9dc350c 100644 --- a/trunk/arch/arm/configs/cm_x300_defconfig +++ b/trunk/arch/arm/configs/cm_x300_defconfig @@ -763,8 +763,8 @@ CONFIG_I2C_PXA=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/colibri_defconfig b/trunk/arch/arm/configs/colibri_defconfig index 744086fff414..c3e3418ed4fe 100644 --- a/trunk/arch/arm/configs/colibri_defconfig +++ b/trunk/arch/arm/configs/colibri_defconfig @@ -801,7 +801,7 @@ CONFIG_I2C_CHARDEV=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/collie_defconfig b/trunk/arch/arm/configs/collie_defconfig index 1aa62249031b..f7622e658163 100644 --- a/trunk/arch/arm/configs/collie_defconfig +++ b/trunk/arch/arm/configs/collie_defconfig @@ -113,6 +113,7 @@ CONFIG_ARCH_SA1100=y CONFIG_SA1100_COLLIE=y # CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set # CONFIG_SA1100_BADGE4 is not set # CONFIG_SA1100_JORNADA720 is not set # CONFIG_SA1100_HACKKIT is not set diff --git a/trunk/arch/arm/configs/corgi_defconfig b/trunk/arch/arm/configs/corgi_defconfig index d6cd165e9310..98765438048d 100644 --- a/trunk/arch/arm/configs/corgi_defconfig +++ b/trunk/arch/arm/configs/corgi_defconfig @@ -982,8 +982,8 @@ CONFIG_I2C_PXA=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set @@ -1008,7 +1008,7 @@ CONFIG_SPI_PXA2XX=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set CONFIG_ARCH_REQUIRE_GPIOLIB=y diff --git a/trunk/arch/arm/configs/csb337_defconfig b/trunk/arch/arm/configs/csb337_defconfig index 29f68c2effe6..67e65e4f0cdc 100644 --- a/trunk/arch/arm/configs/csb337_defconfig +++ b/trunk/arch/arm/configs/csb337_defconfig @@ -679,7 +679,7 @@ CONFIG_I2C_GPIO=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/csb637_defconfig b/trunk/arch/arm/configs/csb637_defconfig index f7b60ceed6c7..99702146c9fc 100644 --- a/trunk/arch/arm/configs/csb637_defconfig +++ b/trunk/arch/arm/configs/csb637_defconfig @@ -704,7 +704,7 @@ CONFIG_I2C_CHARDEV=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/ecbat91_defconfig b/trunk/arch/arm/configs/ecbat91_defconfig index ca520733bdb0..cfeb817ad21a 100644 --- a/trunk/arch/arm/configs/ecbat91_defconfig +++ b/trunk/arch/arm/configs/ecbat91_defconfig @@ -721,7 +721,7 @@ CONFIG_I2C_GPIO=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -747,7 +747,7 @@ CONFIG_SPI_AT91=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # diff --git a/trunk/arch/arm/configs/em_x270_defconfig b/trunk/arch/arm/configs/em_x270_defconfig deleted file mode 100644 index e9955b786c80..000000000000 --- a/trunk/arch/arm/configs/em_x270_defconfig +++ /dev/null @@ -1,1741 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.29-rc2 -# Sun Feb 1 16:43:31 2009 -# -CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_MMU=y -# CONFIG_NO_IOPORT is not set -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ARCH_MTD_XIP=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -CONFIG_SWAP=y -CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set -CONFIG_IKCONFIG=y -CONFIG_IKCONFIG_PROC=y -CONFIG_LOG_BUF_SHIFT=14 -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set -CONFIG_SYSFS_DEPRECATED=y -CONFIG_SYSFS_DEPRECATED_V2=y -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -CONFIG_BLK_DEV_INITRD=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_ALL is not set -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -# CONFIG_COMPAT_BRK is not set -CONFIG_BASE_FULL=y -CONFIG_FUTEX=y -CONFIG_ANON_INODES=y -CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y -CONFIG_SHMEM=y -CONFIG_AIO=y -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_SLUB_DEBUG is not set -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_RT_MUTEXES=y -CONFIG_BASE_SMALL=0 -CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set -CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set -# CONFIG_MODVERSIONS is not set -# CONFIG_MODULE_SRCVERSION_ALL is not set -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -CONFIG_CLASSIC_RCU=y -# CONFIG_TREE_RCU is not set -# CONFIG_PREEMPT_RCU is not set -# CONFIG_TREE_RCU_TRACE is not set -# CONFIG_PREEMPT_RCU_TRACE is not set -CONFIG_FREEZER=y - -# -# System Type -# -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set -# CONFIG_ARCH_CLPS711X is not set -# CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set -# CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set -# CONFIG_ARCH_IXP4XX is not set -# CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_PNX4008 is not set -CONFIG_ARCH_PXA=y -# CONFIG_ARCH_RPC is not set -# CONFIG_ARCH_SA1100 is not set -# CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set -# CONFIG_ARCH_SHARK is not set -# CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_DAVINCI is not set -# CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_W90X900 is not set - -# -# Intel PXA2xx/PXA3xx Implementations -# -# CONFIG_ARCH_GUMSTIX is not set -# CONFIG_MACH_INTELMOTE2 is not set -# CONFIG_ARCH_LUBBOCK is not set -# CONFIG_MACH_LOGICPD_PXA270 is not set -# CONFIG_MACH_MAINSTONE is not set -# CONFIG_MACH_MP900C is not set -# CONFIG_ARCH_PXA_IDP is not set -# CONFIG_PXA_SHARPSL is not set -# CONFIG_ARCH_VIPER is not set -# CONFIG_ARCH_PXA_ESERIES is not set -# CONFIG_TRIZEPS_PXA is not set -# CONFIG_MACH_H5000 is not set -CONFIG_MACH_EM_X270=y -CONFIG_MACH_EXEDA=y -# CONFIG_MACH_COLIBRI is not set -# CONFIG_MACH_ZYLONITE is not set -# CONFIG_MACH_LITTLETON is not set -# CONFIG_MACH_TAVOREVB is not set -# CONFIG_MACH_SAAR is not set -# CONFIG_MACH_ARMCORE is not set -# CONFIG_MACH_CM_X300 is not set -# CONFIG_MACH_MAGICIAN is not set -# CONFIG_MACH_MIOA701 is not set -# CONFIG_MACH_PCM027 is not set -# CONFIG_ARCH_PXA_PALM is not set -# CONFIG_PXA_EZX is not set -CONFIG_PXA27x=y -CONFIG_PXA_SSP=y -# CONFIG_PXA_PWM is not set - -# -# Processor Type -# -CONFIG_CPU_32=y -CONFIG_CPU_XSCALE=y -CONFIG_CPU_32v5=y -CONFIG_CPU_ABRT_EV5T=y -CONFIG_CPU_PABRT_NOIFAR=y -CONFIG_CPU_CACHE_VIVT=y -CONFIG_CPU_TLB_V4WBI=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y - -# -# Processor Features -# -CONFIG_ARM_THUMB=y -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_OUTER_CACHE is not set -CONFIG_IWMMXT=y -CONFIG_XSCALE_PMU=y -CONFIG_COMMON_CLKDEV=y - -# -# Bus support -# -# CONFIG_PCI_SYSCALL is not set -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCCARD is not set - -# -# Kernel Features -# -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -# CONFIG_HIGH_RES_TIMERS is not set -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PREEMPT is not set -CONFIG_HZ=100 -CONFIG_AEABI=y -CONFIG_OABI_COMPAT=y -CONFIG_ARCH_FLATMEM_HAS_HOLES=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4096 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -CONFIG_UNEVICTABLE_LRU=y -CONFIG_ALIGNMENT_TRAP=y - -# -# Boot options -# -CONFIG_ZBOOT_ROM_TEXT=0x0 -CONFIG_ZBOOT_ROM_BSS=0x0 -CONFIG_CMDLINE="root=1f03 mem=32M" -# CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# CPU Power Management -# -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_TABLE=y -# CONFIG_CPU_FREQ_DEBUG is not set -CONFIG_CPU_FREQ_STAT=y -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -CONFIG_CPU_FREQ_GOV_USERSPACE=m -# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -# CONFIG_CPU_IDLE is not set - -# -# Floating point emulation -# - -# -# At least one emulation must be selected -# -CONFIG_FPE_NWFPE=y -# CONFIG_FPE_NWFPE_XP is not set -# CONFIG_FPE_FASTFPE is not set - -# -# Userspace binary formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y -# CONFIG_BINFMT_AOUT is not set -# CONFIG_BINFMT_MISC is not set - -# -# Power management options -# -CONFIG_PM=y -# CONFIG_PM_DEBUG is not set -CONFIG_PM_SLEEP=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_APM_EMULATION=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -CONFIG_COMPAT_NET_DEV_OPS=y -CONFIG_PACKET=y -CONFIG_PACKET_MMAP=y -CONFIG_UNIX=y -CONFIG_XFRM=y -# CONFIG_XFRM_USER is not set -# CONFIG_XFRM_SUB_POLICY is not set -# CONFIG_XFRM_MIGRATE is not set -# CONFIG_XFRM_STATISTICS is not set -# CONFIG_NET_KEY is not set -CONFIG_INET=y -CONFIG_IP_MULTICAST=y -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -CONFIG_IP_PNP=y -CONFIG_IP_PNP_DHCP=y -CONFIG_IP_PNP_BOOTP=y -# CONFIG_IP_PNP_RARP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_IP_MROUTE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -CONFIG_INET_XFRM_MODE_TRANSPORT=y -CONFIG_INET_XFRM_MODE_TUNNEL=y -CONFIG_INET_XFRM_MODE_BEET=y -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -CONFIG_BT=m -CONFIG_BT_L2CAP=m -CONFIG_BT_SCO=m -CONFIG_BT_RFCOMM=m -# CONFIG_BT_RFCOMM_TTY is not set -CONFIG_BT_BNEP=m -# CONFIG_BT_BNEP_MC_FILTER is not set -# CONFIG_BT_BNEP_PROTO_FILTER is not set -CONFIG_BT_HIDP=m - -# -# Bluetooth device drivers -# -CONFIG_BT_HCIBTUSB=m -# CONFIG_BT_HCIBTSDIO is not set -# CONFIG_BT_HCIUART is not set -# CONFIG_BT_HCIBCM203X is not set -# CONFIG_BT_HCIBPA10X is not set -# CONFIG_BT_HCIBFUSB is not set -# CONFIG_BT_HCIVHCI is not set -# CONFIG_AF_RXRPC is not set -# CONFIG_PHONET is not set -CONFIG_WIRELESS=y -# CONFIG_CFG80211 is not set -CONFIG_WIRELESS_OLD_REGULATORY=y -CONFIG_WIRELESS_EXT=y -CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=m -# CONFIG_MAC80211 is not set -# CONFIG_WIMAX is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -CONFIG_STANDALONE=y -CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=m -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_TESTS is not set -# CONFIG_MTD_REDBOOT_PARTS is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_GEN_PROBE=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_NOSWAP=y -# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set -# CONFIG_MTD_CFI_GEOMETRY is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -# CONFIG_MTD_OTP is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set -# CONFIG_MTD_XIP is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_PHYSMAP=y -# CONFIG_MTD_PHYSMAP_COMPAT is not set -CONFIG_MTD_PXA2XX=y -# CONFIG_MTD_ARM_INTEGRATOR is not set -# CONFIG_MTD_IMPA7 is not set -# CONFIG_MTD_SHARP_SL is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -CONFIG_MTD_NAND=y -# CONFIG_MTD_NAND_VERIFY_WRITE is not set -# CONFIG_MTD_NAND_ECC_SMC is not set -# CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_H1900 is not set -# CONFIG_MTD_NAND_GPIO is not set -CONFIG_MTD_NAND_IDS=y -# CONFIG_MTD_NAND_DISKONCHIP is not set -# CONFIG_MTD_NAND_SHARPSL is not set -# CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_PLATFORM=y -# CONFIG_MTD_ALAUDA is not set -# CONFIG_MTD_ONENAND is not set - -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set -# CONFIG_MTD_QINFO_PROBE is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -CONFIG_BLK_DEV=y -# CONFIG_BLK_DEV_COW_COMMON is not set -CONFIG_BLK_DEV_LOOP=y -# CONFIG_BLK_DEV_CRYPTOLOOP is not set -# CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=4096 -# CONFIG_BLK_DEV_XIP is not set -# CONFIG_CDROM_PKTCDVD is not set -# CONFIG_ATA_OVER_ETH is not set -# CONFIG_MISC_DEVICES is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -CONFIG_SCSI=y -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set -CONFIG_SCSI_PROC_FS=y - -# -# SCSI support type (disk, tape, CD-ROM) -# -CONFIG_BLK_DEV_SD=y -# CONFIG_CHR_DEV_ST is not set -# CONFIG_CHR_DEV_OSST is not set -# CONFIG_BLK_DEV_SR is not set -# CONFIG_CHR_DEV_SG is not set -# CONFIG_CHR_DEV_SCH is not set - -# -# Some SCSI devices (e.g. CD jukebox) support multiple LUNs -# -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_CONSTANTS is not set -# CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m - -# -# SCSI Transports -# -# CONFIG_SCSI_SPI_ATTRS is not set -# CONFIG_SCSI_FC_ATTRS is not set -# CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_DH is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -# CONFIG_PHYLIB is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_SMC91X is not set -CONFIG_DM9000=y -CONFIG_DM9000_DEBUGLEVEL=1 -# CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set -# CONFIG_ENC28J60 is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set -# CONFIG_B44 is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set - -# -# Wireless LAN -# -# CONFIG_WLAN_PRE80211 is not set -CONFIG_WLAN_80211=y -CONFIG_LIBERTAS=m -# CONFIG_LIBERTAS_USB is not set -CONFIG_LIBERTAS_SDIO=m -# CONFIG_LIBERTAS_DEBUG is not set -# CONFIG_USB_ZD1201 is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_IWLWIFI_LEDS is not set -# CONFIG_HOSTAP is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set -# CONFIG_WAN is not set -CONFIG_PPP=m -CONFIG_PPP_MULTILINK=y -CONFIG_PPP_FILTER=y -CONFIG_PPP_ASYNC=m -# CONFIG_PPP_SYNC_TTY is not set -CONFIG_PPP_DEFLATE=m -CONFIG_PPP_BSDCOMP=m -# CONFIG_PPP_MPPE is not set -# CONFIG_PPPOE is not set -# CONFIG_PPPOL2TP is not set -# CONFIG_SLIP is not set -CONFIG_SLHC=m -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set - -# -# Input device support -# -CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set - -# -# Userland interfaces -# -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -# CONFIG_INPUT_JOYDEV is not set -CONFIG_INPUT_EVDEV=y -# CONFIG_INPUT_EVBUG is not set -CONFIG_INPUT_APMPOWER=y - -# -# Input Device Drivers -# -CONFIG_INPUT_KEYBOARD=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -CONFIG_KEYBOARD_PXA27x=y -CONFIG_KEYBOARD_GPIO=y -# CONFIG_INPUT_MOUSE is not set -# CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set -CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set -# CONFIG_TOUCHSCREEN_DA9034 is not set -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -CONFIG_TOUCHSCREEN_WM97XX=m -# CONFIG_TOUCHSCREEN_WM9705 is not set -CONFIG_TOUCHSCREEN_WM9712=y -# CONFIG_TOUCHSCREEN_WM9713 is not set -# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set -# CONFIG_INPUT_MISC is not set - -# -# Hardware I/O ports -# -CONFIG_SERIO=y -# CONFIG_SERIO_SERPORT is not set -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_RAW is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_VT_CONSOLE=y -CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y -# CONFIG_SERIAL_NONSTANDARD is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_PXA=y -CONFIG_SERIAL_PXA_CONSOLE=y -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=16 -# CONFIG_IPMI_HANDLER is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_NVRAM is not set -# CONFIG_R3964 is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=m -CONFIG_I2C_HELPER_AUTO=y - -# -# I2C Hardware Bus support -# - -# -# I2C system bus drivers (mostly embedded / system-on-chip) -# -# CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_PXA=y -# CONFIG_I2C_PXA_SLAVE is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# -# CONFIG_I2C_PARPORT_LIGHT is not set -# CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set -# CONFIG_I2C_STUB is not set - -# -# Miscellaneous I2C Chip support -# -# CONFIG_DS1682 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set -# CONFIG_SENSORS_PCF8574 is not set -# CONFIG_PCF8575 is not set -# CONFIG_SENSORS_PCA9539 is not set -# CONFIG_SENSORS_PCF8591 is not set -# CONFIG_SENSORS_MAX6875 is not set -# CONFIG_SENSORS_TSL2550 is not set -# CONFIG_I2C_DEBUG_CORE is not set -# CONFIG_I2C_DEBUG_ALGO is not set -# CONFIG_I2C_DEBUG_BUS is not set -# CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -CONFIG_SPI_PXA2XX=y - -# -# SPI Protocol Masters -# -# CONFIG_SPI_AT25 is not set -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -# CONFIG_GPIO_SYSFS is not set - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set - -# -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: -# -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set -# CONFIG_W1 is not set -CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -# CONFIG_PDA_POWER is not set -# CONFIG_APM_POWER is not set -# CONFIG_BATTERY_DS2760 is not set -# CONFIG_BATTERY_BQ27x00 is not set -CONFIG_BATTERY_DA9030=y -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -# CONFIG_THERMAL_HWMON is not set -# CONFIG_WATCHDOG is not set -CONFIG_SSB_POSSIBLE=y - -# -# Sonics Silicon Backplane -# -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set -# CONFIG_HTC_EGPIO is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_UCB1400_CORE is not set -# CONFIG_TPS65010 is not set -# CONFIG_TWL4030_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -CONFIG_PMIC_DA903X=y -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set - -# -# Multimedia devices -# - -# -# Multimedia core support -# -CONFIG_VIDEO_DEV=m -CONFIG_VIDEO_V4L2_COMMON=m -# CONFIG_VIDEO_ALLOW_V4L1 is not set -CONFIG_VIDEO_V4L1_COMPAT=y -# CONFIG_DVB_CORE is not set -CONFIG_VIDEO_MEDIA=m - -# -# Multimedia drivers -# -# CONFIG_MEDIA_ATTACH is not set -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMIZE=y -# CONFIG_MEDIA_TUNER_SIMPLE is not set -# CONFIG_MEDIA_TUNER_TDA8290 is not set -# CONFIG_MEDIA_TUNER_TDA827X is not set -# CONFIG_MEDIA_TUNER_TDA18271 is not set -# CONFIG_MEDIA_TUNER_TDA9887 is not set -# CONFIG_MEDIA_TUNER_TEA5761 is not set -# CONFIG_MEDIA_TUNER_TEA5767 is not set -# CONFIG_MEDIA_TUNER_MT20XX is not set -# CONFIG_MEDIA_TUNER_MT2060 is not set -# CONFIG_MEDIA_TUNER_MT2266 is not set -# CONFIG_MEDIA_TUNER_MT2131 is not set -# CONFIG_MEDIA_TUNER_QT1010 is not set -# CONFIG_MEDIA_TUNER_XC2028 is not set -# CONFIG_MEDIA_TUNER_XC5000 is not set -# CONFIG_MEDIA_TUNER_MXL5005S is not set -# CONFIG_MEDIA_TUNER_MXL5007T is not set -CONFIG_VIDEO_V4L2=m -CONFIG_VIDEOBUF_GEN=m -CONFIG_VIDEOBUF_DMA_SG=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# Video decoders -# -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_CX25840 is not set - -# -# MPEG video encoders -# -# CONFIG_VIDEO_CX2341X is not set - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -CONFIG_SOC_CAMERA=m -# CONFIG_SOC_CAMERA_MT9M001 is not set -CONFIG_SOC_CAMERA_MT9M111=m -# CONFIG_SOC_CAMERA_MT9T031 is not set -# CONFIG_SOC_CAMERA_MT9V022 is not set -# CONFIG_SOC_CAMERA_TW9910 is not set -# CONFIG_SOC_CAMERA_PLATFORM is not set -# CONFIG_SOC_CAMERA_OV772X is not set -CONFIG_VIDEO_PXA27x=m -# CONFIG_VIDEO_SH_MOBILE_CEU is not set -# CONFIG_V4L_USB_DRIVERS is not set -# CONFIG_RADIO_ADAPTERS is not set -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set -# CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set -# CONFIG_FB_MODE_HELPERS is not set -# CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# -# CONFIG_FB_S1D13XXX is not set -CONFIG_FB_PXA=y -# CONFIG_FB_PXA_OVERLAY is not set -# CONFIG_FB_PXA_SMARTPANEL is not set -CONFIG_FB_PXA_PARAMETERS=y -CONFIG_FB_MBX=m -# CONFIG_FB_MBX_DEBUG is not set -# CONFIG_FB_W100 is not set -# CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -CONFIG_BACKLIGHT_LCD_SUPPORT=y -CONFIG_LCD_CLASS_DEVICE=y -# CONFIG_LCD_LTV350QV is not set -# CONFIG_LCD_ILI9320 is not set -CONFIG_LCD_TDO24M=y -# CONFIG_LCD_VGG2432A4 is not set -# CONFIG_LCD_PLATFORM is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=m -# CONFIG_BACKLIGHT_GENERIC is not set -CONFIG_BACKLIGHT_DA903X=m - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set - -# -# Console display driver support -# -# CONFIG_VGA_CONSOLE is not set -CONFIG_DUMMY_CONSOLE=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set -# CONFIG_FONTS is not set -CONFIG_FONT_8x8=y -CONFIG_FONT_8x16=y -CONFIG_LOGO=y -CONFIG_LOGO_LINUX_MONO=y -CONFIG_LOGO_LINUX_VGA16=y -CONFIG_LOGO_LINUX_CLUT224=y -CONFIG_SOUND=m -CONFIG_SOUND_OSS_CORE=y -CONFIG_SND=m -CONFIG_SND_TIMER=m -CONFIG_SND_PCM=m -# CONFIG_SND_SEQUENCER is not set -CONFIG_SND_OSSEMUL=y -CONFIG_SND_MIXER_OSS=m -CONFIG_SND_PCM_OSS=m -CONFIG_SND_PCM_OSS_PLUGINS=y -# CONFIG_SND_DYNAMIC_MINORS is not set -CONFIG_SND_SUPPORT_OLD_API=y -CONFIG_SND_VERBOSE_PROCFS=y -# CONFIG_SND_VERBOSE_PRINTK is not set -# CONFIG_SND_DEBUG is not set -CONFIG_SND_VMASTER=y -CONFIG_SND_AC97_CODEC=m -# CONFIG_SND_DRIVERS is not set -CONFIG_SND_ARM=y -CONFIG_SND_PXA2XX_LIB=m -CONFIG_SND_PXA2XX_LIB_AC97=y -# CONFIG_SND_PXA2XX_AC97 is not set -# CONFIG_SND_SPI is not set -# CONFIG_SND_USB is not set -CONFIG_SND_SOC=m -CONFIG_SND_SOC_AC97_BUS=y -CONFIG_SND_PXA2XX_SOC=m -CONFIG_SND_PXA2XX_SOC_AC97=m -CONFIG_SND_PXA2XX_SOC_EM_X270=m -CONFIG_SND_SOC_I2C_AND_SPI=m -# CONFIG_SND_SOC_ALL_CODECS is not set -CONFIG_SND_SOC_WM9712=m -# CONFIG_SOUND_PRIME is not set -CONFIG_AC97_BUS=m -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -CONFIG_HID_DEBUG=y -# CONFIG_HIDRAW is not set - -# -# USB Input Devices -# -CONFIG_USB_HID=y -# CONFIG_HID_PID is not set -# CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -CONFIG_HID_COMPAT=y -CONFIG_HID_A4TECH=y -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -CONFIG_HID_CYPRESS=y -CONFIG_HID_EZKEY=y -CONFIG_HID_GYRATION=y -CONFIG_HID_LOGITECH=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -# CONFIG_HID_NTRIG is not set -CONFIG_HID_PANTHERLORD=y -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -# CONFIG_GREENASIA_FF is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_THRUSTMASTER_FF is not set -# CONFIG_ZEROPLUS_FF is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -CONFIG_USB_DEVICEFS=y -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_SUSPEND is not set -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -# CONFIG_USB_MUSB_HDRC is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; -# - -# -# see USB_STORAGE Help for more information -# -CONFIG_USB_STORAGE=y -# CONFIG_USB_STORAGE_DEBUG is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_ISD200 is not set -# CONFIG_USB_STORAGE_USBAT is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_ONETOUCH is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set -# CONFIG_USB_MICROTEK is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGET is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_TEST is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -# CONFIG_USB_GADGET is not set - -# -# OTG and related infrastructure -# -# CONFIG_USB_GPIO_VBUS is not set -CONFIG_MMC=m -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=m -CONFIG_MMC_BLOCK_BOUNCE=y -# CONFIG_SDIO_UART is not set -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -CONFIG_MMC_PXA=m -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_SPI is not set -# CONFIG_MEMSTICK is not set -# CONFIG_ACCESSIBILITY is not set -CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_PCA9532 is not set -# CONFIG_LEDS_GPIO is not set -# CONFIG_LEDS_PCA955X is not set -CONFIG_LEDS_DA903X=y - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -# CONFIG_LEDS_TRIGGER_TIMER is not set -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set -# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# I2C RTC drivers -# -# CONFIG_RTC_DRV_DS1307 is not set -# CONFIG_RTC_DRV_DS1374 is not set -# CONFIG_RTC_DRV_DS1672 is not set -# CONFIG_RTC_DRV_MAX6900 is not set -# CONFIG_RTC_DRV_RS5C372 is not set -# CONFIG_RTC_DRV_ISL1208 is not set -# CONFIG_RTC_DRV_X1205 is not set -# CONFIG_RTC_DRV_PCF8563 is not set -# CONFIG_RTC_DRV_PCF8583 is not set -# CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set - -# -# SPI RTC drivers -# -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set - -# -# Platform RTC drivers -# -# CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -CONFIG_RTC_DRV_V3020=y - -# -# on-CPU RTC drivers -# -CONFIG_RTC_DRV_SA1100=y -# CONFIG_RTC_DRV_PXA is not set -# CONFIG_DMADEVICES is not set -CONFIG_REGULATOR=y -# CONFIG_REGULATOR_DEBUG is not set -# CONFIG_REGULATOR_FIXED_VOLTAGE is not set -# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set -# CONFIG_REGULATOR_BQ24022 is not set -CONFIG_REGULATOR_DA903X=y -# CONFIG_UIO is not set -# CONFIG_STAGING is not set - -# -# File systems -# -CONFIG_EXT2_FS=y -# CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set -CONFIG_EXT3_FS=y -CONFIG_EXT3_FS_XATTR=y -# CONFIG_EXT3_FS_POSIX_ACL is not set -# CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4_FS is not set -CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set -CONFIG_FS_MBCACHE=y -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -CONFIG_FILE_LOCKING=y -# CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -CONFIG_DNOTIFY=y -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -CONFIG_FAT_FS=m -# CONFIG_MSDOS_FS is not set -CONFIG_VFAT_FS=m -CONFIG_FAT_DEFAULT_CODEPAGE=437 -CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -# CONFIG_PROC_PAGE_MONITOR is not set -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -CONFIG_JFFS2_FS=y -CONFIG_JFFS2_FS_DEBUG=0 -CONFIG_JFFS2_FS_WRITEBUFFER=y -# CONFIG_JFFS2_FS_WBUF_VERIFY is not set -CONFIG_JFFS2_SUMMARY=y -# CONFIG_JFFS2_FS_XATTR is not set -# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set -CONFIG_JFFS2_ZLIB=y -# CONFIG_JFFS2_LZO is not set -CONFIG_JFFS2_RTIME=y -# CONFIG_JFFS2_RUBIN is not set -# CONFIG_CRAMFS is not set -# CONFIG_SQUASHFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y -CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set -# CONFIG_NFS_V4 is not set -CONFIG_ROOT_NFS=y -# CONFIG_NFSD is not set -CONFIG_LOCKD=y -CONFIG_LOCKD_V4=y -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_SUNRPC_REGISTER_V4 is not set -# CONFIG_RPCSEC_GSS_KRB5 is not set -# CONFIG_RPCSEC_GSS_SPKM3 is not set -# CONFIG_SMB_FS is not set -CONFIG_CIFS=m -# CONFIG_CIFS_STATS is not set -# CONFIG_CIFS_WEAK_PW_HASH is not set -# CONFIG_CIFS_XATTR is not set -# CONFIG_CIFS_DEBUG2 is not set -# CONFIG_CIFS_EXPERIMENTAL is not set -# CONFIG_NCP_FS is not set -# CONFIG_CODA_FS is not set -# CONFIG_AFS_FS is not set - -# -# Partition Types -# -CONFIG_PARTITION_ADVANCED=y -# CONFIG_ACORN_PARTITION is not set -# CONFIG_OSF_PARTITION is not set -# CONFIG_AMIGA_PARTITION is not set -# CONFIG_ATARI_PARTITION is not set -# CONFIG_MAC_PARTITION is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_BSD_DISKLABEL is not set -# CONFIG_MINIX_SUBPARTITION is not set -# CONFIG_SOLARIS_X86_PARTITION is not set -# CONFIG_UNIXWARE_DISKLABEL is not set -# CONFIG_LDM_PARTITION is not set -# CONFIG_SGI_PARTITION is not set -# CONFIG_ULTRIX_PARTITION is not set -# CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set -# CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set -CONFIG_NLS=m -CONFIG_NLS_DEFAULT="iso8859-1" -CONFIG_NLS_CODEPAGE_437=m -# CONFIG_NLS_CODEPAGE_737 is not set -# CONFIG_NLS_CODEPAGE_775 is not set -# CONFIG_NLS_CODEPAGE_850 is not set -# CONFIG_NLS_CODEPAGE_852 is not set -# CONFIG_NLS_CODEPAGE_855 is not set -# CONFIG_NLS_CODEPAGE_857 is not set -# CONFIG_NLS_CODEPAGE_860 is not set -# CONFIG_NLS_CODEPAGE_861 is not set -# CONFIG_NLS_CODEPAGE_862 is not set -# CONFIG_NLS_CODEPAGE_863 is not set -# CONFIG_NLS_CODEPAGE_864 is not set -# CONFIG_NLS_CODEPAGE_865 is not set -# CONFIG_NLS_CODEPAGE_866 is not set -# CONFIG_NLS_CODEPAGE_869 is not set -# CONFIG_NLS_CODEPAGE_936 is not set -# CONFIG_NLS_CODEPAGE_950 is not set -# CONFIG_NLS_CODEPAGE_932 is not set -# CONFIG_NLS_CODEPAGE_949 is not set -# CONFIG_NLS_CODEPAGE_874 is not set -# CONFIG_NLS_ISO8859_8 is not set -# CONFIG_NLS_CODEPAGE_1250 is not set -# CONFIG_NLS_CODEPAGE_1251 is not set -# CONFIG_NLS_ASCII is not set -CONFIG_NLS_ISO8859_1=m -# CONFIG_NLS_ISO8859_2 is not set -# CONFIG_NLS_ISO8859_3 is not set -# CONFIG_NLS_ISO8859_4 is not set -# CONFIG_NLS_ISO8859_5 is not set -# CONFIG_NLS_ISO8859_6 is not set -# CONFIG_NLS_ISO8859_7 is not set -# CONFIG_NLS_ISO8859_9 is not set -# CONFIG_NLS_ISO8859_13 is not set -# CONFIG_NLS_ISO8859_14 is not set -# CONFIG_NLS_ISO8859_15 is not set -# CONFIG_NLS_KOI8_R is not set -# CONFIG_NLS_KOI8_U is not set -CONFIG_NLS_UTF8=m -# CONFIG_DLM is not set - -# -# Kernel hacking -# -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=0 -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y -# CONFIG_HEADERS_CHECK is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_DETECT_SOFTLOCKUP is not set -# CONFIG_SCHED_DEBUG is not set -# CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_BUGVERBOSE is not set -# CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set -CONFIG_FRAME_POINTER=y -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -CONFIG_SYSCTL_SYSCALL_CHECK=y -CONFIG_HAVE_FUNCTION_TRACER=y - -# -# Tracers -# -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_CONTEXT_SWITCH_TRACER is not set -# CONFIG_BOOT_TRACER is not set -# CONFIG_TRACE_BRANCH_PROFILING is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_DYNAMIC_PRINTK_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set -CONFIG_DEBUG_USER=y -CONFIG_DEBUG_ERRORS=y -# CONFIG_DEBUG_STACK_USAGE is not set -CONFIG_DEBUG_LL=y -# CONFIG_DEBUG_ICEDCC is not set - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set -CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -# CONFIG_CRYPTO_FIPS is not set -CONFIG_CRYPTO_ALGAPI=m -CONFIG_CRYPTO_ALGAPI2=m -CONFIG_CRYPTO_AEAD2=m -CONFIG_CRYPTO_BLKCIPHER=m -CONFIG_CRYPTO_BLKCIPHER2=m -CONFIG_CRYPTO_HASH=m -CONFIG_CRYPTO_HASH2=m -CONFIG_CRYPTO_RNG2=m -CONFIG_CRYPTO_MANAGER=m -CONFIG_CRYPTO_MANAGER2=m -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -# CONFIG_CRYPTO_CBC is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# -# CONFIG_CRYPTO_HMAC is not set -# CONFIG_CRYPTO_XCBC is not set - -# -# Digest -# -# CONFIG_CRYPTO_CRC32C is not set -# CONFIG_CRYPTO_MD4 is not set -# CONFIG_CRYPTO_MD5 is not set -CONFIG_CRYPTO_MICHAEL_MIC=m -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set -# CONFIG_CRYPTO_SHA1 is not set -# CONFIG_CRYPTO_SHA256 is not set -# CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -CONFIG_CRYPTO_AES=m -# CONFIG_CRYPTO_ANUBIS is not set -CONFIG_CRYPTO_ARC4=m -# CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set -# CONFIG_CRYPTO_CAST5 is not set -# CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set -# CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set -# CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# -# CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set -# CONFIG_CRYPTO_HW is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_CRC_CCITT=m -# CONFIG_CRC16 is not set -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_ZLIB_INFLATE=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y diff --git a/trunk/arch/arm/configs/ep93xx_defconfig b/trunk/arch/arm/configs/ep93xx_defconfig index 3f89d5f25bce..21aa013793c6 100644 --- a/trunk/arch/arm/configs/ep93xx_defconfig +++ b/trunk/arch/arm/configs/ep93xx_defconfig @@ -681,7 +681,7 @@ CONFIG_I2C_ALGOBIT=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -CONFIG_EEPROM_LEGACY=y +CONFIG_SENSORS_EEPROM=y # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/ezx_defconfig b/trunk/arch/arm/configs/ezx_defconfig index d5ee16e6abf3..2a84d557adc2 100644 --- a/trunk/arch/arm/configs/ezx_defconfig +++ b/trunk/arch/arm/configs/ezx_defconfig @@ -877,7 +877,7 @@ CONFIG_I2C_PXA=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -900,7 +900,7 @@ CONFIG_SPI_PXA2XX=m # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set CONFIG_HAVE_GPIO_LIB=y diff --git a/trunk/arch/arm/configs/footbridge_defconfig b/trunk/arch/arm/configs/footbridge_defconfig index 6ace512fa101..299dc22294a0 100644 --- a/trunk/arch/arm/configs/footbridge_defconfig +++ b/trunk/arch/arm/configs/footbridge_defconfig @@ -801,7 +801,7 @@ CONFIG_I2C=m # # Other I2C Chip support # -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_SENSORS_RTC8564 is not set diff --git a/trunk/arch/arm/configs/h3600_defconfig b/trunk/arch/arm/configs/h3600_defconfig index 1502957db2c3..8f986e9f1c62 100644 --- a/trunk/arch/arm/configs/h3600_defconfig +++ b/trunk/arch/arm/configs/h3600_defconfig @@ -90,6 +90,7 @@ CONFIG_ARCH_SA1100=y # CONFIG_SA1100_COLLIE is not set # CONFIG_SA1100_H3100 is not set CONFIG_SA1100_H3600=y +# CONFIG_SA1100_H3800 is not set CONFIG_SA1100_H3XXX=y # CONFIG_SA1100_BADGE4 is not set # CONFIG_SA1100_JORNADA720 is not set @@ -99,6 +100,7 @@ CONFIG_SA1100_H3XXX=y # CONFIG_SA1100_SHANNON is not set # CONFIG_SA1100_SIMPAD is not set # CONFIG_SA1100_SSP is not set +# CONFIG_H3600_SLEEVE is not set # # Processor Type diff --git a/trunk/arch/arm/configs/hackkit_defconfig b/trunk/arch/arm/configs/hackkit_defconfig index db0708d5cbea..1c8fb89a6730 100644 --- a/trunk/arch/arm/configs/hackkit_defconfig +++ b/trunk/arch/arm/configs/hackkit_defconfig @@ -91,6 +91,7 @@ CONFIG_ARCH_SA1100=y # CONFIG_SA1100_COLLIE is not set # CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set # CONFIG_SA1100_BADGE4 is not set # CONFIG_SA1100_JORNADA720 is not set CONFIG_SA1100_HACKKIT=y diff --git a/trunk/arch/arm/configs/iop13xx_defconfig b/trunk/arch/arm/configs/iop13xx_defconfig index 89c17761726b..482e57061053 100644 --- a/trunk/arch/arm/configs/iop13xx_defconfig +++ b/trunk/arch/arm/configs/iop13xx_defconfig @@ -744,7 +744,7 @@ CONFIG_I2C_IOP3XX=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/iop32x_defconfig b/trunk/arch/arm/configs/iop32x_defconfig index d70177b38f5f..8612f58e1056 100644 --- a/trunk/arch/arm/configs/iop32x_defconfig +++ b/trunk/arch/arm/configs/iop32x_defconfig @@ -847,7 +847,7 @@ CONFIG_I2C_IOP3XX=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/iop33x_defconfig b/trunk/arch/arm/configs/iop33x_defconfig index eec488298267..8b0098d19d08 100644 --- a/trunk/arch/arm/configs/iop33x_defconfig +++ b/trunk/arch/arm/configs/iop33x_defconfig @@ -746,7 +746,7 @@ CONFIG_I2C_IOP3XX=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/ixp2000_defconfig b/trunk/arch/arm/configs/ixp2000_defconfig index 57526c15e854..84680db6c615 100644 --- a/trunk/arch/arm/configs/ixp2000_defconfig +++ b/trunk/arch/arm/configs/ixp2000_defconfig @@ -768,7 +768,7 @@ CONFIG_I2C_IXP2000=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -CONFIG_EEPROM_LEGACY=y +CONFIG_SENSORS_EEPROM=y # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/ixp23xx_defconfig b/trunk/arch/arm/configs/ixp23xx_defconfig index ef97561ed75b..4a2f7b2372db 100644 --- a/trunk/arch/arm/configs/ixp23xx_defconfig +++ b/trunk/arch/arm/configs/ixp23xx_defconfig @@ -900,7 +900,7 @@ CONFIG_I2C_ALGOBIT=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -CONFIG_EEPROM_LEGACY=y +CONFIG_SENSORS_EEPROM=y # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/ixp4xx_defconfig b/trunk/arch/arm/configs/ixp4xx_defconfig index 95cd8dfb5f1e..fc14932e3abd 100644 --- a/trunk/arch/arm/configs/ixp4xx_defconfig +++ b/trunk/arch/arm/configs/ixp4xx_defconfig @@ -1083,7 +1083,7 @@ CONFIG_I2C_IXP4XX=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -CONFIG_EEPROM_LEGACY=y +CONFIG_SENSORS_EEPROM=y # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/jornada720_defconfig b/trunk/arch/arm/configs/jornada720_defconfig index f3074e49f2fa..81fadafae02d 100644 --- a/trunk/arch/arm/configs/jornada720_defconfig +++ b/trunk/arch/arm/configs/jornada720_defconfig @@ -178,6 +178,7 @@ CONFIG_DMABOUNCE=y # CONFIG_SA1100_COLLIE is not set # CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set # CONFIG_SA1100_BADGE4 is not set CONFIG_SA1100_JORNADA720=y CONFIG_SA1100_JORNADA720_SSP=y diff --git a/trunk/arch/arm/configs/kafa_defconfig b/trunk/arch/arm/configs/kafa_defconfig index 9f92fc527f59..6dd95a2c8d5d 100644 --- a/trunk/arch/arm/configs/kafa_defconfig +++ b/trunk/arch/arm/configs/kafa_defconfig @@ -603,7 +603,7 @@ CONFIG_I2C_GPIO=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/kirkwood_defconfig b/trunk/arch/arm/configs/kirkwood_defconfig index 9ed4e1b86674..ab8b1e0d0dac 100644 --- a/trunk/arch/arm/configs/kirkwood_defconfig +++ b/trunk/arch/arm/configs/kirkwood_defconfig @@ -1,11 +1,11 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.29-rc5 -# Tue Mar 3 21:45:57 2009 +# Linux kernel version: 2.6.28-rc7 +# Thu Dec 4 15:27:39 2008 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_GENERIC_GPIO=y +# CONFIG_GENERIC_GPIO is not set CONFIG_GENERIC_TIME=y CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_MMU=y @@ -42,19 +42,10 @@ CONFIG_SYSVIPC_SYSCTL=y # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set # CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_CLASSIC_RCU=y -# CONFIG_TREE_RCU is not set -# CONFIG_PREEMPT_RCU is not set -# CONFIG_TREE_RCU_TRACE is not set -# CONFIG_PREEMPT_RCU_TRACE is not set # CONFIG_IKCONFIG is not set -CONFIG_LOG_BUF_SHIFT=19 -# CONFIG_GROUP_SCHED is not set +CONFIG_LOG_BUF_SHIFT=14 # CONFIG_CGROUPS is not set +# CONFIG_GROUP_SCHED is not set # CONFIG_SYSFS_DEPRECATED_V2 is not set # CONFIG_RELAY is not set CONFIG_NAMESPACES=y @@ -62,7 +53,6 @@ CONFIG_NAMESPACES=y # CONFIG_IPC_NS is not set # CONFIG_USER_NS is not set # CONFIG_PID_NS is not set -# CONFIG_NET_NS is not set # CONFIG_BLK_DEV_INITRD is not set CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SYSCTL=y @@ -93,7 +83,6 @@ CONFIG_SLUB_DEBUG=y CONFIG_SLUB=y # CONFIG_SLOB is not set CONFIG_PROFILING=y -CONFIG_TRACEPOINTS=y # CONFIG_MARKERS is not set CONFIG_OPROFILE=y CONFIG_HAVE_OPROFILE=y @@ -104,6 +93,7 @@ CONFIG_HAVE_KRETPROBES=y CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_FORCE_LOAD is not set @@ -111,9 +101,11 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y CONFIG_BLOCK=y # CONFIG_LBD is not set # CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set # CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_INTEGRITY is not set @@ -129,6 +121,7 @@ CONFIG_IOSCHED_CFQ=y CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" +CONFIG_CLASSIC_RCU=y # CONFIG_FREEZER is not set # @@ -139,6 +132,7 @@ CONFIG_DEFAULT_IOSCHED="cfq" # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_VERSATILE is not set # CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set # CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EP93XX is not set @@ -165,13 +159,11 @@ CONFIG_ARCH_KIRKWOOD=y # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set # CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set # CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_W90X900 is not set # # Marvell Kirkwood Implementations @@ -179,7 +171,14 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_MACH_DB88F6281_BP=y CONFIG_MACH_RD88F6192_NAS=y CONFIG_MACH_RD88F6281=y -CONFIG_MACH_SHEEVAPLUG=y + +# +# Boot options +# + +# +# Power management +# CONFIG_PLAT_ORION=y # @@ -215,7 +214,6 @@ CONFIG_PCI_SYSCALL=y # CONFIG_ARCH_SUPPORTS_MSI is not set CONFIG_PCI_LEGACY=y # CONFIG_PCI_DEBUG is not set -# CONFIG_PCI_STUB is not set # CONFIG_PCCARD is not set # @@ -244,6 +242,7 @@ CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4096 +# CONFIG_RESOURCES_64BIT is not set # CONFIG_PHYS_ADDR_T_64BIT is not set CONFIG_ZONE_DMA_FLAG=0 CONFIG_VIRT_TO_BUS=y @@ -292,7 +291,6 @@ CONFIG_NET=y # # Networking options # -CONFIG_COMPAT_NET_DEV_OPS=y CONFIG_PACKET=y CONFIG_PACKET_MMAP=y CONFIG_UNIX=y @@ -357,7 +355,6 @@ CONFIG_NET_DSA_MV88E6123_61_65=y # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set # CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set # # Network testing @@ -371,27 +368,12 @@ CONFIG_NET_PKTGEN=m # CONFIG_AF_RXRPC is not set # CONFIG_PHONET is not set CONFIG_WIRELESS=y -CONFIG_CFG80211=y -# CONFIG_CFG80211_REG_DEBUG is not set -# CONFIG_NL80211 is not set +# CONFIG_CFG80211 is not set CONFIG_WIRELESS_OLD_REGULATORY=y CONFIG_WIRELESS_EXT=y CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=y -CONFIG_MAC80211=y - -# -# Rate control algorithm selection -# -CONFIG_MAC80211_RC_MINSTREL=y -# CONFIG_MAC80211_RC_DEFAULT_PID is not set -CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y -CONFIG_MAC80211_RC_DEFAULT="minstrel" -# CONFIG_MAC80211_MESH is not set -# CONFIG_MAC80211_LEDS is not set -# CONFIG_MAC80211_DEBUGFS is not set -# CONFIG_MAC80211_DEBUG_MENU is not set -# CONFIG_WIMAX is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set # CONFIG_RFKILL is not set # CONFIG_NET_9P is not set @@ -416,7 +398,6 @@ CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set # CONFIG_MTD_CONCAT is not set CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_TESTS is not set # CONFIG_MTD_REDBOOT_PARTS is not set CONFIG_MTD_CMDLINE_PARTS=y # CONFIG_MTD_AFS_PARTS is not set @@ -470,7 +451,9 @@ CONFIG_MTD_CFI_UTIL=y # # CONFIG_MTD_COMPLEX_MAPPINGS is not set CONFIG_MTD_PHYSMAP=y -# CONFIG_MTD_PHYSMAP_COMPAT is not set +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x0 +CONFIG_MTD_PHYSMAP_BANKWIDTH=0 # CONFIG_MTD_ARM_INTEGRATOR is not set # CONFIG_MTD_IMPA7 is not set # CONFIG_MTD_INTEL_VR_NOR is not set @@ -498,7 +481,6 @@ CONFIG_MTD_NAND=y # CONFIG_MTD_NAND_VERIFY_WRITE is not set # CONFIG_MTD_NAND_ECC_SMC is not set # CONFIG_MTD_NAND_MUSEUM_IDS is not set -# CONFIG_MTD_NAND_GPIO is not set CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_CAFE is not set @@ -508,12 +490,6 @@ CONFIG_MTD_NAND_IDS=y CONFIG_MTD_NAND_ORION=y # CONFIG_MTD_ONENAND is not set -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set -# CONFIG_MTD_QINFO_PROBE is not set - # # UBI - Unsorted block images # @@ -592,8 +568,6 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_HPTIOP is not set -# CONFIG_LIBFC is not set -# CONFIG_FCOE is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_FUTURE_DOMAIN is not set # CONFIG_SCSI_IPS is not set @@ -708,9 +682,6 @@ CONFIG_MARVELL_PHY=y # CONFIG_BROADCOM_PHY is not set # CONFIG_ICPLUS_PHY is not set # CONFIG_REALTEK_PHY is not set -# CONFIG_NATIONAL_PHY is not set -# CONFIG_STE10XP is not set -# CONFIG_LSI_ET1011C_PHY is not set # CONFIG_FIXED_PHY is not set # CONFIG_MDIO_BITBANG is not set CONFIG_NET_ETHERNET=y @@ -724,7 +695,6 @@ CONFIG_MII=y # CONFIG_DM9000 is not set # CONFIG_ENC28J60 is not set # CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set # CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set # CONFIG_IBM_NEW_EMAC_ZMII is not set @@ -740,6 +710,7 @@ CONFIG_NET_PCI=y # CONFIG_ADAPTEC_STARFIRE is not set # CONFIG_B44 is not set # CONFIG_FORCEDETH is not set +# CONFIG_EEPRO100 is not set # CONFIG_E100 is not set # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set @@ -749,7 +720,6 @@ CONFIG_NET_PCI=y # CONFIG_R6040 is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set -# CONFIG_SMSC9420 is not set # CONFIG_SUNDANCE is not set # CONFIG_TLAN is not set # CONFIG_VIA_RHINE is not set @@ -784,39 +754,8 @@ CONFIG_MV643XX_ETH=y # Wireless LAN # # CONFIG_WLAN_PRE80211 is not set -CONFIG_WLAN_80211=y -CONFIG_LIBERTAS=y -# CONFIG_LIBERTAS_USB is not set -CONFIG_LIBERTAS_SDIO=y -# CONFIG_LIBERTAS_DEBUG is not set -# CONFIG_LIBERTAS_THINFIRM is not set -# CONFIG_HERMES is not set -# CONFIG_ATMEL is not set -# CONFIG_PRISM54 is not set -# CONFIG_USB_ZD1201 is not set -# CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_RTL8180 is not set -# CONFIG_RTL8187 is not set -# CONFIG_ADM8211 is not set -# CONFIG_MAC80211_HWSIM is not set -# CONFIG_P54_COMMON is not set -# CONFIG_ATH5K is not set -# CONFIG_ATH9K is not set -# CONFIG_IPW2100 is not set -# CONFIG_IPW2200 is not set -# CONFIG_IWLCORE is not set +# CONFIG_WLAN_80211 is not set # CONFIG_IWLWIFI_LEDS is not set -# CONFIG_IWLAGN is not set -# CONFIG_IWL3945 is not set -# CONFIG_HOSTAP is not set -# CONFIG_B43 is not set -# CONFIG_B43LEGACY is not set -# CONFIG_ZD1211RW is not set -# CONFIG_RT2X00 is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# # # USB Network Adapters @@ -900,11 +839,11 @@ CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_JSM is not set CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=16 # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set +# CONFIG_NVRAM is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # CONFIG_RAW_DRIVER is not set @@ -940,7 +879,6 @@ CONFIG_I2C_HELPER_AUTO=y # # I2C system bus drivers (mostly embedded / system-on-chip) # -# CONFIG_I2C_GPIO is not set CONFIG_I2C_MV64XXX=y # CONFIG_I2C_OCORES is not set # CONFIG_I2C_SIMTEC is not set @@ -967,6 +905,8 @@ CONFIG_I2C_MV64XXX=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set @@ -985,12 +925,12 @@ CONFIG_SPI_MASTER=y # SPI Master Controller Drivers # # CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set CONFIG_SPI_ORION=y # # SPI Protocol Masters # +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set @@ -1012,12 +952,10 @@ CONFIG_SSB_POSSIBLE=y # CONFIG_MFD_CORE is not set # CONFIG_MFD_SM501 is not set # CONFIG_HTC_PASIC3 is not set -# CONFIG_TWL4030_CORE is not set # CONFIG_MFD_TMIO is not set # CONFIG_PMIC_DA903X is not set # CONFIG_MFD_WM8400 is not set # CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set # # Multimedia devices @@ -1074,9 +1012,11 @@ CONFIG_HID_COMPAT=y CONFIG_HID_A4TECH=y CONFIG_HID_APPLE=y CONFIG_HID_BELKIN=y +CONFIG_HID_BRIGHT=y CONFIG_HID_CHERRY=y CONFIG_HID_CHICONY=y CONFIG_HID_CYPRESS=y +CONFIG_HID_DELL=y CONFIG_HID_EZKEY=y CONFIG_HID_GYRATION=y CONFIG_HID_LOGITECH=y @@ -1084,15 +1024,12 @@ CONFIG_HID_LOGITECH=y # CONFIG_LOGIRUMBLEPAD2_FF is not set CONFIG_HID_MICROSOFT=y CONFIG_HID_MONTEREY=y -CONFIG_HID_NTRIG=y CONFIG_HID_PANTHERLORD=y # CONFIG_PANTHERLORD_FF is not set CONFIG_HID_PETALYNX=y CONFIG_HID_SAMSUNG=y CONFIG_HID_SONY=y CONFIG_HID_SUNPLUS=y -# CONFIG_GREENASIA_FF is not set -CONFIG_HID_TOPSEED=y # CONFIG_THRUSTMASTER_FF is not set # CONFIG_ZEROPLUS_FF is not set CONFIG_USB_SUPPORT=y @@ -1121,7 +1058,6 @@ CONFIG_USB_DEVICE_CLASS=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_ROOT_HUB_TT=y CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set # CONFIG_USB_OHCI_HCD is not set @@ -1151,6 +1087,7 @@ CONFIG_USB_STORAGE=y CONFIG_USB_STORAGE_DATAFAB=y CONFIG_USB_STORAGE_FREECOM=y # CONFIG_USB_STORAGE_ISD200 is not set +CONFIG_USB_STORAGE_DPCM=y # CONFIG_USB_STORAGE_USBAT is not set CONFIG_USB_STORAGE_SDDR09=y CONFIG_USB_STORAGE_SDDR55=y @@ -1198,51 +1135,21 @@ CONFIG_USB_STORAGE_JUMPSHOT=y # CONFIG_USB_ISIGHTFW is not set # CONFIG_USB_VST is not set # CONFIG_USB_GADGET is not set - -# -# OTG and related infrastructure -# -# CONFIG_USB_GPIO_VBUS is not set # CONFIG_UWB is not set -CONFIG_MMC=y -# CONFIG_MMC_DEBUG is not set -# CONFIG_MMC_UNSAFE_RESUME is not set - -# -# MMC/SD/SDIO Card Drivers -# -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_BOUNCE=y -CONFIG_SDIO_UART=y -# CONFIG_MMC_TEST is not set - -# -# MMC/SD/SDIO Host Controller Drivers -# -# CONFIG_MMC_SDHCI is not set -# CONFIG_MMC_TIFM_SD is not set -CONFIG_MMC_MVSDIO=y -# CONFIG_MMC_SPI is not set +# CONFIG_MMC is not set # CONFIG_MEMSTICK is not set # CONFIG_ACCESSIBILITY is not set CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y +# CONFIG_LEDS_CLASS is not set # # LED drivers # -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -# CONFIG_LEDS_PCA955X is not set # # LED Triggers # -CONFIG_LEDS_TRIGGERS=y -CONFIG_LEDS_TRIGGER_TIMER=y -CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set -CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +# CONFIG_LEDS_TRIGGERS is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y CONFIG_RTC_HCTOSYS=y @@ -1320,7 +1227,6 @@ CONFIG_DMA_ENGINE=y # CONFIG_DMATEST is not set # CONFIG_REGULATOR is not set # CONFIG_UIO is not set -# CONFIG_STAGING is not set # # File systems @@ -1332,14 +1238,16 @@ CONFIG_EXT3_FS=y # CONFIG_EXT3_FS_XATTR is not set # CONFIG_EXT4_FS is not set CONFIG_JBD=y -# CONFIG_JBD_DEBUG is not set # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set CONFIG_FILE_LOCKING=y -# CONFIG_XFS_FS is not set +CONFIG_XFS_FS=y +# CONFIG_XFS_QUOTA is not set +# CONFIG_XFS_POSIX_ACL is not set +# CONFIG_XFS_RT is not set +# CONFIG_XFS_DEBUG is not set # CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set CONFIG_DNOTIFY=y CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y @@ -1360,9 +1268,9 @@ CONFIG_UDF_NLS=y # # DOS/FAT/NT Filesystems # -CONFIG_FAT_FS=y -CONFIG_MSDOS_FS=y -CONFIG_VFAT_FS=y +CONFIG_FAT_FS=m +CONFIG_MSDOS_FS=m +CONFIG_VFAT_FS=m CONFIG_FAT_DEFAULT_CODEPAGE=437 CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_NTFS_FS is not set @@ -1378,7 +1286,10 @@ CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set # CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y + +# +# Miscellaneous filesystems +# # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set @@ -1398,7 +1309,6 @@ CONFIG_JFFS2_ZLIB=y CONFIG_JFFS2_RTIME=y # CONFIG_JFFS2_RUBIN is not set CONFIG_CRAMFS=y -# CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_OMFS_FS is not set @@ -1483,7 +1393,7 @@ CONFIG_ENABLE_MUST_CHECK=y CONFIG_FRAME_WARN=1024 CONFIG_MAGIC_SYSRQ=y # CONFIG_UNUSED_SYMBOLS is not set -CONFIG_DEBUG_FS=y +# CONFIG_DEBUG_FS is not set # CONFIG_HEADERS_CHECK is not set CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_SHIRQ is not set @@ -1506,7 +1416,6 @@ CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 # CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_STACKTRACE=y # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y CONFIG_DEBUG_INFO=y @@ -1515,7 +1424,7 @@ CONFIG_DEBUG_INFO=y CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_DEBUG_LIST is not set # CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set +CONFIG_FRAME_POINTER=y # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_CPU_STALL_DETECTOR is not set @@ -1526,10 +1435,7 @@ CONFIG_DEBUG_MEMORY_INIT=y # CONFIG_FAULT_INJECTION is not set # CONFIG_LATENCYTOP is not set CONFIG_SYSCTL_SYSCALL_CHECK=y -CONFIG_NOP_TRACER=y CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_RING_BUFFER=y -CONFIG_TRACING=y # # Tracers @@ -1540,14 +1446,11 @@ CONFIG_TRACING=y # CONFIG_SCHED_TRACER is not set # CONFIG_CONTEXT_SWITCH_TRACER is not set # CONFIG_BOOT_TRACER is not set -# CONFIG_TRACE_BRANCH_PROFILING is not set # CONFIG_STACK_TRACER is not set -# CONFIG_FTRACE_STARTUP_TEST is not set # CONFIG_DYNAMIC_PRINTK_DEBUG is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set -CONFIG_ARM_UNWIND=y CONFIG_DEBUG_USER=y CONFIG_DEBUG_ERRORS=y # CONFIG_DEBUG_STACK_USAGE is not set @@ -1561,22 +1464,19 @@ CONFIG_DEBUG_LL=y # CONFIG_SECURITY is not set # CONFIG_SECURITYFS is not set # CONFIG_SECURITY_FILE_CAPABILITIES is not set +CONFIG_ASYNC_CORE=y CONFIG_CRYPTO=y # # Crypto core or helper # # CONFIG_CRYPTO_FIPS is not set -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_ALGAPI2=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_ALGAPI=m +CONFIG_CRYPTO_AEAD=m +CONFIG_CRYPTO_BLKCIPHER=m +CONFIG_CRYPTO_HASH=m +CONFIG_CRYPTO_RNG=m +CONFIG_CRYPTO_MANAGER=m # CONFIG_CRYPTO_GF128MUL is not set # CONFIG_CRYPTO_NULL is not set # CONFIG_CRYPTO_CRYPTD is not set @@ -1596,7 +1496,7 @@ CONFIG_CRYPTO_MANAGER2=y CONFIG_CRYPTO_CBC=m # CONFIG_CRYPTO_CTR is not set # CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_ECB=m # CONFIG_CRYPTO_LRW is not set CONFIG_CRYPTO_PCBC=m # CONFIG_CRYPTO_XTS is not set @@ -1610,7 +1510,7 @@ CONFIG_CRYPTO_PCBC=m # # Digest # -CONFIG_CRYPTO_CRC32C=y +# CONFIG_CRYPTO_CRC32C is not set # CONFIG_CRYPTO_MD4 is not set # CONFIG_CRYPTO_MD5 is not set # CONFIG_CRYPTO_MICHAEL_MIC is not set @@ -1627,9 +1527,9 @@ CONFIG_CRYPTO_CRC32C=y # # Ciphers # -CONFIG_CRYPTO_AES=y +# CONFIG_CRYPTO_AES is not set # CONFIG_CRYPTO_ANUBIS is not set -CONFIG_CRYPTO_ARC4=y +# CONFIG_CRYPTO_ARC4 is not set # CONFIG_CRYPTO_BLOWFISH is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAST5 is not set @@ -1660,7 +1560,6 @@ CONFIG_CRYPTO_HW=y # Library routines # CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y CONFIG_CRC_CCITT=y CONFIG_CRC16=y # CONFIG_CRC_T10DIF is not set diff --git a/trunk/arch/arm/configs/lart_defconfig b/trunk/arch/arm/configs/lart_defconfig index 56ae56899d2e..a1cc34f25602 100644 --- a/trunk/arch/arm/configs/lart_defconfig +++ b/trunk/arch/arm/configs/lart_defconfig @@ -87,6 +87,7 @@ CONFIG_ARCH_SA1100=y # CONFIG_SA1100_COLLIE is not set # CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set # CONFIG_SA1100_BADGE4 is not set # CONFIG_SA1100_JORNADA720 is not set # CONFIG_SA1100_HACKKIT is not set diff --git a/trunk/arch/arm/configs/loki_defconfig b/trunk/arch/arm/configs/loki_defconfig index b720fcffbcd4..17da7c3b3d53 100644 --- a/trunk/arch/arm/configs/loki_defconfig +++ b/trunk/arch/arm/configs/loki_defconfig @@ -654,7 +654,7 @@ CONFIG_I2C_MV64XXX=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -675,7 +675,7 @@ CONFIG_SPI_MASTER=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set diff --git a/trunk/arch/arm/configs/magician_defconfig b/trunk/arch/arm/configs/magician_defconfig index 82428c2f234c..4d11678584db 100644 --- a/trunk/arch/arm/configs/magician_defconfig +++ b/trunk/arch/arm/configs/magician_defconfig @@ -1,10 +1,9 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.29-rc3 -# Fri Jan 30 12:42:03 2009 +# Linux kernel version: 2.6.24-rc6 +# Sun Dec 30 13:02:54 2007 # CONFIG_ARM=y -CONFIG_HAVE_PWM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y CONFIG_GENERIC_GPIO=y CONFIG_GENERIC_TIME=y @@ -13,7 +12,6 @@ CONFIG_MMU=y # CONFIG_NO_IOPORT is not set CONFIG_GENERIC_HARDIRQS=y CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y CONFIG_LOCKDEP_SUPPORT=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y CONFIG_HARDIRQS_SW_RESEND=y @@ -23,8 +21,8 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ZONE_DMA=y CONFIG_ARCH_MTD_XIP=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y CONFIG_VECTORS_BASE=0xffff0000 CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" @@ -43,24 +41,16 @@ CONFIG_SYSVIPC_SYSCTL=y # CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set # CONFIG_TASKSTATS is not set +# CONFIG_USER_NS is not set +# CONFIG_PID_NS is not set # CONFIG_AUDIT is not set - -# -# RCU Subsystem -# -CONFIG_CLASSIC_RCU=y -# CONFIG_TREE_RCU is not set -# CONFIG_PREEMPT_RCU is not set -# CONFIG_TREE_RCU_TRACE is not set -# CONFIG_PREEMPT_RCU_TRACE is not set CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 -# CONFIG_GROUP_SCHED is not set # CONFIG_CGROUPS is not set -# CONFIG_SYSFS_DEPRECATED_V2 is not set +# CONFIG_FAIR_GROUP_SCHED is not set +# CONFIG_SYSFS_DEPRECATED is not set # CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set CONFIG_BLK_DEV_INITRD=y CONFIG_INITRAMFS_SOURCE="" CONFIG_CC_OPTIMIZE_FOR_SIZE=y @@ -75,41 +65,31 @@ CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y CONFIG_ELF_CORE=y -CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y CONFIG_ANON_INODES=y CONFIG_EPOLL=y CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y -CONFIG_AIO=y CONFIG_VM_EVENT_COUNTERS=y CONFIG_SLAB=y # CONFIG_SLUB is not set # CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y -# CONFIG_MODULE_FORCE_UNLOAD is not set +CONFIG_MODULE_FORCE_UNLOAD=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y CONFIG_BLOCK=y # CONFIG_LBD is not set # CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set # CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set # # IO Schedulers @@ -123,7 +103,8 @@ CONFIG_IOSCHED_NOOP=y # CONFIG_DEFAULT_CFQ is not set CONFIG_DEFAULT_NOOP=y CONFIG_DEFAULT_IOSCHED="noop" -CONFIG_FREEZER=y +CONFIG_CLASSIC_RCU=y +# CONFIG_PREEMPT_RCU is not set # # System Type @@ -133,7 +114,9 @@ CONFIG_FREEZER=y # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_VERSATILE is not set # CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set # CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EP93XX is not set # CONFIG_ARCH_FOOTBRIDGE is not set @@ -147,58 +130,41 @@ CONFIG_FREEZER=y # CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_IXP4XX is not set # CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_KIRKWOOD is not set # CONFIG_ARCH_KS8695 is not set # CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set # CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_ORION5X is not set # CONFIG_ARCH_PNX4008 is not set CONFIG_ARCH_PXA=y # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set # CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_W90X900 is not set # # Intel PXA2xx/PXA3xx Implementations # -# CONFIG_ARCH_GUMSTIX is not set -# CONFIG_MACH_INTELMOTE2 is not set # CONFIG_ARCH_LUBBOCK is not set # CONFIG_MACH_LOGICPD_PXA270 is not set # CONFIG_MACH_MAINSTONE is not set -# CONFIG_MACH_MP900C is not set # CONFIG_ARCH_PXA_IDP is not set # CONFIG_PXA_SHARPSL is not set -# CONFIG_ARCH_VIPER is not set -# CONFIG_ARCH_PXA_ESERIES is not set -# CONFIG_TRIZEPS_PXA is not set -# CONFIG_MACH_H5000 is not set +# CONFIG_MACH_TRIZEPS4 is not set # CONFIG_MACH_EM_X270 is not set -# CONFIG_MACH_COLIBRI is not set # CONFIG_MACH_ZYLONITE is not set -# CONFIG_MACH_LITTLETON is not set -# CONFIG_MACH_TAVOREVB is not set -# CONFIG_MACH_SAAR is not set # CONFIG_MACH_ARMCORE is not set -# CONFIG_MACH_CM_X300 is not set CONFIG_MACH_MAGICIAN=y -# CONFIG_MACH_MIOA701 is not set -# CONFIG_MACH_PCM027 is not set -# CONFIG_ARCH_PXA_PALM is not set -# CONFIG_PXA_EZX is not set CONFIG_PXA27x=y -CONFIG_PXA_SSP=y -CONFIG_PXA_PWM=y -CONFIG_PXA_HAVE_BOARD_IRQS=y + +# +# Boot options +# + +# +# Power management +# # # Processor Type @@ -207,7 +173,6 @@ CONFIG_CPU_32=y CONFIG_CPU_XSCALE=y CONFIG_CPU_32v5=y CONFIG_CPU_ABRT_EV5T=y -CONFIG_CPU_PABRT_NOIFAR=y CONFIG_CPU_CACHE_VIVT=y CONFIG_CPU_TLB_V4WBI=y CONFIG_CPU_CP15=y @@ -221,7 +186,6 @@ CONFIG_ARM_THUMB=y # CONFIG_OUTER_CACHE is not set CONFIG_IWMMXT=y CONFIG_XSCALE_PMU=y -CONFIG_COMMON_CLKDEV=y # # Bus support @@ -233,33 +197,28 @@ CONFIG_COMMON_CLKDEV=y # # Kernel Features # -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y +# CONFIG_TICK_ONESHOT is not set +# CONFIG_NO_HZ is not set # CONFIG_HIGH_RES_TIMERS is not set CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_PREEMPT=y CONFIG_HZ=100 CONFIG_AEABI=y CONFIG_OABI_COMPAT=y -CONFIG_ARCH_FLATMEM_HAS_HOLES=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set CONFIG_SELECT_MEMORY_MODEL=y CONFIG_FLATMEM_MANUAL=y # CONFIG_DISCONTIGMEM_MANUAL is not set # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set CONFIG_SPLIT_PTLOCK_CPUS=4096 -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 +# CONFIG_RESOURCES_64BIT is not set +CONFIG_ZONE_DMA_FLAG=1 +CONFIG_BOUNCE=y CONFIG_VIRT_TO_BUS=y -CONFIG_UNEVICTABLE_LRU=y CONFIG_ALIGNMENT_TRAP=y # @@ -270,10 +229,9 @@ CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="keepinitrd" # CONFIG_XIP_KERNEL is not set CONFIG_KEXEC=y -CONFIG_ATAGS_PROC=y # -# CPU Power Management +# CPU Frequency scaling # CONFIG_CPU_FREQ=y CONFIG_CPU_FREQ_TABLE=y @@ -281,7 +239,6 @@ CONFIG_CPU_FREQ_TABLE=y CONFIG_CPU_FREQ_STAT=y # CONFIG_CPU_FREQ_STAT_DETAILS is not set CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set @@ -290,7 +247,6 @@ CONFIG_CPU_FREQ_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_GOV_USERSPACE is not set CONFIG_CPU_FREQ_GOV_ONDEMAND=y # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -# CONFIG_CPU_IDLE is not set # # Floating point emulation @@ -307,8 +263,6 @@ CONFIG_FPE_NWFPE=y # Userspace binary formats # CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y # CONFIG_BINFMT_AOUT is not set # CONFIG_BINFMT_MISC is not set @@ -316,18 +270,21 @@ CONFIG_HAVE_AOUT=y # Power management options # CONFIG_PM=y +# CONFIG_PM_LEGACY is not set # CONFIG_PM_DEBUG is not set CONFIG_PM_SLEEP=y +CONFIG_SUSPEND_UP_POSSIBLE=y CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -# CONFIG_APM_EMULATION is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_APM_EMULATION=y + +# +# Networking +# CONFIG_NET=y # # Networking options # -CONFIG_COMPAT_NET_DEV_OPS=y CONFIG_PACKET=y CONFIG_PACKET_MMAP=y CONFIG_UNIX=y @@ -359,15 +316,33 @@ CONFIG_IP_PNP=y CONFIG_TCP_CONG_CUBIC=y CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TCP_MD5SIG is not set +# CONFIG_IP_VS is not set # CONFIG_IPV6 is not set +# CONFIG_INET6_XFRM_TUNNEL is not set +# CONFIG_INET6_TUNNEL is not set # CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set +CONFIG_NETFILTER=y +# CONFIG_NETFILTER_DEBUG is not set + +# +# Core Netfilter Configuration +# +# CONFIG_NETFILTER_NETLINK is not set +# CONFIG_NF_CONNTRACK_ENABLED is not set +# CONFIG_NF_CONNTRACK is not set +# CONFIG_NETFILTER_XTABLES is not set + +# +# IP: Netfilter Configuration +# +# CONFIG_IP_NF_QUEUE is not set +# CONFIG_IP_NF_IPTABLES is not set +# CONFIG_IP_NF_ARPTABLES is not set # CONFIG_IP_DCCP is not set # CONFIG_IP_SCTP is not set # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set # CONFIG_LLC2 is not set @@ -378,7 +353,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set # CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set # # Network testing @@ -416,17 +390,20 @@ CONFIG_IRTTY_SIR=m # Dongle support # # CONFIG_DONGLE is not set -# CONFIG_KINGSUN_DONGLE is not set -# CONFIG_KSDAZZLE_DONGLE is not set -# CONFIG_KS959_DONGLE is not set + +# +# Old SIR device drivers +# +# CONFIG_IRPORT_SIR is not set + +# +# Old Serial dongle support +# # # FIR device drivers # -# CONFIG_USB_IRDA is not set -# CONFIG_SIGMATEL_FIR is not set CONFIG_PXA_FICP=m -# CONFIG_MCS_FIR is not set CONFIG_BT=m CONFIG_BT_L2CAP=m CONFIG_BT_SCO=m @@ -440,17 +417,17 @@ CONFIG_BT_HIDP=m # # Bluetooth device drivers # -CONFIG_BT_HCIBTUSB=m -# CONFIG_BT_HCIBTSDIO is not set # CONFIG_BT_HCIUART is not set -# CONFIG_BT_HCIBCM203X is not set -# CONFIG_BT_HCIBPA10X is not set -# CONFIG_BT_HCIBFUSB is not set # CONFIG_BT_HCIVHCI is not set # CONFIG_AF_RXRPC is not set -# CONFIG_PHONET is not set -# CONFIG_WIRELESS is not set -# CONFIG_WIMAX is not set + +# +# Wireless +# +# CONFIG_CFG80211 is not set +# CONFIG_WIRELESS_EXT is not set +# CONFIG_MAC80211 is not set +# CONFIG_IEEE80211 is not set # CONFIG_RFKILL is not set # CONFIG_NET_9P is not set @@ -465,28 +442,25 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" CONFIG_STANDALONE=y CONFIG_PREVENT_FIRMWARE_BUILD=y CONFIG_FW_LOADER=y -# CONFIG_FIRMWARE_IN_KERNEL is not set -CONFIG_EXTRA_FIRMWARE="" # CONFIG_DEBUG_DRIVER is not set # CONFIG_DEBUG_DEVRES is not set # CONFIG_SYS_HYPERVISOR is not set # CONFIG_CONNECTOR is not set CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set +CONFIG_MTD_DEBUG=y +CONFIG_MTD_DEBUG_VERBOSE=0 # CONFIG_MTD_CONCAT is not set CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_TESTS is not set # CONFIG_MTD_REDBOOT_PARTS is not set CONFIG_MTD_CMDLINE_PARTS=y # CONFIG_MTD_AFS_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set # # User Modules And Translation Layers # -CONFIG_MTD_CHAR=y -CONFIG_MTD_BLKDEVS=y -CONFIG_MTD_BLOCK=y +CONFIG_MTD_CHAR=m +CONFIG_MTD_BLKDEVS=m +CONFIG_MTD_BLOCK=m # CONFIG_FTL is not set # CONFIG_NFTL is not set # CONFIG_INFTL is not set @@ -499,7 +473,6 @@ CONFIG_MTD_BLOCK=y # CONFIG_MTD_CFI=y # CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y # CONFIG_MTD_CFI_ADV_OPTIONS is not set CONFIG_MTD_MAP_BANK_WIDTH_1=y CONFIG_MTD_MAP_BANK_WIDTH_2=y @@ -514,7 +487,6 @@ CONFIG_MTD_CFI_I2=y CONFIG_MTD_CFI_INTELEXT=y # CONFIG_MTD_CFI_AMDSTD is not set # CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y # CONFIG_MTD_RAM is not set # CONFIG_MTD_ROM is not set # CONFIG_MTD_ABSENT is not set @@ -525,7 +497,9 @@ CONFIG_MTD_CFI_UTIL=y # # CONFIG_MTD_COMPLEX_MAPPINGS is not set CONFIG_MTD_PHYSMAP=y -# CONFIG_MTD_PHYSMAP_COMPAT is not set +CONFIG_MTD_PHYSMAP_START=0x00000000 +CONFIG_MTD_PHYSMAP_LEN=0x04000000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=4 # CONFIG_MTD_PXA2XX is not set # CONFIG_MTD_ARM_INTEGRATOR is not set # CONFIG_MTD_SHARP_SL is not set @@ -548,12 +522,6 @@ CONFIG_MTD_PHYSMAP=y # CONFIG_MTD_NAND is not set # CONFIG_MTD_ONENAND is not set -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set -# CONFIG_MTD_QINFO_PROBE is not set - # # UBI - Unsorted block images # @@ -563,12 +531,10 @@ CONFIG_BLK_DEV=y # CONFIG_BLK_DEV_COW_COMMON is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set -# CONFIG_BLK_DEV_UB is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set # CONFIG_MISC_DEVICES is not set -CONFIG_HAVE_IDE=y # CONFIG_IDE is not set # @@ -581,6 +547,7 @@ CONFIG_HAVE_IDE=y # CONFIG_ATA is not set # CONFIG_MD is not set CONFIG_NETDEVICES=y +# CONFIG_NETDEVICES_MULTIQUEUE is not set # CONFIG_DUMMY is not set # CONFIG_BONDING is not set # CONFIG_MACVLAN is not set @@ -596,20 +563,6 @@ CONFIG_NETDEVICES=y # # CONFIG_WLAN_PRE80211 is not set # CONFIG_WLAN_80211 is not set -# CONFIG_IWLWIFI_LEDS is not set - -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set # CONFIG_WAN is not set CONFIG_PPP=m # CONFIG_PPP_MULTILINK is not set @@ -659,26 +612,7 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_FUJITSU is not set -# CONFIG_TOUCHSCREEN_GUNZE is not set -# CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set -# CONFIG_TOUCHSCREEN_MTOUCH is not set -# CONFIG_TOUCHSCREEN_INEXIO is not set -# CONFIG_TOUCHSCREEN_MK712 is not set -# CONFIG_TOUCHSCREEN_PENMOUNT is not set -# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set -# CONFIG_TOUCHSCREEN_TOUCHWIN is not set -# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set -# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set CONFIG_INPUT_MISC=y -# CONFIG_INPUT_ATI_REMOTE is not set -# CONFIG_INPUT_ATI_REMOTE2 is not set -# CONFIG_INPUT_KEYSPAN_REMOTE is not set -# CONFIG_INPUT_POWERMATE is not set -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INPUT_CM109 is not set CONFIG_INPUT_UINPUT=m # @@ -691,11 +625,9 @@ CONFIG_INPUT_UINPUT=m # Character devices # CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y # CONFIG_VT_HW_CONSOLE_BINDING is not set -# CONFIG_DEVKMEM is not set # CONFIG_SERIAL_NONSTANDARD is not set # @@ -710,7 +642,6 @@ CONFIG_SERIAL_PXA=y # CONFIG_SERIAL_PXA_CONSOLE is not set CONFIG_SERIAL_CORE=y CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set # CONFIG_LEGACY_PTYS is not set # CONFIG_IPMI_HANDLER is not set # CONFIG_HW_RANDOM is not set @@ -718,45 +649,37 @@ CONFIG_UNIX98_PTYS=y # CONFIG_R3964 is not set # CONFIG_RAW_DRIVER is not set # CONFIG_TCG_TPM is not set -CONFIG_I2C=y +CONFIG_I2C=m CONFIG_I2C_BOARDINFO=y CONFIG_I2C_CHARDEV=m -CONFIG_I2C_HELPER_AUTO=y # -# I2C Hardware Bus support +# I2C Algorithms # +# CONFIG_I2C_ALGOBIT is not set +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set # -# I2C system bus drivers (mostly embedded / system-on-chip) +# I2C Hardware Bus support # # CONFIG_I2C_GPIO is not set -# CONFIG_I2C_OCORES is not set -CONFIG_I2C_PXA=y +CONFIG_I2C_PXA=m # CONFIG_I2C_PXA_SLAVE is not set -# CONFIG_I2C_SIMTEC is not set - -# -# External I2C/SMBus adapter drivers -# +# CONFIG_I2C_OCORES is not set # CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set # CONFIG_I2C_TAOS_EVM is not set -# CONFIG_I2C_TINY_USB is not set - -# -# Other I2C/SMBus bus drivers -# -# CONFIG_I2C_PCA_PLATFORM is not set # CONFIG_I2C_STUB is not set # # Miscellaneous I2C Chip support # +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set -# CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_SENSORS_MAX6875 is not set @@ -765,39 +688,19 @@ CONFIG_I2C_PXA=y # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # CONFIG_I2C_DEBUG_CHIP is not set -# CONFIG_SPI is not set -CONFIG_ARCH_REQUIRE_GPIOLIB=y -CONFIG_GPIOLIB=y -# CONFIG_DEBUG_GPIO is not set -# CONFIG_GPIO_SYSFS is not set - -# -# Memory mapped GPIO expanders: -# - -# -# I2C GPIO expanders: -# -# CONFIG_GPIO_MAX732X is not set -# CONFIG_GPIO_PCA953X is not set -# CONFIG_GPIO_PCF857X is not set # -# PCI GPIO expanders: -# - -# -# SPI GPIO expanders: +# SPI support # +# CONFIG_SPI is not set +# CONFIG_SPI_MASTER is not set CONFIG_W1=y # # 1-wire Bus Masters # -# CONFIG_W1_MASTER_DS2490 is not set # CONFIG_W1_MASTER_DS2482 is not set CONFIG_W1_MASTER_DS1WM=y -# CONFIG_W1_MASTER_GPIO is not set # # 1-wire Slaves @@ -806,56 +709,32 @@ CONFIG_W1_MASTER_DS1WM=y # CONFIG_W1_SLAVE_SMEM is not set # CONFIG_W1_SLAVE_DS2433 is not set CONFIG_W1_SLAVE_DS2760=y -# CONFIG_W1_SLAVE_BQ27000 is not set CONFIG_POWER_SUPPLY=y # CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_PDA_POWER=y +# CONFIG_APM_POWER is not set CONFIG_BATTERY_DS2760=y -# CONFIG_BATTERY_BQ27x00 is not set # CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -# CONFIG_THERMAL_HWMON is not set # CONFIG_WATCHDOG is not set -CONFIG_SSB_POSSIBLE=y # # Sonics Silicon Backplane # +CONFIG_SSB_POSSIBLE=y # CONFIG_SSB is not set # # Multifunction device drivers # -# CONFIG_MFD_CORE is not set # CONFIG_MFD_SM501 is not set -# CONFIG_MFD_ASIC3 is not set CONFIG_HTC_EGPIO=y CONFIG_HTC_PASIC3=y -# CONFIG_TPS65010 is not set -# CONFIG_TWL4030_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MFD_T7L66XB is not set -# CONFIG_MFD_TC6387XB is not set -# CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set # # Multimedia devices # - -# -# Multimedia core support -# # CONFIG_VIDEO_DEV is not set # CONFIG_DVB_CORE is not set -# CONFIG_VIDEO_MEDIA is not set - -# -# Multimedia drivers -# # CONFIG_DAB is not set # @@ -866,7 +745,6 @@ CONFIG_HTC_PASIC3=y CONFIG_FB=y # CONFIG_FIRMWARE_EDID is not set # CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y @@ -874,8 +752,8 @@ CONFIG_FB_CFB_IMAGEBLIT=y # CONFIG_FB_SYS_FILLRECT is not set # CONFIG_FB_SYS_COPYAREA is not set # CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set # CONFIG_FB_SYS_FOPS is not set +CONFIG_FB_DEFERRED_IO=y # CONFIG_FB_SVGALIB is not set # CONFIG_FB_MACMODES is not set # CONFIG_FB_BACKLIGHT is not set @@ -887,21 +765,13 @@ CONFIG_FB_CFB_IMAGEBLIT=y # # CONFIG_FB_S1D13XXX is not set CONFIG_FB_PXA=y -CONFIG_FB_PXA_OVERLAY=y -# CONFIG_FB_PXA_SMARTPANEL is not set # CONFIG_FB_PXA_PARAMETERS is not set # CONFIG_FB_MBX is not set -# CONFIG_FB_W100 is not set # CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_LCD_CLASS_DEVICE=y -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_PLATFORM is not set CONFIG_BACKLIGHT_CLASS_DEVICE=y -# CONFIG_BACKLIGHT_GENERIC is not set -CONFIG_BACKLIGHT_PWM=y +CONFIG_BACKLIGHT_CORGI=y # # Display device support @@ -932,8 +802,15 @@ CONFIG_FONT_MINI_4x6=y # CONFIG_FONT_SUN12x22 is not set # CONFIG_FONT_10x18 is not set # CONFIG_LOGO is not set + +# +# Sound +# CONFIG_SOUND=y -CONFIG_SOUND_OSS_CORE=y + +# +# Advanced Linux Sound Architecture +# CONFIG_SND=m CONFIG_SND_TIMER=m CONFIG_SND_PCM=m @@ -947,185 +824,53 @@ CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set # CONFIG_SND_DEBUG is not set -CONFIG_SND_DRIVERS=y + +# +# Generic devices +# # CONFIG_SND_DUMMY is not set # CONFIG_SND_MTPAV is not set # CONFIG_SND_SERIAL_U16550 is not set # CONFIG_SND_MPU401 is not set -# CONFIG_SND_ARM is not set -CONFIG_SND_PXA2XX_LIB=m -# CONFIG_SND_USB is not set + +# +# ALSA ARM devices +# +# CONFIG_SND_PXA2XX_AC97 is not set + +# +# System on Chip audio support +# CONFIG_SND_SOC=m CONFIG_SND_PXA2XX_SOC=m -CONFIG_SND_SOC_I2C_AND_SPI=m -# CONFIG_SND_SOC_ALL_CODECS is not set + +# +# SoC Audio support for SuperH +# + +# +# Open Sound System +# # CONFIG_SOUND_PRIME is not set # CONFIG_HID_SUPPORT is not set CONFIG_HID=m -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -# CONFIG_USB_ARCH_HAS_EHCI is not set -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_SUSPEND is not set -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -CONFIG_USB_MON=m -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -# CONFIG_USB_OXU210HP_HCD is not set -# CONFIG_USB_ISP116X_HCD is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_HWA_HCD is not set -# CONFIG_USB_MUSB_HDRC is not set -# CONFIG_USB_GADGET_MUSB_HDRC is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; -# - -# -# see USB_STORAGE Help for more information -# -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGET is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set -CONFIG_USB_GADGET=y -# CONFIG_USB_GADGET_DEBUG is not set -# CONFIG_USB_GADGET_DEBUG_FILES is not set -CONFIG_USB_GADGET_VBUS_DRAW=500 -CONFIG_USB_GADGET_SELECTED=y -# CONFIG_USB_GADGET_AT91 is not set -# CONFIG_USB_GADGET_ATMEL_USBA is not set -# CONFIG_USB_GADGET_FSL_USB2 is not set -# CONFIG_USB_GADGET_LH7A40X is not set -# CONFIG_USB_GADGET_OMAP is not set -# CONFIG_USB_GADGET_PXA25X is not set -CONFIG_USB_GADGET_PXA27X=y -CONFIG_USB_PXA27X=y -# CONFIG_USB_GADGET_S3C2410 is not set -# CONFIG_USB_GADGET_IMX is not set -# CONFIG_USB_GADGET_M66592 is not set -# CONFIG_USB_GADGET_AMD5536UDC is not set -# CONFIG_USB_GADGET_FSL_QE is not set -# CONFIG_USB_GADGET_CI13XXX is not set -# CONFIG_USB_GADGET_NET2280 is not set -# CONFIG_USB_GADGET_GOKU is not set -# CONFIG_USB_GADGET_DUMMY_HCD is not set -# CONFIG_USB_GADGET_DUALSPEED is not set -# CONFIG_USB_ZERO is not set -CONFIG_USB_ETH=m -# CONFIG_USB_ETH_RNDIS is not set -CONFIG_USB_GADGETFS=m -CONFIG_USB_FILE_STORAGE=m -# CONFIG_USB_FILE_STORAGE_TEST is not set -CONFIG_USB_G_SERIAL=m -# CONFIG_USB_MIDI_GADGET is not set -# CONFIG_USB_G_PRINTER is not set -CONFIG_USB_CDC_COMPOSITE=m - -# -# OTG and related infrastructure -# -CONFIG_USB_OTG_UTILS=y -CONFIG_USB_GPIO_VBUS=y +# CONFIG_USB_SUPPORT is not set CONFIG_MMC=y # CONFIG_MMC_DEBUG is not set # CONFIG_MMC_UNSAFE_RESUME is not set # -# MMC/SD/SDIO Card Drivers +# MMC/SD Card Drivers # CONFIG_MMC_BLOCK=y CONFIG_MMC_BLOCK_BOUNCE=y CONFIG_SDIO_UART=m -# CONFIG_MMC_TEST is not set # -# MMC/SD/SDIO Host Controller Drivers +# MMC/SD Host Controller Drivers # CONFIG_MMC_PXA=y -# CONFIG_MMC_SDHCI is not set -# CONFIG_MEMSTICK is not set -# CONFIG_ACCESSIBILITY is not set CONFIG_NEW_LEDS=y -CONFIG_LEDS_CLASS=y - -# -# LED drivers -# -# CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=y -# CONFIG_LEDS_PCA955X is not set - -# -# LED Triggers -# -CONFIG_LEDS_TRIGGERS=y -# CONFIG_LEDS_TRIGGER_TIMER is not set -# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set -CONFIG_LEDS_TRIGGER_BACKLIGHT=y -# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y CONFIG_RTC_HCTOSYS=y @@ -1154,9 +899,6 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_PCF8563 is not set # CONFIG_RTC_DRV_PCF8583 is not set # CONFIG_RTC_DRV_M41T80 is not set -# CONFIG_RTC_DRV_S35390A is not set -# CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set # # SPI RTC drivers @@ -1166,26 +908,17 @@ CONFIG_RTC_INTF_DEV=y # Platform RTC drivers # # CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set # CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set # CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_DS1742 is not set # CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set # CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_BQ4802 is not set # CONFIG_RTC_DRV_V3020 is not set # # on-CPU RTC drivers # CONFIG_RTC_DRV_SA1100=y -# CONFIG_RTC_DRV_PXA is not set -# CONFIG_DMADEVICES is not set -# CONFIG_REGULATOR is not set -# CONFIG_UIO is not set -# CONFIG_STAGING is not set # # File systems @@ -1194,18 +927,19 @@ CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set # CONFIG_EXT2_FS_XIP is not set # CONFIG_EXT3_FS is not set -# CONFIG_EXT4_FS is not set +# CONFIG_EXT4DEV_FS is not set # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set -CONFIG_FILE_LOCKING=y # CONFIG_XFS_FS is not set +# CONFIG_GFS2_FS is not set # CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set -CONFIG_DNOTIFY=y +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y # CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set # CONFIG_FUSE_FS is not set @@ -1231,13 +965,15 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_PROC_FS=y CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set # CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y + +# +# Miscellaneous filesystems +# # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set @@ -1261,13 +997,9 @@ CONFIG_JFFS2_CMODE_PRIORITY=y # CONFIG_JFFS2_CMODE_SIZE is not set # CONFIG_JFFS2_CMODE_FAVOURLZO is not set # CONFIG_CRAMFS is not set -# CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set CONFIG_NETWORK_FILESYSTEMS=y @@ -1275,13 +1007,14 @@ CONFIG_NFS_FS=y CONFIG_NFS_V3=y # CONFIG_NFS_V3_ACL is not set # CONFIG_NFS_V4 is not set -CONFIG_ROOT_NFS=y +# CONFIG_NFS_DIRECTIO is not set # CONFIG_NFSD is not set +CONFIG_ROOT_NFS=y CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y -# CONFIG_SUNRPC_REGISTER_V4 is not set +# CONFIG_SUNRPC_BIND34 is not set # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set @@ -1343,7 +1076,6 @@ CONFIG_NLS_UTF8=y CONFIG_PRINTK_TIME=y CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 # CONFIG_MAGIC_SYSRQ is not set # CONFIG_UNUSED_SYMBOLS is not set # CONFIG_DEBUG_FS is not set @@ -1351,18 +1083,15 @@ CONFIG_FRAME_WARN=1024 CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_SHIRQ is not set CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 # CONFIG_SCHED_DEBUG is not set # CONFIG_SCHEDSTATS is not set CONFIG_TIMER_STATS=y -# CONFIG_DEBUG_OBJECTS is not set # CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_PREEMPT=y # CONFIG_DEBUG_RT_MUTEXES is not set # CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set +CONFIG_DEBUG_MUTEXES=y # CONFIG_DEBUG_LOCK_ALLOC is not set # CONFIG_PROVE_LOCKING is not set # CONFIG_LOCK_STAT is not set @@ -1371,41 +1100,17 @@ CONFIG_TIMER_STATS=y # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -# CONFIG_DEBUG_MEMORY_INIT is not set +CONFIG_DEBUG_VM=y # CONFIG_DEBUG_LIST is not set # CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set CONFIG_FRAME_POINTER=y +CONFIG_FORCED_INLINING=y # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -CONFIG_HAVE_FUNCTION_TRACER=y - -# -# Tracers -# -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_IRQSOFF_TRACER is not set -# CONFIG_PREEMPT_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_CONTEXT_SWITCH_TRACER is not set -# CONFIG_BOOT_TRACER is not set -# CONFIG_TRACE_BRANCH_PROFILING is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_DYNAMIC_PRINTK_DEBUG is not set # CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set CONFIG_DEBUG_USER=y CONFIG_DEBUG_ERRORS=y -# CONFIG_DEBUG_STACK_USAGE is not set CONFIG_DEBUG_LL=y # CONFIG_DEBUG_ICEDCC is not set @@ -1414,110 +1119,55 @@ CONFIG_DEBUG_LL=y # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set # CONFIG_SECURITY_FILE_CAPABILITIES is not set CONFIG_CRYPTO=y - -# -# Crypto core or helper -# -# CONFIG_CRYPTO_FIPS is not set CONFIG_CRYPTO_ALGAPI=m -CONFIG_CRYPTO_ALGAPI2=m -CONFIG_CRYPTO_AEAD2=m CONFIG_CRYPTO_BLKCIPHER=m -CONFIG_CRYPTO_BLKCIPHER2=m -CONFIG_CRYPTO_HASH=m -CONFIG_CRYPTO_HASH2=m -CONFIG_CRYPTO_RNG2=m CONFIG_CRYPTO_MANAGER=m -CONFIG_CRYPTO_MANAGER2=m -# CONFIG_CRYPTO_GF128MUL is not set -# CONFIG_CRYPTO_NULL is not set -# CONFIG_CRYPTO_CRYPTD is not set -# CONFIG_CRYPTO_AUTHENC is not set -# CONFIG_CRYPTO_TEST is not set - -# -# Authenticated Encryption with Associated Data -# -# CONFIG_CRYPTO_CCM is not set -# CONFIG_CRYPTO_GCM is not set -# CONFIG_CRYPTO_SEQIV is not set - -# -# Block modes -# -# CONFIG_CRYPTO_CBC is not set -# CONFIG_CRYPTO_CTR is not set -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=m -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_PCBC is not set -# CONFIG_CRYPTO_XTS is not set - -# -# Hash modes -# # CONFIG_CRYPTO_HMAC is not set # CONFIG_CRYPTO_XCBC is not set - -# -# Digest -# -# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_NULL is not set # CONFIG_CRYPTO_MD4 is not set # CONFIG_CRYPTO_MD5 is not set -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD128 is not set -# CONFIG_CRYPTO_RMD160 is not set -# CONFIG_CRYPTO_RMD256 is not set -# CONFIG_CRYPTO_RMD320 is not set CONFIG_CRYPTO_SHA1=m # CONFIG_CRYPTO_SHA256 is not set # CONFIG_CRYPTO_SHA512 is not set -# CONFIG_CRYPTO_TGR192 is not set # CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers -# -# CONFIG_CRYPTO_AES is not set -# CONFIG_CRYPTO_ANUBIS is not set -CONFIG_CRYPTO_ARC4=m +# CONFIG_CRYPTO_TGR192 is not set +# CONFIG_CRYPTO_GF128MUL is not set +CONFIG_CRYPTO_ECB=m +# CONFIG_CRYPTO_CBC is not set +CONFIG_CRYPTO_PCBC=m +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_XTS is not set +# CONFIG_CRYPTO_CRYPTD is not set +# CONFIG_CRYPTO_DES is not set +# CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_BLOWFISH is not set -# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TWOFISH is not set +# CONFIG_CRYPTO_SERPENT is not set +# CONFIG_CRYPTO_AES is not set # CONFIG_CRYPTO_CAST5 is not set # CONFIG_CRYPTO_CAST6 is not set -# CONFIG_CRYPTO_DES is not set -# CONFIG_CRYPTO_FCRYPT is not set +# CONFIG_CRYPTO_TEA is not set +CONFIG_CRYPTO_ARC4=m # CONFIG_CRYPTO_KHAZAD is not set -# CONFIG_CRYPTO_SALSA20 is not set +# CONFIG_CRYPTO_ANUBIS is not set # CONFIG_CRYPTO_SEED is not set -# CONFIG_CRYPTO_SERPENT is not set -# CONFIG_CRYPTO_TEA is not set -# CONFIG_CRYPTO_TWOFISH is not set - -# -# Compression -# # CONFIG_CRYPTO_DEFLATE is not set -# CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set +# CONFIG_CRYPTO_MICHAEL_MIC is not set +# CONFIG_CRYPTO_CRC32C is not set +# CONFIG_CRYPTO_CAMELLIA is not set +# CONFIG_CRYPTO_TEST is not set +# CONFIG_CRYPTO_AUTHENC is not set # CONFIG_CRYPTO_HW is not set # # Library routines # CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y CONFIG_CRC_CCITT=y # CONFIG_CRC16 is not set -# CONFIG_CRC_T10DIF is not set # CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y # CONFIG_CRC7 is not set diff --git a/trunk/arch/arm/configs/msm_defconfig b/trunk/arch/arm/configs/msm_defconfig index cc3b06ee24f9..3b4ecf2a90dd 100644 --- a/trunk/arch/arm/configs/msm_defconfig +++ b/trunk/arch/arm/configs/msm_defconfig @@ -580,7 +580,7 @@ CONFIG_I2C_MSM=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set CONFIG_SENSORS_PCA9633=y diff --git a/trunk/arch/arm/configs/mv78xx0_defconfig b/trunk/arch/arm/configs/mv78xx0_defconfig index b0698722e0cb..d38ebf8721a4 100644 --- a/trunk/arch/arm/configs/mv78xx0_defconfig +++ b/trunk/arch/arm/configs/mv78xx0_defconfig @@ -165,7 +165,6 @@ CONFIG_ARCH_MV78XX0=y # Marvell MV78xx0 Implementations # CONFIG_MACH_DB78X00_BP=y -CONFIG_MACH_RD78X00_MASA=y # # Boot options @@ -833,7 +832,7 @@ CONFIG_I2C_MV64XXX=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/n770_defconfig b/trunk/arch/arm/configs/n770_defconfig index 672f6db06a52..568ef1770d5f 100644 --- a/trunk/arch/arm/configs/n770_defconfig +++ b/trunk/arch/arm/configs/n770_defconfig @@ -767,7 +767,7 @@ CONFIG_I2C_OMAP=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -798,7 +798,7 @@ CONFIG_SPI_OMAP_UWIRE=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_TSC2101 is not set # CONFIG_SPI_TSC2102 is not set # CONFIG_SPI_TSC210X is not set diff --git a/trunk/arch/arm/configs/neocore926_defconfig b/trunk/arch/arm/configs/neocore926_defconfig index e0e4e98b5aa2..325f1e105f69 100644 --- a/trunk/arch/arm/configs/neocore926_defconfig +++ b/trunk/arch/arm/configs/neocore926_defconfig @@ -774,8 +774,8 @@ CONFIG_I2C_CHARDEV=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set @@ -798,7 +798,7 @@ CONFIG_SPI_ATMEL=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set diff --git a/trunk/arch/arm/configs/neponset_defconfig b/trunk/arch/arm/configs/neponset_defconfig index 36cd62edd05c..92ccdc6492f7 100644 --- a/trunk/arch/arm/configs/neponset_defconfig +++ b/trunk/arch/arm/configs/neponset_defconfig @@ -91,6 +91,7 @@ CONFIG_ASSABET_NEPONSET=y # CONFIG_SA1100_COLLIE is not set # CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set # CONFIG_SA1100_BADGE4 is not set # CONFIG_SA1100_JORNADA720 is not set # CONFIG_SA1100_HACKKIT is not set @@ -736,7 +737,7 @@ CONFIG_I2C_ALGOBIT=y # # Other I2C Chip support # -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCF8591 is not set # CONFIG_SENSORS_RTC8564 is not set diff --git a/trunk/arch/arm/configs/omap3_beagle_defconfig b/trunk/arch/arm/configs/omap3_beagle_defconfig index 4c6fb7e959df..e042d27eae16 100644 --- a/trunk/arch/arm/configs/omap3_beagle_defconfig +++ b/trunk/arch/arm/configs/omap3_beagle_defconfig @@ -687,8 +687,8 @@ CONFIG_I2C_OMAP=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set diff --git a/trunk/arch/arm/configs/omap3_pandora_defconfig b/trunk/arch/arm/configs/omap3_pandora_defconfig index b54ad2e2da36..09543f4de5bc 100644 --- a/trunk/arch/arm/configs/omap3_pandora_defconfig +++ b/trunk/arch/arm/configs/omap3_pandora_defconfig @@ -713,8 +713,8 @@ CONFIG_I2C_OMAP=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set @@ -740,7 +740,7 @@ CONFIG_SPI_OMAP24XX=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set CONFIG_ARCH_REQUIRE_GPIOLIB=y diff --git a/trunk/arch/arm/configs/omap_2430sdp_defconfig b/trunk/arch/arm/configs/omap_2430sdp_defconfig index 640e9afc4630..b0617c0da2a1 100644 --- a/trunk/arch/arm/configs/omap_2430sdp_defconfig +++ b/trunk/arch/arm/configs/omap_2430sdp_defconfig @@ -710,7 +710,7 @@ CONFIG_I2C_OMAP=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -743,7 +743,7 @@ CONFIG_SPI_MASTER=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_TSC2101 is not set # CONFIG_SPI_TSC2102 is not set # CONFIG_SPI_TSC210X is not set diff --git a/trunk/arch/arm/configs/omap_apollon_2420_defconfig b/trunk/arch/arm/configs/omap_apollon_2420_defconfig index ac7adf34c54a..bb39dfc72d69 100644 --- a/trunk/arch/arm/configs/omap_apollon_2420_defconfig +++ b/trunk/arch/arm/configs/omap_apollon_2420_defconfig @@ -612,7 +612,7 @@ CONFIG_SPI_OMAP24XX=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_TSC2101 is not set # CONFIG_SPI_TSC2102 is not set # CONFIG_SPI_TSC210X is not set diff --git a/trunk/arch/arm/configs/omap_generic_1510_defconfig b/trunk/arch/arm/configs/omap_generic_1510_defconfig index ccdc661b5856..4b1c252f2091 100644 --- a/trunk/arch/arm/configs/omap_generic_1510_defconfig +++ b/trunk/arch/arm/configs/omap_generic_1510_defconfig @@ -637,7 +637,7 @@ CONFIG_I2C_ALGOBIT=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/omap_generic_1610_defconfig b/trunk/arch/arm/configs/omap_generic_1610_defconfig index 0c42c8955047..fc66f019d56c 100644 --- a/trunk/arch/arm/configs/omap_generic_1610_defconfig +++ b/trunk/arch/arm/configs/omap_generic_1610_defconfig @@ -641,7 +641,7 @@ CONFIG_I2C_ALGOBIT=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/omap_h2_1610_defconfig b/trunk/arch/arm/configs/omap_h2_1610_defconfig index 74dbdc644d32..c03507202f3c 100644 --- a/trunk/arch/arm/configs/omap_h2_1610_defconfig +++ b/trunk/arch/arm/configs/omap_h2_1610_defconfig @@ -700,7 +700,7 @@ CONFIG_I2C_OMAP=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -731,7 +731,7 @@ CONFIG_SPI_OMAP_UWIRE=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set CONFIG_SPI_TSC2101=y # CONFIG_SPI_TSC2102 is not set # CONFIG_SPI_TSC210X is not set diff --git a/trunk/arch/arm/configs/omap_h4_2420_defconfig b/trunk/arch/arm/configs/omap_h4_2420_defconfig index a4aab8e4c29b..5bc89185a64f 100644 --- a/trunk/arch/arm/configs/omap_h4_2420_defconfig +++ b/trunk/arch/arm/configs/omap_h4_2420_defconfig @@ -681,7 +681,7 @@ CONFIG_I2C_OMAP=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/omap_innovator_1510_defconfig b/trunk/arch/arm/configs/omap_innovator_1510_defconfig index 0cfe363e3365..55b2611bd90a 100644 --- a/trunk/arch/arm/configs/omap_innovator_1510_defconfig +++ b/trunk/arch/arm/configs/omap_innovator_1510_defconfig @@ -631,7 +631,7 @@ CONFIG_I2C_BOARDINFO=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/omap_ldp_defconfig b/trunk/arch/arm/configs/omap_ldp_defconfig index aa9d34feddc6..b77d054169ee 100644 --- a/trunk/arch/arm/configs/omap_ldp_defconfig +++ b/trunk/arch/arm/configs/omap_ldp_defconfig @@ -629,8 +629,8 @@ CONFIG_I2C_OMAP=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set @@ -656,7 +656,7 @@ CONFIG_SPI_OMAP24XX=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set CONFIG_ARCH_REQUIRE_GPIOLIB=y diff --git a/trunk/arch/arm/configs/omap_osk_5912_defconfig b/trunk/arch/arm/configs/omap_osk_5912_defconfig index 6b3b5c610da0..b68e0144cab5 100644 --- a/trunk/arch/arm/configs/omap_osk_5912_defconfig +++ b/trunk/arch/arm/configs/omap_osk_5912_defconfig @@ -711,7 +711,7 @@ CONFIG_I2C_OMAP=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/onearm_defconfig b/trunk/arch/arm/configs/onearm_defconfig index f8701fadb600..418ca2febbe3 100644 --- a/trunk/arch/arm/configs/onearm_defconfig +++ b/trunk/arch/arm/configs/onearm_defconfig @@ -698,7 +698,7 @@ CONFIG_I2C_CHARDEV=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/orion5x_defconfig b/trunk/arch/arm/configs/orion5x_defconfig index 020e6a8a9e5c..b2456ca544c9 100644 --- a/trunk/arch/arm/configs/orion5x_defconfig +++ b/trunk/arch/arm/configs/orion5x_defconfig @@ -481,7 +481,7 @@ CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_CAFE is not set # CONFIG_MTD_NAND_NANDSIM is not set -CONFIG_MTD_NAND_PLATFORM=y +# CONFIG_MTD_NAND_PLATFORM is not set # CONFIG_MTD_ALAUDA is not set CONFIG_MTD_NAND_ORION=y # CONFIG_MTD_ONENAND is not set @@ -886,8 +886,8 @@ CONFIG_I2C_MV64XXX=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set @@ -1177,7 +1177,7 @@ CONFIG_RTC_DRV_S35390A=y # CONFIG_RTC_DRV_DS1553 is not set # CONFIG_RTC_DRV_DS1742 is not set # CONFIG_RTC_DRV_STK17TA8 is not set -CONFIG_RTC_DRV_M48T86=y +# CONFIG_RTC_DRV_M48T86 is not set # CONFIG_RTC_DRV_M48T59 is not set # CONFIG_RTC_DRV_V3020 is not set diff --git a/trunk/arch/arm/configs/overo_defconfig b/trunk/arch/arm/configs/overo_defconfig index a57f9e4124fa..49200967a153 100644 --- a/trunk/arch/arm/configs/overo_defconfig +++ b/trunk/arch/arm/configs/overo_defconfig @@ -858,8 +858,8 @@ CONFIG_I2C_OMAP=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_AT24 is not set -CONFIG_EEPROM_LEGACY=y +# CONFIG_AT24 is not set +CONFIG_SENSORS_EEPROM=y # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set @@ -885,7 +885,7 @@ CONFIG_SPI_OMAP24XX=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set CONFIG_ARCH_REQUIRE_GPIOLIB=y diff --git a/trunk/arch/arm/configs/palmz71_defconfig b/trunk/arch/arm/configs/palmz71_defconfig index 08e14068fff7..6361922e71c1 100644 --- a/trunk/arch/arm/configs/palmz71_defconfig +++ b/trunk/arch/arm/configs/palmz71_defconfig @@ -554,7 +554,7 @@ CONFIG_SPI_OMAP_UWIRE=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_TSC2101 is not set # CONFIG_SPI_TSC2102 is not set # CONFIG_SPI_TSC210X is not set diff --git a/trunk/arch/arm/configs/palmz72_defconfig b/trunk/arch/arm/configs/palmz72_defconfig index a0dc37c05dea..3245f8f33e0a 100644 --- a/trunk/arch/arm/configs/palmz72_defconfig +++ b/trunk/arch/arm/configs/palmz72_defconfig @@ -527,8 +527,8 @@ CONFIG_I2C_PXA=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set @@ -552,7 +552,7 @@ CONFIG_SPI_MASTER=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set CONFIG_SPI_SPIDEV=y # CONFIG_SPI_TLE62X0 is not set CONFIG_ARCH_REQUIRE_GPIOLIB=y diff --git a/trunk/arch/arm/configs/pcm027_defconfig b/trunk/arch/arm/configs/pcm027_defconfig index 05ad96a43b1d..17b9b2469570 100644 --- a/trunk/arch/arm/configs/pcm027_defconfig +++ b/trunk/arch/arm/configs/pcm027_defconfig @@ -606,7 +606,7 @@ CONFIG_I2C_PXA=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -CONFIG_EEPROM_LEGACY=y +CONFIG_SENSORS_EEPROM=y # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/pcm038_defconfig b/trunk/arch/arm/configs/pcm038_defconfig index 41429a00f58c..6b798c215ca8 100644 --- a/trunk/arch/arm/configs/pcm038_defconfig +++ b/trunk/arch/arm/configs/pcm038_defconfig @@ -604,7 +604,7 @@ CONFIG_I2C_BOARDINFO=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -626,7 +626,7 @@ CONFIG_SPI_BITBANG=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set CONFIG_HAVE_GPIO_LIB=y diff --git a/trunk/arch/arm/configs/picotux200_defconfig b/trunk/arch/arm/configs/picotux200_defconfig index 9018f0f298aa..59e4463c2da2 100644 --- a/trunk/arch/arm/configs/picotux200_defconfig +++ b/trunk/arch/arm/configs/picotux200_defconfig @@ -744,7 +744,7 @@ CONFIG_I2C_GPIO=m # CONFIG_SENSORS_DS1337=m CONFIG_SENSORS_DS1374=m -CONFIG_EEPROM_LEGACY=m +CONFIG_SENSORS_EEPROM=m CONFIG_SENSORS_PCF8574=m CONFIG_SENSORS_PCA9539=m CONFIG_SENSORS_PCF8591=m diff --git a/trunk/arch/arm/configs/pleb_defconfig b/trunk/arch/arm/configs/pleb_defconfig index f2d2dda25949..a6b47ea8e465 100644 --- a/trunk/arch/arm/configs/pleb_defconfig +++ b/trunk/arch/arm/configs/pleb_defconfig @@ -88,6 +88,7 @@ CONFIG_ARCH_SA1100=y # CONFIG_SA1100_COLLIE is not set # CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set # CONFIG_SA1100_BADGE4 is not set # CONFIG_SA1100_JORNADA720 is not set # CONFIG_SA1100_HACKKIT is not set diff --git a/trunk/arch/arm/configs/pnx4008_defconfig b/trunk/arch/arm/configs/pnx4008_defconfig index 67b5f1e15f4a..811b8f60d19d 100644 --- a/trunk/arch/arm/configs/pnx4008_defconfig +++ b/trunk/arch/arm/configs/pnx4008_defconfig @@ -915,7 +915,7 @@ CONFIG_I2C_ALGOPCA=m # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -CONFIG_EEPROM_LEGACY=m +CONFIG_SENSORS_EEPROM=m CONFIG_SENSORS_PCF8574=m # CONFIG_SENSORS_PCA9539 is not set CONFIG_SENSORS_PCF8591=m diff --git a/trunk/arch/arm/configs/qil-a9260_defconfig b/trunk/arch/arm/configs/qil-a9260_defconfig index 9b32d0eb89ba..5cbd81589647 100644 --- a/trunk/arch/arm/configs/qil-a9260_defconfig +++ b/trunk/arch/arm/configs/qil-a9260_defconfig @@ -687,7 +687,7 @@ CONFIG_I2C_CHARDEV=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -714,7 +714,7 @@ CONFIG_SPI_ATMEL=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set @@ -727,7 +727,7 @@ CONFIG_WATCHDOG_NOWAYOUT=y # Watchdog Device Drivers # # CONFIG_SOFT_WATCHDOG is not set -# CONFIG_AT91SAM9X_WATCHDOG is not set +# CONFIG_AT91SAM9_WATCHDOG is not set # # USB-based Watchdog Cards diff --git a/trunk/arch/arm/configs/rpc_defconfig b/trunk/arch/arm/configs/rpc_defconfig index a29d61fe4c6a..f62d1817d2c6 100644 --- a/trunk/arch/arm/configs/rpc_defconfig +++ b/trunk/arch/arm/configs/rpc_defconfig @@ -590,7 +590,7 @@ CONFIG_I2C_ACORN=y # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set # CONFIG_DS1682 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/s3c2410_defconfig b/trunk/arch/arm/configs/s3c2410_defconfig index 65a583ee5df8..35faaea8623e 100644 --- a/trunk/arch/arm/configs/s3c2410_defconfig +++ b/trunk/arch/arm/configs/s3c2410_defconfig @@ -923,7 +923,7 @@ CONFIG_I2C_SIMTEC=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -CONFIG_EEPROM_LEGACY=m +CONFIG_SENSORS_EEPROM=m # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCF8591 is not set @@ -950,7 +950,7 @@ CONFIG_SPI_S3C24XX_GPIO=m # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set CONFIG_HAVE_GPIO_LIB=y diff --git a/trunk/arch/arm/configs/s3c6400_defconfig b/trunk/arch/arm/configs/s3c6400_defconfig index 2e8fa50e9a09..cf3c1b5d7048 100644 --- a/trunk/arch/arm/configs/s3c6400_defconfig +++ b/trunk/arch/arm/configs/s3c6400_defconfig @@ -465,8 +465,8 @@ CONFIG_I2C_S3C2410=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -CONFIG_EEPROM_AT24=y -# CONFIG_EEPROM_LEGACY is not set +CONFIG_AT24=y +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set diff --git a/trunk/arch/arm/configs/shannon_defconfig b/trunk/arch/arm/configs/shannon_defconfig index 984f7096a533..d052c8f80515 100644 --- a/trunk/arch/arm/configs/shannon_defconfig +++ b/trunk/arch/arm/configs/shannon_defconfig @@ -87,6 +87,7 @@ CONFIG_ARCH_SA1100=y # CONFIG_SA1100_COLLIE is not set # CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set # CONFIG_SA1100_BADGE4 is not set # CONFIG_SA1100_JORNADA720 is not set # CONFIG_SA1100_HACKKIT is not set diff --git a/trunk/arch/arm/configs/shark_defconfig b/trunk/arch/arm/configs/shark_defconfig index 90235bf7a1de..9b6561d119af 100644 --- a/trunk/arch/arm/configs/shark_defconfig +++ b/trunk/arch/arm/configs/shark_defconfig @@ -1,174 +1,88 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.28-git6 -# Thu Jan 8 17:14:47 2009 +# Linux kernel version: 2.6.12-git3 +# Sat Jul 16 15:21:47 2005 # CONFIG_ARM=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -# CONFIG_GENERIC_GPIO is not set -# CONFIG_GENERIC_TIME is not set -# CONFIG_GENERIC_CLOCKEVENTS is not set CONFIG_MMU=y -# CONFIG_NO_IOPORT is not set -CONFIG_GENERIC_HARDIRQS=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_GENERIC_IRQ_PROBE=y +CONFIG_UID16=y CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_ZONE_DMA=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_VECTORS_BASE=0xffff0000 -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" # -# General setup +# Code maturity level options # CONFIG_EXPERIMENTAL=y +CONFIG_CLEAN_COMPILE=y CONFIG_BROKEN_ON_SMP=y CONFIG_INIT_ENV_ARG_LIMIT=32 + +# +# General setup +# CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set CONFIG_SWAP=y CONFIG_SYSVIPC=y -CONFIG_SYSVIPC_SYSCTL=y # CONFIG_POSIX_MQUEUE is not set # CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set +CONFIG_SYSCTL=y # CONFIG_AUDIT is not set +# CONFIG_HOTPLUG is not set +CONFIG_KOBJECT_UEVENT=y # CONFIG_IKCONFIG is not set -CONFIG_LOG_BUF_SHIFT=14 -# CONFIG_CGROUPS is not set -CONFIG_GROUP_SCHED=y -CONFIG_FAIR_GROUP_SCHED=y -# CONFIG_RT_GROUP_SCHED is not set -CONFIG_USER_SCHED=y -# CONFIG_CGROUP_SCHED is not set -CONFIG_SYSFS_DEPRECATED=y -CONFIG_SYSFS_DEPRECATED_V2=y -# CONFIG_RELAY is not set -CONFIG_NAMESPACES=y -# CONFIG_UTS_NS is not set -# CONFIG_IPC_NS is not set -# CONFIG_USER_NS is not set -# CONFIG_PID_NS is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y # CONFIG_EMBEDDED is not set -CONFIG_UID16=y -CONFIG_SYSCTL_SYSCALL=y CONFIG_KALLSYMS=y # CONFIG_KALLSYMS_ALL is not set # CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y CONFIG_PRINTK=y CONFIG_BUG=y -CONFIG_ELF_CORE=y -CONFIG_COMPAT_BRK=y CONFIG_BASE_FULL=y CONFIG_FUTEX=y -CONFIG_ANON_INODES=y CONFIG_EPOLL=y -CONFIG_SIGNALFD=y -CONFIG_TIMERFD=y -CONFIG_EVENTFD=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y CONFIG_SHMEM=y -CONFIG_AIO=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_PCI_QUIRKS=y -CONFIG_SLAB=y -# CONFIG_SLUB is not set -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_KPROBES is not set -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_SLABINFO=y -CONFIG_RT_MUTEXES=y +CONFIG_CC_ALIGN_FUNCTIONS=0 +CONFIG_CC_ALIGN_LABELS=0 +CONFIG_CC_ALIGN_LOOPS=0 +CONFIG_CC_ALIGN_JUMPS=0 # CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 + +# +# Loadable module support +# CONFIG_MODULES=y -# CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_OBSOLETE_MODPARM=y # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set CONFIG_KMOD=y -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -CONFIG_IOSCHED_AS=y -CONFIG_IOSCHED_DEADLINE=y -CONFIG_IOSCHED_CFQ=y -# CONFIG_DEFAULT_AS is not set -# CONFIG_DEFAULT_DEADLINE is not set -CONFIG_DEFAULT_CFQ=y -# CONFIG_DEFAULT_NOOP is not set -CONFIG_DEFAULT_IOSCHED="cfq" -CONFIG_CLASSIC_RCU=y -# CONFIG_TREE_RCU is not set -# CONFIG_PREEMPT_RCU is not set -# CONFIG_TREE_RCU_TRACE is not set -# CONFIG_PREEMPT_RCU_TRACE is not set -# CONFIG_FREEZER is not set # # System Type # -# CONFIG_ARCH_AAEC2000 is not set -# CONFIG_ARCH_INTEGRATOR is not set -# CONFIG_ARCH_REALVIEW is not set -# CONFIG_ARCH_VERSATILE is not set -# CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set +# CONFIG_ARCH_CO285 is not set # CONFIG_ARCH_EBSA110 is not set -# CONFIG_ARCH_EP93XX is not set # CONFIG_ARCH_FOOTBRIDGE is not set -# CONFIG_ARCH_NETX is not set -# CONFIG_ARCH_H720X is not set -# CONFIG_ARCH_IMX is not set -# CONFIG_ARCH_IOP13XX is not set -# CONFIG_ARCH_IOP32X is not set -# CONFIG_ARCH_IOP33X is not set -# CONFIG_ARCH_IXP23XX is not set -# CONFIG_ARCH_IXP2000 is not set +# CONFIG_ARCH_INTEGRATOR is not set +# CONFIG_ARCH_IOP3XX is not set # CONFIG_ARCH_IXP4XX is not set +# CONFIG_ARCH_IXP2000 is not set # CONFIG_ARCH_L7200 is not set -# CONFIG_ARCH_KIRKWOOD is not set -# CONFIG_ARCH_KS8695 is not set -# CONFIG_ARCH_NS9XXX is not set -# CONFIG_ARCH_LOKI is not set -# CONFIG_ARCH_MV78XX0 is not set -# CONFIG_ARCH_MXC is not set -# CONFIG_ARCH_ORION5X is not set -# CONFIG_ARCH_PNX4008 is not set # CONFIG_ARCH_PXA is not set # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set CONFIG_ARCH_SHARK=y # CONFIG_ARCH_LH7A40X is not set -# CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_VERSATILE is not set +# CONFIG_ARCH_IMX is not set +# CONFIG_ARCH_H720X is not set +# CONFIG_ARCH_AAEC2000 is not set # # Processor Type @@ -177,20 +91,14 @@ CONFIG_CPU_32=y CONFIG_CPU_SA110=y CONFIG_CPU_32v4=y CONFIG_CPU_ABRT_EV4=y -CONFIG_CPU_PABRT_NOIFAR=y CONFIG_CPU_CACHE_V4WB=y CONFIG_CPU_CACHE_VIVT=y CONFIG_CPU_COPY_V4WB=y CONFIG_CPU_TLB_V4WB=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y # # Processor Features # -# CONFIG_CPU_ICACHE_DISABLE is not set -# CONFIG_CPU_DCACHE_DISABLE is not set -# CONFIG_OUTER_CACHE is not set # # Bus support @@ -199,40 +107,22 @@ CONFIG_ISA=y CONFIG_ISA_DMA=y CONFIG_ISA_DMA_API=y CONFIG_PCI=y -CONFIG_PCI_SYSCALL=y CONFIG_PCI_HOST_VIA82C505=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_PCI_LEGACY=y +CONFIG_PCI_LEGACY_PROC=y +# CONFIG_PCI_NAMES is not set # CONFIG_PCI_DEBUG is not set + +# +# PCCARD (PCMCIA/CardBus) support +# # CONFIG_PCCARD is not set # # Kernel Features # -CONFIG_VMSPLIT_3G=y -# CONFIG_VMSPLIT_2G is not set -# CONFIG_VMSPLIT_1G is not set -CONFIG_PAGE_OFFSET=0xC0000000 +# CONFIG_SMP is not set # CONFIG_PREEMPT is not set -CONFIG_HZ=100 -# CONFIG_AEABI is not set -CONFIG_ARCH_FLATMEM_HAS_HOLES=y -# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set -# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4096 -# CONFIG_RESOURCES_64BIT is not set -# CONFIG_PHYS_ADDR_T_64BIT is not set -CONFIG_ZONE_DMA_FLAG=1 -CONFIG_BOUNCE=y -CONFIG_VIRT_TO_BUS=y -CONFIG_UNEVICTABLE_LRU=y +# CONFIG_DISCONTIGMEM is not set CONFIG_LEDS=y CONFIG_LEDS_TIMER=y # CONFIG_LEDS_CPU is not set @@ -245,12 +135,6 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="" # CONFIG_XIP_KERNEL is not set -# CONFIG_KEXEC is not set - -# -# CPU Power Management -# -# CONFIG_CPU_IDLE is not set # # Floating point emulation @@ -259,16 +143,13 @@ CONFIG_CMDLINE="" # # At least one emulation must be selected # -CONFIG_FPE_NWFPE=y -# CONFIG_FPE_NWFPE_XP is not set -# CONFIG_FPE_FASTFPE is not set +# CONFIG_FPE_NWFPE is not set +CONFIG_FPE_FASTFPE=y # # Userspace binary formats # CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y # CONFIG_BINFMT_AOUT is not set # CONFIG_BINFMT_MISC is not set # CONFIG_ARTHUR is not set @@ -277,75 +158,6 @@ CONFIG_HAVE_AOUT=y # Power management options # # CONFIG_PM is not set -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_NET_NS is not set -CONFIG_COMPAT_NET_DEV_OPS=y -CONFIG_PACKET=y -# CONFIG_PACKET_MMAP is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set -# CONFIG_PHONET is not set -# CONFIG_WIRELESS is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set # # Device Drivers @@ -354,27 +166,36 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # # Generic Driver Options # -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" # CONFIG_STANDALONE is not set CONFIG_PREVENT_FIRMWARE_BUILD=y -CONFIG_FW_LOADER=y -# CONFIG_FIRMWARE_IN_KERNEL is not set -CONFIG_EXTRA_FIRMWARE="" +# CONFIG_FW_LOADER is not set # CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set + +# +# Memory Technology Devices (MTD) +# # CONFIG_MTD is not set + +# +# Parallel port support +# CONFIG_PARPORT=m CONFIG_PARPORT_PC=m # CONFIG_PARPORT_SERIAL is not set # CONFIG_PARPORT_PC_FIFO is not set # CONFIG_PARPORT_PC_SUPERIO is not set +# CONFIG_PARPORT_ARC is not set # CONFIG_PARPORT_GSC is not set -# CONFIG_PARPORT_AX88796 is not set # CONFIG_PARPORT_1284 is not set + +# +# Plug and Play support +# # CONFIG_PNP is not set -CONFIG_BLK_DEV=y + +# +# Block devices +# # CONFIG_BLK_DEV_XD is not set # CONFIG_PARIDE is not set # CONFIG_BLK_CPQ_DA is not set @@ -389,78 +210,52 @@ CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=16 CONFIG_BLK_DEV_RAM_SIZE=4096 -# CONFIG_BLK_DEV_XIP is not set +# CONFIG_BLK_DEV_INITRD is not set +CONFIG_INITRAMFS_SOURCE="" # CONFIG_CDROM_PKTCDVD is not set + +# +# IO Schedulers +# +CONFIG_IOSCHED_NOOP=y +CONFIG_IOSCHED_AS=y +CONFIG_IOSCHED_DEADLINE=y +CONFIG_IOSCHED_CFQ=y # CONFIG_ATA_OVER_ETH is not set -# CONFIG_BLK_DEV_HD is not set -CONFIG_MISC_DEVICES=y -# CONFIG_PHANTOM is not set -# CONFIG_EEPROM_93CX6 is not set -# CONFIG_SGI_IOC4 is not set -# CONFIG_TIFM_CORE is not set -# CONFIG_ENCLOSURE_SERVICES is not set -# CONFIG_HP_ILO is not set -# CONFIG_C2PORT is not set -CONFIG_HAVE_IDE=y + +# +# ATA/ATAPI/MFM/RLL support +# CONFIG_IDE=y +CONFIG_BLK_DEV_IDE=y # -# Please see Documentation/ide/ide.txt for help/info on IDE drives +# Please see Documentation/ide.txt for help/info on IDE drives # -CONFIG_IDE_ATAPI=y # CONFIG_BLK_DEV_IDE_SATA is not set -CONFIG_IDE_GD=y -CONFIG_IDE_GD_ATA=y -# CONFIG_IDE_GD_ATAPI is not set +CONFIG_BLK_DEV_IDEDISK=y +# CONFIG_IDEDISK_MULTI_MODE is not set CONFIG_BLK_DEV_IDECD=m -CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y # CONFIG_BLK_DEV_IDETAPE is not set +CONFIG_BLK_DEV_IDEFLOPPY=y +# CONFIG_BLK_DEV_IDESCSI is not set # CONFIG_IDE_TASK_IOCTL is not set -CONFIG_IDE_PROC_FS=y # # IDE chipset support/bugfixes # -# CONFIG_BLK_DEV_PLATFORM is not set - -# -# PCI IDE chipsets support -# -# CONFIG_BLK_DEV_GENERIC is not set -# CONFIG_BLK_DEV_OPTI621 is not set -# CONFIG_BLK_DEV_AEC62XX is not set -# CONFIG_BLK_DEV_ALI15X3 is not set -# CONFIG_BLK_DEV_CMD64X is not set -# CONFIG_BLK_DEV_TRIFLEX is not set -# CONFIG_BLK_DEV_CS5520 is not set -# CONFIG_BLK_DEV_CS5530 is not set -# CONFIG_BLK_DEV_HPT366 is not set -# CONFIG_BLK_DEV_JMICRON is not set -# CONFIG_BLK_DEV_SC1200 is not set -# CONFIG_BLK_DEV_PIIX is not set -# CONFIG_BLK_DEV_IT8213 is not set -# CONFIG_BLK_DEV_IT821X is not set -# CONFIG_BLK_DEV_NS87415 is not set -# CONFIG_BLK_DEV_PDC202XX_OLD is not set -# CONFIG_BLK_DEV_PDC202XX_NEW is not set -# CONFIG_BLK_DEV_SVWKS is not set -# CONFIG_BLK_DEV_SIIMAGE is not set -# CONFIG_BLK_DEV_SL82C105 is not set -# CONFIG_BLK_DEV_SLC90E66 is not set -# CONFIG_BLK_DEV_TRM290 is not set -# CONFIG_BLK_DEV_VIA82CXXX is not set -# CONFIG_BLK_DEV_TC86C001 is not set +CONFIG_IDE_GENERIC=y +# CONFIG_BLK_DEV_IDEPCI is not set CONFIG_IDE_ARM=y +# CONFIG_IDE_CHIPSETS is not set # CONFIG_BLK_DEV_IDEDMA is not set +# CONFIG_IDEDMA_AUTO is not set +# CONFIG_BLK_DEV_HD is not set # # SCSI device support # -# CONFIG_RAID_ATTRS is not set CONFIG_SCSI=m -CONFIG_SCSI_DMA=y -# CONFIG_SCSI_TGT is not set -# CONFIG_SCSI_NETLINK is not set CONFIG_SCSI_PROC_FS=y # @@ -480,20 +275,17 @@ CONFIG_CHR_DEV_SG=m # CONFIG_SCSI_MULTI_LUN is not set # CONFIG_SCSI_CONSTANTS is not set # CONFIG_SCSI_LOGGING is not set -# CONFIG_SCSI_SCAN_ASYNC is not set -CONFIG_SCSI_WAIT_SCAN=m # -# SCSI Transports +# SCSI Transport Attributes # # CONFIG_SCSI_SPI_ATTRS is not set # CONFIG_SCSI_FC_ATTRS is not set # CONFIG_SCSI_ISCSI_ATTRS is not set -# CONFIG_SCSI_SAS_LIBSAS is not set -# CONFIG_SCSI_SRP_ATTRS is not set -CONFIG_SCSI_LOWLEVEL=y -# CONFIG_ISCSI_TCP is not set -# CONFIG_SCSI_CXGB3_ISCSI is not set + +# +# SCSI low-level drivers +# # CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_SCSI_3W_9XXX is not set # CONFIG_SCSI_7000FASST is not set @@ -504,18 +296,12 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_AIC7XXX is not set # CONFIG_SCSI_AIC7XXX_OLD is not set # CONFIG_SCSI_AIC79XX is not set -# CONFIG_SCSI_AIC94XX is not set # CONFIG_SCSI_DPT_I2O is not set -# CONFIG_SCSI_ADVANSYS is not set # CONFIG_SCSI_IN2000 is not set -# CONFIG_SCSI_ARCMSR is not set # CONFIG_MEGARAID_NEWGEN is not set # CONFIG_MEGARAID_LEGACY is not set -# CONFIG_MEGARAID_SAS is not set -# CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_SATA is not set # CONFIG_SCSI_BUSLOGIC is not set -# CONFIG_LIBFC is not set -# CONFIG_FCOE is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DTC3280 is not set # CONFIG_SCSI_EATA is not set @@ -528,15 +314,20 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_PPA is not set # CONFIG_SCSI_IMM is not set -# CONFIG_SCSI_MVSAS is not set # CONFIG_SCSI_NCR53C406A is not set -# CONFIG_SCSI_STEX is not set # CONFIG_SCSI_SYM53C8XX_2 is not set +# CONFIG_SCSI_IPR is not set # CONFIG_SCSI_PAS16 is not set +# CONFIG_SCSI_PSI240I is not set # CONFIG_SCSI_QLOGIC_FAS is not set +# CONFIG_SCSI_QLOGIC_FC is not set # CONFIG_SCSI_QLOGIC_1280 is not set -# CONFIG_SCSI_QLA_FC is not set -# CONFIG_SCSI_QLA_ISCSI is not set +CONFIG_SCSI_QLA2XXX=m +# CONFIG_SCSI_QLA21XX is not set +# CONFIG_SCSI_QLA22XX is not set +# CONFIG_SCSI_QLA2300 is not set +# CONFIG_SCSI_QLA2322 is not set +# CONFIG_SCSI_QLA6312 is not set # CONFIG_SCSI_LPFC is not set # CONFIG_SCSI_SYM53C416 is not set # CONFIG_SCSI_DC395x is not set @@ -545,57 +336,123 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_SCSI_U14_34F is not set # CONFIG_SCSI_NSP32 is not set # CONFIG_SCSI_DEBUG is not set -# CONFIG_SCSI_SRP is not set -# CONFIG_SCSI_DH is not set -# CONFIG_ATA is not set + +# +# Multi-device support (RAID and LVM) +# # CONFIG_MD is not set + +# +# Fusion MPT device support +# # CONFIG_FUSION is not set +# CONFIG_FUSION_SPI is not set +# CONFIG_FUSION_FC is not set # # IEEE 1394 (FireWire) support # +# CONFIG_IEEE1394 is not set # -# Enable only one of the two stacks, unless you know what you are doing +# I2O device support # -# CONFIG_FIREWIRE is not set -# CONFIG_IEEE1394 is not set # CONFIG_I2O is not set + +# +# Networking support +# +CONFIG_NET=y + +# +# Networking options +# +CONFIG_PACKET=y +# CONFIG_PACKET_MMAP is not set +CONFIG_UNIX=y +# CONFIG_NET_KEY is not set +CONFIG_INET=y +# CONFIG_IP_MULTICAST is not set +# CONFIG_IP_ADVANCED_ROUTER is not set +# CONFIG_IP_PNP is not set +# CONFIG_NET_IPIP is not set +# CONFIG_NET_IPGRE is not set +# CONFIG_ARPD is not set +# CONFIG_SYN_COOKIES is not set +# CONFIG_INET_AH is not set +# CONFIG_INET_ESP is not set +# CONFIG_INET_IPCOMP is not set +# CONFIG_INET_TUNNEL is not set +CONFIG_IP_TCPDIAG=y +# CONFIG_IP_TCPDIAG_IPV6 is not set +# CONFIG_IPV6 is not set +# CONFIG_NETFILTER is not set + +# +# SCTP Configuration (EXPERIMENTAL) +# +# CONFIG_IP_SCTP is not set +# CONFIG_ATM is not set +# CONFIG_BRIDGE is not set +# CONFIG_VLAN_8021Q is not set +# CONFIG_DECNET is not set +# CONFIG_LLC2 is not set +# CONFIG_IPX is not set +# CONFIG_ATALK is not set +# CONFIG_X25 is not set +# CONFIG_LAPB is not set +# CONFIG_NET_DIVERT is not set +# CONFIG_ECONET is not set +# CONFIG_WAN_ROUTER is not set + +# +# QoS and/or fair queueing +# +# CONFIG_NET_SCHED is not set +# CONFIG_NET_CLS_ROUTE is not set + +# +# Network testing +# +# CONFIG_NET_PKTGEN is not set +# CONFIG_NETPOLL is not set +# CONFIG_NET_POLL_CONTROLLER is not set +# CONFIG_HAMRADIO is not set +# CONFIG_IRDA is not set +# CONFIG_BT is not set CONFIG_NETDEVICES=y # CONFIG_DUMMY is not set # CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set -# CONFIG_VETH is not set + +# +# ARCnet devices +# # CONFIG_ARCNET is not set -# CONFIG_PHYLIB is not set + +# +# Ethernet (10 or 100Mbit) +# CONFIG_NET_ETHERNET=y # CONFIG_MII is not set -# CONFIG_AX88796 is not set # CONFIG_HAPPYMEAL is not set # CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_SMC91X is not set # CONFIG_DM9000 is not set -# CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set # CONFIG_NET_VENDOR_RACAL is not set + +# +# Tulip family network device support +# # CONFIG_NET_TULIP is not set # CONFIG_AT1700 is not set # CONFIG_DEPCA is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set # CONFIG_AMD8111_ETH is not set @@ -605,69 +462,56 @@ CONFIG_NET_PCI=y # CONFIG_B44 is not set # CONFIG_FORCEDETH is not set CONFIG_CS89x0=y -CONFIG_CS89x0_NOEEPROM=y +# CONFIG_DGRS is not set +# CONFIG_EEPRO100 is not set # CONFIG_E100 is not set # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set # CONFIG_8139CP is not set # CONFIG_8139TOO is not set -# CONFIG_R6040 is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set -# CONFIG_SMSC9420 is not set # CONFIG_SUNDANCE is not set # CONFIG_TLAN is not set # CONFIG_VIA_RHINE is not set -# CONFIG_SC92031 is not set # CONFIG_NET_POCKET is not set -# CONFIG_ATL2 is not set -CONFIG_NETDEV_1000=y + +# +# Ethernet (1000 Mbit) +# # CONFIG_ACENIC is not set # CONFIG_DL2K is not set # CONFIG_E1000 is not set -# CONFIG_E1000E is not set -# CONFIG_IP1000 is not set -# CONFIG_IGB is not set # CONFIG_NS83820 is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set # CONFIG_R8169 is not set -# CONFIG_SIS190 is not set # CONFIG_SKGE is not set -# CONFIG_SKY2 is not set +# CONFIG_SK98LIN is not set # CONFIG_VIA_VELOCITY is not set # CONFIG_TIGON3 is not set # CONFIG_BNX2 is not set -# CONFIG_QLA3XXX is not set -# CONFIG_ATL1 is not set -# CONFIG_ATL1E is not set -# CONFIG_JME is not set -CONFIG_NETDEV_10000=y -# CONFIG_CHELSIO_T1 is not set -CONFIG_CHELSIO_T3_DEPENDS=y -# CONFIG_CHELSIO_T3 is not set -# CONFIG_ENIC is not set -# CONFIG_IXGBE is not set + +# +# Ethernet (10000 Mbit) +# # CONFIG_IXGB is not set # CONFIG_S2IO is not set -# CONFIG_MYRI10GE is not set -# CONFIG_NETXEN_NIC is not set -# CONFIG_NIU is not set -# CONFIG_MLX4_EN is not set -# CONFIG_MLX4_CORE is not set -# CONFIG_TEHUTI is not set -# CONFIG_BNX2X is not set -# CONFIG_QLGE is not set -# CONFIG_SFC is not set + +# +# Token Ring devices +# # CONFIG_TR is not set # -# Wireless LAN +# Wireless LAN (non-hamradio) +# +# CONFIG_NET_RADIO is not set + +# +# Wan interfaces # -# CONFIG_WLAN_PRE80211 is not set -# CONFIG_WLAN_80211 is not set -# CONFIG_IWLWIFI_LEDS is not set # CONFIG_WAN is not set # CONFIG_FDDI is not set # CONFIG_HIPPI is not set @@ -675,17 +519,18 @@ CONFIG_CHELSIO_T3_DEPENDS=y # CONFIG_PPP is not set # CONFIG_SLIP is not set # CONFIG_NET_FC is not set +# CONFIG_SHAPER is not set # CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set + +# +# ISDN subsystem +# # CONFIG_ISDN is not set # # Input device support # CONFIG_INPUT=y -# CONFIG_INPUT_FF_MEMLESS is not set -# CONFIG_INPUT_POLLDEV is not set # # Userland interfaces @@ -695,6 +540,7 @@ CONFIG_INPUT_MOUSEDEV_PSAUX=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 # CONFIG_INPUT_JOYDEV is not set +# CONFIG_INPUT_TSDEV is not set # CONFIG_INPUT_EVDEV is not set # CONFIG_INPUT_EVBUG is not set @@ -707,25 +553,14 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_LKKBD is not set # CONFIG_KEYBOARD_XTKBD is not set # CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_STOWAWAY is not set CONFIG_INPUT_MOUSE=y CONFIG_MOUSE_PS2=y -CONFIG_MOUSE_PS2_ALPS=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -CONFIG_MOUSE_PS2_LIFEBOOK=y -CONFIG_MOUSE_PS2_TRACKPOINT=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -# CONFIG_MOUSE_PS2_TOUCHKIT is not set # CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_APPLETOUCH is not set -# CONFIG_MOUSE_BCM5974 is not set # CONFIG_MOUSE_INPORT is not set # CONFIG_MOUSE_LOGIBM is not set # CONFIG_MOUSE_PC110PAD is not set # CONFIG_MOUSE_VSXXXAA is not set # CONFIG_INPUT_JOYSTICK is not set -# CONFIG_INPUT_TABLET is not set # CONFIG_INPUT_TOUCHSCREEN is not set # CONFIG_INPUT_MISC is not set @@ -745,22 +580,16 @@ CONFIG_SERIO_LIBPS2=y # Character devices # CONFIG_VT=y -CONFIG_CONSOLE_TRANSLATIONS=y CONFIG_VT_CONSOLE=y CONFIG_HW_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_DEVKMEM=y # CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_NOZOMI is not set # # Serial drivers # CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 # CONFIG_SERIAL_8250_EXTENDED is not set # @@ -770,122 +599,90 @@ CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_JSM is not set CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=256 CONFIG_PRINTER=m # CONFIG_LP_CONSOLE is not set # CONFIG_PPDEV is not set +# CONFIG_TIPAR is not set + +# +# IPMI +# # CONFIG_IPMI_HANDLER is not set -CONFIG_HW_RANDOM=m + +# +# Watchdog Cards +# +# CONFIG_WATCHDOG is not set # CONFIG_NVRAM is not set +CONFIG_RTC=y # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set + +# +# Ftape, the floppy tape device driver +# +# CONFIG_DRM is not set # CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_DEVPORT=y -# CONFIG_I2C is not set -# CONFIG_SPI is not set -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -# CONFIG_THERMAL_HWMON is not set -# CONFIG_WATCHDOG is not set -CONFIG_SSB_POSSIBLE=y # -# Sonics Silicon Backplane +# TPM devices # -# CONFIG_SSB is not set +# CONFIG_TCG_TPM is not set # -# Multifunction device drivers +# I2C support # -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_MFD_TMIO is not set +# CONFIG_I2C is not set # -# Multimedia devices +# Misc devices # # -# Multimedia core support +# Multimedia devices # # CONFIG_VIDEO_DEV is not set -# CONFIG_DVB_CORE is not set -# CONFIG_VIDEO_MEDIA is not set # -# Multimedia drivers +# Digital Video Broadcasting Devices # -# CONFIG_DAB is not set +# CONFIG_DVB is not set # # Graphics support # -# CONFIG_DRM is not set -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set -# CONFIG_FB_SYS_FILLRECT is not set -# CONFIG_FB_SYS_COPYAREA is not set -# CONFIG_FB_SYS_IMAGEBLIT is not set -# CONFIG_FB_FOREIGN_ENDIAN is not set -# CONFIG_FB_SYS_FOPS is not set -# CONFIG_FB_SVGALIB is not set +CONFIG_FB_SOFT_CURSOR=y # CONFIG_FB_MACMODES is not set -# CONFIG_FB_BACKLIGHT is not set # CONFIG_FB_MODE_HELPERS is not set # CONFIG_FB_TILEBLITTING is not set - -# -# Frame buffer hardware drivers -# # CONFIG_FB_CIRRUS is not set # CONFIG_FB_PM2 is not set CONFIG_FB_CYBER2000=y # CONFIG_FB_ASILIANT is not set # CONFIG_FB_IMSTT is not set -# CONFIG_FB_S1D13XXX is not set # CONFIG_FB_NVIDIA is not set # CONFIG_FB_RIVA is not set # CONFIG_FB_MATROX is not set +# CONFIG_FB_RADEON_OLD is not set # CONFIG_FB_RADEON is not set # CONFIG_FB_ATY128 is not set # CONFIG_FB_ATY is not set -# CONFIG_FB_S3 is not set # CONFIG_FB_SAVAGE is not set # CONFIG_FB_SIS is not set -# CONFIG_FB_VIA is not set # CONFIG_FB_NEOMAGIC is not set # CONFIG_FB_KYRO is not set # CONFIG_FB_3DFX is not set # CONFIG_FB_VOODOO1 is not set -# CONFIG_FB_VT8623 is not set # CONFIG_FB_TRIDENT is not set -# CONFIG_FB_ARK is not set -# CONFIG_FB_PM3 is not set -# CONFIG_FB_CARMINE is not set +# CONFIG_FB_S1D13XXX is not set # CONFIG_FB_VIRTUAL is not set -# CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -# CONFIG_DISPLAY_SUPPORT is not set # # Console display driver support @@ -894,132 +691,126 @@ CONFIG_FB_CYBER2000=y # CONFIG_MDA_CONSOLE is not set CONFIG_DUMMY_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set -# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set # CONFIG_FONTS is not set CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y + +# +# Logo configuration +# CONFIG_LOGO=y # CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_VGA16 is not set CONFIG_LOGO_LINUX_CLUT224=y +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set + +# +# Sound +# CONFIG_SOUND=m -CONFIG_SOUND_OSS_CORE=y + +# +# Advanced Linux Sound Architecture +# # CONFIG_SND is not set + +# +# Open Sound System +# CONFIG_SOUND_PRIME=m +# CONFIG_SOUND_BT878 is not set +# CONFIG_SOUND_CMPCI is not set +# CONFIG_SOUND_EMU10K1 is not set +# CONFIG_SOUND_FUSION is not set +# CONFIG_SOUND_CS4281 is not set +# CONFIG_SOUND_ES1370 is not set +# CONFIG_SOUND_ES1371 is not set +# CONFIG_SOUND_ESSSOLO1 is not set +# CONFIG_SOUND_MAESTRO is not set +# CONFIG_SOUND_MAESTRO3 is not set +# CONFIG_SOUND_ICH is not set +# CONFIG_SOUND_SONICVIBES is not set +# CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set +# CONFIG_SOUND_VIA82CXXX is not set CONFIG_SOUND_OSS=m # CONFIG_SOUND_TRACEINIT is not set # CONFIG_SOUND_DMAP is not set +# CONFIG_SOUND_AD1816 is not set +# CONFIG_SOUND_AD1889 is not set +# CONFIG_SOUND_SGALAXY is not set +CONFIG_SOUND_ADLIB=m +# CONFIG_SOUND_ACI_MIXER is not set +# CONFIG_SOUND_CS4232 is not set # CONFIG_SOUND_SSCAPE is not set +# CONFIG_SOUND_GUS is not set # CONFIG_SOUND_VMIDI is not set # CONFIG_SOUND_TRIX is not set # CONFIG_SOUND_MSS is not set # CONFIG_SOUND_MPU401 is not set +# CONFIG_SOUND_NM256 is not set +# CONFIG_SOUND_MAD16 is not set # CONFIG_SOUND_PAS is not set # CONFIG_SOUND_PSS is not set CONFIG_SOUND_SB=m +# CONFIG_SOUND_AWE32_SYNTH is not set +# CONFIG_SOUND_WAVEFRONT is not set +# CONFIG_SOUND_MAUI is not set # CONFIG_SOUND_YM3812 is not set +# CONFIG_SOUND_OPL3SA1 is not set +# CONFIG_SOUND_OPL3SA2 is not set +# CONFIG_SOUND_YMFPCI is not set # CONFIG_SOUND_UART6850 is not set # CONFIG_SOUND_AEDSP16 is not set # CONFIG_SOUND_KAHLUA is not set -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HID_DEBUG is not set -# CONFIG_HIDRAW is not set -# CONFIG_HID_PID is not set +# CONFIG_SOUND_ALI5455 is not set +# CONFIG_SOUND_FORTE is not set +# CONFIG_SOUND_RME96XX is not set +# CONFIG_SOUND_AD1980 is not set # -# Special HID drivers +# USB support # -CONFIG_HID_COMPAT=y -CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y # CONFIG_USB is not set # -# Enable Host or Gadget support to see Inventra options -# - -# -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; +# USB Gadget Support # # CONFIG_USB_GADGET is not set -# CONFIG_UWB is not set -# CONFIG_MMC is not set -# CONFIG_MEMSTICK is not set -# CONFIG_ACCESSIBILITY is not set -# CONFIG_NEW_LEDS is not set -CONFIG_RTC_LIB=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_HCTOSYS=y -CONFIG_RTC_HCTOSYS_DEVICE="rtc0" -# CONFIG_RTC_DEBUG is not set - -# -# RTC interfaces -# -CONFIG_RTC_INTF_SYSFS=y -CONFIG_RTC_INTF_PROC=y -CONFIG_RTC_INTF_DEV=y -# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set -# CONFIG_RTC_DRV_TEST is not set - -# -# SPI RTC drivers -# - -# -# Platform RTC drivers -# -CONFIG_RTC_DRV_CMOS=y -# CONFIG_RTC_DRV_DS1286 is not set -# CONFIG_RTC_DRV_DS1511 is not set -# CONFIG_RTC_DRV_DS1553 is not set -# CONFIG_RTC_DRV_DS1742 is not set -# CONFIG_RTC_DRV_STK17TA8 is not set -# CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set -# CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_BQ4802 is not set -# CONFIG_RTC_DRV_V3020 is not set # -# on-CPU RTC drivers +# MMC/SD Card support # -# CONFIG_DMADEVICES is not set -# CONFIG_AUXDISPLAY is not set -# CONFIG_REGULATOR is not set -# CONFIG_UIO is not set +# CONFIG_MMC is not set # # File systems # CONFIG_EXT2_FS=y # CONFIG_EXT2_FS_XATTR is not set -# CONFIG_EXT2_FS_XIP is not set CONFIG_EXT3_FS=y CONFIG_EXT3_FS_XATTR=y # CONFIG_EXT3_FS_POSIX_ACL is not set # CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4_FS is not set CONFIG_JBD=y +# CONFIG_JBD_DEBUG is not set CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -CONFIG_FILE_LOCKING=y + +# +# XFS support +# # CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -CONFIG_DNOTIFY=y -# CONFIG_INOTIFY is not set +# CONFIG_MINIX_FS is not set +# CONFIG_ROMFS_FS is not set # CONFIG_QUOTA is not set +CONFIG_DNOTIFY=y # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set # # CD-ROM/DVD Filesystems @@ -1043,12 +834,14 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # Pseudo filesystems # CONFIG_PROC_FS=y -CONFIG_PROC_SYSCTL=y -CONFIG_PROC_PAGE_MONITOR=y CONFIG_SYSFS=y +CONFIG_DEVFS_FS=y +CONFIG_DEVFS_MOUNT=y +# CONFIG_DEVFS_DEBUG is not set +# CONFIG_DEVPTS_FS_XATTR is not set # CONFIG_TMPFS is not set # CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set +CONFIG_RAMFS=y # # Miscellaneous filesystems @@ -1062,27 +855,22 @@ CONFIG_SYSFS=y # CONFIG_EFS_FS is not set # CONFIG_CRAMFS is not set # CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set # CONFIG_HPFS_FS is not set # CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set # CONFIG_SYSV_FS is not set # CONFIG_UFS_FS is not set -CONFIG_NETWORK_FILESYSTEMS=y -CONFIG_NFS_FS=y + +# +# Network File Systems +# +CONFIG_NFS_FS=m CONFIG_NFS_V3=y -# CONFIG_NFS_V3_ACL is not set # CONFIG_NFS_V4 is not set -CONFIG_NFSD=m -# CONFIG_NFSD_V3 is not set -# CONFIG_NFSD_V4 is not set -CONFIG_LOCKD=y +# CONFIG_NFS_DIRECTIO is not set +# CONFIG_NFSD is not set +CONFIG_LOCKD=m CONFIG_LOCKD_V4=y -CONFIG_EXPORTFS=m -CONFIG_NFS_COMMON=y -CONFIG_SUNRPC=y -# CONFIG_SUNRPC_REGISTER_V4 is not set +CONFIG_SUNRPC=m # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set @@ -1109,9 +897,11 @@ CONFIG_MSDOS_PARTITION=y # CONFIG_SGI_PARTITION is not set # CONFIG_ULTRIX_PARTITION is not set # CONFIG_SUN_PARTITION is not set -# CONFIG_KARMA_PARTITION is not set # CONFIG_EFI_PARTITION is not set -# CONFIG_SYSV68_PARTITION is not set + +# +# Native Language Support +# CONFIG_NLS=m CONFIG_NLS_DEFAULT="iso8859-1" CONFIG_NLS_CODEPAGE_437=m @@ -1152,74 +942,30 @@ CONFIG_NLS_ISO8859_1=m # CONFIG_NLS_KOI8_R is not set # CONFIG_NLS_KOI8_U is not set # CONFIG_NLS_UTF8 is not set -# CONFIG_DLM is not set + +# +# Profiling support +# +# CONFIG_PROFILING is not set # # Kernel hacking # # CONFIG_PRINTK_TIME is not set -# CONFIG_ENABLE_WARN_DEPRECATED is not set -# CONFIG_ENABLE_MUST_CHECK is not set -CONFIG_FRAME_WARN=1024 -# CONFIG_MAGIC_SYSRQ is not set -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_SHIRQ is not set -CONFIG_DETECT_SOFTLOCKUP=y -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -# CONFIG_SCHED_DEBUG is not set +# CONFIG_MAGIC_SYSRQ is not set +CONFIG_LOG_BUF_SHIFT=14 # CONFIG_SCHEDSTATS is not set -# CONFIG_TIMER_STATS is not set -# CONFIG_DEBUG_OBJECTS is not set # CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_RT_MUTEX_TESTER is not set # CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_PROVE_LOCKING is not set -# CONFIG_LOCK_STAT is not set # CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set # CONFIG_DEBUG_KOBJECT is not set CONFIG_DEBUG_BUGVERBOSE=y # CONFIG_DEBUG_INFO is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -CONFIG_DEBUG_MEMORY_INIT=y -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set +# CONFIG_DEBUG_FS is not set CONFIG_FRAME_POINTER=y -# CONFIG_BOOT_PRINTK_DELAY is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_FAULT_INJECTION is not set -# CONFIG_LATENCYTOP is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -CONFIG_HAVE_FUNCTION_TRACER=y - -# -# Tracers -# -# CONFIG_FUNCTION_TRACER is not set -# CONFIG_SCHED_TRACER is not set -# CONFIG_CONTEXT_SWITCH_TRACER is not set -# CONFIG_BOOT_TRACER is not set -# CONFIG_TRACE_BRANCH_PROFILING is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_DYNAMIC_PRINTK_DEBUG is not set -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_KGDB is not set CONFIG_DEBUG_USER=y # CONFIG_DEBUG_ERRORS is not set -# CONFIG_DEBUG_STACK_USAGE is not set # CONFIG_DEBUG_LL is not set # @@ -1227,23 +973,19 @@ CONFIG_DEBUG_USER=y # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set + +# +# Cryptographic options +# # CONFIG_CRYPTO is not set +# +# Hardware crypto devices +# + # # Library routines # -CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y # CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC_ITU_T is not set CONFIG_CRC32=y -# CONFIG_CRC7 is not set # CONFIG_LIBCRC32C is not set -CONFIG_PLIST=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y diff --git a/trunk/arch/arm/configs/simpad_defconfig b/trunk/arch/arm/configs/simpad_defconfig index 685d2b513206..03f783e696b3 100644 --- a/trunk/arch/arm/configs/simpad_defconfig +++ b/trunk/arch/arm/configs/simpad_defconfig @@ -89,6 +89,7 @@ CONFIG_ARCH_SA1100=y # CONFIG_SA1100_COLLIE is not set # CONFIG_SA1100_H3100 is not set # CONFIG_SA1100_H3600 is not set +# CONFIG_SA1100_H3800 is not set # CONFIG_SA1100_BADGE4 is not set # CONFIG_SA1100_JORNADA720 is not set # CONFIG_SA1100_HACKKIT is not set diff --git a/trunk/arch/arm/configs/spitz_defconfig b/trunk/arch/arm/configs/spitz_defconfig index 745c68ffb885..4df5b4db2aa0 100644 --- a/trunk/arch/arm/configs/spitz_defconfig +++ b/trunk/arch/arm/configs/spitz_defconfig @@ -977,8 +977,8 @@ CONFIG_I2C_PXA=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set @@ -1003,7 +1003,7 @@ CONFIG_SPI_PXA2XX=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set CONFIG_ARCH_REQUIRE_GPIOLIB=y diff --git a/trunk/arch/arm/configs/sx1_defconfig b/trunk/arch/arm/configs/sx1_defconfig index 25b007ff8bab..853dcdd9f2e0 100644 --- a/trunk/arch/arm/configs/sx1_defconfig +++ b/trunk/arch/arm/configs/sx1_defconfig @@ -610,7 +610,7 @@ CONFIG_I2C_OMAP=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/trizeps4_defconfig b/trunk/arch/arm/configs/trizeps4_defconfig index b6f838197816..9033d147f052 100644 --- a/trunk/arch/arm/configs/trizeps4_defconfig +++ b/trunk/arch/arm/configs/trizeps4_defconfig @@ -948,7 +948,7 @@ CONFIG_I2C_PXA_SLAVE=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/usb-a9260_defconfig b/trunk/arch/arm/configs/usb-a9260_defconfig index fd7774033d64..fcb4aaabd439 100644 --- a/trunk/arch/arm/configs/usb-a9260_defconfig +++ b/trunk/arch/arm/configs/usb-a9260_defconfig @@ -676,7 +676,7 @@ CONFIG_SPI_ATMEL=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set diff --git a/trunk/arch/arm/configs/usb-a9263_defconfig b/trunk/arch/arm/configs/usb-a9263_defconfig index e7c19dd92557..b786e0407e8e 100644 --- a/trunk/arch/arm/configs/usb-a9263_defconfig +++ b/trunk/arch/arm/configs/usb-a9263_defconfig @@ -668,7 +668,7 @@ CONFIG_SPI_ATMEL=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_SPIDEV is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set diff --git a/trunk/arch/arm/configs/versatile_defconfig b/trunk/arch/arm/configs/versatile_defconfig index b11c5da3996c..8355f88f7292 100644 --- a/trunk/arch/arm/configs/versatile_defconfig +++ b/trunk/arch/arm/configs/versatile_defconfig @@ -611,7 +611,7 @@ CONFIG_I2C_ALGOBIT=y # # CONFIG_SENSORS_DS1337 is not set # CONFIG_SENSORS_DS1374 is not set -CONFIG_EEPROM_LEGACY=m +CONFIG_SENSORS_EEPROM=m # CONFIG_SENSORS_PCF8574 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set diff --git a/trunk/arch/arm/configs/viper_defconfig b/trunk/arch/arm/configs/viper_defconfig index 30f463d2fa8a..d01fecb8673e 100644 --- a/trunk/arch/arm/configs/viper_defconfig +++ b/trunk/arch/arm/configs/viper_defconfig @@ -860,8 +860,8 @@ CONFIG_I2C_PXA=y # Miscellaneous I2C Chip support # # CONFIG_DS1682 is not set -# CONFIG_EEPROM_AT24 is not set -# CONFIG_EEPROM_LEGACY is not set +# CONFIG_AT24 is not set +# CONFIG_SENSORS_EEPROM is not set # CONFIG_SENSORS_PCF8574 is not set # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set diff --git a/trunk/arch/arm/configs/cm_x2xx_defconfig b/trunk/arch/arm/configs/xm_x2xx_defconfig similarity index 83% rename from trunk/arch/arm/configs/cm_x2xx_defconfig rename to trunk/arch/arm/configs/xm_x2xx_defconfig index 797b790cba78..f891364deceb 100644 --- a/trunk/arch/arm/configs/cm_x2xx_defconfig +++ b/trunk/arch/arm/configs/xm_x2xx_defconfig @@ -1,7 +1,7 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.29-rc2 -# Sun Feb 1 16:31:36 2009 +# Linux kernel version: 2.6.27-rc8 +# Sun Oct 5 11:05:36 2008 # CONFIG_ARM=y CONFIG_SYS_SUPPORTS_APM_EMULATION=y @@ -22,6 +22,7 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_CALIBRATE_DELAY=y +CONFIG_ARCH_SUPPORTS_AOUT=y CONFIG_ZONE_DMA=y CONFIG_ARCH_MTD_XIP=y CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y @@ -46,12 +47,12 @@ CONFIG_SYSVIPC_SYSCTL=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 +# CONFIG_CGROUPS is not set CONFIG_GROUP_SCHED=y CONFIG_FAIR_GROUP_SCHED=y # CONFIG_RT_GROUP_SCHED is not set CONFIG_USER_SCHED=y # CONFIG_CGROUP_SCHED is not set -# CONFIG_CGROUPS is not set CONFIG_SYSFS_DEPRECATED=y CONFIG_SYSFS_DEPRECATED_V2=y # CONFIG_RELAY is not set @@ -79,21 +80,27 @@ CONFIG_SIGNALFD=y CONFIG_TIMERFD=y CONFIG_EVENTFD=y CONFIG_SHMEM=y -CONFIG_AIO=y # CONFIG_VM_EVENT_COUNTERS is not set -CONFIG_PCI_QUIRKS=y # CONFIG_SLUB_DEBUG is not set # CONFIG_SLAB is not set CONFIG_SLUB=y # CONFIG_SLOB is not set # CONFIG_PROFILING is not set +# CONFIG_MARKERS is not set CONFIG_HAVE_OPROFILE=y # CONFIG_KPROBES is not set +# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set +# CONFIG_HAVE_IOREMAP_PROT is not set CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y +# CONFIG_HAVE_ARCH_TRACEHOOK is not set +# CONFIG_HAVE_DMA_ATTRS is not set +# CONFIG_USE_GENERIC_SMP_HELPERS is not set CONFIG_HAVE_CLK=y +# CONFIG_PROC_PAGE_MONITOR is not set CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_RT_MUTEXES=y +# CONFIG_TINY_SHMEM is not set CONFIG_BASE_SMALL=0 CONFIG_MODULES=y # CONFIG_MODULE_FORCE_LOAD is not set @@ -101,9 +108,11 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set +CONFIG_KMOD=y CONFIG_BLOCK=y # CONFIG_LBD is not set # CONFIG_BLK_DEV_IO_TRACE is not set +# CONFIG_LSF is not set # CONFIG_BLK_DEV_BSG is not set # CONFIG_BLK_DEV_INTEGRITY is not set @@ -120,11 +129,6 @@ CONFIG_DEFAULT_CFQ=y # CONFIG_DEFAULT_NOOP is not set CONFIG_DEFAULT_IOSCHED="cfq" CONFIG_CLASSIC_RCU=y -# CONFIG_TREE_RCU is not set -# CONFIG_PREEMPT_RCU is not set -# CONFIG_TREE_RCU_TRACE is not set -# CONFIG_PREEMPT_RCU_TRACE is not set -CONFIG_FREEZER=y # # System Type @@ -134,6 +138,7 @@ CONFIG_FREEZER=y # CONFIG_ARCH_REALVIEW is not set # CONFIG_ARCH_VERSATILE is not set # CONFIG_ARCH_AT91 is not set +# CONFIG_ARCH_CLPS7500 is not set # CONFIG_ARCH_CLPS711X is not set # CONFIG_ARCH_EBSA110 is not set # CONFIG_ARCH_EP93XX is not set @@ -160,19 +165,17 @@ CONFIG_ARCH_PXA=y # CONFIG_ARCH_RPC is not set # CONFIG_ARCH_SA1100 is not set # CONFIG_ARCH_S3C2410 is not set -# CONFIG_ARCH_S3C64XX is not set # CONFIG_ARCH_SHARK is not set # CONFIG_ARCH_LH7A40X is not set # CONFIG_ARCH_DAVINCI is not set # CONFIG_ARCH_OMAP is not set -# CONFIG_ARCH_MSM is not set -# CONFIG_ARCH_W90X900 is not set +# CONFIG_ARCH_MSM7X00A is not set +CONFIG_DMABOUNCE=y # # Intel PXA2xx/PXA3xx Implementations # # CONFIG_ARCH_GUMSTIX is not set -# CONFIG_MACH_INTELMOTE2 is not set # CONFIG_ARCH_LUBBOCK is not set # CONFIG_MACH_LOGICPD_PXA270 is not set # CONFIG_MACH_MAINSTONE is not set @@ -182,9 +185,7 @@ CONFIG_ARCH_PXA=y # CONFIG_ARCH_VIPER is not set # CONFIG_ARCH_PXA_ESERIES is not set # CONFIG_TRIZEPS_PXA is not set -# CONFIG_MACH_H5000 is not set -# CONFIG_MACH_EM_X270 is not set -# CONFIG_MACH_EXEDA is not set +CONFIG_MACH_EM_X270=y # CONFIG_MACH_COLIBRI is not set # CONFIG_MACH_ZYLONITE is not set # CONFIG_MACH_LITTLETON is not set @@ -202,6 +203,14 @@ CONFIG_PXA27x=y CONFIG_PXA_SSP=y # CONFIG_PXA_PWM is not set +# +# Boot options +# + +# +# Power management +# + # # Processor Type # @@ -223,8 +232,6 @@ CONFIG_ARM_THUMB=y # CONFIG_OUTER_CACHE is not set CONFIG_IWMMXT=y CONFIG_XSCALE_PMU=y -CONFIG_DMABOUNCE=y -CONFIG_COMMON_CLKDEV=y # # Bus support @@ -235,7 +242,6 @@ CONFIG_PCI_HOST_ITE8152=y # CONFIG_ARCH_SUPPORTS_MSI is not set CONFIG_PCI_LEGACY=y # CONFIG_PCI_DEBUG is not set -# CONFIG_PCI_STUB is not set CONFIG_PCCARD=m # CONFIG_PCMCIA_DEBUG is not set CONFIG_PCMCIA=m @@ -281,13 +287,14 @@ CONFIG_FLATMEM_MANUAL=y # CONFIG_SPARSEMEM_MANUAL is not set CONFIG_FLATMEM=y CONFIG_FLAT_NODE_MEM_MAP=y +# CONFIG_SPARSEMEM_STATIC is not set +# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_SPLIT_PTLOCK_CPUS=4096 -# CONFIG_PHYS_ADDR_T_64BIT is not set +# CONFIG_RESOURCES_64BIT is not set CONFIG_ZONE_DMA_FLAG=1 CONFIG_BOUNCE=y CONFIG_VIRT_TO_BUS=y -CONFIG_UNEVICTABLE_LRU=y CONFIG_ALIGNMENT_TRAP=y # @@ -320,8 +327,6 @@ CONFIG_FPE_NWFPE=y # Userspace binary formats # CONFIG_BINFMT_ELF=y -# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set -CONFIG_HAVE_AOUT=y # CONFIG_BINFMT_AOUT is not set # CONFIG_BINFMT_MISC is not set @@ -340,7 +345,6 @@ CONFIG_NET=y # # Networking options # -CONFIG_COMPAT_NET_DEV_OPS=y CONFIG_PACKET=y CONFIG_PACKET_MMAP=y CONFIG_UNIX=y @@ -385,7 +389,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_TIPC is not set # CONFIG_ATM is not set # CONFIG_BRIDGE is not set -# CONFIG_NET_DSA is not set # CONFIG_VLAN_8021Q is not set # CONFIG_DECNET is not set # CONFIG_LLC2 is not set @@ -396,7 +399,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic" # CONFIG_ECONET is not set # CONFIG_WAN_ROUTER is not set # CONFIG_NET_SCHED is not set -# CONFIG_DCB is not set # # Network testing @@ -418,6 +420,8 @@ CONFIG_BT_HIDP=m # # Bluetooth device drivers # +CONFIG_BT_HCIUSB=m +CONFIG_BT_HCIUSB_SCO=y # CONFIG_BT_HCIBTUSB is not set # CONFIG_BT_HCIBTSDIO is not set # CONFIG_BT_HCIUART is not set @@ -430,15 +434,15 @@ CONFIG_BT_HIDP=m # CONFIG_BT_HCIBTUART is not set # CONFIG_BT_HCIVHCI is not set # CONFIG_AF_RXRPC is not set -# CONFIG_PHONET is not set -CONFIG_WIRELESS=y + +# +# Wireless +# # CONFIG_CFG80211 is not set -CONFIG_WIRELESS_OLD_REGULATORY=y CONFIG_WIRELESS_EXT=y CONFIG_WIRELESS_EXT_SYSFS=y -CONFIG_LIB80211=m # CONFIG_MAC80211 is not set -# CONFIG_WIMAX is not set +# CONFIG_IEEE80211 is not set # CONFIG_RFKILL is not set # CONFIG_NET_9P is not set @@ -463,7 +467,6 @@ CONFIG_MTD=y # CONFIG_MTD_DEBUG is not set # CONFIG_MTD_CONCAT is not set CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_TESTS is not set # CONFIG_MTD_REDBOOT_PARTS is not set CONFIG_MTD_CMDLINE_PARTS=y # CONFIG_MTD_AFS_PARTS is not set @@ -518,7 +521,9 @@ CONFIG_MTD_CFI_UTIL=y # # CONFIG_MTD_COMPLEX_MAPPINGS is not set CONFIG_MTD_PHYSMAP=y -# CONFIG_MTD_PHYSMAP_COMPAT is not set +CONFIG_MTD_PHYSMAP_START=0x0 +CONFIG_MTD_PHYSMAP_LEN=0x400000 +CONFIG_MTD_PHYSMAP_BANKWIDTH=2 CONFIG_MTD_PXA2XX=y # CONFIG_MTD_ARM_INTEGRATOR is not set # CONFIG_MTD_IMPA7 is not set @@ -530,8 +535,6 @@ CONFIG_MTD_PXA2XX=y # Self-contained MTD device drivers # # CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_DATAFLASH is not set -# CONFIG_MTD_M25P80 is not set # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set @@ -559,12 +562,6 @@ CONFIG_MTD_NAND_PLATFORM=y # CONFIG_MTD_ALAUDA is not set # CONFIG_MTD_ONENAND is not set -# -# LPDDR flash memory drivers -# -# CONFIG_MTD_LPDDR is not set -# CONFIG_MTD_QINFO_PROBE is not set - # # UBI - Unsorted block images # @@ -645,8 +642,6 @@ CONFIG_SCSI_LOWLEVEL=y # CONFIG_MEGARAID_LEGACY is not set # CONFIG_MEGARAID_SAS is not set # CONFIG_SCSI_HPTIOP is not set -# CONFIG_LIBFC is not set -# CONFIG_FCOE is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_FUTURE_DOMAIN is not set # CONFIG_SCSI_IPS is not set @@ -761,30 +756,26 @@ CONFIG_MII=y CONFIG_DM9000=y CONFIG_DM9000_DEBUGLEVEL=1 # CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL is not set -# CONFIG_ENC28J60 is not set # CONFIG_SMC911X is not set -# CONFIG_SMSC911X is not set # CONFIG_NET_TULIP is not set # CONFIG_HP100 is not set # CONFIG_IBM_NEW_EMAC_ZMII is not set # CONFIG_IBM_NEW_EMAC_RGMII is not set # CONFIG_IBM_NEW_EMAC_TAH is not set # CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set -# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set -# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set # CONFIG_AMD8111_ETH is not set # CONFIG_ADAPTEC_STARFIRE is not set # CONFIG_B44 is not set # CONFIG_FORCEDETH is not set +# CONFIG_EEPRO100 is not set # CONFIG_E100 is not set # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set # CONFIG_8139CP is not set -CONFIG_8139TOO=m +CONFIG_8139TOO=y # CONFIG_8139TOO_PIO is not set # CONFIG_8139TOO_TUNE_TWISTER is not set # CONFIG_8139TOO_8129 is not set @@ -792,12 +783,10 @@ CONFIG_8139TOO=m # CONFIG_R6040 is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set -# CONFIG_SMSC9420 is not set # CONFIG_SUNDANCE is not set # CONFIG_TLAN is not set # CONFIG_VIA_RHINE is not set # CONFIG_SC92031 is not set -# CONFIG_ATL2 is not set # CONFIG_NETDEV_1000 is not set # CONFIG_NETDEV_10000 is not set # CONFIG_TR is not set @@ -808,6 +797,8 @@ CONFIG_8139TOO=m # CONFIG_WLAN_PRE80211 is not set CONFIG_WLAN_80211=y # CONFIG_PCMCIA_RAYCS is not set +# CONFIG_IPW2100 is not set +# CONFIG_IPW2200 is not set CONFIG_LIBERTAS=m # CONFIG_LIBERTAS_USB is not set # CONFIG_LIBERTAS_CS is not set @@ -820,15 +811,9 @@ CONFIG_LIBERTAS_SDIO=m # CONFIG_PRISM54 is not set # CONFIG_USB_ZD1201 is not set # CONFIG_USB_NET_RNDIS_WLAN is not set -# CONFIG_IPW2100 is not set -# CONFIG_IPW2200 is not set # CONFIG_IWLWIFI_LEDS is not set # CONFIG_HOSTAP is not set -# -# Enable WiMAX (Networking options) to see the WiMAX drivers -# - # # USB Network Adapters # @@ -894,22 +879,22 @@ CONFIG_KEYBOARD_PXA27x=m # CONFIG_INPUT_JOYSTICK is not set # CONFIG_INPUT_TABLET is not set CONFIG_INPUT_TOUCHSCREEN=y -# CONFIG_TOUCHSCREEN_ADS7846 is not set # CONFIG_TOUCHSCREEN_FUJITSU is not set # CONFIG_TOUCHSCREEN_GUNZE is not set # CONFIG_TOUCHSCREEN_ELO is not set -# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set # CONFIG_TOUCHSCREEN_MTOUCH is not set # CONFIG_TOUCHSCREEN_INEXIO is not set # CONFIG_TOUCHSCREEN_MK712 is not set # CONFIG_TOUCHSCREEN_PENMOUNT is not set # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set # CONFIG_TOUCHSCREEN_TOUCHWIN is not set -CONFIG_TOUCHSCREEN_UCB1400=m -# CONFIG_TOUCHSCREEN_WM97XX is not set +CONFIG_TOUCHSCREEN_WM97XX=m +# CONFIG_TOUCHSCREEN_WM9705 is not set +CONFIG_TOUCHSCREEN_WM9712=y +# CONFIG_TOUCHSCREEN_WM9713 is not set +# CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE is not set # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set -# CONFIG_TOUCHSCREEN_TSC2007 is not set # CONFIG_INPUT_MISC is not set # @@ -948,7 +933,6 @@ CONFIG_SERIAL_CORE=y CONFIG_SERIAL_CORE_CONSOLE=y # CONFIG_SERIAL_JSM is not set CONFIG_UNIX98_PTYS=y -# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set CONFIG_LEGACY_PTYS=y CONFIG_LEGACY_PTY_COUNT=16 # CONFIG_IPMI_HANDLER is not set @@ -1031,38 +1015,19 @@ CONFIG_I2C_PXA=y # CONFIG_PCF8575 is not set # CONFIG_SENSORS_PCA9539 is not set # CONFIG_SENSORS_PCF8591 is not set +# CONFIG_TPS65010 is not set # CONFIG_SENSORS_MAX6875 is not set # CONFIG_SENSORS_TSL2550 is not set # CONFIG_I2C_DEBUG_CORE is not set # CONFIG_I2C_DEBUG_ALGO is not set # CONFIG_I2C_DEBUG_BUS is not set # CONFIG_I2C_DEBUG_CHIP is not set -CONFIG_SPI=y -# CONFIG_SPI_DEBUG is not set -CONFIG_SPI_MASTER=y - -# -# SPI Master Controller Drivers -# -# CONFIG_SPI_BITBANG is not set -# CONFIG_SPI_GPIO is not set -CONFIG_SPI_PXA2XX=m - -# -# SPI Protocol Masters -# -# CONFIG_SPI_AT25 is not set -# CONFIG_SPI_SPIDEV is not set -# CONFIG_SPI_TLE62X0 is not set +# CONFIG_SPI is not set CONFIG_ARCH_REQUIRE_GPIOLIB=y CONFIG_GPIOLIB=y # CONFIG_DEBUG_GPIO is not set # CONFIG_GPIO_SYSFS is not set -# -# Memory mapped GPIO expanders: -# - # # I2C GPIO expanders: # @@ -1078,19 +1043,17 @@ CONFIG_GPIOLIB=y # # SPI GPIO expanders: # -# CONFIG_GPIO_MAX7301 is not set -# CONFIG_GPIO_MCP23S08 is not set # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set # CONFIG_HWMON is not set # CONFIG_THERMAL is not set # CONFIG_THERMAL_HWMON is not set # CONFIG_WATCHDOG is not set -CONFIG_SSB_POSSIBLE=y # # Sonics Silicon Backplane # +CONFIG_SSB_POSSIBLE=y # CONFIG_SSB is not set # @@ -1101,17 +1064,11 @@ CONFIG_SSB_POSSIBLE=y # CONFIG_MFD_ASIC3 is not set # CONFIG_HTC_EGPIO is not set # CONFIG_HTC_PASIC3 is not set -CONFIG_UCB1400_CORE=m -# CONFIG_TPS65010 is not set -# CONFIG_TWL4030_CORE is not set +# CONFIG_UCB1400_CORE is not set # CONFIG_MFD_TMIO is not set # CONFIG_MFD_T7L66XB is not set # CONFIG_MFD_TC6387XB is not set # CONFIG_MFD_TC6393XB is not set -# CONFIG_PMIC_DA903X is not set -# CONFIG_MFD_WM8400 is not set -# CONFIG_MFD_WM8350_I2C is not set -# CONFIG_MFD_PCF50633 is not set # # Multimedia devices @@ -1120,117 +1077,13 @@ CONFIG_UCB1400_CORE=m # # Multimedia core support # -CONFIG_VIDEO_DEV=m -CONFIG_VIDEO_V4L2_COMMON=m -# CONFIG_VIDEO_ALLOW_V4L1 is not set -CONFIG_VIDEO_V4L1_COMPAT=y +# CONFIG_VIDEO_DEV is not set # CONFIG_DVB_CORE is not set -CONFIG_VIDEO_MEDIA=m +# CONFIG_VIDEO_MEDIA is not set # # Multimedia drivers # -# CONFIG_MEDIA_ATTACH is not set -CONFIG_MEDIA_TUNER=m -CONFIG_MEDIA_TUNER_CUSTOMIZE=y -# CONFIG_MEDIA_TUNER_SIMPLE is not set -# CONFIG_MEDIA_TUNER_TDA8290 is not set -# CONFIG_MEDIA_TUNER_TDA827X is not set -# CONFIG_MEDIA_TUNER_TDA18271 is not set -# CONFIG_MEDIA_TUNER_TDA9887 is not set -# CONFIG_MEDIA_TUNER_TEA5761 is not set -# CONFIG_MEDIA_TUNER_TEA5767 is not set -# CONFIG_MEDIA_TUNER_MT20XX is not set -# CONFIG_MEDIA_TUNER_MT2060 is not set -# CONFIG_MEDIA_TUNER_MT2266 is not set -# CONFIG_MEDIA_TUNER_MT2131 is not set -# CONFIG_MEDIA_TUNER_QT1010 is not set -# CONFIG_MEDIA_TUNER_XC2028 is not set -# CONFIG_MEDIA_TUNER_XC5000 is not set -# CONFIG_MEDIA_TUNER_MXL5005S is not set -# CONFIG_MEDIA_TUNER_MXL5007T is not set -CONFIG_VIDEO_V4L2=m -CONFIG_VIDEOBUF_GEN=m -CONFIG_VIDEOBUF_DMA_SG=m -CONFIG_VIDEO_CAPTURE_DRIVERS=y -# CONFIG_VIDEO_ADV_DEBUG is not set -# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set -# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set - -# -# Encoders/decoders and other helper chips -# - -# -# Audio decoders -# -# CONFIG_VIDEO_TVAUDIO is not set -# CONFIG_VIDEO_TDA7432 is not set -# CONFIG_VIDEO_TDA9840 is not set -# CONFIG_VIDEO_TDA9875 is not set -# CONFIG_VIDEO_TEA6415C is not set -# CONFIG_VIDEO_TEA6420 is not set -# CONFIG_VIDEO_MSP3400 is not set -# CONFIG_VIDEO_CS5345 is not set -# CONFIG_VIDEO_CS53L32A is not set -# CONFIG_VIDEO_M52790 is not set -# CONFIG_VIDEO_TLV320AIC23B is not set -# CONFIG_VIDEO_WM8775 is not set -# CONFIG_VIDEO_WM8739 is not set -# CONFIG_VIDEO_VP27SMPX is not set - -# -# Video decoders -# -# CONFIG_VIDEO_OV7670 is not set -# CONFIG_VIDEO_TCM825X is not set -# CONFIG_VIDEO_SAA711X is not set -# CONFIG_VIDEO_SAA717X is not set -# CONFIG_VIDEO_TVP514X is not set -# CONFIG_VIDEO_TVP5150 is not set - -# -# Video and audio decoders -# -# CONFIG_VIDEO_CX25840 is not set - -# -# MPEG video encoders -# -# CONFIG_VIDEO_CX2341X is not set - -# -# Video encoders -# -# CONFIG_VIDEO_SAA7127 is not set - -# -# Video improvement chips -# -# CONFIG_VIDEO_UPD64031A is not set -# CONFIG_VIDEO_UPD64083 is not set -# CONFIG_VIDEO_VIVI is not set -# CONFIG_VIDEO_BT848 is not set -# CONFIG_VIDEO_SAA5246A is not set -# CONFIG_VIDEO_SAA5249 is not set -# CONFIG_VIDEO_SAA7134 is not set -# CONFIG_VIDEO_HEXIUM_ORION is not set -# CONFIG_VIDEO_HEXIUM_GEMINI is not set -# CONFIG_VIDEO_CX88 is not set -# CONFIG_VIDEO_IVTV is not set -# CONFIG_VIDEO_CAFE_CCIC is not set -CONFIG_SOC_CAMERA=m -# CONFIG_SOC_CAMERA_MT9M001 is not set -CONFIG_SOC_CAMERA_MT9M111=m -# CONFIG_SOC_CAMERA_MT9T031 is not set -# CONFIG_SOC_CAMERA_MT9V022 is not set -# CONFIG_SOC_CAMERA_TW9910 is not set -# CONFIG_SOC_CAMERA_PLATFORM is not set -# CONFIG_SOC_CAMERA_OV772X is not set -CONFIG_VIDEO_PXA27x=m -# CONFIG_VIDEO_SH_MOBILE_CEU is not set -# CONFIG_V4L_USB_DRIVERS is not set -# CONFIG_RADIO_ADAPTERS is not set # CONFIG_DAB is not set # @@ -1242,7 +1095,6 @@ CONFIG_VIDEO_PXA27x=m CONFIG_FB=y # CONFIG_FIRMWARE_EDID is not set # CONFIG_FB_DDC is not set -# CONFIG_FB_BOOT_VESA_SUPPORT is not set CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_COPYAREA=y CONFIG_FB_CFB_IMAGEBLIT=y @@ -1276,7 +1128,6 @@ CONFIG_FB_CFB_IMAGEBLIT=y # CONFIG_FB_S3 is not set # CONFIG_FB_SAVAGE is not set # CONFIG_FB_SIS is not set -# CONFIG_FB_VIA is not set # CONFIG_FB_NEOMAGIC is not set # CONFIG_FB_KYRO is not set # CONFIG_FB_3DFX is not set @@ -1287,17 +1138,13 @@ CONFIG_FB_CFB_IMAGEBLIT=y # CONFIG_FB_PM3 is not set # CONFIG_FB_CARMINE is not set CONFIG_FB_PXA=y -# CONFIG_FB_PXA_OVERLAY is not set # CONFIG_FB_PXA_SMARTPANEL is not set CONFIG_FB_PXA_PARAMETERS=y CONFIG_FB_MBX=m # CONFIG_FB_W100 is not set # CONFIG_FB_VIRTUAL is not set # CONFIG_FB_METRONOME is not set -# CONFIG_FB_MB862XX is not set -CONFIG_BACKLIGHT_LCD_SUPPORT=y -# CONFIG_LCD_CLASS_DEVICE is not set -# CONFIG_BACKLIGHT_CLASS_DEVICE is not set +# CONFIG_BACKLIGHT_LCD_SUPPORT is not set # # Display device support @@ -1320,7 +1167,6 @@ CONFIG_LOGO_LINUX_MONO=y CONFIG_LOGO_LINUX_VGA16=y CONFIG_LOGO_LINUX_CLUT224=y CONFIG_SOUND=m -CONFIG_SOUND_OSS_CORE=y CONFIG_SND=m CONFIG_SND_TIMER=m CONFIG_SND_PCM=m @@ -1336,16 +1182,81 @@ CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_DEBUG is not set CONFIG_SND_VMASTER=y CONFIG_SND_AC97_CODEC=m -# CONFIG_SND_DRIVERS is not set -# CONFIG_SND_PCI is not set +CONFIG_SND_DRIVERS=y +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set +# CONFIG_SND_AC97_POWER_SAVE is not set +CONFIG_SND_PCI=y +# CONFIG_SND_AD1889 is not set +# CONFIG_SND_ALS300 is not set +# CONFIG_SND_ALI5451 is not set +# CONFIG_SND_ATIIXP is not set +# CONFIG_SND_ATIIXP_MODEM is not set +# CONFIG_SND_AU8810 is not set +# CONFIG_SND_AU8820 is not set +# CONFIG_SND_AU8830 is not set +# CONFIG_SND_AW2 is not set +# CONFIG_SND_AZT3328 is not set +# CONFIG_SND_BT87X is not set +# CONFIG_SND_CA0106 is not set +# CONFIG_SND_CMIPCI is not set +# CONFIG_SND_OXYGEN is not set +# CONFIG_SND_CS4281 is not set +# CONFIG_SND_CS46XX is not set +# CONFIG_SND_DARLA20 is not set +# CONFIG_SND_GINA20 is not set +# CONFIG_SND_LAYLA20 is not set +# CONFIG_SND_DARLA24 is not set +# CONFIG_SND_GINA24 is not set +# CONFIG_SND_LAYLA24 is not set +# CONFIG_SND_MONA is not set +# CONFIG_SND_MIA is not set +# CONFIG_SND_ECHO3G is not set +# CONFIG_SND_INDIGO is not set +# CONFIG_SND_INDIGOIO is not set +# CONFIG_SND_INDIGODJ is not set +# CONFIG_SND_EMU10K1 is not set +# CONFIG_SND_EMU10K1X is not set +# CONFIG_SND_ENS1370 is not set +# CONFIG_SND_ENS1371 is not set +# CONFIG_SND_ES1938 is not set +# CONFIG_SND_ES1968 is not set +# CONFIG_SND_FM801 is not set +# CONFIG_SND_HDA_INTEL is not set +# CONFIG_SND_HDSP is not set +# CONFIG_SND_HDSPM is not set +# CONFIG_SND_HIFIER is not set +# CONFIG_SND_ICE1712 is not set +# CONFIG_SND_ICE1724 is not set +# CONFIG_SND_INTEL8X0 is not set +# CONFIG_SND_INTEL8X0M is not set +# CONFIG_SND_KORG1212 is not set +# CONFIG_SND_MAESTRO3 is not set +# CONFIG_SND_MIXART is not set +# CONFIG_SND_NM256 is not set +# CONFIG_SND_PCXHR is not set +# CONFIG_SND_RIPTIDE is not set +# CONFIG_SND_RME32 is not set +# CONFIG_SND_RME96 is not set +# CONFIG_SND_RME9652 is not set +# CONFIG_SND_SONICVIBES is not set +# CONFIG_SND_TRIDENT is not set +# CONFIG_SND_VIA82XX is not set +# CONFIG_SND_VIA82XX_MODEM is not set +# CONFIG_SND_VIRTUOSO is not set +# CONFIG_SND_VX222 is not set +# CONFIG_SND_YMFPCI is not set CONFIG_SND_ARM=y CONFIG_SND_PXA2XX_PCM=m -CONFIG_SND_PXA2XX_LIB=m -CONFIG_SND_PXA2XX_LIB_AC97=y CONFIG_SND_PXA2XX_AC97=m -# CONFIG_SND_SPI is not set -# CONFIG_SND_USB is not set -# CONFIG_SND_PCMCIA is not set +CONFIG_SND_USB=y +# CONFIG_SND_USB_AUDIO is not set +# CONFIG_SND_USB_CAIAQ is not set +CONFIG_SND_PCMCIA=y +# CONFIG_SND_VXPOCKET is not set +# CONFIG_SND_PDAUDIOCF is not set # CONFIG_SND_SOC is not set # CONFIG_SOUND_PRIME is not set CONFIG_AC97_BUS=m @@ -1358,37 +1269,9 @@ CONFIG_HID_DEBUG=y # USB Input Devices # CONFIG_USB_HID=y -# CONFIG_HID_PID is not set +# CONFIG_USB_HIDINPUT_POWERBOOK is not set +# CONFIG_HID_FF is not set # CONFIG_USB_HIDDEV is not set - -# -# Special HID drivers -# -CONFIG_HID_COMPAT=y -CONFIG_HID_A4TECH=y -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -CONFIG_HID_CHICONY=y -CONFIG_HID_CYPRESS=y -CONFIG_HID_EZKEY=y -CONFIG_HID_GYRATION=y -CONFIG_HID_LOGITECH=y -# CONFIG_LOGITECH_FF is not set -# CONFIG_LOGIRUMBLEPAD2_FF is not set -CONFIG_HID_MICROSOFT=y -CONFIG_HID_MONTEREY=y -# CONFIG_HID_NTRIG is not set -CONFIG_HID_PANTHERLORD=y -# CONFIG_PANTHERLORD_FF is not set -CONFIG_HID_PETALYNX=y -CONFIG_HID_SAMSUNG=y -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -# CONFIG_GREENASIA_FF is not set -# CONFIG_HID_TOPSEED is not set -# CONFIG_THRUSTMASTER_FF is not set -# CONFIG_ZEROPLUS_FF is not set CONFIG_USB_SUPPORT=y CONFIG_USB_ARCH_HAS_HCD=y CONFIG_USB_ARCH_HAS_OHCI=y @@ -1408,15 +1291,12 @@ CONFIG_USB_DEVICEFS=y # CONFIG_USB_OTG_WHITELIST is not set # CONFIG_USB_OTG_BLACKLIST_HUB is not set CONFIG_USB_MON=y -# CONFIG_USB_WUSB is not set -# CONFIG_USB_WUSB_CBAF is not set # # USB Host Controller Drivers # # CONFIG_USB_C67X00_HCD is not set # CONFIG_USB_EHCI_HCD is not set -# CONFIG_USB_OXU210HP_HCD is not set # CONFIG_USB_ISP116X_HCD is not set # CONFIG_USB_ISP1760_HCD is not set CONFIG_USB_OHCI_HCD=y @@ -1426,8 +1306,6 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y # CONFIG_USB_UHCI_HCD is not set # CONFIG_USB_SL811_HCD is not set # CONFIG_USB_R8A66597_HCD is not set -# CONFIG_USB_WHCI_HCD is not set -# CONFIG_USB_HWA_HCD is not set # CONFIG_USB_MUSB_HDRC is not set # @@ -1436,20 +1314,20 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set # CONFIG_USB_WDM is not set -# CONFIG_USB_TMC is not set # -# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; +# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' # # -# see USB_STORAGE Help for more information +# may also be needed; see USB_STORAGE Help for more information # CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_DATAFAB is not set # CONFIG_USB_STORAGE_FREECOM is not set # CONFIG_USB_STORAGE_ISD200 is not set +# CONFIG_USB_STORAGE_DPCM is not set # CONFIG_USB_STORAGE_USBAT is not set # CONFIG_USB_STORAGE_SDDR09 is not set # CONFIG_USB_STORAGE_SDDR55 is not set @@ -1477,7 +1355,6 @@ CONFIG_USB_STORAGE=y # CONFIG_USB_EMI62 is not set # CONFIG_USB_EMI26 is not set # CONFIG_USB_ADUTUX is not set -# CONFIG_USB_SEVSEG is not set # CONFIG_USB_RIO500 is not set # CONFIG_USB_LEGOTOWER is not set # CONFIG_USB_LCD is not set @@ -1494,20 +1371,13 @@ CONFIG_USB_STORAGE=y # CONFIG_USB_IOWARRIOR is not set # CONFIG_USB_TEST is not set # CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_VST is not set # CONFIG_USB_GADGET is not set - -# -# OTG and related infrastructure -# -# CONFIG_USB_GPIO_VBUS is not set -# CONFIG_UWB is not set CONFIG_MMC=m # CONFIG_MMC_DEBUG is not set # CONFIG_MMC_UNSAFE_RESUME is not set # -# MMC/SD/SDIO Card Drivers +# MMC/SD Card Drivers # CONFIG_MMC_BLOCK=m CONFIG_MMC_BLOCK_BOUNCE=y @@ -1515,12 +1385,11 @@ CONFIG_MMC_BLOCK_BOUNCE=y # CONFIG_MMC_TEST is not set # -# MMC/SD/SDIO Host Controller Drivers +# MMC/SD Host Controller Drivers # CONFIG_MMC_PXA=m # CONFIG_MMC_SDHCI is not set # CONFIG_MMC_TIFM_SD is not set -# CONFIG_MMC_SPI is not set # CONFIG_MMC_SDRICOH_CS is not set # CONFIG_MEMSTICK is not set # CONFIG_ACCESSIBILITY is not set @@ -1531,7 +1400,8 @@ CONFIG_LEDS_CLASS=y # LED drivers # # CONFIG_LEDS_PCA9532 is not set -CONFIG_LEDS_GPIO=m +# CONFIG_LEDS_GPIO is not set +CONFIG_LEDS_CM_X270=y # CONFIG_LEDS_PCA955X is not set # @@ -1540,7 +1410,6 @@ CONFIG_LEDS_GPIO=m CONFIG_LEDS_TRIGGERS=y # CONFIG_LEDS_TRIGGER_TIMER is not set CONFIG_LEDS_TRIGGER_HEARTBEAT=y -# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set # CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set CONFIG_RTC_LIB=y CONFIG_RTC_CLASS=y @@ -1572,43 +1441,37 @@ CONFIG_RTC_INTF_DEV=y # CONFIG_RTC_DRV_M41T80 is not set # CONFIG_RTC_DRV_S35390A is not set # CONFIG_RTC_DRV_FM3130 is not set -# CONFIG_RTC_DRV_RX8581 is not set # # SPI RTC drivers # -# CONFIG_RTC_DRV_M41T94 is not set -# CONFIG_RTC_DRV_DS1305 is not set -# CONFIG_RTC_DRV_DS1390 is not set -# CONFIG_RTC_DRV_MAX6902 is not set -# CONFIG_RTC_DRV_R9701 is not set -# CONFIG_RTC_DRV_RS5C348 is not set -# CONFIG_RTC_DRV_DS3234 is not set # # Platform RTC drivers # # CONFIG_RTC_DRV_CMOS is not set -# CONFIG_RTC_DRV_DS1286 is not set # CONFIG_RTC_DRV_DS1511 is not set # CONFIG_RTC_DRV_DS1553 is not set # CONFIG_RTC_DRV_DS1742 is not set # CONFIG_RTC_DRV_STK17TA8 is not set # CONFIG_RTC_DRV_M48T86 is not set -# CONFIG_RTC_DRV_M48T35 is not set # CONFIG_RTC_DRV_M48T59 is not set -# CONFIG_RTC_DRV_BQ4802 is not set CONFIG_RTC_DRV_V3020=y # # on-CPU RTC drivers # CONFIG_RTC_DRV_SA1100=y -# CONFIG_RTC_DRV_PXA is not set # CONFIG_DMADEVICES is not set + +# +# Voltage and Current regulators +# # CONFIG_REGULATOR is not set +# CONFIG_REGULATOR_FIXED_VOLTAGE is not set +# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set +# CONFIG_REGULATOR_BQ24022 is not set # CONFIG_UIO is not set -# CONFIG_STAGING is not set # # File systems @@ -1620,16 +1483,14 @@ CONFIG_EXT3_FS=y CONFIG_EXT3_FS_XATTR=y # CONFIG_EXT3_FS_POSIX_ACL is not set # CONFIG_EXT3_FS_SECURITY is not set -# CONFIG_EXT4_FS is not set +# CONFIG_EXT4DEV_FS is not set CONFIG_JBD=y CONFIG_FS_MBCACHE=y # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set -CONFIG_FILE_LOCKING=y # CONFIG_XFS_FS is not set # CONFIG_OCFS2_FS is not set -# CONFIG_BTRFS_FS is not set CONFIG_DNOTIFY=y CONFIG_INOTIFY=y CONFIG_INOTIFY_USER=y @@ -1659,13 +1520,15 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" # CONFIG_PROC_FS=y CONFIG_PROC_SYSCTL=y -# CONFIG_PROC_PAGE_MONITOR is not set CONFIG_SYSFS=y CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set # CONFIG_CONFIGFS_FS is not set -CONFIG_MISC_FILESYSTEMS=y + +# +# Miscellaneous filesystems +# # CONFIG_ADFS_FS is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set @@ -1685,7 +1548,6 @@ CONFIG_JFFS2_ZLIB=y CONFIG_JFFS2_RTIME=y # CONFIG_JFFS2_RUBIN is not set # CONFIG_CRAMFS is not set -# CONFIG_SQUASHFS is not set # CONFIG_VXFS_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_OMFS_FS is not set @@ -1705,7 +1567,6 @@ CONFIG_LOCKD=y CONFIG_LOCKD_V4=y CONFIG_NFS_COMMON=y CONFIG_SUNRPC=y -# CONFIG_SUNRPC_REGISTER_V4 is not set # CONFIG_RPCSEC_GSS_KRB5 is not set # CONFIG_RPCSEC_GSS_SPKM3 is not set # CONFIG_SMB_FS is not set @@ -1817,29 +1678,19 @@ CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_MEMORY_INIT is not set # CONFIG_DEBUG_LIST is not set # CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_NOTIFIERS is not set CONFIG_FRAME_POINTER=y # CONFIG_BOOT_PRINTK_DELAY is not set # CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RCU_CPU_STALL_DETECTOR is not set # CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set # CONFIG_FAULT_INJECTION is not set # CONFIG_LATENCYTOP is not set CONFIG_SYSCTL_SYSCALL_CHECK=y -CONFIG_HAVE_FUNCTION_TRACER=y - -# -# Tracers -# -# CONFIG_FUNCTION_TRACER is not set +CONFIG_HAVE_FTRACE=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +# CONFIG_FTRACE is not set # CONFIG_IRQSOFF_TRACER is not set # CONFIG_SCHED_TRACER is not set # CONFIG_CONTEXT_SWITCH_TRACER is not set -# CONFIG_BOOT_TRACER is not set -# CONFIG_TRACE_BRANCH_PROFILING is not set -# CONFIG_STACK_TRACER is not set -# CONFIG_DYNAMIC_PRINTK_DEBUG is not set # CONFIG_SAMPLES is not set CONFIG_HAVE_ARCH_KGDB=y # CONFIG_KGDB is not set @@ -1854,16 +1705,13 @@ CONFIG_DEBUG_LL=y # # CONFIG_KEYS is not set # CONFIG_SECURITY is not set -# CONFIG_SECURITYFS is not set # CONFIG_SECURITY_FILE_CAPABILITIES is not set CONFIG_CRYPTO=y # # Crypto core or helper # -# CONFIG_CRYPTO_FIPS is not set # CONFIG_CRYPTO_MANAGER is not set -# CONFIG_CRYPTO_MANAGER2 is not set # CONFIG_CRYPTO_GF128MUL is not set # CONFIG_CRYPTO_NULL is not set # CONFIG_CRYPTO_CRYPTD is not set @@ -1935,18 +1783,14 @@ CONFIG_CRYPTO=y # # CONFIG_CRYPTO_DEFLATE is not set # CONFIG_CRYPTO_LZO is not set - -# -# Random Number Generation -# -# CONFIG_CRYPTO_ANSI_CPRNG is not set # CONFIG_CRYPTO_HW is not set # # Library routines # CONFIG_BITREVERSE=y -CONFIG_GENERIC_FIND_LAST_BIT=y +# CONFIG_GENERIC_FIND_FIRST_BIT is not set +# CONFIG_GENERIC_FIND_NEXT_BIT is not set CONFIG_CRC_CCITT=m # CONFIG_CRC16 is not set # CONFIG_CRC_T10DIF is not set diff --git a/trunk/arch/arm/configs/yl9200_defconfig b/trunk/arch/arm/configs/yl9200_defconfig index 9192e5977674..a9f41c24c9dc 100644 --- a/trunk/arch/arm/configs/yl9200_defconfig +++ b/trunk/arch/arm/configs/yl9200_defconfig @@ -682,7 +682,7 @@ CONFIG_SPI_ATMEL=y # # SPI Protocol Masters # -# CONFIG_EEPROM_AT25 is not set +# CONFIG_SPI_AT25 is not set # CONFIG_SPI_TLE62X0 is not set # CONFIG_W1 is not set # CONFIG_POWER_SUPPLY is not set diff --git a/trunk/arch/arm/include/asm/dma.h b/trunk/arch/arm/include/asm/dma.h index 7edf3536df24..df5638f3643a 100644 --- a/trunk/arch/arm/include/asm/dma.h +++ b/trunk/arch/arm/include/asm/dma.h @@ -19,17 +19,21 @@ #include #include +typedef unsigned int dmach_t; + #include /* - * The DMA modes reflect the settings for the ISA DMA controller + * DMA modes */ -#define DMA_MODE_MASK 0xcc +typedef unsigned int dmamode_t; + +#define DMA_MODE_MASK 3 -#define DMA_MODE_READ 0x44 -#define DMA_MODE_WRITE 0x48 -#define DMA_MODE_CASCADE 0xc0 -#define DMA_AUTOINIT 0x10 +#define DMA_MODE_READ 0 +#define DMA_MODE_WRITE 1 +#define DMA_MODE_CASCADE 2 +#define DMA_AUTOINIT 4 extern spinlock_t dma_spin_lock; @@ -48,44 +52,44 @@ static inline void release_dma_lock(unsigned long flags) /* Clear the 'DMA Pointer Flip Flop'. * Write 0 for LSB/MSB, 1 for MSB/LSB access. */ -#define clear_dma_ff(chan) +#define clear_dma_ff(channel) /* Set only the page register bits of the transfer address. * * NOTE: This is an architecture specific function, and should * be hidden from the drivers */ -extern void set_dma_page(unsigned int chan, char pagenr); +extern void set_dma_page(dmach_t channel, char pagenr); /* Request a DMA channel * * Some architectures may need to do allocate an interrupt */ -extern int request_dma(unsigned int chan, const char * device_id); +extern int request_dma(dmach_t channel, const char * device_id); /* Free a DMA channel * * Some architectures may need to do free an interrupt */ -extern void free_dma(unsigned int chan); +extern void free_dma(dmach_t channel); /* Enable DMA for this channel * * On some architectures, this may have other side effects like * enabling an interrupt and setting the DMA registers. */ -extern void enable_dma(unsigned int chan); +extern void enable_dma(dmach_t channel); /* Disable DMA for this channel * * On some architectures, this may have other side effects like * disabling an interrupt or whatever. */ -extern void disable_dma(unsigned int chan); +extern void disable_dma(dmach_t channel); /* Test whether the specified channel has an active DMA transfer */ -extern int dma_channel_active(unsigned int chan); +extern int dma_channel_active(dmach_t channel); /* Set the DMA scatter gather list for this channel * @@ -93,7 +97,7 @@ extern int dma_channel_active(unsigned int chan); * especially since some DMA architectures don't update the * DMA address immediately, but defer it to the enable_dma(). */ -extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg); +extern void set_dma_sg(dmach_t channel, struct scatterlist *sg, int nr_sg); /* Set the DMA address for this channel * @@ -101,9 +105,9 @@ extern void set_dma_sg(unsigned int chan, struct scatterlist *sg, int nr_sg); * especially since some DMA architectures don't update the * DMA address immediately, but defer it to the enable_dma(). */ -extern void __set_dma_addr(unsigned int chan, void *addr); -#define set_dma_addr(chan, addr) \ - __set_dma_addr(chan, bus_to_virt(addr)) +extern void __set_dma_addr(dmach_t channel, void *addr); +#define set_dma_addr(channel, addr) \ + __set_dma_addr(channel, bus_to_virt(addr)) /* Set the DMA byte count for this channel * @@ -111,7 +115,7 @@ extern void __set_dma_addr(unsigned int chan, void *addr); * especially since some DMA architectures don't update the * DMA count immediately, but defer it to the enable_dma(). */ -extern void set_dma_count(unsigned int chan, unsigned long count); +extern void set_dma_count(dmach_t channel, unsigned long count); /* Set the transfer direction for this channel * @@ -120,11 +124,11 @@ extern void set_dma_count(unsigned int chan, unsigned long count); * DMA transfer direction immediately, but defer it to the * enable_dma(). */ -extern void set_dma_mode(unsigned int chan, unsigned int mode); +extern void set_dma_mode(dmach_t channel, dmamode_t mode); /* Set the transfer speed for this channel */ -extern void set_dma_speed(unsigned int chan, int cycle_ns); +extern void set_dma_speed(dmach_t channel, int cycle_ns); /* Get DMA residue count. After a DMA transfer, this * should return zero. Reading this while a DMA transfer is @@ -132,7 +136,7 @@ extern void set_dma_speed(unsigned int chan, int cycle_ns); * If called before the channel has been used, it may return 1. * Otherwise, it returns the number of _bytes_ left to transfer. */ -extern int get_dma_residue(unsigned int chan); +extern int get_dma_residue(dmach_t channel); #ifndef NO_DMA #define NO_DMA 255 diff --git a/trunk/arch/arm/include/asm/elf.h b/trunk/arch/arm/include/asm/elf.h index def8eac6e89d..a58378c343b9 100644 --- a/trunk/arch/arm/include/asm/elf.h +++ b/trunk/arch/arm/include/asm/elf.h @@ -50,7 +50,6 @@ typedef struct user_fp elf_fpregset_t; #define R_ARM_ABS32 2 #define R_ARM_CALL 28 #define R_ARM_JUMP24 29 -#define R_ARM_PREL31 42 /* * These are used to set parameters in the core dumps. diff --git a/trunk/arch/arm/include/asm/hwcap.h b/trunk/arch/arm/include/asm/hwcap.h index f7bd52b1c365..bda489f9f017 100644 --- a/trunk/arch/arm/include/asm/hwcap.h +++ b/trunk/arch/arm/include/asm/hwcap.h @@ -17,8 +17,6 @@ #define HWCAP_CRUNCH 1024 #define HWCAP_THUMBEE 2048 #define HWCAP_NEON 4096 -#define HWCAP_VFPv3 8192 -#define HWCAP_VFPv3D16 16384 #if defined(__KERNEL__) && !defined(__ASSEMBLY__) /* diff --git a/trunk/arch/arm/include/asm/mach/dma.h b/trunk/arch/arm/include/asm/mach/dma.h index 9e614a18e680..fc7278ea7146 100644 --- a/trunk/arch/arm/include/asm/mach/dma.h +++ b/trunk/arch/arm/include/asm/mach/dma.h @@ -15,13 +15,13 @@ struct dma_struct; typedef struct dma_struct dma_t; struct dma_ops { - int (*request)(unsigned int, dma_t *); /* optional */ - void (*free)(unsigned int, dma_t *); /* optional */ - void (*enable)(unsigned int, dma_t *); /* mandatory */ - void (*disable)(unsigned int, dma_t *); /* mandatory */ - int (*residue)(unsigned int, dma_t *); /* optional */ - int (*setspeed)(unsigned int, dma_t *, int); /* optional */ - const char *type; + int (*request)(dmach_t, dma_t *); /* optional */ + void (*free)(dmach_t, dma_t *); /* optional */ + void (*enable)(dmach_t, dma_t *); /* mandatory */ + void (*disable)(dmach_t, dma_t *); /* mandatory */ + int (*residue)(dmach_t, dma_t *); /* optional */ + int (*setspeed)(dmach_t, dma_t *, int); /* optional */ + char *type; }; struct dma_struct { @@ -34,21 +34,24 @@ struct dma_struct { unsigned int active:1; /* Transfer active */ unsigned int invalid:1; /* Address/Count changed */ - unsigned int dma_mode; /* DMA mode */ + dmamode_t dma_mode; /* DMA mode */ int speed; /* DMA speed */ unsigned int lock; /* Device is allocated */ const char *device_id; /* Device name */ - const struct dma_ops *d_ops; + unsigned int dma_base; /* Controller base address */ + int dma_irq; /* Controller IRQ */ + struct scatterlist cur_sg; /* Current controller buffer */ + unsigned int state; + + struct dma_ops *d_ops; }; -/* - * isa_dma_add - add an ISA-style DMA channel +/* Prototype: void arch_dma_init(dma) + * Purpose : Initialise architecture specific DMA + * Params : dma - pointer to array of DMA structures */ -extern int isa_dma_add(unsigned int, dma_t *dma); +extern void arch_dma_init(dma_t *dma); -/* - * Add the ISA DMA controller. Always takes channels 0-7. - */ -extern void isa_init_dma(void); +extern void isa_init_dma(dma_t *dma); diff --git a/trunk/arch/arm/include/asm/mach/map.h b/trunk/arch/arm/include/asm/mach/map.h index 58cf91f38e6f..39d949b63e80 100644 --- a/trunk/arch/arm/include/asm/mach/map.h +++ b/trunk/arch/arm/include/asm/mach/map.h @@ -26,7 +26,6 @@ struct map_desc { #define MT_HIGH_VECTORS 8 #define MT_MEMORY 9 #define MT_ROM 10 -#define MT_MEMORY_NONCACHED 11 #ifdef CONFIG_MMU extern void iotable_init(struct map_desc *, int); diff --git a/trunk/arch/arm/include/asm/module.h b/trunk/arch/arm/include/asm/module.h index e4dfa69abb68..24b168dc31a3 100644 --- a/trunk/arch/arm/include/asm/module.h +++ b/trunk/arch/arm/include/asm/module.h @@ -1,27 +1,15 @@ #ifndef _ASM_ARM_MODULE_H #define _ASM_ARM_MODULE_H -#define Elf_Shdr Elf32_Shdr -#define Elf_Sym Elf32_Sym -#define Elf_Ehdr Elf32_Ehdr - -struct unwind_table; - struct mod_arch_specific { -#ifdef CONFIG_ARM_UNWIND - Elf_Shdr *unw_sec_init; - Elf_Shdr *unw_sec_devinit; - Elf_Shdr *unw_sec_core; - Elf_Shdr *sec_init_text; - Elf_Shdr *sec_devinit_text; - Elf_Shdr *sec_core_text; - struct unwind_table *unwind_init; - struct unwind_table *unwind_devinit; - struct unwind_table *unwind_core; -#endif + int foo; }; +#define Elf_Shdr Elf32_Shdr +#define Elf_Sym Elf32_Sym +#define Elf_Ehdr Elf32_Ehdr + /* * Include the ARM architecture version. */ diff --git a/trunk/arch/arm/include/asm/ptrace.h b/trunk/arch/arm/include/asm/ptrace.h index 236a06b9b7ce..73192618f1c2 100644 --- a/trunk/arch/arm/include/asm/ptrace.h +++ b/trunk/arch/arm/include/asm/ptrace.h @@ -27,8 +27,6 @@ /* PTRACE_SYSCALL is 24 */ #define PTRACE_GETCRUNCHREGS 25 #define PTRACE_SETCRUNCHREGS 26 -#define PTRACE_GETVFPREGS 27 -#define PTRACE_SETVFPREGS 28 /* * PSR bits diff --git a/trunk/arch/arm/include/asm/sizes.h b/trunk/arch/arm/include/asm/sizes.h index c10d1aa4b487..503843db1565 100644 --- a/trunk/arch/arm/include/asm/sizes.h +++ b/trunk/arch/arm/include/asm/sizes.h @@ -43,7 +43,6 @@ #define SZ_8M 0x00800000 #define SZ_16M 0x01000000 #define SZ_32M 0x02000000 -#define SZ_48M 0x03000000 #define SZ_64M 0x04000000 #define SZ_128M 0x08000000 #define SZ_256M 0x10000000 diff --git a/trunk/arch/arm/include/asm/stacktrace.h b/trunk/arch/arm/include/asm/stacktrace.h deleted file mode 100644 index 4d0a16441b29..000000000000 --- a/trunk/arch/arm/include/asm/stacktrace.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef __ASM_STACKTRACE_H -#define __ASM_STACKTRACE_H - -struct stackframe { - unsigned long fp; - unsigned long sp; - unsigned long lr; - unsigned long pc; -}; - -extern int unwind_frame(struct stackframe *frame); -extern void walk_stackframe(struct stackframe *frame, - int (*fn)(struct stackframe *, void *), void *data); - -#endif /* __ASM_STACKTRACE_H */ diff --git a/trunk/arch/arm/include/asm/system.h b/trunk/arch/arm/include/asm/system.h index 0a0d49ae1e6d..811be55f338e 100644 --- a/trunk/arch/arm/include/asm/system.h +++ b/trunk/arch/arm/include/asm/system.h @@ -97,8 +97,8 @@ extern void __show_regs(struct pt_regs *); extern int cpu_architecture(void); extern void cpu_init(void); -void arm_machine_restart(char mode, const char *cmd); -extern void (*arm_pm_restart)(char str, const char *cmd); +void arm_machine_restart(char mode); +extern void (*arm_pm_restart)(char str); #define UDBG_UNDEFINED (1 << 0) #define UDBG_SYSCALL (1 << 1) diff --git a/trunk/arch/arm/include/asm/thread_info.h b/trunk/arch/arm/include/asm/thread_info.h index 4f8848260ee2..68b9ec82a37f 100644 --- a/trunk/arch/arm/include/asm/thread_info.h +++ b/trunk/arch/arm/include/asm/thread_info.h @@ -99,8 +99,6 @@ static inline struct thread_info *current_thread_info(void) #define thread_saved_pc(tsk) \ ((unsigned long)(task_thread_info(tsk)->cpu_context.pc)) -#define thread_saved_sp(tsk) \ - ((unsigned long)(task_thread_info(tsk)->cpu_context.sp)) #define thread_saved_fp(tsk) \ ((unsigned long)(task_thread_info(tsk)->cpu_context.fp)) @@ -115,8 +113,6 @@ extern void iwmmxt_task_restore(struct thread_info *, void *); extern void iwmmxt_task_release(struct thread_info *); extern void iwmmxt_task_switch(struct thread_info *); -extern void vfp_sync_state(struct thread_info *thread); - #endif /* diff --git a/trunk/arch/arm/include/asm/traps.h b/trunk/arch/arm/include/asm/traps.h index 491960bf4260..aa399aec568e 100644 --- a/trunk/arch/arm/include/asm/traps.h +++ b/trunk/arch/arm/include/asm/traps.h @@ -25,6 +25,5 @@ static inline int in_exception_text(unsigned long ptr) } extern void __init early_trap_init(void); -extern void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame); #endif diff --git a/trunk/arch/arm/include/asm/unwind.h b/trunk/arch/arm/include/asm/unwind.h deleted file mode 100644 index a5edf421005c..000000000000 --- a/trunk/arch/arm/include/asm/unwind.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * arch/arm/include/asm/unwind.h - * - * Copyright (C) 2008 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_UNWIND_H -#define __ASM_UNWIND_H - -#ifndef __ASSEMBLY__ - -/* Unwind reason code according the the ARM EABI documents */ -enum unwind_reason_code { - URC_OK = 0, /* operation completed successfully */ - URC_CONTINUE_UNWIND = 8, - URC_FAILURE = 9 /* unspecified failure of some kind */ -}; - -struct unwind_idx { - unsigned long addr; - unsigned long insn; -}; - -struct unwind_table { - struct list_head list; - struct unwind_idx *start; - struct unwind_idx *stop; - unsigned long begin_addr; - unsigned long end_addr; -}; - -extern struct unwind_table *unwind_table_add(unsigned long start, - unsigned long size, - unsigned long text_addr, - unsigned long text_size); -extern void unwind_table_del(struct unwind_table *tab); -extern void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk); - -#ifdef CONFIG_ARM_UNWIND -extern int __init unwind_init(void); -#else -static inline int __init unwind_init(void) -{ - return 0; -} -#endif - -#endif /* !__ASSEMBLY__ */ - -#ifdef CONFIG_ARM_UNWIND -#define UNWIND(code...) code -#else -#define UNWIND(code...) -#endif - -#endif /* __ASM_UNWIND_H */ diff --git a/trunk/arch/arm/include/asm/user.h b/trunk/arch/arm/include/asm/user.h index df95e050f9dd..825c1e7c582d 100644 --- a/trunk/arch/arm/include/asm/user.h +++ b/trunk/arch/arm/include/asm/user.h @@ -81,13 +81,4 @@ struct user{ #define HOST_TEXT_START_ADDR (u.start_code) #define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG) -/* - * User specific VFP registers. If only VFPv2 is present, registers 16 to 31 - * are ignored by the ptrace system call. - */ -struct user_vfp { - unsigned long long fpregs[32]; - unsigned long fpscr; -}; - #endif /* _ARM_USER_H */ diff --git a/trunk/arch/arm/kernel/Makefile b/trunk/arch/arm/kernel/Makefile index ca60d335e8fa..4305345987d3 100644 --- a/trunk/arch/arm/kernel/Makefile +++ b/trunk/arch/arm/kernel/Makefile @@ -29,7 +29,6 @@ obj-$(CONFIG_ATAGS_PROC) += atags.o obj-$(CONFIG_OABI_COMPAT) += sys_oabi-compat.o obj-$(CONFIG_ARM_THUMBEE) += thumbee.o obj-$(CONFIG_KGDB) += kgdb.o -obj-$(CONFIG_ARM_UNWIND) += unwind.o obj-$(CONFIG_CRUNCH) += crunch.o crunch-bits.o AFLAGS_crunch-bits.o := -Wa,-mcpu=ep9312 diff --git a/trunk/arch/arm/kernel/debug.S b/trunk/arch/arm/kernel/debug.S index b121b6053cce..f53c58290543 100644 --- a/trunk/arch/arm/kernel/debug.S +++ b/trunk/arch/arm/kernel/debug.S @@ -49,33 +49,6 @@ 1002: .endm -#elif defined(CONFIG_CPU_XSCALE) - - .macro addruart, rx - .endm - - .macro senduart, rd, rx - mcr p14, 0, \rd, c8, c0, 0 - .endm - - .macro busyuart, rd, rx -1001: - mrc p14, 0, \rx, c14, c0, 0 - tst \rx, #0x10000000 - beq 1001b - .endm - - .macro waituart, rd, rx - mov \rd, #0x10000000 -1001: - subs \rd, \rd, #1 - bmi 1002f - mrc p14, 0, \rx, c14, c0, 0 - tst \rx, #0x10000000 - bne 1001b -1002: - .endm - #else .macro addruart, rx diff --git a/trunk/arch/arm/kernel/dma-isa.c b/trunk/arch/arm/kernel/dma-isa.c index 0e88e46fc732..4a3a50495c60 100644 --- a/trunk/arch/arm/kernel/dma-isa.c +++ b/trunk/arch/arm/kernel/dma-isa.c @@ -24,6 +24,11 @@ #include #include +#define ISA_DMA_MODE_READ 0x44 +#define ISA_DMA_MODE_WRITE 0x48 +#define ISA_DMA_MODE_CASCADE 0xc0 +#define ISA_DMA_AUTOINIT 0x10 + #define ISA_DMA_MASK 0 #define ISA_DMA_MODE 1 #define ISA_DMA_CLRFF 2 @@ -44,35 +49,38 @@ static unsigned int isa_dma_port[8][7] = { { 0xd4, 0xd6, 0xd8, 0x48a, 0x08a, 0xcc, 0xce } }; -static int isa_get_dma_residue(unsigned int chan, dma_t *dma) +static int isa_get_dma_residue(dmach_t channel, dma_t *dma) { - unsigned int io_port = isa_dma_port[chan][ISA_DMA_COUNT]; + unsigned int io_port = isa_dma_port[channel][ISA_DMA_COUNT]; int count; count = 1 + inb(io_port); count |= inb(io_port) << 8; - return chan < 4 ? count : (count << 1); + return channel < 4 ? count : (count << 1); } -static void isa_enable_dma(unsigned int chan, dma_t *dma) +static void isa_enable_dma(dmach_t channel, dma_t *dma) { if (dma->invalid) { unsigned long address, length; unsigned int mode; enum dma_data_direction direction; - mode = (chan & 3) | dma->dma_mode; + mode = channel & 3; switch (dma->dma_mode & DMA_MODE_MASK) { case DMA_MODE_READ: + mode |= ISA_DMA_MODE_READ; direction = DMA_FROM_DEVICE; break; case DMA_MODE_WRITE: + mode |= ISA_DMA_MODE_WRITE; direction = DMA_TO_DEVICE; break; case DMA_MODE_CASCADE: + mode |= ISA_DMA_MODE_CASCADE; direction = DMA_BIDIRECTIONAL; break; @@ -97,31 +105,34 @@ static void isa_enable_dma(unsigned int chan, dma_t *dma) address = dma->buf.dma_address; length = dma->buf.length - 1; - outb(address >> 16, isa_dma_port[chan][ISA_DMA_PGLO]); - outb(address >> 24, isa_dma_port[chan][ISA_DMA_PGHI]); + outb(address >> 16, isa_dma_port[channel][ISA_DMA_PGLO]); + outb(address >> 24, isa_dma_port[channel][ISA_DMA_PGHI]); - if (chan >= 4) { + if (channel >= 4) { address >>= 1; length >>= 1; } - outb(0, isa_dma_port[chan][ISA_DMA_CLRFF]); + outb(0, isa_dma_port[channel][ISA_DMA_CLRFF]); + + outb(address, isa_dma_port[channel][ISA_DMA_ADDR]); + outb(address >> 8, isa_dma_port[channel][ISA_DMA_ADDR]); - outb(address, isa_dma_port[chan][ISA_DMA_ADDR]); - outb(address >> 8, isa_dma_port[chan][ISA_DMA_ADDR]); + outb(length, isa_dma_port[channel][ISA_DMA_COUNT]); + outb(length >> 8, isa_dma_port[channel][ISA_DMA_COUNT]); - outb(length, isa_dma_port[chan][ISA_DMA_COUNT]); - outb(length >> 8, isa_dma_port[chan][ISA_DMA_COUNT]); + if (dma->dma_mode & DMA_AUTOINIT) + mode |= ISA_DMA_AUTOINIT; - outb(mode, isa_dma_port[chan][ISA_DMA_MODE]); + outb(mode, isa_dma_port[channel][ISA_DMA_MODE]); dma->invalid = 0; } - outb(chan & 3, isa_dma_port[chan][ISA_DMA_MASK]); + outb(channel & 3, isa_dma_port[channel][ISA_DMA_MASK]); } -static void isa_disable_dma(unsigned int chan, dma_t *dma) +static void isa_disable_dma(dmach_t channel, dma_t *dma) { - outb(chan | 4, isa_dma_port[chan][ISA_DMA_MASK]); + outb(channel | 4, isa_dma_port[channel][ISA_DMA_MASK]); } static struct dma_ops isa_dma_ops = { @@ -149,12 +160,7 @@ static struct resource dma_resources[] = { { .end = 0x048f } }; -static dma_t isa_dma[8]; - -/* - * ISA DMA always starts at channel 0 - */ -void __init isa_init_dma(void) +void __init isa_init_dma(dma_t *dma) { /* * Try to autodetect presence of an ISA DMA controller. @@ -172,11 +178,11 @@ void __init isa_init_dma(void) outb(0xaa, 0x00); if (inb(0) == 0x55 && inb(0) == 0xaa) { - unsigned int chan, i; + int channel, i; - for (chan = 0; chan < 8; chan++) { - isa_dma[chan].d_ops = &isa_dma_ops; - isa_disable_dma(chan, NULL); + for (channel = 0; channel < 8; channel++) { + dma[channel].d_ops = &isa_dma_ops; + isa_disable_dma(channel, NULL); } outb(0x40, 0x0b); @@ -211,12 +217,5 @@ void __init isa_init_dma(void) for (i = 0; i < ARRAY_SIZE(dma_resources); i++) request_resource(&ioport_resource, dma_resources + i); - - for (chan = 0; chan < 8; chan++) { - int ret = isa_dma_add(chan, &isa_dma[chan]); - if (ret) - printk(KERN_ERR "ISADMA%u: unable to register: %d\n", - chan, ret); - } } } diff --git a/trunk/arch/arm/kernel/dma.c b/trunk/arch/arm/kernel/dma.c index 7d5b9fb01e71..d006085ed7e7 100644 --- a/trunk/arch/arm/kernel/dma.c +++ b/trunk/arch/arm/kernel/dma.c @@ -15,7 +15,6 @@ #include #include #include -#include #include @@ -24,40 +23,19 @@ DEFINE_SPINLOCK(dma_spin_lock); EXPORT_SYMBOL(dma_spin_lock); -static dma_t *dma_chan[MAX_DMA_CHANNELS]; - -static inline dma_t *dma_channel(unsigned int chan) -{ - if (chan >= MAX_DMA_CHANNELS) - return NULL; - - return dma_chan[chan]; -} - -int __init isa_dma_add(unsigned int chan, dma_t *dma) -{ - if (!dma->d_ops) - return -EINVAL; - - sg_init_table(&dma->buf, 1); - - if (dma_chan[chan]) - return -EBUSY; - dma_chan[chan] = dma; - return 0; -} +static dma_t dma_chan[MAX_DMA_CHANNELS]; /* * Request DMA channel * * On certain platforms, we have to allocate an interrupt as well... */ -int request_dma(unsigned int chan, const char *device_id) +int request_dma(dmach_t channel, const char *device_id) { - dma_t *dma = dma_channel(chan); + dma_t *dma = dma_chan + channel; int ret; - if (!dma) + if (channel >= MAX_DMA_CHANNELS || !dma->d_ops) goto bad_dma; if (xchg(&dma->lock, 1) != 0) @@ -69,7 +47,7 @@ int request_dma(unsigned int chan, const char *device_id) ret = 0; if (dma->d_ops->request) - ret = dma->d_ops->request(chan, dma); + ret = dma->d_ops->request(channel, dma); if (ret) xchg(&dma->lock, 0); @@ -77,7 +55,7 @@ int request_dma(unsigned int chan, const char *device_id) return ret; bad_dma: - printk(KERN_ERR "dma: trying to allocate DMA%d\n", chan); + printk(KERN_ERR "dma: trying to allocate DMA%d\n", channel); return -EINVAL; busy: @@ -90,42 +68,42 @@ EXPORT_SYMBOL(request_dma); * * On certain platforms, we have to free interrupt as well... */ -void free_dma(unsigned int chan) +void free_dma(dmach_t channel) { - dma_t *dma = dma_channel(chan); + dma_t *dma = dma_chan + channel; - if (!dma) + if (channel >= MAX_DMA_CHANNELS || !dma->d_ops) goto bad_dma; if (dma->active) { - printk(KERN_ERR "dma%d: freeing active DMA\n", chan); - dma->d_ops->disable(chan, dma); + printk(KERN_ERR "dma%d: freeing active DMA\n", channel); + dma->d_ops->disable(channel, dma); dma->active = 0; } if (xchg(&dma->lock, 0) != 0) { if (dma->d_ops->free) - dma->d_ops->free(chan, dma); + dma->d_ops->free(channel, dma); return; } - printk(KERN_ERR "dma%d: trying to free free DMA\n", chan); + printk(KERN_ERR "dma%d: trying to free free DMA\n", channel); return; bad_dma: - printk(KERN_ERR "dma: trying to free DMA%d\n", chan); + printk(KERN_ERR "dma: trying to free DMA%d\n", channel); } EXPORT_SYMBOL(free_dma); /* Set DMA Scatter-Gather list */ -void set_dma_sg (unsigned int chan, struct scatterlist *sg, int nr_sg) +void set_dma_sg (dmach_t channel, struct scatterlist *sg, int nr_sg) { - dma_t *dma = dma_channel(chan); + dma_t *dma = dma_chan + channel; if (dma->active) printk(KERN_ERR "dma%d: altering DMA SG while " - "DMA active\n", chan); + "DMA active\n", channel); dma->sg = sg; dma->sgcount = nr_sg; @@ -137,13 +115,13 @@ EXPORT_SYMBOL(set_dma_sg); * * Copy address to the structure, and set the invalid bit */ -void __set_dma_addr (unsigned int chan, void *addr) +void __set_dma_addr (dmach_t channel, void *addr) { - dma_t *dma = dma_channel(chan); + dma_t *dma = dma_chan + channel; if (dma->active) printk(KERN_ERR "dma%d: altering DMA address while " - "DMA active\n", chan); + "DMA active\n", channel); dma->sg = NULL; dma->addr = addr; @@ -155,13 +133,13 @@ EXPORT_SYMBOL(__set_dma_addr); * * Copy address to the structure, and set the invalid bit */ -void set_dma_count (unsigned int chan, unsigned long count) +void set_dma_count (dmach_t channel, unsigned long count) { - dma_t *dma = dma_channel(chan); + dma_t *dma = dma_chan + channel; if (dma->active) printk(KERN_ERR "dma%d: altering DMA count while " - "DMA active\n", chan); + "DMA active\n", channel); dma->sg = NULL; dma->count = count; @@ -171,13 +149,13 @@ EXPORT_SYMBOL(set_dma_count); /* Set DMA direction mode */ -void set_dma_mode (unsigned int chan, unsigned int mode) +void set_dma_mode (dmach_t channel, dmamode_t mode) { - dma_t *dma = dma_channel(chan); + dma_t *dma = dma_chan + channel; if (dma->active) printk(KERN_ERR "dma%d: altering DMA mode while " - "DMA active\n", chan); + "DMA active\n", channel); dma->dma_mode = mode; dma->invalid = 1; @@ -186,42 +164,42 @@ EXPORT_SYMBOL(set_dma_mode); /* Enable DMA channel */ -void enable_dma (unsigned int chan) +void enable_dma (dmach_t channel) { - dma_t *dma = dma_channel(chan); + dma_t *dma = dma_chan + channel; if (!dma->lock) goto free_dma; if (dma->active == 0) { dma->active = 1; - dma->d_ops->enable(chan, dma); + dma->d_ops->enable(channel, dma); } return; free_dma: - printk(KERN_ERR "dma%d: trying to enable free DMA\n", chan); + printk(KERN_ERR "dma%d: trying to enable free DMA\n", channel); BUG(); } EXPORT_SYMBOL(enable_dma); /* Disable DMA channel */ -void disable_dma (unsigned int chan) +void disable_dma (dmach_t channel) { - dma_t *dma = dma_channel(chan); + dma_t *dma = dma_chan + channel; if (!dma->lock) goto free_dma; if (dma->active == 1) { dma->active = 0; - dma->d_ops->disable(chan, dma); + dma->d_ops->disable(channel, dma); } return; free_dma: - printk(KERN_ERR "dma%d: trying to disable free DMA\n", chan); + printk(KERN_ERR "dma%d: trying to disable free DMA\n", channel); BUG(); } EXPORT_SYMBOL(disable_dma); @@ -229,38 +207,45 @@ EXPORT_SYMBOL(disable_dma); /* * Is the specified DMA channel active? */ -int dma_channel_active(unsigned int chan) +int dma_channel_active(dmach_t channel) { - dma_t *dma = dma_channel(chan); - return dma->active; + return dma_chan[channel].active; } EXPORT_SYMBOL(dma_channel_active); -void set_dma_page(unsigned int chan, char pagenr) +void set_dma_page(dmach_t channel, char pagenr) { - printk(KERN_ERR "dma%d: trying to set_dma_page\n", chan); + printk(KERN_ERR "dma%d: trying to set_dma_page\n", channel); } EXPORT_SYMBOL(set_dma_page); -void set_dma_speed(unsigned int chan, int cycle_ns) +void set_dma_speed(dmach_t channel, int cycle_ns) { - dma_t *dma = dma_channel(chan); + dma_t *dma = dma_chan + channel; int ret = 0; if (dma->d_ops->setspeed) - ret = dma->d_ops->setspeed(chan, dma, cycle_ns); + ret = dma->d_ops->setspeed(channel, dma, cycle_ns); dma->speed = ret; } EXPORT_SYMBOL(set_dma_speed); -int get_dma_residue(unsigned int chan) +int get_dma_residue(dmach_t channel) { - dma_t *dma = dma_channel(chan); + dma_t *dma = dma_chan + channel; int ret = 0; if (dma->d_ops->residue) - ret = dma->d_ops->residue(chan, dma); + ret = dma->d_ops->residue(channel, dma); return ret; } EXPORT_SYMBOL(get_dma_residue); + +static int __init init_dma(void) +{ + arch_dma_init(dma_chan); + return 0; +} + +core_initcall(init_dma); diff --git a/trunk/arch/arm/kernel/elf.c b/trunk/arch/arm/kernel/elf.c index d4a0da1e48f4..84849098c8e8 100644 --- a/trunk/arch/arm/kernel/elf.c +++ b/trunk/arch/arm/kernel/elf.c @@ -74,9 +74,9 @@ EXPORT_SYMBOL(elf_set_personality); */ int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack) { - if (executable_stack != EXSTACK_DISABLE_X) + if (executable_stack != EXSTACK_ENABLE_X) return 1; - if (cpu_architecture() < CPU_ARCH_ARMv6) + if (cpu_architecture() <= CPU_ARCH_ARMv6) return 1; return 0; } diff --git a/trunk/arch/arm/kernel/entry-armv.S b/trunk/arch/arm/kernel/entry-armv.S index d662a2f1fd85..77b047475539 100644 --- a/trunk/arch/arm/kernel/entry-armv.S +++ b/trunk/arch/arm/kernel/entry-armv.S @@ -20,7 +20,6 @@ #include #include #include -#include #include "entry-header.S" @@ -124,8 +123,6 @@ ENDPROC(__und_invalid) #endif .macro svc_entry, stack_hole=0 - UNWIND(.fnstart ) - UNWIND(.save {r0 - pc} ) sub sp, sp, #(S_FRAME_SIZE + \stack_hole) SPFIX( tst sp, #4 ) SPFIX( bicne sp, sp, #4 ) @@ -199,7 +196,6 @@ __dabt_svc: ldr r0, [sp, #S_PSR] msr spsr_cxsf, r0 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr - UNWIND(.fnend ) ENDPROC(__dabt_svc) .align 5 @@ -232,7 +228,6 @@ __irq_svc: bleq trace_hardirqs_on #endif ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr - UNWIND(.fnend ) ENDPROC(__irq_svc) .ltorg @@ -283,7 +278,6 @@ __und_svc: ldr lr, [sp, #S_PSR] @ Get SVC cpsr msr spsr_cxsf, lr ldmia sp, {r0 - pc}^ @ Restore SVC registers - UNWIND(.fnend ) ENDPROC(__und_svc) .align 5 @@ -326,7 +320,6 @@ __pabt_svc: ldr r0, [sp, #S_PSR] msr spsr_cxsf, r0 ldmia sp, {r0 - pc}^ @ load r0 - pc, cpsr - UNWIND(.fnend ) ENDPROC(__pabt_svc) .align 5 @@ -350,8 +343,6 @@ ENDPROC(__pabt_svc) #endif .macro usr_entry - UNWIND(.fnstart ) - UNWIND(.cantunwind ) @ don't unwind the user space sub sp, sp, #S_FRAME_SIZE stmib sp, {r1 - r12} @@ -429,7 +420,6 @@ __dabt_usr: mov r2, sp adr lr, ret_from_exception b do_DataAbort - UNWIND(.fnend ) ENDPROC(__dabt_usr) .align 5 @@ -460,7 +450,6 @@ __irq_usr: mov why, #0 b ret_to_user - UNWIND(.fnend ) ENDPROC(__irq_usr) .ltorg @@ -495,7 +484,6 @@ __und_usr: #else b __und_usr_unknown #endif - UNWIND(.fnend ) ENDPROC(__und_usr) @ @@ -662,7 +650,6 @@ ENTRY(fp_enter) no_fp: mov pc, lr __und_usr_unknown: - enable_irq mov r0, sp adr lr, ret_from_exception b do_undefinstr @@ -683,18 +670,14 @@ __pabt_usr: enable_irq @ Enable interrupts mov r1, sp @ regs bl do_PrefetchAbort @ call abort handler - UNWIND(.fnend ) /* fall through */ /* * This is the return code to user mode for abort handlers */ ENTRY(ret_from_exception) - UNWIND(.fnstart ) - UNWIND(.cantunwind ) get_thread_info tsk mov why, #0 b ret_to_user - UNWIND(.fnend ) ENDPROC(__pabt_usr) ENDPROC(ret_from_exception) @@ -704,8 +687,6 @@ ENDPROC(ret_from_exception) * previous and next are guaranteed not to be the same. */ ENTRY(__switch_to) - UNWIND(.fnstart ) - UNWIND(.cantunwind ) add ip, r1, #TI_CPU_SAVE ldr r3, [r2, #TI_TP_VALUE] stmia ip!, {r4 - sl, fp, sp, lr} @ Store most regs on stack @@ -735,7 +716,6 @@ ENTRY(__switch_to) bl atomic_notifier_call_chain mov r0, r5 ldmia r4, {r4 - sl, fp, sp, pc} @ Load all regs saved previously - UNWIND(.fnend ) ENDPROC(__switch_to) __INIT diff --git a/trunk/arch/arm/kernel/entry-common.S b/trunk/arch/arm/kernel/entry-common.S index b55cb0331809..06269ea375c5 100644 --- a/trunk/arch/arm/kernel/entry-common.S +++ b/trunk/arch/arm/kernel/entry-common.S @@ -11,7 +11,6 @@ #include #include #include -#include #include "entry-header.S" @@ -23,8 +22,6 @@ * stack. */ ret_fast_syscall: - UNWIND(.fnstart ) - UNWIND(.cantunwind ) disable_irq @ disable interrupts ldr r1, [tsk, #TI_FLAGS] tst r1, #_TIF_WORK_MASK @@ -41,7 +38,6 @@ ret_fast_syscall: mov r0, r0 add sp, sp, #S_FRAME_SIZE - S_PC movs pc, lr @ return & move spsr_svc into cpsr - UNWIND(.fnend ) /* * Ok, we need to do extra processing, enter the slow path. @@ -115,7 +111,6 @@ ENTRY(mcount) .globl mcount_call mcount_call: bl ftrace_stub - ldr lr, [fp, #-4] @ restore lr ldmia sp!, {r0-r3, pc} ENTRY(ftrace_caller) @@ -127,7 +122,6 @@ ENTRY(ftrace_caller) .globl ftrace_call ftrace_call: bl ftrace_stub - ldr lr, [fp, #-4] @ restore lr ldmia sp!, {r0-r3, pc} #else @@ -139,16 +133,14 @@ ENTRY(mcount) adr r0, ftrace_stub cmp r0, r2 bne trace - ldr lr, [fp, #-4] @ restore lr ldmia sp!, {r0-r3, pc} trace: - ldr r1, [fp, #-4] @ lr of instrumented routine + ldr r1, [fp, #-4] mov r0, lr sub r0, r0, #MCOUNT_INSN_SIZE mov lr, pc mov pc, r2 - mov lr, r1 @ restore lr ldmia sp!, {r0-r3, pc} #endif /* CONFIG_DYNAMIC_FTRACE */ diff --git a/trunk/arch/arm/kernel/fiq.c b/trunk/arch/arm/kernel/fiq.c index 6ff7919613d7..36f81d967979 100644 --- a/trunk/arch/arm/kernel/fiq.c +++ b/trunk/arch/arm/kernel/fiq.c @@ -88,7 +88,7 @@ void set_fiq_handler(void *start, unsigned int length) * disable irqs for the duration. Note - these functions are almost * entirely coded in assembly. */ -void __naked set_fiq_regs(struct pt_regs *regs) +void __attribute__((naked)) set_fiq_regs(struct pt_regs *regs) { register unsigned long tmp; asm volatile ( @@ -106,7 +106,7 @@ void __naked set_fiq_regs(struct pt_regs *regs) : "r" (®s->ARM_r8), "I" (PSR_I_BIT | PSR_F_BIT | FIQ_MODE)); } -void __naked get_fiq_regs(struct pt_regs *regs) +void __attribute__((naked)) get_fiq_regs(struct pt_regs *regs) { register unsigned long tmp; asm volatile ( diff --git a/trunk/arch/arm/kernel/irq.c b/trunk/arch/arm/kernel/irq.c index 363db186cb93..7141cee1fab7 100644 --- a/trunk/arch/arm/kernel/irq.c +++ b/trunk/arch/arm/kernel/irq.c @@ -101,7 +101,7 @@ int show_interrupts(struct seq_file *p, void *v) /* Handle bad interrupts */ static struct irq_desc bad_irq_desc = { .handle_irq = handle_bad_irq, - .lock = __SPIN_LOCK_UNLOCKED(bad_irq_desc.lock), + .lock = SPIN_LOCK_UNLOCKED }; /* diff --git a/trunk/arch/arm/kernel/machine_kexec.c b/trunk/arch/arm/kernel/machine_kexec.c index 598ca61e7bca..440dc62cdc3a 100644 --- a/trunk/arch/arm/kernel/machine_kexec.c +++ b/trunk/arch/arm/kernel/machine_kexec.c @@ -13,8 +13,8 @@ #include #include -extern const unsigned char relocate_new_kernel[]; -extern const unsigned int relocate_new_kernel_size; +const extern unsigned char relocate_new_kernel[]; +const extern unsigned int relocate_new_kernel_size; extern void setup_mm_for_reboot(char mode); diff --git a/trunk/arch/arm/kernel/module.c b/trunk/arch/arm/kernel/module.c index 13dbd5bf5cc2..dab48f27263f 100644 --- a/trunk/arch/arm/kernel/module.c +++ b/trunk/arch/arm/kernel/module.c @@ -22,7 +22,6 @@ #include #include -#include #ifdef CONFIG_XIP_KERNEL /* @@ -67,24 +66,6 @@ int module_frob_arch_sections(Elf_Ehdr *hdr, char *secstrings, struct module *mod) { -#ifdef CONFIG_ARM_UNWIND - Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum; - - for (s = sechdrs; s < sechdrs_end; s++) { - if (strcmp(".ARM.exidx.init.text", secstrings + s->sh_name) == 0) - mod->arch.unw_sec_init = s; - else if (strcmp(".ARM.exidx.devinit.text", secstrings + s->sh_name) == 0) - mod->arch.unw_sec_devinit = s; - else if (strcmp(".ARM.exidx", secstrings + s->sh_name) == 0) - mod->arch.unw_sec_core = s; - else if (strcmp(".init.text", secstrings + s->sh_name) == 0) - mod->arch.sec_init_text = s; - else if (strcmp(".devinit.text", secstrings + s->sh_name) == 0) - mod->arch.sec_devinit_text = s; - else if (strcmp(".text", secstrings + s->sh_name) == 0) - mod->arch.sec_core_text = s; - } -#endif return 0; } @@ -123,10 +104,6 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, loc = dstsec->sh_addr + rel->r_offset; switch (ELF32_R_TYPE(rel->r_info)) { - case R_ARM_NONE: - /* ignore */ - break; - case R_ARM_ABS32: *(u32 *)loc += sym->st_value; break; @@ -155,11 +132,6 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex, *(u32 *)loc |= offset & 0x00ffffff; break; - case R_ARM_PREL31: - offset = *(u32 *)loc + sym->st_value - loc; - *(u32 *)loc = offset & 0x7fffffff; - break; - default: printk(KERN_ERR "%s: unknown relocation: %u\n", module->name, ELF32_R_TYPE(rel->r_info)); @@ -178,50 +150,14 @@ apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab, return -ENOEXEC; } -#ifdef CONFIG_ARM_UNWIND -static void register_unwind_tables(struct module *mod) -{ - if (mod->arch.unw_sec_init && mod->arch.sec_init_text) - mod->arch.unwind_init = - unwind_table_add(mod->arch.unw_sec_init->sh_addr, - mod->arch.unw_sec_init->sh_size, - mod->arch.sec_init_text->sh_addr, - mod->arch.sec_init_text->sh_size); - if (mod->arch.unw_sec_devinit && mod->arch.sec_devinit_text) - mod->arch.unwind_devinit = - unwind_table_add(mod->arch.unw_sec_devinit->sh_addr, - mod->arch.unw_sec_devinit->sh_size, - mod->arch.sec_devinit_text->sh_addr, - mod->arch.sec_devinit_text->sh_size); - if (mod->arch.unw_sec_core && mod->arch.sec_core_text) - mod->arch.unwind_core = - unwind_table_add(mod->arch.unw_sec_core->sh_addr, - mod->arch.unw_sec_core->sh_size, - mod->arch.sec_core_text->sh_addr, - mod->arch.sec_core_text->sh_size); -} - -static void unregister_unwind_tables(struct module *mod) -{ - unwind_table_del(mod->arch.unwind_init); - unwind_table_del(mod->arch.unwind_devinit); - unwind_table_del(mod->arch.unwind_core); -} -#else -static inline void register_unwind_tables(struct module *mod) { } -static inline void unregister_unwind_tables(struct module *mod) { } -#endif - int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, struct module *module) { - register_unwind_tables(module); return 0; } void module_arch_cleanup(struct module *mod) { - unregister_unwind_tables(mod); } diff --git a/trunk/arch/arm/kernel/process.c b/trunk/arch/arm/kernel/process.c index 2de14e2afdc5..d3ea6fa89521 100644 --- a/trunk/arch/arm/kernel/process.c +++ b/trunk/arch/arm/kernel/process.c @@ -34,7 +34,6 @@ #include #include #include -#include #include static const char *processor_modes[] = { @@ -83,7 +82,7 @@ static int __init hlt_setup(char *__unused) __setup("nohlt", nohlt_setup); __setup("hlt", hlt_setup); -void arm_machine_restart(char mode, const char *cmd) +void arm_machine_restart(char mode) { /* * Clean and disable cache, and turn off interrupts @@ -100,7 +99,7 @@ void arm_machine_restart(char mode, const char *cmd) /* * Now call the architecture specific reboot code. */ - arch_reset(mode, cmd); + arch_reset(mode); /* * Whoops - the architecture was unable to reboot. @@ -120,7 +119,7 @@ EXPORT_SYMBOL(pm_idle); void (*pm_power_off)(void); EXPORT_SYMBOL(pm_power_off); -void (*arm_pm_restart)(char str, const char *cmd) = arm_machine_restart; +void (*arm_pm_restart)(char str) = arm_machine_restart; EXPORT_SYMBOL_GPL(arm_pm_restart); @@ -195,9 +194,9 @@ void machine_power_off(void) pm_power_off(); } -void machine_restart(char *cmd) +void machine_restart(char * __unused) { - arm_pm_restart(reboot_mode, cmd); + arm_pm_restart(reboot_mode); } void __show_regs(struct pt_regs *regs) @@ -373,21 +372,23 @@ EXPORT_SYMBOL(kernel_thread); unsigned long get_wchan(struct task_struct *p) { - struct stackframe frame; + unsigned long fp, lr; + unsigned long stack_start, stack_end; int count = 0; if (!p || p == current || p->state == TASK_RUNNING) return 0; - frame.fp = thread_saved_fp(p); - frame.sp = thread_saved_sp(p); - frame.lr = 0; /* recovered from the stack */ - frame.pc = thread_saved_pc(p); + stack_start = (unsigned long)end_of_stack(p); + stack_end = (unsigned long)task_stack_page(p) + THREAD_SIZE; + + fp = thread_saved_fp(p); do { - int ret = unwind_frame(&frame); - if (ret < 0) + if (fp < stack_start || fp > stack_end) return 0; - if (!in_sched_functions(frame.pc)) - return frame.pc; + lr = ((unsigned long *)fp)[-1]; + if (!in_sched_functions(lr)) + return lr; + fp = *(unsigned long *) (fp - 12); } while (count ++ < 16); return 0; } diff --git a/trunk/arch/arm/kernel/ptrace.c b/trunk/arch/arm/kernel/ptrace.c index 89882a1d0187..df653ea59250 100644 --- a/trunk/arch/arm/kernel/ptrace.c +++ b/trunk/arch/arm/kernel/ptrace.c @@ -653,54 +653,6 @@ static int ptrace_setcrunchregs(struct task_struct *tsk, void __user *ufp) } #endif -#ifdef CONFIG_VFP -/* - * Get the child VFP state. - */ -static int ptrace_getvfpregs(struct task_struct *tsk, void __user *data) -{ - struct thread_info *thread = task_thread_info(tsk); - union vfp_state *vfp = &thread->vfpstate; - struct user_vfp __user *ufp = data; - - vfp_sync_state(thread); - - /* copy the floating point registers */ - if (copy_to_user(&ufp->fpregs, &vfp->hard.fpregs, - sizeof(vfp->hard.fpregs))) - return -EFAULT; - - /* copy the status and control register */ - if (put_user(vfp->hard.fpscr, &ufp->fpscr)) - return -EFAULT; - - return 0; -} - -/* - * Set the child VFP state. - */ -static int ptrace_setvfpregs(struct task_struct *tsk, void __user *data) -{ - struct thread_info *thread = task_thread_info(tsk); - union vfp_state *vfp = &thread->vfpstate; - struct user_vfp __user *ufp = data; - - vfp_sync_state(thread); - - /* copy the floating point registers */ - if (copy_from_user(&vfp->hard.fpregs, &ufp->fpregs, - sizeof(vfp->hard.fpregs))) - return -EFAULT; - - /* copy the status and control register */ - if (get_user(vfp->hard.fpscr, &ufp->fpscr)) - return -EFAULT; - - return 0; -} -#endif - long arch_ptrace(struct task_struct *child, long request, long addr, long data) { int ret; @@ -823,16 +775,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) break; #endif -#ifdef CONFIG_VFP - case PTRACE_GETVFPREGS: - ret = ptrace_getvfpregs(child, (void __user *)data); - break; - - case PTRACE_SETVFPREGS: - ret = ptrace_setvfpregs(child, (void __user *)data); - break; -#endif - default: ret = ptrace_request(child, request, addr, data); break; diff --git a/trunk/arch/arm/kernel/setup.c b/trunk/arch/arm/kernel/setup.c index bc5e4128f9f3..7049815d66d5 100644 --- a/trunk/arch/arm/kernel/setup.c +++ b/trunk/arch/arm/kernel/setup.c @@ -40,7 +40,6 @@ #include #include #include -#include #include "compat.h" #include "atags.h" @@ -234,13 +233,12 @@ static void __init cacheid_init(void) unsigned int cachetype = read_cpuid_cachetype(); unsigned int arch = cpu_architecture(); - if (arch >= CPU_ARCH_ARMv6) { - if ((cachetype & (7 << 29)) == 4 << 29) { - /* ARMv7 register format */ - cacheid = CACHEID_VIPT_NONALIASING; - if ((cachetype & (3 << 14)) == 1 << 14) - cacheid |= CACHEID_ASID_TAGGED; - } else if (cachetype & (1 << 23)) + if (arch >= CPU_ARCH_ARMv7) { + cacheid = CACHEID_VIPT_NONALIASING; + if ((cachetype & (3 << 14)) == 1 << 14) + cacheid |= CACHEID_ASID_TAGGED; + } else if (arch >= CPU_ARCH_ARMv6) { + if (cachetype & (1 << 23)) cacheid = CACHEID_VIPT_ALIASING; else cacheid = CACHEID_VIPT_NONALIASING; @@ -686,8 +684,6 @@ void __init setup_arch(char **cmdline_p) struct machine_desc *mdesc; char *from = default_command_line; - unwind_init(); - setup_processor(); mdesc = setup_machine(machine_arch_type); machine_name = mdesc->name; @@ -783,8 +779,6 @@ static const char *hwcap_str[] = { "crunch", "thumbee", "neon", - "vfpv3", - "vfpv3d16", NULL }; diff --git a/trunk/arch/arm/kernel/smp.c b/trunk/arch/arm/kernel/smp.c index 7801aac3c043..55fa7ff96a3e 100644 --- a/trunk/arch/arm/kernel/smp.c +++ b/trunk/arch/arm/kernel/smp.c @@ -93,7 +93,6 @@ int __cpuinit __cpu_up(unsigned int cpu) pmd = pmd_offset(pgd + pgd_index(PHYS_OFFSET), PHYS_OFFSET); *pmd = __pmd((PHYS_OFFSET & PGDIR_MASK) | PMD_TYPE_SECT | PMD_SECT_AP_WRITE); - flush_pmd_entry(pmd); /* * We need to tell the secondary core where to find @@ -131,7 +130,6 @@ int __cpuinit __cpu_up(unsigned int cpu) secondary_data.pgdir = 0; *pmd = __pmd(0); - clean_pmd_entry(pmd); pgd_free(&init_mm, pgd); if (ret) { diff --git a/trunk/arch/arm/kernel/stacktrace.c b/trunk/arch/arm/kernel/stacktrace.c index 9f444e5cc165..fc650f64df43 100644 --- a/trunk/arch/arm/kernel/stacktrace.c +++ b/trunk/arch/arm/kernel/stacktrace.c @@ -2,59 +2,34 @@ #include #include -#include - -#if defined(CONFIG_FRAME_POINTER) && !defined(CONFIG_ARM_UNWIND) -/* - * Unwind the current stack frame and store the new register values in the - * structure passed as argument. Unwinding is equivalent to a function return, - * hence the new PC value rather than LR should be used for backtrace. - * - * With framepointer enabled, a simple function prologue looks like this: - * mov ip, sp - * stmdb sp!, {fp, ip, lr, pc} - * sub fp, ip, #4 - * - * A simple function epilogue looks like this: - * ldm sp, {fp, sp, pc} - * - * Note that with framepointer enabled, even the leaf functions have the same - * prologue and epilogue, therefore we can ignore the LR value in this case. - */ -int unwind_frame(struct stackframe *frame) -{ - unsigned long high, low; - unsigned long fp = frame->fp; - - /* only go to a higher address on the stack */ - low = frame->sp; - high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; +#include "stacktrace.h" - /* check current frame pointer is within bounds */ - if (fp < (low + 12) || fp + 4 >= high) - return -EINVAL; +int walk_stackframe(unsigned long fp, unsigned long low, unsigned long high, + int (*fn)(struct stackframe *, void *), void *data) +{ + struct stackframe *frame; - /* restore the registers from the stack frame */ - frame->fp = *(unsigned long *)(fp - 12); - frame->sp = *(unsigned long *)(fp - 8); - frame->pc = *(unsigned long *)(fp - 4); + do { + /* + * Check current frame pointer is within bounds + */ + if (fp < (low + 12) || fp + 4 >= high) + break; - return 0; -} -#endif - -void walk_stackframe(struct stackframe *frame, - int (*fn)(struct stackframe *, void *), void *data) -{ - while (1) { - int ret; + frame = (struct stackframe *)(fp - 12); if (fn(frame, data)) break; - ret = unwind_frame(frame); - if (ret < 0) - break; - } + + /* + * Update the low bound - the next frame must always + * be at a higher address than the current frame. + */ + low = fp + 4; + fp = frame->fp; + } while (fp); + + return 0; } EXPORT_SYMBOL(walk_stackframe); @@ -69,7 +44,7 @@ static int save_trace(struct stackframe *frame, void *d) { struct stack_trace_data *data = d; struct stack_trace *trace = data->trace; - unsigned long addr = frame->pc; + unsigned long addr = frame->lr; if (data->no_sched_functions && in_sched_functions(addr)) return 0; @@ -86,10 +61,11 @@ static int save_trace(struct stackframe *frame, void *d) void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) { struct stack_trace_data data; - struct stackframe frame; + unsigned long fp, base; data.trace = trace; data.skip = trace->skip; + base = (unsigned long)task_stack_page(tsk); if (tsk != current) { #ifdef CONFIG_SMP @@ -100,22 +76,14 @@ void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace) BUG(); #else data.no_sched_functions = 1; - frame.fp = thread_saved_fp(tsk); - frame.sp = thread_saved_sp(tsk); - frame.lr = 0; /* recovered from the stack */ - frame.pc = thread_saved_pc(tsk); + fp = thread_saved_fp(tsk); #endif } else { - register unsigned long current_sp asm ("sp"); - data.no_sched_functions = 0; - frame.fp = (unsigned long)__builtin_frame_address(0); - frame.sp = current_sp; - frame.lr = (unsigned long)__builtin_return_address(0); - frame.pc = (unsigned long)save_stack_trace_tsk; + asm("mov %0, fp" : "=r" (fp)); } - walk_stackframe(&frame, save_trace, &data); + walk_stackframe(fp, base, base + THREAD_SIZE, save_trace, &data); if (trace->nr_entries < trace->max_entries) trace->entries[trace->nr_entries++] = ULONG_MAX; } diff --git a/trunk/arch/arm/kernel/stacktrace.h b/trunk/arch/arm/kernel/stacktrace.h new file mode 100644 index 000000000000..e9fd20cb5662 --- /dev/null +++ b/trunk/arch/arm/kernel/stacktrace.h @@ -0,0 +1,9 @@ +struct stackframe { + unsigned long fp; + unsigned long sp; + unsigned long lr; + unsigned long pc; +}; + +int walk_stackframe(unsigned long fp, unsigned long low, unsigned long high, + int (*fn)(struct stackframe *, void *), void *data); diff --git a/trunk/arch/arm/kernel/time.c b/trunk/arch/arm/kernel/time.c index 4cdc4a0bd02d..c68b44aa88d2 100644 --- a/trunk/arch/arm/kernel/time.c +++ b/trunk/arch/arm/kernel/time.c @@ -33,7 +33,6 @@ #include #include -#include #include /* @@ -56,22 +55,14 @@ EXPORT_SYMBOL(rtc_lock); #ifdef CONFIG_SMP unsigned long profile_pc(struct pt_regs *regs) { - struct stackframe frame; + unsigned long fp, pc = instruction_pointer(regs); - if (!in_lock_functions(regs->ARM_pc)) - return regs->ARM_pc; - - frame.fp = regs->ARM_fp; - frame.sp = regs->ARM_sp; - frame.lr = regs->ARM_lr; - frame.pc = regs->ARM_pc; - do { - int ret = unwind_frame(&frame); - if (ret < 0) - return 0; - } while (in_lock_functions(frame.pc)); + if (in_lock_functions(pc)) { + fp = regs->ARM_fp; + pc = ((unsigned long *)fp)[-1]; + } - return frame.pc; + return pc; } EXPORT_SYMBOL(profile_pc); #endif diff --git a/trunk/arch/arm/kernel/traps.c b/trunk/arch/arm/kernel/traps.c index 57eb0f6f6005..79abc4ddc0cf 100644 --- a/trunk/arch/arm/kernel/traps.c +++ b/trunk/arch/arm/kernel/traps.c @@ -27,7 +27,6 @@ #include #include #include -#include #include "ptrace.h" #include "signal.h" @@ -62,7 +61,6 @@ void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long dump_mem("Exception stack", frame + 4, frame + 4 + sizeof(struct pt_regs)); } -#ifndef CONFIG_ARM_UNWIND /* * Stack pointers should always be within the kernels view of * physical memory. If it is not there, then we can't dump @@ -76,7 +74,6 @@ static int verify_stack(unsigned long sp) return 0; } -#endif /* * Dump out the contents of some memory nicely... @@ -153,33 +150,13 @@ static void dump_instr(struct pt_regs *regs) set_fs(fs); } -#ifdef CONFIG_ARM_UNWIND -static inline void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) -{ - unwind_backtrace(regs, tsk); -} -#else static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) { - unsigned int fp, mode; + unsigned int fp; int ok = 1; printk("Backtrace: "); - - if (!tsk) - tsk = current; - - if (regs) { - fp = regs->ARM_fp; - mode = processor_mode(regs); - } else if (tsk != current) { - fp = thread_saved_fp(tsk); - mode = 0x10; - } else { - asm("mov %0, fp" : "=r" (fp) : : "cc"); - mode = 0x10; - } - + fp = regs->ARM_fp; if (!fp) { printk("no frame pointer"); ok = 0; @@ -191,20 +168,29 @@ static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) printk("\n"); if (ok) - c_backtrace(fp, mode); + c_backtrace(fp, processor_mode(regs)); } -#endif void dump_stack(void) { - dump_backtrace(NULL, NULL); + __backtrace(); } EXPORT_SYMBOL(dump_stack); void show_stack(struct task_struct *tsk, unsigned long *sp) { - dump_backtrace(NULL, tsk); + unsigned long fp; + + if (!tsk) + tsk = current; + + if (tsk != current) + fp = thread_saved_fp(tsk); + else + asm("mov %0, fp" : "=r" (fp) : : "cc"); + + c_backtrace(fp, 0x10); barrier(); } diff --git a/trunk/arch/arm/kernel/unwind.c b/trunk/arch/arm/kernel/unwind.c deleted file mode 100644 index 1dedc2c7ff49..000000000000 --- a/trunk/arch/arm/kernel/unwind.c +++ /dev/null @@ -1,434 +0,0 @@ -/* - * arch/arm/kernel/unwind.c - * - * Copyright (C) 2008 ARM Limited - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - * - * - * Stack unwinding support for ARM - * - * An ARM EABI version of gcc is required to generate the unwind - * tables. For information about the structure of the unwind tables, - * see "Exception Handling ABI for the ARM Architecture" at: - * - * http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.html - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -/* Dummy functions to avoid linker complaints */ -void __aeabi_unwind_cpp_pr0(void) -{ -}; -EXPORT_SYMBOL(__aeabi_unwind_cpp_pr0); - -void __aeabi_unwind_cpp_pr1(void) -{ -}; -EXPORT_SYMBOL(__aeabi_unwind_cpp_pr1); - -void __aeabi_unwind_cpp_pr2(void) -{ -}; -EXPORT_SYMBOL(__aeabi_unwind_cpp_pr2); - -struct unwind_ctrl_block { - unsigned long vrs[16]; /* virtual register set */ - unsigned long *insn; /* pointer to the current instructions word */ - int entries; /* number of entries left to interpret */ - int byte; /* current byte number in the instructions word */ -}; - -enum regs { - FP = 11, - SP = 13, - LR = 14, - PC = 15 -}; - -extern struct unwind_idx __start_unwind_idx[]; -extern struct unwind_idx __stop_unwind_idx[]; - -static DEFINE_SPINLOCK(unwind_lock); -static LIST_HEAD(unwind_tables); - -/* Convert a prel31 symbol to an absolute address */ -#define prel31_to_addr(ptr) \ -({ \ - /* sign-extend to 32 bits */ \ - long offset = (((long)*(ptr)) << 1) >> 1; \ - (unsigned long)(ptr) + offset; \ -}) - -/* - * Binary search in the unwind index. The entries entries are - * guaranteed to be sorted in ascending order by the linker. - */ -static struct unwind_idx *search_index(unsigned long addr, - struct unwind_idx *first, - struct unwind_idx *last) -{ - pr_debug("%s(%08lx, %p, %p)\n", __func__, addr, first, last); - - if (addr < first->addr) { - pr_warning("unwind: Unknown symbol address %08lx\n", addr); - return NULL; - } else if (addr >= last->addr) - return last; - - while (first < last - 1) { - struct unwind_idx *mid = first + ((last - first + 1) >> 1); - - if (addr < mid->addr) - last = mid; - else - first = mid; - } - - return first; -} - -static struct unwind_idx *unwind_find_idx(unsigned long addr) -{ - struct unwind_idx *idx = NULL; - unsigned long flags; - - pr_debug("%s(%08lx)\n", __func__, addr); - - if (core_kernel_text(addr)) - /* main unwind table */ - idx = search_index(addr, __start_unwind_idx, - __stop_unwind_idx - 1); - else { - /* module unwind tables */ - struct unwind_table *table; - - spin_lock_irqsave(&unwind_lock, flags); - list_for_each_entry(table, &unwind_tables, list) { - if (addr >= table->begin_addr && - addr < table->end_addr) { - idx = search_index(addr, table->start, - table->stop - 1); - break; - } - } - spin_unlock_irqrestore(&unwind_lock, flags); - } - - pr_debug("%s: idx = %p\n", __func__, idx); - return idx; -} - -static unsigned long unwind_get_byte(struct unwind_ctrl_block *ctrl) -{ - unsigned long ret; - - if (ctrl->entries <= 0) { - pr_warning("unwind: Corrupt unwind table\n"); - return 0; - } - - ret = (*ctrl->insn >> (ctrl->byte * 8)) & 0xff; - - if (ctrl->byte == 0) { - ctrl->insn++; - ctrl->entries--; - ctrl->byte = 3; - } else - ctrl->byte--; - - return ret; -} - -/* - * Execute the current unwind instruction. - */ -static int unwind_exec_insn(struct unwind_ctrl_block *ctrl) -{ - unsigned long insn = unwind_get_byte(ctrl); - - pr_debug("%s: insn = %08lx\n", __func__, insn); - - if ((insn & 0xc0) == 0x00) - ctrl->vrs[SP] += ((insn & 0x3f) << 2) + 4; - else if ((insn & 0xc0) == 0x40) - ctrl->vrs[SP] -= ((insn & 0x3f) << 2) + 4; - else if ((insn & 0xf0) == 0x80) { - unsigned long mask; - unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; - int load_sp, reg = 4; - - insn = (insn << 8) | unwind_get_byte(ctrl); - mask = insn & 0x0fff; - if (mask == 0) { - pr_warning("unwind: 'Refuse to unwind' instruction %04lx\n", - insn); - return -URC_FAILURE; - } - - /* pop R4-R15 according to mask */ - load_sp = mask & (1 << (13 - 4)); - while (mask) { - if (mask & 1) - ctrl->vrs[reg] = *vsp++; - mask >>= 1; - reg++; - } - if (!load_sp) - ctrl->vrs[SP] = (unsigned long)vsp; - } else if ((insn & 0xf0) == 0x90 && - (insn & 0x0d) != 0x0d) - ctrl->vrs[SP] = ctrl->vrs[insn & 0x0f]; - else if ((insn & 0xf0) == 0xa0) { - unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; - int reg; - - /* pop R4-R[4+bbb] */ - for (reg = 4; reg <= 4 + (insn & 7); reg++) - ctrl->vrs[reg] = *vsp++; - if (insn & 0x80) - ctrl->vrs[14] = *vsp++; - ctrl->vrs[SP] = (unsigned long)vsp; - } else if (insn == 0xb0) { - ctrl->vrs[PC] = ctrl->vrs[LR]; - /* no further processing */ - ctrl->entries = 0; - } else if (insn == 0xb1) { - unsigned long mask = unwind_get_byte(ctrl); - unsigned long *vsp = (unsigned long *)ctrl->vrs[SP]; - int reg = 0; - - if (mask == 0 || mask & 0xf0) { - pr_warning("unwind: Spare encoding %04lx\n", - (insn << 8) | mask); - return -URC_FAILURE; - } - - /* pop R0-R3 according to mask */ - while (mask) { - if (mask & 1) - ctrl->vrs[reg] = *vsp++; - mask >>= 1; - reg++; - } - ctrl->vrs[SP] = (unsigned long)vsp; - } else if (insn == 0xb2) { - unsigned long uleb128 = unwind_get_byte(ctrl); - - ctrl->vrs[SP] += 0x204 + (uleb128 << 2); - } else { - pr_warning("unwind: Unhandled instruction %02lx\n", insn); - return -URC_FAILURE; - } - - pr_debug("%s: fp = %08lx sp = %08lx lr = %08lx pc = %08lx\n", __func__, - ctrl->vrs[FP], ctrl->vrs[SP], ctrl->vrs[LR], ctrl->vrs[PC]); - - return URC_OK; -} - -/* - * Unwind a single frame starting with *sp for the symbol at *pc. It - * updates the *pc and *sp with the new values. - */ -int unwind_frame(struct stackframe *frame) -{ - unsigned long high, low; - struct unwind_idx *idx; - struct unwind_ctrl_block ctrl; - - /* only go to a higher address on the stack */ - low = frame->sp; - high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; - - pr_debug("%s(pc = %08lx lr = %08lx sp = %08lx)\n", __func__, - frame->pc, frame->lr, frame->sp); - - if (!kernel_text_address(frame->pc)) - return -URC_FAILURE; - - idx = unwind_find_idx(frame->pc); - if (!idx) { - pr_warning("unwind: Index not found %08lx\n", frame->pc); - return -URC_FAILURE; - } - - ctrl.vrs[FP] = frame->fp; - ctrl.vrs[SP] = frame->sp; - ctrl.vrs[LR] = frame->lr; - ctrl.vrs[PC] = 0; - - if (idx->insn == 1) - /* can't unwind */ - return -URC_FAILURE; - else if ((idx->insn & 0x80000000) == 0) - /* prel31 to the unwind table */ - ctrl.insn = (unsigned long *)prel31_to_addr(&idx->insn); - else if ((idx->insn & 0xff000000) == 0x80000000) - /* only personality routine 0 supported in the index */ - ctrl.insn = &idx->insn; - else { - pr_warning("unwind: Unsupported personality routine %08lx in the index at %p\n", - idx->insn, idx); - return -URC_FAILURE; - } - - /* check the personality routine */ - if ((*ctrl.insn & 0xff000000) == 0x80000000) { - ctrl.byte = 2; - ctrl.entries = 1; - } else if ((*ctrl.insn & 0xff000000) == 0x81000000) { - ctrl.byte = 1; - ctrl.entries = 1 + ((*ctrl.insn & 0x00ff0000) >> 16); - } else { - pr_warning("unwind: Unsupported personality routine %08lx at %p\n", - *ctrl.insn, ctrl.insn); - return -URC_FAILURE; - } - - while (ctrl.entries > 0) { - int urc; - - if (ctrl.vrs[SP] < low || ctrl.vrs[SP] >= high) - return -URC_FAILURE; - urc = unwind_exec_insn(&ctrl); - if (urc < 0) - return urc; - } - - if (ctrl.vrs[PC] == 0) - ctrl.vrs[PC] = ctrl.vrs[LR]; - - frame->fp = ctrl.vrs[FP]; - frame->sp = ctrl.vrs[SP]; - frame->lr = ctrl.vrs[LR]; - frame->pc = ctrl.vrs[PC]; - - return URC_OK; -} - -void unwind_backtrace(struct pt_regs *regs, struct task_struct *tsk) -{ - struct stackframe frame; - unsigned long high, low; - register unsigned long current_sp asm ("sp"); - - pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk); - - if (!tsk) - tsk = current; - - if (regs) { - frame.fp = regs->ARM_fp; - frame.sp = regs->ARM_sp; - frame.lr = regs->ARM_lr; - frame.pc = regs->ARM_pc; - } else if (tsk == current) { - frame.fp = (unsigned long)__builtin_frame_address(0); - frame.sp = current_sp; - frame.lr = (unsigned long)__builtin_return_address(0); - frame.pc = (unsigned long)unwind_backtrace; - } else { - /* task blocked in __switch_to */ - frame.fp = thread_saved_fp(tsk); - frame.sp = thread_saved_sp(tsk); - /* - * The function calling __switch_to cannot be a leaf function - * so LR is recovered from the stack. - */ - frame.lr = 0; - frame.pc = thread_saved_pc(tsk); - } - - low = frame.sp & ~(THREAD_SIZE - 1); - high = low + THREAD_SIZE; - - while (1) { - int urc; - unsigned long where = frame.pc; - - urc = unwind_frame(&frame); - if (urc < 0) - break; - dump_backtrace_entry(where, frame.pc, frame.sp - 4); - } -} - -struct unwind_table *unwind_table_add(unsigned long start, unsigned long size, - unsigned long text_addr, - unsigned long text_size) -{ - unsigned long flags; - struct unwind_idx *idx; - struct unwind_table *tab = kmalloc(sizeof(*tab), GFP_KERNEL); - - pr_debug("%s(%08lx, %08lx, %08lx, %08lx)\n", __func__, start, size, - text_addr, text_size); - - if (!tab) - return tab; - - tab->start = (struct unwind_idx *)start; - tab->stop = (struct unwind_idx *)(start + size); - tab->begin_addr = text_addr; - tab->end_addr = text_addr + text_size; - - /* Convert the symbol addresses to absolute values */ - for (idx = tab->start; idx < tab->stop; idx++) - idx->addr = prel31_to_addr(&idx->addr); - - spin_lock_irqsave(&unwind_lock, flags); - list_add_tail(&tab->list, &unwind_tables); - spin_unlock_irqrestore(&unwind_lock, flags); - - return tab; -} - -void unwind_table_del(struct unwind_table *tab) -{ - unsigned long flags; - - if (!tab) - return; - - spin_lock_irqsave(&unwind_lock, flags); - list_del(&tab->list); - spin_unlock_irqrestore(&unwind_lock, flags); - - kfree(tab); -} - -int __init unwind_init(void) -{ - struct unwind_idx *idx; - - /* Convert the symbol addresses to absolute values */ - for (idx = __start_unwind_idx; idx < __stop_unwind_idx; idx++) - idx->addr = prel31_to_addr(&idx->addr); - - pr_debug("unwind: ARM stack unwinding initialised\n"); - - return 0; -} diff --git a/trunk/arch/arm/kernel/vmlinux.lds.S b/trunk/arch/arm/kernel/vmlinux.lds.S index 5f664599c945..00216071eaf7 100644 --- a/trunk/arch/arm/kernel/vmlinux.lds.S +++ b/trunk/arch/arm/kernel/vmlinux.lds.S @@ -80,8 +80,6 @@ SECTIONS EXIT_TEXT EXIT_DATA *(.exitcall.exit) - *(.ARM.exidx.exit.text) - *(.ARM.extab.exit.text) #ifndef CONFIG_MMU *(.fixup) *(__ex_table) @@ -112,23 +110,6 @@ SECTIONS _etext = .; /* End of text and rodata section */ -#ifdef CONFIG_ARM_UNWIND - /* - * Stack unwinding tables - */ - . = ALIGN(8); - .ARM.unwind_idx : { - __start_unwind_idx = .; - *(.ARM.exidx*) - __stop_unwind_idx = .; - } - .ARM.unwind_tab : { - __start_unwind_tab = .; - *(.ARM.extab*) - __stop_unwind_tab = .; - } -#endif - #ifdef CONFIG_XIP_KERNEL __data_loc = ALIGN(4); /* location in binary */ . = PAGE_OFFSET + TEXT_OFFSET; diff --git a/trunk/arch/arm/mach-aaec2000/include/mach/system.h b/trunk/arch/arm/mach-aaec2000/include/mach/system.h index fe08ca1add6f..8f4115d734ce 100644 --- a/trunk/arch/arm/mach-aaec2000/include/mach/system.h +++ b/trunk/arch/arm/mach-aaec2000/include/mach/system.h @@ -16,7 +16,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { cpu_reset(0); } diff --git a/trunk/arch/arm/mach-at91/at91cap9_devices.c b/trunk/arch/arm/mach-at91/at91cap9_devices.c index 412aa49ad2fb..9eca2209cde6 100644 --- a/trunk/arch/arm/mach-at91/at91cap9_devices.c +++ b/trunk/arch/arm/mach-at91/at91cap9_devices.c @@ -697,7 +697,7 @@ static void __init at91_add_device_rtt(void) * Watchdog * -------------------------------------------------------------------- */ -#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) +#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) static struct platform_device at91cap9_wdt_device = { .name = "at91_wdt", .id = -1, diff --git a/trunk/arch/arm/mach-at91/at91sam9260_devices.c b/trunk/arch/arm/mach-at91/at91sam9260_devices.c index d74c9ac007e7..fdde1ea21b07 100644 --- a/trunk/arch/arm/mach-at91/at91sam9260_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9260_devices.c @@ -643,7 +643,7 @@ static void __init at91_add_device_rtt(void) * Watchdog * -------------------------------------------------------------------- */ -#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) +#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) static struct platform_device at91sam9260_wdt_device = { .name = "at91_wdt", .id = -1, diff --git a/trunk/arch/arm/mach-at91/at91sam9261_devices.c b/trunk/arch/arm/mach-at91/at91sam9261_devices.c index 59fc48311fb0..17289756f80f 100644 --- a/trunk/arch/arm/mach-at91/at91sam9261_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9261_devices.c @@ -621,7 +621,7 @@ static void __init at91_add_device_rtt(void) * Watchdog * -------------------------------------------------------------------- */ -#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) +#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) static struct platform_device at91sam9261_wdt_device = { .name = "at91_wdt", .id = -1, diff --git a/trunk/arch/arm/mach-at91/at91sam9263_devices.c b/trunk/arch/arm/mach-at91/at91sam9263_devices.c index b7f233242315..b753cb879d8e 100644 --- a/trunk/arch/arm/mach-at91/at91sam9263_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9263_devices.c @@ -347,111 +347,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {} #endif -/* -------------------------------------------------------------------- - * Compact Flash (PCMCIA or IDE) - * -------------------------------------------------------------------- */ - -#if defined(CONFIG_AT91_CF) || defined(CONFIG_AT91_CF_MODULE) || \ - defined(CONFIG_BLK_DEV_IDE_AT91) || defined(CONFIG_BLK_DEV_IDE_AT91_MODULE) - -static struct at91_cf_data cf0_data; - -static struct resource cf0_resources[] = { - [0] = { - .start = AT91_CHIPSELECT_4, - .end = AT91_CHIPSELECT_4 + SZ_256M - 1, - .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, - } -}; - -static struct platform_device cf0_device = { - .id = 0, - .dev = { - .platform_data = &cf0_data, - }, - .resource = cf0_resources, - .num_resources = ARRAY_SIZE(cf0_resources), -}; - -static struct at91_cf_data cf1_data; - -static struct resource cf1_resources[] = { - [0] = { - .start = AT91_CHIPSELECT_5, - .end = AT91_CHIPSELECT_5 + SZ_256M - 1, - .flags = IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT, - } -}; - -static struct platform_device cf1_device = { - .id = 1, - .dev = { - .platform_data = &cf1_data, - }, - .resource = cf1_resources, - .num_resources = ARRAY_SIZE(cf1_resources), -}; - -void __init at91_add_device_cf(struct at91_cf_data *data) -{ - unsigned long ebi0_csa; - struct platform_device *pdev; - - if (!data) - return; - - /* - * assign CS4 or CS5 to SMC with Compact Flash logic support, - * we assume SMC timings are configured by board code, - * except True IDE where timings are controlled by driver - */ - ebi0_csa = at91_sys_read(AT91_MATRIX_EBI0CSA); - switch (data->chipselect) { - case 4: - at91_set_A_periph(AT91_PIN_PD6, 0); /* EBI0_NCS4/CFCS0 */ - ebi0_csa |= AT91_MATRIX_EBI0_CS4A_SMC_CF1; - cf0_data = *data; - pdev = &cf0_device; - break; - case 5: - at91_set_A_periph(AT91_PIN_PD7, 0); /* EBI0_NCS5/CFCS1 */ - ebi0_csa |= AT91_MATRIX_EBI0_CS5A_SMC_CF2; - cf1_data = *data; - pdev = &cf1_device; - break; - default: - printk(KERN_ERR "AT91 CF: bad chip-select requested (%u)\n", - data->chipselect); - return; - } - at91_sys_write(AT91_MATRIX_EBI0CSA, ebi0_csa); - - if (data->det_pin) { - at91_set_gpio_input(data->det_pin, 1); - at91_set_deglitch(data->det_pin, 1); - } - - if (data->irq_pin) { - at91_set_gpio_input(data->irq_pin, 1); - at91_set_deglitch(data->irq_pin, 1); - } - - if (data->vcc_pin) - /* initially off */ - at91_set_gpio_output(data->vcc_pin, 0); - - /* enable EBI controlled pins */ - at91_set_A_periph(AT91_PIN_PD5, 1); /* NWAIT */ - at91_set_A_periph(AT91_PIN_PD8, 0); /* CFCE1 */ - at91_set_A_periph(AT91_PIN_PD9, 0); /* CFCE2 */ - at91_set_A_periph(AT91_PIN_PD14, 0); /* CFNRW */ - - pdev->name = (data->flags & AT91_CF_TRUE_IDE) ? "at91_ide" : "at91_cf"; - platform_device_register(pdev); -} -#else -void __init at91_add_device_cf(struct at91_cf_data *data) {} -#endif /* -------------------------------------------------------------------- * NAND / SmartMedia @@ -959,7 +854,7 @@ static void __init at91_add_device_rtt(void) * Watchdog * -------------------------------------------------------------------- */ -#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) +#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) static struct platform_device at91sam9263_wdt_device = { .name = "at91_wdt", .id = -1, diff --git a/trunk/arch/arm/mach-at91/at91sam9rl_devices.c b/trunk/arch/arm/mach-at91/at91sam9rl_devices.c index 728186515cdf..145324f4ec56 100644 --- a/trunk/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9rl_devices.c @@ -609,7 +609,7 @@ static void __init at91_add_device_rtt(void) * Watchdog * -------------------------------------------------------------------- */ -#if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE) +#if defined(CONFIG_AT91SAM9_WATCHDOG) || defined(CONFIG_AT91SAM9_WATCHDOG_MODULE) static struct platform_device at91sam9rl_wdt_device = { .name = "at91_wdt", .id = -1, diff --git a/trunk/arch/arm/mach-at91/board-sam9g20ek.c b/trunk/arch/arm/mach-at91/board-sam9g20ek.c index 438efbb17482..81439fe6fb3d 100644 --- a/trunk/arch/arm/mach-at91/board-sam9g20ek.c +++ b/trunk/arch/arm/mach-at91/board-sam9g20ek.c @@ -238,10 +238,6 @@ static void __init ek_board_init(void) at91_add_device_i2c(NULL, 0); /* LEDs */ at91_gpio_leds(ek_leds, ARRAY_SIZE(ek_leds)); - /* PCK0 provides MCLK to the WM8731 */ - at91_set_B_periph(AT91_PIN_PC1, 0); - /* SSC (for WM8731) */ - at91_add_device_ssc(AT91SAM9260_ID_SSC, ATMEL_SSC_TX); } MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") diff --git a/trunk/arch/arm/mach-at91/generic.h b/trunk/arch/arm/mach-at91/generic.h index b5daf7f5e011..7b9ce7a336b0 100644 --- a/trunk/arch/arm/mach-at91/generic.h +++ b/trunk/arch/arm/mach-at91/generic.h @@ -47,6 +47,9 @@ extern void at91_irq_resume(void); #define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */ struct at91_gpio_bank { + unsigned chipbase; /* bank's first GPIO number */ + void __iomem *regbase; /* base of register bank */ + struct at91_gpio_bank *next; /* bank sharing same IRQ/clock/... */ unsigned short id; /* peripheral ID */ unsigned long offset; /* offset from system peripheral base */ struct clk *clock; /* associated clock */ diff --git a/trunk/arch/arm/mach-at91/gpio.c b/trunk/arch/arm/mach-at91/gpio.c index f2236f0e101f..9b0447c3d59b 100644 --- a/trunk/arch/arm/mach-at91/gpio.c +++ b/trunk/arch/arm/mach-at91/gpio.c @@ -24,59 +24,19 @@ #include #include -#include - #include "generic.h" -struct at91_gpio_chip { - struct gpio_chip chip; - struct at91_gpio_chip *next; /* Bank sharing same clock */ - struct at91_gpio_bank *bank; /* Bank definition */ - void __iomem *regbase; /* Base of register bank */ -}; - -#define to_at91_gpio_chip(c) container_of(c, struct at91_gpio_chip, chip) - -static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip); -static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val); -static int at91_gpiolib_get(struct gpio_chip *chip, unsigned offset); -static int at91_gpiolib_direction_output(struct gpio_chip *chip, - unsigned offset, int val); -static int at91_gpiolib_direction_input(struct gpio_chip *chip, - unsigned offset); -static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset); - -#define AT91_GPIO_CHIP(name, base_gpio, nr_gpio) \ - { \ - .chip = { \ - .label = name, \ - .request = at91_gpiolib_request, \ - .direction_input = at91_gpiolib_direction_input, \ - .direction_output = at91_gpiolib_direction_output, \ - .get = at91_gpiolib_get, \ - .set = at91_gpiolib_set, \ - .dbg_show = at91_gpiolib_dbg_show, \ - .base = base_gpio, \ - .ngpio = nr_gpio, \ - }, \ - } - -static struct at91_gpio_chip gpio_chip[] = { - AT91_GPIO_CHIP("A", 0x00 + PIN_BASE, 32), - AT91_GPIO_CHIP("B", 0x20 + PIN_BASE, 32), - AT91_GPIO_CHIP("C", 0x40 + PIN_BASE, 32), - AT91_GPIO_CHIP("D", 0x60 + PIN_BASE, 32), - AT91_GPIO_CHIP("E", 0x80 + PIN_BASE, 32), -}; +static struct at91_gpio_bank *gpio; static int gpio_banks; + static inline void __iomem *pin_to_controller(unsigned pin) { pin -= PIN_BASE; pin /= 32; if (likely(pin < gpio_banks)) - return gpio_chip[pin].regbase; + return gpio[pin].regbase; return NULL; } @@ -237,6 +197,39 @@ int __init_or_module at91_set_multi_drive(unsigned pin, int is_on) } EXPORT_SYMBOL(at91_set_multi_drive); +/*--------------------------------------------------------------------------*/ + +/* new-style GPIO calls; these expect at91_set_GPIO_periph to have been + * called, and maybe at91_set_multi_drive() for putout pins. + */ + +int gpio_direction_input(unsigned pin) +{ + void __iomem *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + if (!pio || !(__raw_readl(pio + PIO_PSR) & mask)) + return -EINVAL; + __raw_writel(mask, pio + PIO_ODR); + return 0; +} +EXPORT_SYMBOL(gpio_direction_input); + +int gpio_direction_output(unsigned pin, int value) +{ + void __iomem *pio = pin_to_controller(pin); + unsigned mask = pin_to_mask(pin); + + if (!pio || !(__raw_readl(pio + PIO_PSR) & mask)) + return -EINVAL; + __raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR)); + __raw_writel(mask, pio + PIO_OER); + return 0; +} +EXPORT_SYMBOL(gpio_direction_output); + +/*--------------------------------------------------------------------------*/ + /* * assuming the pin is muxed as a gpio output, set its value. */ @@ -289,7 +282,7 @@ static int gpio_irq_set_wake(unsigned pin, unsigned state) else wakeups[bank] &= ~mask; - set_irq_wake(gpio_chip[bank].bank->id, state); + set_irq_wake(gpio[bank].id, state); return 0; } @@ -299,14 +292,14 @@ void at91_gpio_suspend(void) int i; for (i = 0; i < gpio_banks; i++) { - void __iomem *pio = gpio_chip[i].regbase; + void __iomem *pio = gpio[i].regbase; backups[i] = __raw_readl(pio + PIO_IMR); __raw_writel(backups[i], pio + PIO_IDR); __raw_writel(wakeups[i], pio + PIO_IER); if (!wakeups[i]) - clk_disable(gpio_chip[i].bank->clock); + clk_disable(gpio[i].clock); else { #ifdef CONFIG_PM_DEBUG printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", 'A'+i, wakeups[i]); @@ -320,10 +313,10 @@ void at91_gpio_resume(void) int i; for (i = 0; i < gpio_banks; i++) { - void __iomem *pio = gpio_chip[i].regbase; + void __iomem *pio = gpio[i].regbase; if (!wakeups[i]) - clk_enable(gpio_chip[i].bank->clock); + clk_enable(gpio[i].clock); __raw_writel(wakeups[i], pio + PIO_IDR); __raw_writel(backups[i], pio + PIO_IER); @@ -387,12 +380,12 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) { unsigned pin; struct irq_desc *gpio; - struct at91_gpio_chip *at91_gpio; + struct at91_gpio_bank *bank; void __iomem *pio; u32 isr; - at91_gpio = get_irq_chip_data(irq); - pio = at91_gpio->regbase; + bank = get_irq_chip_data(irq); + pio = bank->regbase; /* temporarily mask (level sensitive) parent IRQ */ desc->chip->ack(irq); @@ -403,14 +396,14 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) */ isr = __raw_readl(pio + PIO_ISR) & __raw_readl(pio + PIO_IMR); if (!isr) { - if (!at91_gpio->next) + if (!bank->next) break; - at91_gpio = at91_gpio->next; - pio = at91_gpio->regbase; + bank = bank->next; + pio = bank->regbase; continue; } - pin = at91_gpio->chip.base; + pin = bank->chipbase; gpio = &irq_desc[pin]; while (isr) { @@ -497,8 +490,7 @@ postcore_initcall(at91_gpio_debugfs_init); /*--------------------------------------------------------------------------*/ -/* - * This lock class tells lockdep that GPIO irqs are in a different +/* This lock class tells lockdep that GPIO irqs are in a different * category than their parents, so it won't report false recursion. */ static struct lock_class_key gpio_lock_class; @@ -509,17 +501,20 @@ static struct lock_class_key gpio_lock_class; void __init at91_gpio_irq_setup(void) { unsigned pioc, pin; - struct at91_gpio_chip *this, *prev; + struct at91_gpio_bank *this, *prev; - for (pioc = 0, pin = PIN_BASE, this = gpio_chip, prev = NULL; + for (pioc = 0, pin = PIN_BASE, this = gpio, prev = NULL; pioc++ < gpio_banks; prev = this, this++) { - unsigned id = this->bank->id; + unsigned id = this->id; unsigned i; + /* enable PIO controller's clock */ + clk_enable(this->clock); + __raw_writel(~0, this->regbase + PIO_IDR); - for (i = 0, pin = this->chip.base; i < 32; i++, pin++) { + for (i = 0, pin = this->chipbase; i < 32; i++, pin++) { lockdep_set_class(&irq_desc[pin].lock, &gpio_lock_class); /* @@ -544,117 +539,25 @@ void __init at91_gpio_irq_setup(void) pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); } -/* gpiolib support */ -static int at91_gpiolib_direction_input(struct gpio_chip *chip, - unsigned offset) -{ - struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); - void __iomem *pio = at91_gpio->regbase; - unsigned mask = 1 << offset; - - __raw_writel(mask, pio + PIO_ODR); - return 0; -} - -static int at91_gpiolib_direction_output(struct gpio_chip *chip, - unsigned offset, int val) -{ - struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); - void __iomem *pio = at91_gpio->regbase; - unsigned mask = 1 << offset; - - __raw_writel(mask, pio + (val ? PIO_SODR : PIO_CODR)); - __raw_writel(mask, pio + PIO_OER); - return 0; -} - -static int at91_gpiolib_get(struct gpio_chip *chip, unsigned offset) -{ - struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); - void __iomem *pio = at91_gpio->regbase; - unsigned mask = 1 << offset; - u32 pdsr; - - pdsr = __raw_readl(pio + PIO_PDSR); - return (pdsr & mask) != 0; -} - -static void at91_gpiolib_set(struct gpio_chip *chip, unsigned offset, int val) -{ - struct at91_gpio_chip *at91_gpio = to_at91_gpio_chip(chip); - void __iomem *pio = at91_gpio->regbase; - unsigned mask = 1 << offset; - - __raw_writel(mask, pio + (val ? PIO_SODR : PIO_CODR)); -} - -static int at91_gpiolib_request(struct gpio_chip *chip, unsigned offset) -{ - unsigned pin = chip->base + offset; - void __iomem *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - - /* Cannot request GPIOs that are in alternate function mode */ - if (!(__raw_readl(pio + PIO_PSR) & mask)) - return -EPERM; - - return 0; -} - -static void at91_gpiolib_dbg_show(struct seq_file *s, struct gpio_chip *chip) -{ - int i; - - for (i = 0; i < chip->ngpio; i++) { - unsigned pin = chip->base + i; - void __iomem *pio = pin_to_controller(pin); - unsigned mask = pin_to_mask(pin); - const char *gpio_label; - - gpio_label = gpiochip_is_requested(chip, i); - if (gpio_label) { - seq_printf(s, "[%s] GPIO%s%d: ", - gpio_label, chip->label, i); - if (__raw_readl(pio + PIO_PSR) & mask) - seq_printf(s, "[gpio] %s\n", - at91_get_gpio_value(pin) ? - "set" : "clear"); - else - seq_printf(s, "[periph %s]\n", - __raw_readl(pio + PIO_ABSR) & - mask ? "B" : "A"); - } - } -} - /* * Called from the processor-specific init to enable GPIO pin support. */ void __init at91_gpio_init(struct at91_gpio_bank *data, int nr_banks) { unsigned i; - struct at91_gpio_chip *at91_gpio, *last = NULL; + struct at91_gpio_bank *last; BUG_ON(nr_banks > MAX_GPIO_BANKS); + gpio = data; gpio_banks = nr_banks; - for (i = 0; i < nr_banks; i++) { - at91_gpio = &gpio_chip[i]; - - at91_gpio->bank = &data[i]; - at91_gpio->chip.base = PIN_BASE + i * 32; - at91_gpio->regbase = at91_gpio->bank->offset + - (void __iomem *)AT91_VA_BASE_SYS; - - /* enable PIO controller's clock */ - clk_enable(at91_gpio->bank->clock); + for (i = 0, last = NULL; i < nr_banks; i++, last = data, data++) { + data->chipbase = PIN_BASE + i * 32; + data->regbase = data->offset + (void __iomem *)AT91_VA_BASE_SYS; /* AT91SAM9263_ID_PIOCDE groups PIOC, PIOD, PIOE */ - if (last && last->bank->id == at91_gpio->bank->id) - last->next = at91_gpio; - last = at91_gpio; - - gpiochip_add(&at91_gpio->chip); + if (last && last->id == data->id) + last->next = data; } } diff --git a/trunk/arch/arm/mach-at91/include/mach/board.h b/trunk/arch/arm/mach-at91/include/mach/board.h index 793fe7b25f36..fb51f0e0a83f 100644 --- a/trunk/arch/arm/mach-at91/include/mach/board.h +++ b/trunk/arch/arm/mach-at91/include/mach/board.h @@ -56,9 +56,6 @@ struct at91_cf_data { u8 vcc_pin; /* power switching */ u8 rst_pin; /* card reset */ u8 chipselect; /* EBI Chip Select number */ - u8 flags; -#define AT91_CF_TRUE_IDE 0x01 -#define AT91_IDE_SWAP_A0_A2 0x02 }; extern void __init at91_add_device_cf(struct at91_cf_data *data); @@ -96,7 +93,6 @@ struct atmel_nand_data { u8 enable_pin; /* chip enable */ u8 det_pin; /* card detect */ u8 rdy_pin; /* ready/busy */ - u8 rdy_pin_active_low; /* rdy_pin value is inverted */ u8 ale; /* address line number connected to ALE */ u8 cle; /* address line number connected to CLE */ u8 bus_width_16; /* buswidth is 16 bit */ diff --git a/trunk/arch/arm/mach-at91/include/mach/gpio.h b/trunk/arch/arm/mach-at91/include/mach/gpio.h index 04c91e31c9c5..bffa6741a751 100644 --- a/trunk/arch/arm/mach-at91/include/mach/gpio.h +++ b/trunk/arch/arm/mach-at91/include/mach/gpio.h @@ -213,11 +213,31 @@ extern void at91_gpio_resume(void); */ #include -#include /* cansleep wrappers */ -#define gpio_get_value __gpio_get_value -#define gpio_set_value __gpio_set_value -#define gpio_cansleep __gpio_cansleep +static inline int gpio_request(unsigned gpio, const char *label) +{ + return 0; +} + +static inline void gpio_free(unsigned gpio) +{ + might_sleep(); +} + +extern int gpio_direction_input(unsigned gpio); +extern int gpio_direction_output(unsigned gpio, int value); + +static inline int gpio_get_value(unsigned gpio) +{ + return at91_get_gpio_value(gpio); +} + +static inline void gpio_set_value(unsigned gpio, int value) +{ + at91_set_gpio_value(gpio, value); +} + +#include /* cansleep wrappers */ static inline int gpio_to_irq(unsigned gpio) { diff --git a/trunk/arch/arm/mach-at91/include/mach/system.h b/trunk/arch/arm/mach-at91/include/mach/system.h index 5268af3933c2..e712658d966c 100644 --- a/trunk/arch/arm/mach-at91/include/mach/system.h +++ b/trunk/arch/arm/mach-at91/include/mach/system.h @@ -43,7 +43,7 @@ static inline void arch_idle(void) void (*at91_arch_reset)(void); -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { /* call the CPU-specific reset function */ if (at91_arch_reset) diff --git a/trunk/arch/arm/mach-at91/pm.c b/trunk/arch/arm/mach-at91/pm.c index 7ac812dc055a..9bb4f043aa22 100644 --- a/trunk/arch/arm/mach-at91/pm.c +++ b/trunk/arch/arm/mach-at91/pm.c @@ -332,6 +332,7 @@ static int at91_pm_enter(suspend_state_t state) at91_sys_read(AT91_AIC_IPR) & at91_sys_read(AT91_AIC_IMR)); error: + sdram_selfrefresh_disable(); target_state = PM_SUSPEND_ON; at91_irq_resume(); at91_gpio_resume(); diff --git a/trunk/arch/arm/mach-clps711x/include/mach/system.h b/trunk/arch/arm/mach-clps711x/include/mach/system.h index f916cd7a477d..24e96159e3e7 100644 --- a/trunk/arch/arm/mach-clps711x/include/mach/system.h +++ b/trunk/arch/arm/mach-clps711x/include/mach/system.h @@ -32,7 +32,7 @@ static inline void arch_idle(void) mov r0, r0"); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { cpu_reset(0); } diff --git a/trunk/arch/arm/mach-davinci/board-evm.c b/trunk/arch/arm/mach-davinci/board-evm.c index 38b6a9ce2a93..a957d239a683 100644 --- a/trunk/arch/arm/mach-davinci/board-evm.c +++ b/trunk/arch/arm/mach-davinci/board-evm.c @@ -311,9 +311,6 @@ evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c) gpio_request(gpio + 7, "nCF_SEL"); gpio_direction_output(gpio + 7, 1); - /* irlml6401 sustains over 3A, switches 5V in under 8 msec */ - setup_usb(500, 8); - return 0; } @@ -420,6 +417,9 @@ static __init void davinci_evm_init(void) platform_add_devices(davinci_evm_devices, ARRAY_SIZE(davinci_evm_devices)); evm_init_i2c(); + + /* irlml6401 sustains over 3A, switches 5V in under 8 msec */ + setup_usb(500, 8); } static __init void davinci_evm_irq_init(void) diff --git a/trunk/arch/arm/mach-davinci/clock.c b/trunk/arch/arm/mach-davinci/clock.c index abb92b7eca0c..28f6dbc95bd7 100644 --- a/trunk/arch/arm/mach-davinci/clock.c +++ b/trunk/arch/arm/mach-davinci/clock.c @@ -230,11 +230,6 @@ static struct clk davinci_clks[] = { .rate = &commonrate, .lpsc = DAVINCI_LPSC_GPIO, }, - { - .name = "usb", - .rate = &commonrate, - .lpsc = DAVINCI_LPSC_USB, - }, { .name = "AEMIFCLK", .rate = &commonrate, diff --git a/trunk/arch/arm/mach-davinci/include/mach/system.h b/trunk/arch/arm/mach-davinci/include/mach/system.h index b7e7036674fa..17ca41dc2c53 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/system.h +++ b/trunk/arch/arm/mach-davinci/include/mach/system.h @@ -21,7 +21,7 @@ static void arch_idle(void) cpu_do_idle(); } -static void arch_reset(char mode, const char *cmd) +static void arch_reset(char mode) { davinci_watchdog_reset(); } diff --git a/trunk/arch/arm/mach-davinci/usb.c b/trunk/arch/arm/mach-davinci/usb.c index 69680784448a..fe182a85159c 100644 --- a/trunk/arch/arm/mach-davinci/usb.c +++ b/trunk/arch/arm/mach-davinci/usb.c @@ -12,7 +12,6 @@ #include #include -#include #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) static struct musb_hdrc_eps_bits musb_eps[] = { @@ -47,7 +46,6 @@ static struct musb_hdrc_platform_data usb_data = { #elif defined(CONFIG_USB_MUSB_HOST) .mode = MUSB_HOST, #endif - .clock = "usb", .config = &musb_config, }; @@ -78,6 +76,29 @@ static struct platform_device usb_dev = { .num_resources = ARRAY_SIZE(usb_resources), }; +#ifdef CONFIG_USB_MUSB_OTG + +static struct otg_transceiver *xceiv; + +struct otg_transceiver *otg_get_transceiver(void) +{ + if (xceiv) + get_device(xceiv->dev); + return xceiv; +} +EXPORT_SYMBOL(otg_get_transceiver); + +int otg_set_transceiver(struct otg_transceiver *x) +{ + if (xceiv && x) + return -EBUSY; + xceiv = x; + return 0; +} +EXPORT_SYMBOL(otg_set_transceiver); + +#endif + void __init setup_usb(unsigned mA, unsigned potpgt_msec) { usb_data.power = mA / 2; diff --git a/trunk/arch/arm/mach-ebsa110/include/mach/system.h b/trunk/arch/arm/mach-ebsa110/include/mach/system.h index 9a26245bf1fc..350a028997ef 100644 --- a/trunk/arch/arm/mach-ebsa110/include/mach/system.h +++ b/trunk/arch/arm/mach-ebsa110/include/mach/system.h @@ -34,6 +34,6 @@ static inline void arch_idle(void) asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); } -#define arch_reset(mode, cmd) cpu_reset(0x80000000) +#define arch_reset(mode) cpu_reset(0x80000000) #endif diff --git a/trunk/arch/arm/mach-ep93xx/Makefile b/trunk/arch/arm/mach-ep93xx/Makefile index 9522e205b73f..944e42d51646 100644 --- a/trunk/arch/arm/mach-ep93xx/Makefile +++ b/trunk/arch/arm/mach-ep93xx/Makefile @@ -1,7 +1,7 @@ # # Makefile for the linux kernel. # -obj-y := core.o clock.o dma-m2p.o gpio.o +obj-y := core.o clock.o gpio.o obj-m := obj-n := obj- := diff --git a/trunk/arch/arm/mach-ep93xx/clock.c b/trunk/arch/arm/mach-ep93xx/clock.c index e8ebeaea6c48..96049283a10a 100644 --- a/trunk/arch/arm/mach-ep93xx/clock.c +++ b/trunk/arch/arm/mach-ep93xx/clock.c @@ -41,56 +41,6 @@ static struct clk clk_usb_host = { .enable_mask = EP93XX_SYSCON_CLOCK_USH_EN, }; -/* DMA Clocks */ -static struct clk clk_m2p0 = { - .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, - .enable_mask = 0x00020000, -}; -static struct clk clk_m2p1 = { - .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, - .enable_mask = 0x00010000, -}; -static struct clk clk_m2p2 = { - .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, - .enable_mask = 0x00080000, -}; -static struct clk clk_m2p3 = { - .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, - .enable_mask = 0x00040000, -}; -static struct clk clk_m2p4 = { - .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, - .enable_mask = 0x00200000, -}; -static struct clk clk_m2p5 = { - .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, - .enable_mask = 0x00100000, -}; -static struct clk clk_m2p6 = { - .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, - .enable_mask = 0x00800000, -}; -static struct clk clk_m2p7 = { - .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, - .enable_mask = 0x00400000, -}; -static struct clk clk_m2p8 = { - .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, - .enable_mask = 0x02000000, -}; -static struct clk clk_m2p9 = { - .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, - .enable_mask = 0x01000000, -}; -static struct clk clk_m2m0 = { - .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, - .enable_mask = 0x04000000, -}; -static struct clk clk_m2m1 = { - .enable_reg = EP93XX_SYSCON_CLOCK_CONTROL, - .enable_mask = 0x08000000, -}; - #define INIT_CK(dev,con,ck) \ { .dev_id = dev, .con_id = con, .clk = ck } @@ -104,18 +54,6 @@ static struct clk_lookup clocks[] = { INIT_CK(NULL, "pclk", &clk_p), INIT_CK(NULL, "pll2", &clk_pll2), INIT_CK(NULL, "usb_host", &clk_usb_host), - INIT_CK(NULL, "m2p0", &clk_m2p0), - INIT_CK(NULL, "m2p1", &clk_m2p1), - INIT_CK(NULL, "m2p2", &clk_m2p2), - INIT_CK(NULL, "m2p3", &clk_m2p3), - INIT_CK(NULL, "m2p4", &clk_m2p4), - INIT_CK(NULL, "m2p5", &clk_m2p5), - INIT_CK(NULL, "m2p6", &clk_m2p6), - INIT_CK(NULL, "m2p7", &clk_m2p7), - INIT_CK(NULL, "m2p8", &clk_m2p8), - INIT_CK(NULL, "m2p9", &clk_m2p9), - INIT_CK(NULL, "m2m0", &clk_m2m0), - INIT_CK(NULL, "m2m1", &clk_m2m1), }; @@ -172,22 +110,6 @@ static unsigned long calc_pll_rate(u32 config_word) return (unsigned long)rate; } -static void __init ep93xx_dma_clock_init(void) -{ - clk_m2p0.rate = clk_h.rate; - clk_m2p1.rate = clk_h.rate; - clk_m2p2.rate = clk_h.rate; - clk_m2p3.rate = clk_h.rate; - clk_m2p4.rate = clk_h.rate; - clk_m2p5.rate = clk_h.rate; - clk_m2p6.rate = clk_h.rate; - clk_m2p7.rate = clk_h.rate; - clk_m2p8.rate = clk_h.rate; - clk_m2p9.rate = clk_h.rate; - clk_m2m0.rate = clk_h.rate; - clk_m2m1.rate = clk_h.rate; -} - static int __init ep93xx_clock_init(void) { u32 value; @@ -202,7 +124,6 @@ static int __init ep93xx_clock_init(void) clk_f.rate = clk_pll1.rate / fclk_divisors[(value >> 25) & 0x7]; clk_h.rate = clk_pll1.rate / hclk_divisors[(value >> 20) & 0x7]; clk_p.rate = clk_h.rate / pclk_divisors[(value >> 18) & 0x3]; - ep93xx_dma_clock_init(); value = __raw_readl(EP93XX_SYSCON_CLOCK_SET2); if (!(value & 0x00080000)) { /* PLL2 bypassed? */ diff --git a/trunk/arch/arm/mach-ep93xx/dma-m2p.c b/trunk/arch/arm/mach-ep93xx/dma-m2p.c deleted file mode 100644 index a2df5bb7dff0..000000000000 --- a/trunk/arch/arm/mach-ep93xx/dma-m2p.c +++ /dev/null @@ -1,408 +0,0 @@ -/* - * arch/arm/mach-ep93xx/dma-m2p.c - * M2P DMA handling for Cirrus EP93xx chips. - * - * Copyright (C) 2006 Lennert Buytenhek - * Copyright (C) 2006 Applied Data Systems - * - * Copyright (C) 2009 Ryan Mallon - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or (at - * your option) any later version. - */ - -/* - * On the EP93xx chip the following peripherals my be allocated to the 10 - * Memory to Internal Peripheral (M2P) channels (5 transmit + 5 receive). - * - * I2S contains 3 Tx and 3 Rx DMA Channels - * AAC contains 3 Tx and 3 Rx DMA Channels - * UART1 contains 1 Tx and 1 Rx DMA Channels - * UART2 contains 1 Tx and 1 Rx DMA Channels - * UART3 contains 1 Tx and 1 Rx DMA Channels - * IrDA contains 1 Tx and 1 Rx DMA Channels - * - * SSP and IDE use the Memory to Memory (M2M) channels and are not covered - * with this implementation. - */ - -#include -#include -#include -#include -#include - -#include -#include - -#define M2P_CONTROL 0x00 -#define M2P_CONTROL_STALL_IRQ_EN (1 << 0) -#define M2P_CONTROL_NFB_IRQ_EN (1 << 1) -#define M2P_CONTROL_ERROR_IRQ_EN (1 << 3) -#define M2P_CONTROL_ENABLE (1 << 4) -#define M2P_INTERRUPT 0x04 -#define M2P_INTERRUPT_STALL (1 << 0) -#define M2P_INTERRUPT_NFB (1 << 1) -#define M2P_INTERRUPT_ERROR (1 << 3) -#define M2P_PPALLOC 0x08 -#define M2P_STATUS 0x0c -#define M2P_REMAIN 0x14 -#define M2P_MAXCNT0 0x20 -#define M2P_BASE0 0x24 -#define M2P_MAXCNT1 0x30 -#define M2P_BASE1 0x34 - -#define STATE_IDLE 0 /* Channel is inactive. */ -#define STATE_STALL 1 /* Channel is active, no buffers pending. */ -#define STATE_ON 2 /* Channel is active, one buffer pending. */ -#define STATE_NEXT 3 /* Channel is active, two buffers pending. */ - -struct m2p_channel { - char *name; - void __iomem *base; - int irq; - - struct clk *clk; - spinlock_t lock; - - void *client; - unsigned next_slot:1; - struct ep93xx_dma_buffer *buffer_xfer; - struct ep93xx_dma_buffer *buffer_next; - struct list_head buffers_pending; -}; - -static struct m2p_channel m2p_rx[] = { - {"m2p1", EP93XX_DMA_BASE + 0x0040, IRQ_EP93XX_DMAM2P1}, - {"m2p3", EP93XX_DMA_BASE + 0x00c0, IRQ_EP93XX_DMAM2P3}, - {"m2p5", EP93XX_DMA_BASE + 0x0200, IRQ_EP93XX_DMAM2P5}, - {"m2p7", EP93XX_DMA_BASE + 0x0280, IRQ_EP93XX_DMAM2P7}, - {"m2p9", EP93XX_DMA_BASE + 0x0300, IRQ_EP93XX_DMAM2P9}, - {NULL}, -}; - -static struct m2p_channel m2p_tx[] = { - {"m2p0", EP93XX_DMA_BASE + 0x0000, IRQ_EP93XX_DMAM2P0}, - {"m2p2", EP93XX_DMA_BASE + 0x0080, IRQ_EP93XX_DMAM2P2}, - {"m2p4", EP93XX_DMA_BASE + 0x0240, IRQ_EP93XX_DMAM2P4}, - {"m2p6", EP93XX_DMA_BASE + 0x02c0, IRQ_EP93XX_DMAM2P6}, - {"m2p8", EP93XX_DMA_BASE + 0x0340, IRQ_EP93XX_DMAM2P8}, - {NULL}, -}; - -static void feed_buf(struct m2p_channel *ch, struct ep93xx_dma_buffer *buf) -{ - if (ch->next_slot == 0) { - writel(buf->size, ch->base + M2P_MAXCNT0); - writel(buf->bus_addr, ch->base + M2P_BASE0); - } else { - writel(buf->size, ch->base + M2P_MAXCNT1); - writel(buf->bus_addr, ch->base + M2P_BASE1); - } - ch->next_slot ^= 1; -} - -static void choose_buffer_xfer(struct m2p_channel *ch) -{ - struct ep93xx_dma_buffer *buf; - - ch->buffer_xfer = NULL; - if (!list_empty(&ch->buffers_pending)) { - buf = list_entry(ch->buffers_pending.next, - struct ep93xx_dma_buffer, list); - list_del(&buf->list); - feed_buf(ch, buf); - ch->buffer_xfer = buf; - } -} - -static void choose_buffer_next(struct m2p_channel *ch) -{ - struct ep93xx_dma_buffer *buf; - - ch->buffer_next = NULL; - if (!list_empty(&ch->buffers_pending)) { - buf = list_entry(ch->buffers_pending.next, - struct ep93xx_dma_buffer, list); - list_del(&buf->list); - feed_buf(ch, buf); - ch->buffer_next = buf; - } -} - -static inline void m2p_set_control(struct m2p_channel *ch, u32 v) -{ - /* - * The control register must be read immediately after being written so - * that the internal state machine is correctly updated. See the ep93xx - * users' guide for details. - */ - writel(v, ch->base + M2P_CONTROL); - readl(ch->base + M2P_CONTROL); -} - -static inline int m2p_channel_state(struct m2p_channel *ch) -{ - return (readl(ch->base + M2P_STATUS) >> 4) & 0x3; -} - -static irqreturn_t m2p_irq(int irq, void *dev_id) -{ - struct m2p_channel *ch = dev_id; - struct ep93xx_dma_m2p_client *cl; - u32 irq_status, v; - int error = 0; - - cl = ch->client; - - spin_lock(&ch->lock); - irq_status = readl(ch->base + M2P_INTERRUPT); - - if (irq_status & M2P_INTERRUPT_ERROR) { - writel(M2P_INTERRUPT_ERROR, ch->base + M2P_INTERRUPT); - error = 1; - } - - if ((irq_status & (M2P_INTERRUPT_STALL | M2P_INTERRUPT_NFB)) == 0) { - spin_unlock(&ch->lock); - return IRQ_NONE; - } - - switch (m2p_channel_state(ch)) { - case STATE_IDLE: - pr_crit("m2p_irq: dma interrupt without a dma buffer\n"); - BUG(); - break; - - case STATE_STALL: - cl->buffer_finished(cl->cookie, ch->buffer_xfer, 0, error); - if (ch->buffer_next != NULL) { - cl->buffer_finished(cl->cookie, ch->buffer_next, - 0, error); - } - choose_buffer_xfer(ch); - choose_buffer_next(ch); - if (ch->buffer_xfer != NULL) - cl->buffer_started(cl->cookie, ch->buffer_xfer); - break; - - case STATE_ON: - cl->buffer_finished(cl->cookie, ch->buffer_xfer, 0, error); - ch->buffer_xfer = ch->buffer_next; - choose_buffer_next(ch); - cl->buffer_started(cl->cookie, ch->buffer_xfer); - break; - - case STATE_NEXT: - pr_crit("m2p_irq: dma interrupt while next\n"); - BUG(); - break; - } - - v = readl(ch->base + M2P_CONTROL) & ~(M2P_CONTROL_STALL_IRQ_EN | - M2P_CONTROL_NFB_IRQ_EN); - if (ch->buffer_xfer != NULL) - v |= M2P_CONTROL_STALL_IRQ_EN; - if (ch->buffer_next != NULL) - v |= M2P_CONTROL_NFB_IRQ_EN; - m2p_set_control(ch, v); - - spin_unlock(&ch->lock); - return IRQ_HANDLED; -} - -static struct m2p_channel *find_free_channel(struct ep93xx_dma_m2p_client *cl) -{ - struct m2p_channel *ch; - int i; - - if (cl->flags & EP93XX_DMA_M2P_RX) - ch = m2p_rx; - else - ch = m2p_tx; - - for (i = 0; ch[i].base; i++) { - struct ep93xx_dma_m2p_client *client; - - client = ch[i].client; - if (client != NULL) { - int port; - - port = cl->flags & EP93XX_DMA_M2P_PORT_MASK; - if (port == (client->flags & - EP93XX_DMA_M2P_PORT_MASK)) { - pr_warning("DMA channel already used by %s\n", - cl->name ? : "unknown client"); - return ERR_PTR(-EBUSY); - } - } - } - - for (i = 0; ch[i].base; i++) { - if (ch[i].client == NULL) - return ch + i; - } - - pr_warning("No free DMA channel for %s\n", - cl->name ? : "unknown client"); - return ERR_PTR(-ENODEV); -} - -static void channel_enable(struct m2p_channel *ch) -{ - struct ep93xx_dma_m2p_client *cl = ch->client; - u32 v; - - clk_enable(ch->clk); - - v = cl->flags & EP93XX_DMA_M2P_PORT_MASK; - writel(v, ch->base + M2P_PPALLOC); - - v = cl->flags & EP93XX_DMA_M2P_ERROR_MASK; - v |= M2P_CONTROL_ENABLE | M2P_CONTROL_ERROR_IRQ_EN; - m2p_set_control(ch, v); -} - -static void channel_disable(struct m2p_channel *ch) -{ - u32 v; - - v = readl(ch->base + M2P_CONTROL); - v &= ~(M2P_CONTROL_STALL_IRQ_EN | M2P_CONTROL_NFB_IRQ_EN); - m2p_set_control(ch, v); - - while (m2p_channel_state(ch) == STATE_ON) - cpu_relax(); - - m2p_set_control(ch, 0x0); - - while (m2p_channel_state(ch) == STATE_STALL) - cpu_relax(); - - clk_disable(ch->clk); -} - -int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *cl) -{ - struct m2p_channel *ch; - int err; - - ch = find_free_channel(cl); - if (IS_ERR(ch)) - return PTR_ERR(ch); - - err = request_irq(ch->irq, m2p_irq, 0, cl->name ? : "dma-m2p", ch); - if (err) - return err; - - ch->client = cl; - ch->next_slot = 0; - ch->buffer_xfer = NULL; - ch->buffer_next = NULL; - INIT_LIST_HEAD(&ch->buffers_pending); - - cl->channel = ch; - - channel_enable(ch); - - return 0; -} -EXPORT_SYMBOL_GPL(ep93xx_dma_m2p_client_register); - -void ep93xx_dma_m2p_client_unregister(struct ep93xx_dma_m2p_client *cl) -{ - struct m2p_channel *ch = cl->channel; - - channel_disable(ch); - free_irq(ch->irq, ch); - ch->client = NULL; -} -EXPORT_SYMBOL_GPL(ep93xx_dma_m2p_client_unregister); - -void ep93xx_dma_m2p_submit(struct ep93xx_dma_m2p_client *cl, - struct ep93xx_dma_buffer *buf) -{ - struct m2p_channel *ch = cl->channel; - unsigned long flags; - u32 v; - - spin_lock_irqsave(&ch->lock, flags); - v = readl(ch->base + M2P_CONTROL); - if (ch->buffer_xfer == NULL) { - ch->buffer_xfer = buf; - feed_buf(ch, buf); - cl->buffer_started(cl->cookie, buf); - - v |= M2P_CONTROL_STALL_IRQ_EN; - m2p_set_control(ch, v); - - } else if (ch->buffer_next == NULL) { - ch->buffer_next = buf; - feed_buf(ch, buf); - - v |= M2P_CONTROL_NFB_IRQ_EN; - m2p_set_control(ch, v); - } else { - list_add_tail(&buf->list, &ch->buffers_pending); - } - spin_unlock_irqrestore(&ch->lock, flags); -} -EXPORT_SYMBOL_GPL(ep93xx_dma_m2p_submit); - -void ep93xx_dma_m2p_submit_recursive(struct ep93xx_dma_m2p_client *cl, - struct ep93xx_dma_buffer *buf) -{ - struct m2p_channel *ch = cl->channel; - - list_add_tail(&buf->list, &ch->buffers_pending); -} -EXPORT_SYMBOL_GPL(ep93xx_dma_m2p_submit_recursive); - -void ep93xx_dma_m2p_flush(struct ep93xx_dma_m2p_client *cl) -{ - struct m2p_channel *ch = cl->channel; - - channel_disable(ch); - ch->next_slot = 0; - ch->buffer_xfer = NULL; - ch->buffer_next = NULL; - INIT_LIST_HEAD(&ch->buffers_pending); - channel_enable(ch); -} -EXPORT_SYMBOL_GPL(ep93xx_dma_m2p_flush); - -static int init_channel(struct m2p_channel *ch) -{ - ch->clk = clk_get(NULL, ch->name); - if (IS_ERR(ch->clk)) - return PTR_ERR(ch->clk); - - spin_lock_init(&ch->lock); - ch->client = NULL; - - return 0; -} - -static int __init ep93xx_dma_m2p_init(void) -{ - int i; - int ret; - - for (i = 0; m2p_rx[i].base; i++) { - ret = init_channel(m2p_rx + i); - if (ret) - return ret; - } - - for (i = 0; m2p_tx[i].base; i++) { - ret = init_channel(m2p_tx + i); - if (ret) - return ret; - } - - pr_info("M2P DMA subsystem initialized\n"); - return 0; -} -arch_initcall(ep93xx_dma_m2p_init); diff --git a/trunk/arch/arm/mach-ep93xx/edb9307a.c b/trunk/arch/arm/mach-ep93xx/edb9307a.c index 6171167d3315..5b5c22b681be 100644 --- a/trunk/arch/arm/mach-ep93xx/edb9307a.c +++ b/trunk/arch/arm/mach-ep93xx/edb9307a.c @@ -48,24 +48,12 @@ static struct ep93xx_eth_data edb9307a_eth_data = { .phy_id = 1, }; -static struct i2c_board_info __initdata edb9307a_i2c_data[] = { - { - /* On-board battery backed RTC */ - I2C_BOARD_INFO("isl1208", 0x6f), - }, - /* - * The I2C signals are also routed to the Expansion Connector (J4) - */ -}; - static void __init edb9307a_init_machine(void) { ep93xx_init_devices(); platform_device_register(&edb9307a_flash); ep93xx_register_eth(&edb9307a_eth_data, 1); - - ep93xx_init_i2c(edb9307a_i2c_data, ARRAY_SIZE(edb9307a_i2c_data)); } MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board") diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/dma.h b/trunk/arch/arm/mach-ep93xx/include/mach/dma.h deleted file mode 100644 index ef6bd9d13148..000000000000 --- a/trunk/arch/arm/mach-ep93xx/include/mach/dma.h +++ /dev/null @@ -1,52 +0,0 @@ -#ifndef __ASM_ARCH_DMA_H -#define __ASM_ARCH_DMA_H - -#include -#include - -struct ep93xx_dma_buffer { - struct list_head list; - u32 bus_addr; - u16 size; -}; - -struct ep93xx_dma_m2p_client { - char *name; - u8 flags; - void *cookie; - void (*buffer_started)(void *cookie, - struct ep93xx_dma_buffer *buf); - void (*buffer_finished)(void *cookie, - struct ep93xx_dma_buffer *buf, - int bytes, int error); - - /* Internal to the DMA code. */ - void *channel; -}; - -#define EP93XX_DMA_M2P_PORT_I2S1 0x00 -#define EP93XX_DMA_M2P_PORT_I2S2 0x01 -#define EP93XX_DMA_M2P_PORT_AAC1 0x02 -#define EP93XX_DMA_M2P_PORT_AAC2 0x03 -#define EP93XX_DMA_M2P_PORT_AAC3 0x04 -#define EP93XX_DMA_M2P_PORT_I2S3 0x05 -#define EP93XX_DMA_M2P_PORT_UART1 0x06 -#define EP93XX_DMA_M2P_PORT_UART2 0x07 -#define EP93XX_DMA_M2P_PORT_UART3 0x08 -#define EP93XX_DMA_M2P_PORT_IRDA 0x09 -#define EP93XX_DMA_M2P_PORT_MASK 0x0f -#define EP93XX_DMA_M2P_TX 0x00 -#define EP93XX_DMA_M2P_RX 0x10 -#define EP93XX_DMA_M2P_ABORT_ON_ERROR 0x20 -#define EP93XX_DMA_M2P_IGNORE_ERROR 0x40 -#define EP93XX_DMA_M2P_ERROR_MASK 0x60 - -int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *m2p); -void ep93xx_dma_m2p_client_unregister(struct ep93xx_dma_m2p_client *m2p); -void ep93xx_dma_m2p_submit(struct ep93xx_dma_m2p_client *m2p, - struct ep93xx_dma_buffer *buf); -void ep93xx_dma_m2p_submit_recursive(struct ep93xx_dma_m2p_client *m2p, - struct ep93xx_dma_buffer *buf); -void ep93xx_dma_m2p_flush(struct ep93xx_dma_m2p_client *m2p); - -#endif /* __ASM_ARCH_DMA_H */ diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/trunk/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index f66be12b856e..22d6c9a6e4ca 100644 --- a/trunk/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/trunk/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h @@ -58,8 +58,7 @@ /* AHB peripherals */ -#define EP93XX_DMA_BASE ((void __iomem *) \ - (EP93XX_AHB_VIRT_BASE + 0x00000000)) +#define EP93XX_DMA_BASE (EP93XX_AHB_VIRT_BASE + 0x00000000) #define EP93XX_ETHERNET_BASE (EP93XX_AHB_VIRT_BASE + 0x00010000) #define EP93XX_ETHERNET_PHYS_BASE (EP93XX_AHB_PHYS_BASE + 0x00010000) diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/gesbc9312.h b/trunk/arch/arm/mach-ep93xx/include/mach/gesbc9312.h new file mode 100644 index 000000000000..21fe2b922aa5 --- /dev/null +++ b/trunk/arch/arm/mach-ep93xx/include/mach/gesbc9312.h @@ -0,0 +1,3 @@ +/* + * arch/arm/mach-ep93xx/include/mach/gesbc9312.h + */ diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/hardware.h b/trunk/arch/arm/mach-ep93xx/include/mach/hardware.h index 2866297310b7..529807d182bf 100644 --- a/trunk/arch/arm/mach-ep93xx/include/mach/hardware.h +++ b/trunk/arch/arm/mach-ep93xx/include/mach/hardware.h @@ -10,6 +10,7 @@ #include "platform.h" +#include "gesbc9312.h" #include "ts72xx.h" #endif diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/platform.h b/trunk/arch/arm/mach-ep93xx/include/mach/platform.h index 05f0f4f2f3ce..88f7e88f152f 100644 --- a/trunk/arch/arm/mach-ep93xx/include/mach/platform.h +++ b/trunk/arch/arm/mach-ep93xx/include/mach/platform.h @@ -4,8 +4,6 @@ #ifndef __ASSEMBLY__ -struct i2c_board_info; - struct ep93xx_eth_data { unsigned char dev_addr[6]; diff --git a/trunk/arch/arm/mach-ep93xx/include/mach/system.h b/trunk/arch/arm/mach-ep93xx/include/mach/system.h index ed8f35e4f068..67789d0f329e 100644 --- a/trunk/arch/arm/mach-ep93xx/include/mach/system.h +++ b/trunk/arch/arm/mach-ep93xx/include/mach/system.h @@ -9,7 +9,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { u32 devicecfg; diff --git a/trunk/arch/arm/mach-footbridge/dma.c b/trunk/arch/arm/mach-footbridge/dma.c index e2e0df8bcee2..4f3506346969 100644 --- a/trunk/arch/arm/mach-footbridge/dma.c +++ b/trunk/arch/arm/mach-footbridge/dma.c @@ -21,16 +21,16 @@ #include #if 0 -static int fb_dma_request(unsigned int chan, dma_t *dma) +static int fb_dma_request(dmach_t channel, dma_t *dma) { return -EINVAL; } -static void fb_dma_enable(unsigned int chan, dma_t *dma) +static void fb_dma_enable(dmach_t channel, dma_t *dma) { } -static void fb_dma_disable(unsigned int chan, dma_t *dma) +static void fb_dma_disable(dmach_t channel, dma_t *dma) { } @@ -42,7 +42,7 @@ static struct dma_ops fb_dma_ops = { }; #endif -static int __init fb_dma_init(void) +void __init arch_dma_init(dma_t *dma) { #if 0 dma[_DC21285_DMA(0)].d_ops = &fb_dma_ops; @@ -50,8 +50,6 @@ static int __init fb_dma_init(void) #endif #ifdef CONFIG_ISA_DMA if (footbridge_cfn_mode()) - isa_init_dma(); + isa_init_dma(dma + _ISA_DMA(0)); #endif - return 0; } -core_initcall(fb_dma_init); diff --git a/trunk/arch/arm/mach-footbridge/include/mach/system.h b/trunk/arch/arm/mach-footbridge/include/mach/system.h index 0b2931566209..2db7f36bd6ca 100644 --- a/trunk/arch/arm/mach-footbridge/include/mach/system.h +++ b/trunk/arch/arm/mach-footbridge/include/mach/system.h @@ -18,7 +18,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { if (mode == 's') { /* diff --git a/trunk/arch/arm/mach-h720x/include/mach/system.h b/trunk/arch/arm/mach-h720x/include/mach/system.h index a708d24ee46d..e4a7c760d52a 100644 --- a/trunk/arch/arm/mach-h720x/include/mach/system.h +++ b/trunk/arch/arm/mach-h720x/include/mach/system.h @@ -25,7 +25,7 @@ static void arch_idle(void) } -static __inline__ void arch_reset(char mode, const char *cmd) +static __inline__ void arch_reset(char mode) { CPU_REG (PMU_BASE, PMU_STAT) |= PMU_WARMRESET; } diff --git a/trunk/arch/arm/plat-mxc/include/mach/imxfb.h b/trunk/arch/arm/mach-imx/include/mach/imxfb.h similarity index 96% rename from trunk/arch/arm/plat-mxc/include/mach/imxfb.h rename to trunk/arch/arm/mach-imx/include/mach/imxfb.h index 762a7b0430e2..870d0d939616 100644 --- a/trunk/arch/arm/plat-mxc/include/mach/imxfb.h +++ b/trunk/arch/arm/mach-imx/include/mach/imxfb.h @@ -76,9 +76,6 @@ struct imx_fb_platform_data { u_char * fixed_screen_cpu; dma_addr_t fixed_screen_dma; - int (*init)(struct platform_device*); - int (*exit)(struct platform_device*); - void (*lcd_power)(int); void (*backlight_power)(int); }; diff --git a/trunk/arch/arm/mach-imx/include/mach/system.h b/trunk/arch/arm/mach-imx/include/mach/system.h index 46d4ca91af79..adee7e51bab2 100644 --- a/trunk/arch/arm/mach-imx/include/mach/system.h +++ b/trunk/arch/arm/mach-imx/include/mach/system.h @@ -32,7 +32,7 @@ arch_idle(void) } static inline void -arch_reset(char mode, const char *cmd) +arch_reset(char mode) { cpu_reset(0); } diff --git a/trunk/arch/arm/mach-integrator/clock.h b/trunk/arch/arm/mach-integrator/clock.h new file mode 100644 index 000000000000..e69de29bb2d1 diff --git a/trunk/arch/arm/mach-integrator/include/mach/system.h b/trunk/arch/arm/mach-integrator/include/mach/system.h index e1551b8dab77..c485345c8c77 100644 --- a/trunk/arch/arm/mach-integrator/include/mach/system.h +++ b/trunk/arch/arm/mach-integrator/include/mach/system.h @@ -32,7 +32,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { /* * To reset, we hit the on-board reset register diff --git a/trunk/arch/arm/mach-iop13xx/include/mach/system.h b/trunk/arch/arm/mach-iop13xx/include/mach/system.h index d0c66ef450a7..c7127f416e1f 100644 --- a/trunk/arch/arm/mach-iop13xx/include/mach/system.h +++ b/trunk/arch/arm/mach-iop13xx/include/mach/system.h @@ -13,7 +13,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { /* * Reset the internal bus (warning both cores are reset) diff --git a/trunk/arch/arm/mach-iop32x/include/mach/system.h b/trunk/arch/arm/mach-iop32x/include/mach/system.h index a4b808fe0d81..32d9e5b0a28d 100644 --- a/trunk/arch/arm/mach-iop32x/include/mach/system.h +++ b/trunk/arch/arm/mach-iop32x/include/mach/system.h @@ -16,7 +16,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { local_irq_disable(); diff --git a/trunk/arch/arm/mach-iop33x/include/mach/system.h b/trunk/arch/arm/mach-iop33x/include/mach/system.h index f192a34be073..0cb3ad862acd 100644 --- a/trunk/arch/arm/mach-iop33x/include/mach/system.h +++ b/trunk/arch/arm/mach-iop33x/include/mach/system.h @@ -14,7 +14,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { *IOP3XX_PCSR = 0x30; diff --git a/trunk/arch/arm/mach-ixp2000/include/mach/system.h b/trunk/arch/arm/mach-ixp2000/include/mach/system.h index de370992c848..2e9c68f95a24 100644 --- a/trunk/arch/arm/mach-ixp2000/include/mach/system.h +++ b/trunk/arch/arm/mach-ixp2000/include/mach/system.h @@ -17,7 +17,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { local_irq_disable(); diff --git a/trunk/arch/arm/mach-ixp23xx/include/mach/system.h b/trunk/arch/arm/mach-ixp23xx/include/mach/system.h index 8920ff2dff1f..d57c3fc10f1f 100644 --- a/trunk/arch/arm/mach-ixp23xx/include/mach/system.h +++ b/trunk/arch/arm/mach-ixp23xx/include/mach/system.h @@ -19,7 +19,7 @@ static inline void arch_idle(void) #endif } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { /* First try machine specific support */ if (machine_is_ixdp2351()) { diff --git a/trunk/arch/arm/mach-ixp4xx/common-pci.c b/trunk/arch/arm/mach-ixp4xx/common-pci.c index 70afcfe5b881..d816c51320c7 100644 --- a/trunk/arch/arm/mach-ixp4xx/common-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/common-pci.c @@ -366,7 +366,7 @@ void __init ixp4xx_adjust_zones(int node, unsigned long *zone_size, } void __init ixp4xx_pci_preinit(void) -{ +{ unsigned long cpuid = read_cpuid_id(); /* @@ -386,17 +386,17 @@ void __init ixp4xx_pci_preinit(void) pr_debug("setup PCI-AHB(inbound) and AHB-PCI(outbound) address mappings\n"); - /* + /* * We use identity AHB->PCI address translation * in the 0x48000000 to 0x4bffffff address space */ *PCI_PCIMEMBASE = 0x48494A4B; - /* + /* * We also use identity PCI->AHB address translation * in 4 16MB BARs that begin at the physical memory start */ - *PCI_AHBMEMBASE = (PHYS_OFFSET & 0xFF000000) + + *PCI_AHBMEMBASE = (PHYS_OFFSET & 0xFF000000) + ((PHYS_OFFSET & 0xFF000000) >> 8) + ((PHYS_OFFSET & 0xFF000000) >> 16) + ((PHYS_OFFSET & 0xFF000000) >> 24) + @@ -408,19 +408,18 @@ void __init ixp4xx_pci_preinit(void) pr_debug("setup BARs in controller\n"); /* - * We configure the PCI inbound memory windows to be + * We configure the PCI inbound memory windows to be * 1:1 mapped to SDRAM */ - local_write_config(PCI_BASE_ADDRESS_0, 4, PHYS_OFFSET); - local_write_config(PCI_BASE_ADDRESS_1, 4, PHYS_OFFSET + SZ_16M); - local_write_config(PCI_BASE_ADDRESS_2, 4, PHYS_OFFSET + SZ_32M); - local_write_config(PCI_BASE_ADDRESS_3, 4, PHYS_OFFSET + SZ_48M); + local_write_config(PCI_BASE_ADDRESS_0, 4, PHYS_OFFSET + 0x00000000); + local_write_config(PCI_BASE_ADDRESS_1, 4, PHYS_OFFSET + 0x01000000); + local_write_config(PCI_BASE_ADDRESS_2, 4, PHYS_OFFSET + 0x02000000); + local_write_config(PCI_BASE_ADDRESS_3, 4, PHYS_OFFSET + 0x03000000); /* - * Enable CSR window at 64 MiB to allow PCI masters - * to continue prefetching past 64 MiB boundary. + * Enable CSR window at 0xff000000. */ - local_write_config(PCI_BASE_ADDRESS_4, 4, PHYS_OFFSET + SZ_64M); + local_write_config(PCI_BASE_ADDRESS_4, 4, 0xff000008); /* * Enable the IO window to be way up high, at 0xfffffc00 @@ -501,7 +500,7 @@ int ixp4xx_setup(int nr, struct pci_sys_data *sys) return 1; } -struct pci_bus * __devinit ixp4xx_scan_bus(int nr, struct pci_sys_data *sys) +struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys) { return pci_scan_bus(sys->busnr, &ixp4xx_ops, sys); } diff --git a/trunk/arch/arm/mach-ixp4xx/include/mach/cpu.h b/trunk/arch/arm/mach-ixp4xx/include/mach/cpu.h index def7773be67c..51bd69c46d94 100644 --- a/trunk/arch/arm/mach-ixp4xx/include/mach/cpu.h +++ b/trunk/arch/arm/mach-ixp4xx/include/mach/cpu.h @@ -17,31 +17,26 @@ #include /* Processor id value in CP15 Register 0 */ -#define IXP42X_PROCESSOR_ID_VALUE 0x690541c0 /* including unused 0x690541Ex */ -#define IXP42X_PROCESSOR_ID_MASK 0xffffffc0 - -#define IXP43X_PROCESSOR_ID_VALUE 0x69054040 -#define IXP43X_PROCESSOR_ID_MASK 0xfffffff0 - -#define IXP46X_PROCESSOR_ID_VALUE 0x69054200 /* including IXP455 */ -#define IXP46X_PROCESSOR_ID_MASK 0xfffffff0 - -#define cpu_is_ixp42x() ((read_cpuid_id() & IXP42X_PROCESSOR_ID_MASK) == \ - IXP42X_PROCESSOR_ID_VALUE) -#define cpu_is_ixp43x() ((read_cpuid_id() & IXP43X_PROCESSOR_ID_MASK) == \ - IXP43X_PROCESSOR_ID_VALUE) -#define cpu_is_ixp46x() ((read_cpuid_id() & IXP46X_PROCESSOR_ID_MASK) == \ - IXP46X_PROCESSOR_ID_VALUE) +#define IXP425_PROCESSOR_ID_VALUE 0x690541c0 +#define IXP435_PROCESSOR_ID_VALUE 0x69054040 +#define IXP465_PROCESSOR_ID_VALUE 0x69054200 +#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0 + +#define cpu_is_ixp42x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \ + IXP425_PROCESSOR_ID_VALUE) +#define cpu_is_ixp43x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \ + IXP435_PROCESSOR_ID_VALUE) +#define cpu_is_ixp46x() ((read_cpuid_id() & IXP4XX_PROCESSOR_ID_MASK) == \ + IXP465_PROCESSOR_ID_VALUE) static inline u32 ixp4xx_read_feature_bits(void) { unsigned int val = ~*IXP4XX_EXP_CFG2; + val &= ~IXP4XX_FEATURE_RESERVED; + if (!cpu_is_ixp46x()) + val &= ~IXP4XX_FEATURE_IXP46X_ONLY; - if (cpu_is_ixp42x()) - return val & IXP42X_FEATURE_MASK; - if (cpu_is_ixp43x()) - return val & IXP43X_FEATURE_MASK; - return val & IXP46X_FEATURE_MASK; + return val; } static inline void ixp4xx_write_feature_bits(u32 value) diff --git a/trunk/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h b/trunk/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h index 97c530f66e78..ad9c888dd850 100644 --- a/trunk/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h +++ b/trunk/arch/arm/mach-ixp4xx/include/mach/ixp4xx-regs.h @@ -604,7 +604,6 @@ #define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */ /* "fuse" bits of IXP_EXP_CFG2 */ -/* All IXP4xx CPUs */ #define IXP4XX_FEATURE_RCOMP (1 << 0) #define IXP4XX_FEATURE_USB_DEVICE (1 << 1) #define IXP4XX_FEATURE_HASH (1 << 2) @@ -620,41 +619,20 @@ #define IXP4XX_FEATURE_RESET_NPEB (1 << 12) #define IXP4XX_FEATURE_RESET_NPEC (1 << 13) #define IXP4XX_FEATURE_PCI (1 << 14) -#define IXP4XX_FEATURE_UTOPIA_PHY_LIMIT (3 << 16) -#define IXP4XX_FEATURE_XSCALE_MAX_FREQ (3 << 22) -#define IXP42X_FEATURE_MASK (IXP4XX_FEATURE_RCOMP | \ - IXP4XX_FEATURE_USB_DEVICE | \ - IXP4XX_FEATURE_HASH | \ - IXP4XX_FEATURE_AES | \ - IXP4XX_FEATURE_DES | \ - IXP4XX_FEATURE_HDLC | \ - IXP4XX_FEATURE_AAL | \ - IXP4XX_FEATURE_HSS | \ - IXP4XX_FEATURE_UTOPIA | \ - IXP4XX_FEATURE_NPEB_ETH0 | \ - IXP4XX_FEATURE_NPEC_ETH | \ - IXP4XX_FEATURE_RESET_NPEA | \ - IXP4XX_FEATURE_RESET_NPEB | \ - IXP4XX_FEATURE_RESET_NPEC | \ - IXP4XX_FEATURE_PCI | \ - IXP4XX_FEATURE_UTOPIA_PHY_LIMIT | \ - IXP4XX_FEATURE_XSCALE_MAX_FREQ) - - -/* IXP43x/46x CPUs */ #define IXP4XX_FEATURE_ECC_TIMESYNC (1 << 15) +#define IXP4XX_FEATURE_UTOPIA_PHY_LIMIT (3 << 16) #define IXP4XX_FEATURE_USB_HOST (1 << 18) #define IXP4XX_FEATURE_NPEA_ETH (1 << 19) -#define IXP43X_FEATURE_MASK (IXP42X_FEATURE_MASK | \ - IXP4XX_FEATURE_ECC_TIMESYNC | \ - IXP4XX_FEATURE_USB_HOST | \ - IXP4XX_FEATURE_NPEA_ETH) - -/* IXP46x CPU (including IXP455) only */ #define IXP4XX_FEATURE_NPEB_ETH_1_TO_3 (1 << 20) #define IXP4XX_FEATURE_RSA (1 << 21) -#define IXP46X_FEATURE_MASK (IXP43X_FEATURE_MASK | \ - IXP4XX_FEATURE_NPEB_ETH_1_TO_3 | \ - IXP4XX_FEATURE_RSA) +#define IXP4XX_FEATURE_XSCALE_MAX_FREQ (3 << 22) +#define IXP4XX_FEATURE_RESERVED (0xFF << 24) + +#define IXP4XX_FEATURE_IXP46X_ONLY (IXP4XX_FEATURE_ECC_TIMESYNC | \ + IXP4XX_FEATURE_USB_HOST | \ + IXP4XX_FEATURE_NPEA_ETH | \ + IXP4XX_FEATURE_NPEB_ETH_1_TO_3 | \ + IXP4XX_FEATURE_RSA | \ + IXP4XX_FEATURE_XSCALE_MAX_FREQ) #endif diff --git a/trunk/arch/arm/mach-ixp4xx/include/mach/system.h b/trunk/arch/arm/mach-ixp4xx/include/mach/system.h index d2aa26f5acd7..92a7e8ddf69a 100644 --- a/trunk/arch/arm/mach-ixp4xx/include/mach/system.h +++ b/trunk/arch/arm/mach-ixp4xx/include/mach/system.h @@ -20,7 +20,7 @@ static inline void arch_idle(void) } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { if ( 1 && mode == 's') { /* Jump into ROM at address 0 */ diff --git a/trunk/arch/arm/mach-ixp4xx/ixp4xx_npe.c b/trunk/arch/arm/mach-ixp4xx/ixp4xx_npe.c index 252310234903..c73a94d0ca2b 100644 --- a/trunk/arch/arm/mach-ixp4xx/ixp4xx_npe.c +++ b/trunk/arch/arm/mach-ixp4xx/ixp4xx_npe.c @@ -575,8 +575,8 @@ int npe_load_firmware(struct npe *npe, const char *name, struct device *dev) for (i = 0; i < image->size; i++) image->data[i] = swab32(image->data[i]); - if (cpu_is_ixp42x() && ((image->id >> 28) & 0xF /* device ID */)) { - print_npe(KERN_INFO, npe, "IXP43x/IXP46x firmware ignored on " + if (!cpu_is_ixp46x() && ((image->id >> 28) & 0xF /* device ID */)) { + print_npe(KERN_INFO, npe, "IXP46x firmware ignored on " "IXP42x\n"); goto err; } @@ -596,7 +596,7 @@ int npe_load_firmware(struct npe *npe, const char *name, struct device *dev) "revision 0x%X:%X\n", (image->id >> 16) & 0xFF, (image->id >> 8) & 0xFF, image->id & 0xFF); - if (cpu_is_ixp42x()) { + if (!cpu_is_ixp46x()) { if (!npe->id) instr_size = NPE_A_42X_INSTR_SIZE; else diff --git a/trunk/arch/arm/mach-kirkwood/Kconfig b/trunk/arch/arm/mach-kirkwood/Kconfig index 532443622a17..3600cd9f0519 100644 --- a/trunk/arch/arm/mach-kirkwood/Kconfig +++ b/trunk/arch/arm/mach-kirkwood/Kconfig @@ -20,12 +20,6 @@ config MACH_RD88F6281 Say 'Y' here if you want your kernel to support the Marvell RD-88F6281 Reference Board. -config MACH_SHEEVAPLUG - bool "Marvell SheevaPlug Reference Board" - help - Say 'Y' here if you want your kernel to support the - Marvell SheevaPlug Reference Board. - endmenu endif diff --git a/trunk/arch/arm/mach-kirkwood/Makefile b/trunk/arch/arm/mach-kirkwood/Makefile index de81b4b5bd33..b96c55dad343 100644 --- a/trunk/arch/arm/mach-kirkwood/Makefile +++ b/trunk/arch/arm/mach-kirkwood/Makefile @@ -1,6 +1,5 @@ -obj-y += common.o addr-map.o irq.o pcie.o mpp.o +obj-y += common.o addr-map.o irq.o pcie.o obj-$(CONFIG_MACH_DB88F6281_BP) += db88f6281-bp-setup.o obj-$(CONFIG_MACH_RD88F6192_NAS) += rd88f6192-nas-setup.o obj-$(CONFIG_MACH_RD88F6281) += rd88f6281-setup.o -obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o diff --git a/trunk/arch/arm/mach-kirkwood/common.c b/trunk/arch/arm/mach-kirkwood/common.c index 9f012551794d..b3404b7775b3 100644 --- a/trunk/arch/arm/mach-kirkwood/common.c +++ b/trunk/arch/arm/mach-kirkwood/common.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include #include @@ -255,7 +254,7 @@ static struct resource kirkwood_rtc_resource = { .flags = IORESOURCE_MEM, }; -static void __init kirkwood_rtc_init(void) +void __init kirkwood_rtc_init(void) { platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1); } @@ -296,50 +295,6 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data) } -/***************************************************************************** - * SD/SDIO/MMC - ****************************************************************************/ -static struct resource mvsdio_resources[] = { - [0] = { - .start = SDIO_PHYS_BASE, - .end = SDIO_PHYS_BASE + SZ_1K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_KIRKWOOD_SDIO, - .end = IRQ_KIRKWOOD_SDIO, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 mvsdio_dmamask = 0xffffffffUL; - -static struct platform_device kirkwood_sdio = { - .name = "mvsdio", - .id = -1, - .dev = { - .dma_mask = &mvsdio_dmamask, - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(mvsdio_resources), - .resource = mvsdio_resources, -}; - -void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data) -{ - u32 dev, rev; - - kirkwood_pcie_id(&dev, &rev); - if (rev == 0) /* catch all Kirkwood Z0's */ - mvsdio_data->clock = 100000000; - else - mvsdio_data->clock = 200000000; - mvsdio_data->dram = &kirkwood_mbus_dram_info; - kirkwood_sdio.dev.platform_data = mvsdio_data; - platform_device_register(&kirkwood_sdio); -} - - /***************************************************************************** * SPI ****************************************************************************/ @@ -547,7 +502,7 @@ static struct platform_device kirkwood_xor01_channel = { }, }; -static void __init kirkwood_xor0_init(void) +void __init kirkwood_xor0_init(void) { platform_device_register(&kirkwood_xor0_shared); @@ -645,7 +600,7 @@ static struct platform_device kirkwood_xor11_channel = { }, }; -static void __init kirkwood_xor1_init(void) +void __init kirkwood_xor1_init(void) { platform_device_register(&kirkwood_xor1_shared); @@ -753,9 +708,4 @@ void __init kirkwood_init(void) #ifdef CONFIG_CACHE_FEROCEON_L2 kirkwood_l2_init(); #endif - - /* internal devices that every board has */ - kirkwood_rtc_init(); - kirkwood_xor0_init(); - kirkwood_xor1_init(); } diff --git a/trunk/arch/arm/mach-kirkwood/common.h b/trunk/arch/arm/mach-kirkwood/common.h index 9e5282684d58..fe367c18e722 100644 --- a/trunk/arch/arm/mach-kirkwood/common.h +++ b/trunk/arch/arm/mach-kirkwood/common.h @@ -14,7 +14,6 @@ struct dsa_platform_data; struct mv643xx_eth_platform_data; struct mv_sata_platform_data; -struct mvsdio_platform_data; /* * Basic Kirkwood init functions used early by machine-setup. @@ -34,11 +33,13 @@ void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data); void kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data); void kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq); void kirkwood_pcie_init(void); +void kirkwood_rtc_init(void); void kirkwood_sata_init(struct mv_sata_platform_data *sata_data); -void kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data); void kirkwood_spi_init(void); void kirkwood_uart0_init(void); void kirkwood_uart1_init(void); +void kirkwood_xor0_init(void); +void kirkwood_xor1_init(void); extern struct sys_timer kirkwood_timer; diff --git a/trunk/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/trunk/arch/arm/mach-kirkwood/db88f6281-bp-setup.c index 5505d5837752..a14c2948c62a 100644 --- a/trunk/arch/arm/mach-kirkwood/db88f6281-bp-setup.c +++ b/trunk/arch/arm/mach-kirkwood/db88f6281-bp-setup.c @@ -11,59 +11,18 @@ #include #include #include +#include +#include +#include #include -#include +#include #include #include #include #include +#include #include -#include -#include #include "common.h" -#include "mpp.h" - -static struct mtd_partition db88f6281_nand_parts[] = { - { - .name = "u-boot", - .offset = 0, - .size = SZ_1M - }, { - .name = "uImage", - .offset = MTDPART_OFS_NXTBLK, - .size = SZ_4M - }, { - .name = "root", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL - }, -}; - -static struct resource db88f6281_nand_resource = { - .flags = IORESOURCE_MEM, - .start = KIRKWOOD_NAND_MEM_PHYS_BASE, - .end = KIRKWOOD_NAND_MEM_PHYS_BASE + - KIRKWOOD_NAND_MEM_SIZE - 1, -}; - -static struct orion_nand_data db88f6281_nand_data = { - .parts = db88f6281_nand_parts, - .nr_parts = ARRAY_SIZE(db88f6281_nand_parts), - .cle = 0, - .ale = 1, - .width = 8, - .chip_delay = 25, -}; - -static struct platform_device db88f6281_nand_flash = { - .name = "orion_nand", - .id = -1, - .dev = { - .platform_data = &db88f6281_nand_data, - }, - .resource = &db88f6281_nand_resource, - .num_resources = 1, -}; static struct mv643xx_eth_platform_data db88f6281_ge00_data = { .phy_addr = MV643XX_ETH_PHY_ADDR(8), @@ -73,32 +32,18 @@ static struct mv_sata_platform_data db88f6281_sata_data = { .n_ports = 2, }; -static struct mvsdio_platform_data db88f6281_mvsdio_data = { - .gpio_write_protect = 37, - .gpio_card_detect = 38, -}; - -static unsigned int db88f6281_mpp_config[] __initdata = { - MPP37_GPIO, - MPP38_GPIO, - 0 -}; - static void __init db88f6281_init(void) { /* * Basic setup. Needs to be called early. */ kirkwood_init(); - kirkwood_mpp_conf(db88f6281_mpp_config); kirkwood_ehci_init(); kirkwood_ge00_init(&db88f6281_ge00_data); + kirkwood_rtc_init(); kirkwood_sata_init(&db88f6281_sata_data); kirkwood_uart0_init(); - kirkwood_sdio_init(&db88f6281_mvsdio_data); - - platform_device_register(&db88f6281_nand_flash); } static int __init db88f6281_pci_init(void) diff --git a/trunk/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/trunk/arch/arm/mach-kirkwood/include/mach/kirkwood.h index d3db30fe763b..ada480c0e197 100644 --- a/trunk/arch/arm/mach-kirkwood/include/mach/kirkwood.h +++ b/trunk/arch/arm/mach-kirkwood/include/mach/kirkwood.h @@ -116,7 +116,5 @@ #define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000) -#define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000) - #endif diff --git a/trunk/arch/arm/mach-kirkwood/include/mach/system.h b/trunk/arch/arm/mach-kirkwood/include/mach/system.h index 23a1914c1da8..8510f6cfdabf 100644 --- a/trunk/arch/arm/mach-kirkwood/include/mach/system.h +++ b/trunk/arch/arm/mach-kirkwood/include/mach/system.h @@ -17,7 +17,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { /* * Enable soft reset to assert RSTOUTn. diff --git a/trunk/arch/arm/mach-kirkwood/irq.c b/trunk/arch/arm/mach-kirkwood/irq.c index 06083b23bb44..efb86b700276 100644 --- a/trunk/arch/arm/mach-kirkwood/irq.c +++ b/trunk/arch/arm/mach-kirkwood/irq.c @@ -42,7 +42,7 @@ void __init kirkwood_init_irq(void) writel(0, GPIO_EDGE_CAUSE(32)); for (i = IRQ_KIRKWOOD_GPIO_START; i < NR_IRQS; i++) { - set_irq_chip(i, &orion_gpio_irq_chip); + set_irq_chip(i, &orion_gpio_irq_level_chip); set_irq_handler(i, handle_level_irq); irq_desc[i].status |= IRQ_LEVEL; set_irq_flags(i, IRQF_VALID); diff --git a/trunk/arch/arm/mach-kirkwood/mpp.c b/trunk/arch/arm/mach-kirkwood/mpp.c deleted file mode 100644 index 63c44934391a..000000000000 --- a/trunk/arch/arm/mach-kirkwood/mpp.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * arch/arm/mach-kirkwood/mpp.c - * - * MPP functions for Marvell Kirkwood SoCs - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include -#include "common.h" -#include "mpp.h" - -static unsigned int __init kirkwood_variant(void) -{ - u32 dev, rev; - - kirkwood_pcie_id(&dev, &rev); - - if (dev == MV88F6281_DEV_ID && rev >= MV88F6281_REV_A0) - return MPP_F6281_MASK; - if (dev == MV88F6192_DEV_ID && rev >= MV88F6192_REV_A0) - return MPP_F6192_MASK; - if (dev == MV88F6180_DEV_ID) - return MPP_F6180_MASK; - - printk(KERN_ERR "MPP setup: unknown kirkwood variant " - "(dev %#x rev %#x)\n", dev, rev); - return 0; -} - -#define MPP_CTRL(i) (DEV_BUS_VIRT_BASE + (i) * 4) -#define MPP_NR_REGS (1 + MPP_MAX/8) - -void __init kirkwood_mpp_conf(unsigned int *mpp_list) -{ - u32 mpp_ctrl[MPP_NR_REGS]; - unsigned int variant_mask; - int i; - - variant_mask = kirkwood_variant(); - if (!variant_mask) - return; - - printk(KERN_DEBUG "initial MPP regs:"); - for (i = 0; i < MPP_NR_REGS; i++) { - mpp_ctrl[i] = readl(MPP_CTRL(i)); - printk(" %08x", mpp_ctrl[i]); - } - printk("\n"); - - while (*mpp_list) { - unsigned int num = MPP_NUM(*mpp_list); - unsigned int sel = MPP_SEL(*mpp_list); - int shift, gpio_mode; - - if (num > MPP_MAX) { - printk(KERN_ERR "kirkwood_mpp_conf: invalid MPP " - "number (%u)\n", num); - continue; - } - if (!(*mpp_list & variant_mask)) { - printk(KERN_WARNING - "kirkwood_mpp_conf: requested MPP%u config " - "unavailable on this hardware\n", num); - continue; - } - - shift = (num & 7) << 2; - mpp_ctrl[num / 8] &= ~(0xf << shift); - mpp_ctrl[num / 8] |= sel << shift; - - gpio_mode = 0; - if (*mpp_list & MPP_INPUT_MASK) - gpio_mode |= GPIO_INPUT_OK; - if (*mpp_list & MPP_OUTPUT_MASK) - gpio_mode |= GPIO_OUTPUT_OK; - if (sel != 0) - gpio_mode = 0; - orion_gpio_set_valid(num, gpio_mode); - - mpp_list++; - } - - printk(KERN_DEBUG " final MPP regs:"); - for (i = 0; i < MPP_NR_REGS; i++) { - writel(mpp_ctrl[i], MPP_CTRL(i)); - printk(" %08x", mpp_ctrl[i]); - } - printk("\n"); -} diff --git a/trunk/arch/arm/mach-kirkwood/mpp.h b/trunk/arch/arm/mach-kirkwood/mpp.h deleted file mode 100644 index 45cccb743107..000000000000 --- a/trunk/arch/arm/mach-kirkwood/mpp.h +++ /dev/null @@ -1,303 +0,0 @@ -/* - * linux/arch/arm/mach-kirkwood/mpp.h -- Multi Purpose Pins - * - * Copyright 2009: Marvell Technology Group Ltd. - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __KIRKWOOD_MPP_H -#define __KIRKWOOD_MPP_H - -#define MPP(_num, _sel, _in, _out, _F6180, _F6190, _F6192, _F6281) ( \ - /* MPP number */ ((_num) & 0xff) | \ - /* MPP select value */ (((_sel) & 0xf) << 8) | \ - /* may be input signal */ ((!!(_in)) << 12) | \ - /* may be output signal */ ((!!(_out)) << 13) | \ - /* available on F6180 */ ((!!(_F6180)) << 14) | \ - /* available on F6190 */ ((!!(_F6190)) << 15) | \ - /* available on F6192 */ ((!!(_F6192)) << 16) | \ - /* available on F6281 */ ((!!(_F6281)) << 17)) - -#define MPP_NUM(x) ((x) & 0xff) -#define MPP_SEL(x) (((x) >> 8) & 0xf) - - /* num sel i o 6180 6190 6192 6281 */ - -#define MPP_INPUT_MASK MPP( 0, 0x0, 1, 0, 0, 0, 0, 0 ) -#define MPP_OUTPUT_MASK MPP( 0, 0x0, 0, 1, 0, 0, 0, 0 ) - -#define MPP_F6180_MASK MPP( 0, 0x0, 0, 0, 1, 0, 0, 0 ) -#define MPP_F6190_MASK MPP( 0, 0x0, 0, 0, 0, 1, 0, 0 ) -#define MPP_F6192_MASK MPP( 0, 0x0, 0, 0, 0, 0, 1, 0 ) -#define MPP_F6281_MASK MPP( 0, 0x0, 0, 0, 0, 0, 0, 1 ) - -#define MPP0_GPIO MPP( 0, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP0_NF_IO2 MPP( 0, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP0_SPI_SCn MPP( 0, 0x2, 0, 1, 1, 1, 1, 1 ) - -#define MPP1_GPO MPP( 1, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP1_NF_IO3 MPP( 1, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP1_SPI_MOSI MPP( 1, 0x2, 0, 1, 1, 1, 1, 1 ) - -#define MPP2_GPO MPP( 2, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP2_NF_IO4 MPP( 2, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP2_SPI_SCK MPP( 2, 0x2, 0, 1, 1, 1, 1, 1 ) - -#define MPP3_GPO MPP( 3, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP3_NF_IO5 MPP( 3, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP3_SPI_MISO MPP( 3, 0x2, 1, 0, 1, 1, 1, 1 ) - -#define MPP4_GPIO MPP( 4, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP4_NF_IO6 MPP( 4, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP4_UART0_RXD MPP( 4, 0x2, 1, 0, 1, 1, 1, 1 ) -#define MPP4_SATA1_ACTn MPP( 4, 0x5, 0, 1, 0, 0, 1, 1 ) -#define MPP4_PTP_CLK MPP( 4, 0xd, 1, 0, 1, 1, 1, 1 ) - -#define MPP5_GPO MPP( 5, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP5_NF_IO7 MPP( 5, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP5_UART0_TXD MPP( 5, 0x2, 0, 1, 1, 1, 1, 1 ) -#define MPP5_PTP_TRIG_GEN MPP( 5, 0x4, 0, 1, 1, 1, 1, 1 ) -#define MPP5_SATA0_ACTn MPP( 5, 0x5, 0, 1, 0, 1, 1, 1 ) - -#define MPP6_SYSRST_OUTn MPP( 6, 0x1, 0, 1, 1, 1, 1, 1 ) -#define MPP6_SPI_MOSI MPP( 6, 0x2, 0, 1, 1, 1, 1, 1 ) -#define MPP6_PTP_TRIG_GEN MPP( 6, 0x3, 0, 1, 1, 1, 1, 1 ) - -#define MPP7_GPO MPP( 7, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP7_PEX_RST_OUTn MPP( 7, 0x1, 0, 1, 1, 1, 1, 1 ) -#define MPP7_SPI_SCn MPP( 7, 0x2, 0, 1, 1, 1, 1, 1 ) -#define MPP7_PTP_TRIG_GEN MPP( 7, 0x3, 0, 1, 1, 1, 1, 1 ) - -#define MPP8_GPIO MPP( 8, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP8_TW_SDA MPP( 8, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP8_UART0_RTS MPP( 8, 0x2, 0, 1, 1, 1, 1, 1 ) -#define MPP8_UART1_RTS MPP( 8, 0x3, 0, 1, 1, 1, 1, 1 ) -#define MPP8_MII0_RXERR MPP( 8, 0x4, 1, 0, 0, 1, 1, 1 ) -#define MPP8_SATA1_PRESENTn MPP( 8, 0x5, 0, 1, 0, 0, 1, 1 ) -#define MPP8_PTP_CLK MPP( 8, 0xc, 1, 0, 1, 1, 1, 1 ) -#define MPP8_MII0_COL MPP( 8, 0xd, 1, 0, 1, 1, 1, 1 ) - -#define MPP9_GPIO MPP( 9, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP9_TW_SCK MPP( 9, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP9_UART0_CTS MPP( 9, 0x2, 1, 0, 1, 1, 1, 1 ) -#define MPP9_UART1_CTS MPP( 9, 0x3, 1, 0, 1, 1, 1, 1 ) -#define MPP9_SATA0_PRESENTn MPP( 9, 0x5, 0, 1, 0, 1, 1, 1 ) -#define MPP9_PTP_EVENT_REQ MPP( 9, 0xc, 1, 0, 1, 1, 1, 1 ) -#define MPP9_MII0_CRS MPP( 9, 0xd, 1, 0, 1, 1, 1, 1 ) - -#define MPP10_GPO MPP( 10, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP10_SPI_SCK MPP( 10, 0x2, 0, 1, 1, 1, 1, 1 ) -#define MPP10_UArt0_TXD MPP( 10, 0X3, 0, 1, 1, 1, 1, 1 ) -#define MPP10_SATA1_ACTn MPP( 10, 0x5, 0, 1, 0, 0, 1, 1 ) -#define MPP10_PTP_TRIG_GEN MPP( 10, 0xc, 0, 1, 1, 1, 1, 1 ) - -#define MPP11_GPIO MPP( 11, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP11_SPI_MISO MPP( 11, 0x2, 1, 0, 1, 1, 1, 1 ) -#define MPP11_UArt0_RXD MPP( 11, 0x3, 1, 0, 1, 1, 1, 1 ) -#define MPP11_PTP_EVENT_REQ MPP( 11, 0x4, 1, 0, 1, 1, 1, 1 ) -#define MPP11_PTP_TRIG_GEN MPP( 11, 0xc, 0, 1, 1, 1, 1, 1 ) -#define MPP11_PTP_CLK MPP( 11, 0xd, 1, 0, 1, 1, 1, 1 ) -#define MPP11_SATA0_ACTn MPP( 11, 0x5, 0, 1, 0, 1, 1, 1 ) - -#define MPP12_GPO MPP( 12, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP12_SD_CLK MPP( 12, 0x1, 0, 1, 1, 1, 1, 1 ) - -#define MPP13_GPIO MPP( 13, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP13_SD_CMD MPP( 13, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP13_UART1_TXD MPP( 13, 0x3, 0, 1, 1, 1, 1, 1 ) - -#define MPP14_GPIO MPP( 14, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP14_SD_D0 MPP( 14, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP14_UART1_RXD MPP( 14, 0x3, 1, 0, 1, 1, 1, 1 ) -#define MPP14_SATA1_PRESENTn MPP( 14, 0x4, 0, 1, 0, 0, 1, 1 ) -#define MPP14_MII0_COL MPP( 14, 0xd, 1, 0, 1, 1, 1, 1 ) - -#define MPP15_GPIO MPP( 15, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP15_SD_D1 MPP( 15, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP15_UART0_RTS MPP( 15, 0x2, 0, 1, 1, 1, 1, 1 ) -#define MPP15_UART1_TXD MPP( 15, 0x3, 0, 1, 1, 1, 1, 1 ) -#define MPP15_SATA0_ACTn MPP( 15, 0x4, 0, 1, 0, 1, 1, 1 ) - -#define MPP16_GPIO MPP( 16, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP16_SD_D2 MPP( 16, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP16_UART0_CTS MPP( 16, 0x2, 1, 0, 1, 1, 1, 1 ) -#define MPP16_UART1_RXD MPP( 16, 0x3, 1, 0, 1, 1, 1, 1 ) -#define MPP16_SATA1_ACTn MPP( 16, 0x4, 0, 1, 0, 0, 1, 1 ) -#define MPP16_MII0_CRS MPP( 16, 0xd, 1, 0, 1, 1, 1, 1 ) - -#define MPP17_GPIO MPP( 17, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP17_SD_D3 MPP( 17, 0x1, 1, 1, 1, 1, 1, 1 ) -#define MPP17_SATA0_PRESENTn MPP( 17, 0x4, 0, 1, 0, 1, 1, 1 ) - -#define MPP18_GPO MPP( 18, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP18_NF_IO0 MPP( 18, 0x1, 1, 1, 1, 1, 1, 1 ) - -#define MPP19_GPO MPP( 19, 0x0, 0, 1, 1, 1, 1, 1 ) -#define MPP19_NF_IO1 MPP( 19, 0x1, 1, 1, 1, 1, 1, 1 ) - -#define MPP20_GPIO MPP( 20, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP20_TSMP0 MPP( 20, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP20_TDM_CH0_TX_QL MPP( 20, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP20_GE1_0 MPP( 20, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP20_AUDIO_SPDIFI MPP( 20, 0x4, 1, 0, 0, 0, 1, 1 ) -#define MPP20_SATA1_ACTn MPP( 20, 0x5, 0, 1, 0, 0, 1, 1 ) - -#define MPP21_GPIO MPP( 21, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP21_TSMP1 MPP( 21, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP21_TDM_CH0_RX_QL MPP( 21, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP21_GE1_1 MPP( 21, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP21_AUDIO_SPDIFO MPP( 21, 0x4, 0, 1, 0, 0, 1, 1 ) -#define MPP21_SATA0_ACTn MPP( 21, 0x5, 0, 1, 0, 1, 1, 1 ) - -#define MPP22_GPIO MPP( 22, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP22_TSMP2 MPP( 22, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP22_TDM_CH2_TX_QL MPP( 22, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP22_GE1_2 MPP( 22, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP22_AUDIO_SPDIFRMKCLK MPP( 22, 0x4, 0, 1, 0, 0, 1, 1 ) -#define MPP22_SATA1_PRESENTn MPP( 22, 0x5, 0, 1, 0, 0, 1, 1 ) - -#define MPP23_GPIO MPP( 23, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP23_TSMP3 MPP( 23, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP23_TDM_CH2_RX_QL MPP( 23, 0x2, 1, 0, 0, 0, 1, 1 ) -#define MPP23_GE1_3 MPP( 23, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP23_AUDIO_I2SBCLK MPP( 23, 0x4, 0, 1, 0, 0, 1, 1 ) -#define MPP23_SATA0_PRESENTn MPP( 23, 0x5, 0, 1, 0, 1, 1, 1 ) - -#define MPP24_GPIO MPP( 24, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP24_TSMP4 MPP( 24, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP24_TDM_SPI_CS0 DEV( 24, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP24_GE1_4 MPP( 24, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP24_AUDIO_I2SDO MPP( 24, 0x4, 0, 1, 0, 0, 1, 1 ) - -#define MPP25_GPIO MPP( 25, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP25_TSMP5 MPP( 25, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP25_TDM_SPI_SCK MPP( 25, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP25_GE1_5 MPP( 25, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP25_AUDIO_I2SLRCLK MPP( 25, 0x4, 0, 1, 0, 0, 1, 1 ) - -#define MPP26_GPIO MPP( 26, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP26_TSMP6 MPP( 26, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP26_TDM_SPI_MISO MPP( 26, 0x2, 1, 0, 0, 0, 1, 1 ) -#define MPP26_GE1_6 MPP( 26, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP26_AUDIO_I2SMCLK MPP( 26, 0x4, 0, 1, 0, 0, 1, 1 ) - -#define MPP27_GPIO MPP( 27, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP27_TSMP7 MPP( 27, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP27_TDM_SPI_MOSI MPP( 27, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP27_GE1_7 MPP( 27, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP27_AUDIO_I2SDI MPP( 27, 0x4, 1, 0, 0, 0, 1, 1 ) - -#define MPP28_GPIO MPP( 28, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP28_TSMP8 MPP( 28, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP28_TDM_CODEC_INTn MPP( 28, 0x2, 0, 0, 0, 0, 1, 1 ) -#define MPP28_GE1_8 MPP( 28, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP28_AUDIO_EXTCLK MPP( 28, 0x4, 1, 0, 0, 0, 1, 1 ) - -#define MPP29_GPIO MPP( 29, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP29_TSMP9 MPP( 29, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP29_TDM_CODEC_RSTn MPP( 29, 0x2, 0, 0, 0, 0, 1, 1 ) -#define MPP29_GE1_9 MPP( 29, 0x3, 0, 0, 0, 1, 1, 1 ) - -#define MPP30_GPIO MPP( 30, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP30_TSMP10 MPP( 30, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP30_TDM_PCLK MPP( 30, 0x2, 1, 1, 0, 0, 1, 1 ) -#define MPP30_GE1_10 MPP( 30, 0x3, 0, 0, 0, 1, 1, 1 ) - -#define MPP31_GPIO MPP( 31, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP31_TSMP11 MPP( 31, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP31_TDM_FS MPP( 31, 0x2, 1, 1, 0, 0, 1, 1 ) -#define MPP31_GE1_11 MPP( 31, 0x3, 0, 0, 0, 1, 1, 1 ) - -#define MPP32_GPIO MPP( 32, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP32_TSMP12 MPP( 32, 0x1, 1, 1, 0, 0, 1, 1 ) -#define MPP32_TDM_DRX MPP( 32, 0x2, 1, 0, 0, 0, 1, 1 ) -#define MPP32_GE1_12 MPP( 32, 0x3, 0, 0, 0, 1, 1, 1 ) - -#define MPP33_GPIO MPP( 33, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP33_TDM_DTX MPP( 33, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP33_GE1_13 MPP( 33, 0x3, 0, 0, 0, 1, 1, 1 ) - -#define MPP34_GPIO MPP( 34, 0x0, 1, 1, 0, 1, 1, 1 ) -#define MPP34_TDM_SPI_CS1 MPP( 34, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP34_GE1_14 MPP( 34, 0x3, 0, 0, 0, 1, 1, 1 ) - -#define MPP35_GPIO MPP( 35, 0x0, 1, 1, 1, 1, 1, 1 ) -#define MPP35_TDM_CH0_TX_QL MPP( 35, 0x2, 0, 1, 0, 0, 1, 1 ) -#define MPP35_GE1_15 MPP( 35, 0x3, 0, 0, 0, 1, 1, 1 ) -#define MPP35_SATA0_ACTn MPP( 35, 0x5, 0, 1, 0, 1, 1, 1 ) -#define MPP35_MII0_RXERR MPP( 35, 0xc, 1, 0, 1, 1, 1, 1 ) - -#define MPP36_GPIO MPP( 36, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP36_TSMP0 MPP( 36, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP36_TDM_SPI_CS1 MPP( 36, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP36_AUDIO_SPDIFI MPP( 36, 0x4, 1, 0, 1, 0, 0, 1 ) - -#define MPP37_GPIO MPP( 37, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP37_TSMP1 MPP( 37, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP37_TDM_CH2_TX_QL MPP( 37, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP37_AUDIO_SPDIFO MPP( 37, 0x4, 0, 1, 1, 0, 0, 1 ) - -#define MPP38_GPIO MPP( 38, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP38_TSMP2 MPP( 38, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP38_TDM_CH2_RX_QL MPP( 38, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP38_AUDIO_SPDIFRMLCLK MPP( 38, 0x4, 0, 1, 1, 0, 0, 1 ) - -#define MPP39_GPIO MPP( 39, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP39_TSMP3 MPP( 39, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP39_TDM_SPI_CS0 MPP( 39, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP39_AUDIO_I2SBCLK MPP( 39, 0x4, 0, 1, 1, 0, 0, 1 ) - -#define MPP40_GPIO MPP( 40, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP40_TSMP4 MPP( 40, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP40_TDM_SPI_SCK MPP( 40, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP40_AUDIO_I2SDO MPP( 40, 0x4, 0, 1, 1, 0, 0, 1 ) - -#define MPP41_GPIO MPP( 41, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP41_TSMP5 MPP( 41, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP41_TDM_SPI_MISO MPP( 41, 0x2, 1, 0, 0, 0, 0, 1 ) -#define MPP41_AUDIO_I2SLRC MPP( 41, 0x4, 0, 1, 1, 0, 0, 1 ) - -#define MPP42_GPIO MPP( 42, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP42_TSMP6 MPP( 42, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP42_TDM_SPI_MOSI MPP( 42, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP42_AUDIO_I2SMCLK MPP( 42, 0x4, 0, 1, 1, 0, 0, 1 ) - -#define MPP43_GPIO MPP( 43, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP43_TSMP7 MPP( 43, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP43_TDM_CODEC_INTn MPP( 43, 0x2, 0, 0, 0, 0, 0, 1 ) -#define MPP43_AUDIO_I2SDI MPP( 43, 0x4, 1, 0, 1, 0, 0, 1 ) - -#define MPP44_GPIO MPP( 44, 0x0, 1, 1, 1, 0, 0, 1 ) -#define MPP44_TSMP8 MPP( 44, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP44_TDM_CODEC_RSTn MPP( 44, 0x2, 0, 0, 0, 0, 0, 1 ) -#define MPP44_AUDIO_EXTCLK MPP( 44, 0x4, 1, 0, 1, 0, 0, 1 ) - -#define MPP45_GPIO MPP( 45, 0x0, 1, 1, 0, 0, 0, 1 ) -#define MPP45_TSMP9 MPP( 45, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP45_TDM_PCLK MPP( 45, 0x2, 1, 1, 0, 0, 0, 1 ) - -#define MPP46_GPIO MPP( 46, 0x0, 1, 1, 0, 0, 0, 1 ) -#define MPP46_TSMP10 MPP( 46, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP46_TDM_FS MPP( 46, 0x2, 1, 1, 0, 0, 0, 1 ) - -#define MPP47_GPIO MPP( 47, 0x0, 1, 1, 0, 0, 0, 1 ) -#define MPP47_TSMP11 MPP( 47, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP47_TDM_DRX MPP( 47, 0x2, 1, 0, 0, 0, 0, 1 ) - -#define MPP48_GPIO MPP( 48, 0x0, 1, 1, 0, 0, 0, 1 ) -#define MPP48_TSMP12 MPP( 48, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP48_TDM_DTX MPP( 48. 0x2, 0, 1, 0, 0, 0, 1 ) - -#define MPP49_GPIO MPP( 49, 0x0, 1, 1, 0, 0, 0, 1 ) -#define MPP49_TSMP9 MPP( 49, 0x1, 1, 1, 0, 0, 0, 1 ) -#define MPP49_TDM_CH0_RX_QL MPP( 49, 0x2, 0, 1, 0, 0, 0, 1 ) -#define MPP49_PTP_CLK MPP( 49, 0x5, 1, 0, 0, 0, 0, 1 ) - -#define MPP_MAX 49 - -void kirkwood_mpp_conf(unsigned int *mpp_list); - -#endif diff --git a/trunk/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c b/trunk/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c index 2f0e4ef3db0f..b1d1a87a6821 100644 --- a/trunk/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c +++ b/trunk/arch/arm/mach-kirkwood/rd88f6192-nas-setup.c @@ -11,8 +11,11 @@ #include #include #include +#include +#include +#include #include -#include +#include #include #include #include @@ -20,6 +23,7 @@ #include #include #include +#include #include #include "common.h" @@ -57,11 +61,14 @@ static void __init rd88f6192_init(void) kirkwood_ehci_init(); kirkwood_ge00_init(&rd88f6192_ge00_data); + kirkwood_rtc_init(); kirkwood_sata_init(&rd88f6192_sata_data); spi_register_board_info(rd88F6192_spi_slave_info, ARRAY_SIZE(rd88F6192_spi_slave_info)); kirkwood_spi_init(); kirkwood_uart0_init(); + kirkwood_xor0_init(); + kirkwood_xor1_init(); } static int __init rd88f6192_pci_init(void) diff --git a/trunk/arch/arm/mach-kirkwood/rd88f6281-setup.c b/trunk/arch/arm/mach-kirkwood/rd88f6281-setup.c index c3deea5e3cad..9a0e905d10cd 100644 --- a/trunk/arch/arm/mach-kirkwood/rd88f6281-setup.c +++ b/trunk/arch/arm/mach-kirkwood/rd88f6281-setup.c @@ -11,20 +11,21 @@ #include #include #include +#include #include +#include #include -#include +#include #include #include #include #include #include #include +#include #include -#include #include #include "common.h" -#include "mpp.h" static struct mtd_partition rd88f6281_nand_parts[] = { { @@ -90,15 +91,6 @@ static struct mv_sata_platform_data rd88f6281_sata_data = { .n_ports = 2, }; -static struct mvsdio_platform_data rd88f6281_mvsdio_data = { - .gpio_card_detect = 28, -}; - -static unsigned int rd88f6281_mpp_config[] __initdata = { - MPP28_GPIO, - 0 -}; - static void __init rd88f6281_init(void) { u32 dev, rev; @@ -107,7 +99,6 @@ static void __init rd88f6281_init(void) * Basic setup. Needs to be called early. */ kirkwood_init(); - kirkwood_mpp_conf(rd88f6281_mpp_config); kirkwood_ehci_init(); @@ -121,8 +112,8 @@ static void __init rd88f6281_init(void) } kirkwood_ge00_switch_init(&rd88f6281_switch_data, NO_IRQ); + kirkwood_rtc_init(); kirkwood_sata_init(&rd88f6281_sata_data); - kirkwood_sdio_init(&rd88f6281_mvsdio_data); kirkwood_uart0_init(); platform_device_register(&rd88f6281_nand_flash); diff --git a/trunk/arch/arm/mach-kirkwood/sheevaplug-setup.c b/trunk/arch/arm/mach-kirkwood/sheevaplug-setup.c deleted file mode 100644 index 831e4a56cae1..000000000000 --- a/trunk/arch/arm/mach-kirkwood/sheevaplug-setup.c +++ /dev/null @@ -1,136 +0,0 @@ -/* - * arch/arm/mach-kirkwood/sheevaplug-setup.c - * - * Marvell SheevaPlug Reference Board Setup - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "common.h" -#include "mpp.h" - -static struct mtd_partition sheevaplug_nand_parts[] = { - { - .name = "u-boot", - .offset = 0, - .size = SZ_1M - }, { - .name = "uImage", - .offset = MTDPART_OFS_NXTBLK, - .size = SZ_4M - }, { - .name = "root", - .offset = MTDPART_OFS_NXTBLK, - .size = MTDPART_SIZ_FULL - }, -}; - -static struct resource sheevaplug_nand_resource = { - .flags = IORESOURCE_MEM, - .start = KIRKWOOD_NAND_MEM_PHYS_BASE, - .end = KIRKWOOD_NAND_MEM_PHYS_BASE + - KIRKWOOD_NAND_MEM_SIZE - 1, -}; - -static struct orion_nand_data sheevaplug_nand_data = { - .parts = sheevaplug_nand_parts, - .nr_parts = ARRAY_SIZE(sheevaplug_nand_parts), - .cle = 0, - .ale = 1, - .width = 8, - .chip_delay = 25, -}; - -static struct platform_device sheevaplug_nand_flash = { - .name = "orion_nand", - .id = -1, - .dev = { - .platform_data = &sheevaplug_nand_data, - }, - .resource = &sheevaplug_nand_resource, - .num_resources = 1, -}; - -static struct mv643xx_eth_platform_data sheevaplug_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(0), -}; - -static struct mvsdio_platform_data sheevaplug_mvsdio_data = { - // unfortunately the CD signal has not been connected */ -}; - -static struct gpio_led sheevaplug_led_pins[] = { - { - .name = "plug:green:health", - .default_trigger = "default-on", - .gpio = 49, - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data sheevaplug_led_data = { - .leds = sheevaplug_led_pins, - .num_leds = ARRAY_SIZE(sheevaplug_led_pins), -}; - -static struct platform_device sheevaplug_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &sheevaplug_led_data, - } -}; - -static unsigned int sheevaplug_mpp_config[] __initdata = { - MPP29_GPIO, /* USB Power Enable */ - MPP49_GPIO, /* LED */ - 0 -}; - -static void __init sheevaplug_init(void) -{ - /* - * Basic setup. Needs to be called early. - */ - kirkwood_init(); - kirkwood_mpp_conf(sheevaplug_mpp_config); - - kirkwood_uart0_init(); - - if (gpio_request(29, "USB Power Enable") != 0 || - gpio_direction_output(29, 1) != 0) - printk(KERN_ERR "can't set up GPIO 29 (USB Power Enable)\n"); - kirkwood_ehci_init(); - - kirkwood_ge00_init(&sheevaplug_ge00_data); - kirkwood_sdio_init(&sheevaplug_mvsdio_data); - - platform_device_register(&sheevaplug_nand_flash); - platform_device_register(&sheevaplug_leds); -} - -MACHINE_START(SHEEVAPLUG, "Marvell SheevaPlug Reference Board") - /* Maintainer: shadi Ammouri */ - .phys_io = KIRKWOOD_REGS_PHYS_BASE, - .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, - .boot_params = 0x00000100, - .init_machine = sheevaplug_init, - .map_io = kirkwood_map_io, - .init_irq = kirkwood_init_irq, - .timer = &kirkwood_timer, -MACHINE_END diff --git a/trunk/arch/arm/mach-ks8695/Kconfig b/trunk/arch/arm/mach-ks8695/Kconfig index fe0c82e30b2d..2754daabda55 100644 --- a/trunk/arch/arm/mach-ks8695/Kconfig +++ b/trunk/arch/arm/mach-ks8695/Kconfig @@ -14,12 +14,6 @@ config MACH_DSM320 Say 'Y' here if you want your kernel to run on the D-Link DSM-320 Wireless Media Player. -config MACH_ACS5K - bool "Brivo Systems LLC, ACS-5000 Master board" - help - say 'Y' here if you want your kernel to run on the Brivo - Systems LLC, ACS-5000 Master board. - endmenu endif diff --git a/trunk/arch/arm/mach-ks8695/Makefile b/trunk/arch/arm/mach-ks8695/Makefile index 7e3e8160ed30..f735d2cc0294 100644 --- a/trunk/arch/arm/mach-ks8695/Makefile +++ b/trunk/arch/arm/mach-ks8695/Makefile @@ -17,4 +17,3 @@ obj-$(CONFIG_LEDS) += leds.o # Board-specific support obj-$(CONFIG_MACH_KS8695) += board-micrel.o obj-$(CONFIG_MACH_DSM320) += board-dsm320.o -obj-$(CONFIG_MACH_ACS5K) += board-acs5k.o diff --git a/trunk/arch/arm/mach-ks8695/board-acs5k.c b/trunk/arch/arm/mach-ks8695/board-acs5k.c deleted file mode 100644 index 9e3e5a640ad2..000000000000 --- a/trunk/arch/arm/mach-ks8695/board-acs5k.c +++ /dev/null @@ -1,233 +0,0 @@ -/* - * arch/arm/mach-ks8695/board-acs5k.c - * - * Brivo Systems LLC, ACS-5000 Master Board - * - * Copyright 2008 Simtec Electronics - * Daniel Silverstone - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -#include -#include -#include - -#include -#include - -#include "generic.h" - -static struct i2c_gpio_platform_data acs5k_i2c_device_platdata = { - .sda_pin = 4, - .scl_pin = 5, - .udelay = 10, -}; - -static struct platform_device acs5k_i2c_device = { - .name = "i2c-gpio", - .id = -1, - .num_resources = 0, - .resource = NULL, - .dev = { - .platform_data = &acs5k_i2c_device_platdata, - }, -}; - -static int acs5k_pca9555_setup(struct i2c_client *client, - unsigned gpio_base, unsigned ngpio, - void *context) -{ - static int acs5k_gpio_value[] = { - -1, -1, -1, -1, -1, -1, -1, 0, 1, 1, -1, 0, 1, 0, -1, -1 - }; - int n; - - for (n = 0; n < ARRAY_SIZE(acs5k_gpio_value); ++n) { - gpio_request(gpio_base + n, "ACS-5000 GPIO Expander"); - if (acs5k_gpio_value[n] < 0) - gpio_direction_input(gpio_base + n); - else - gpio_direction_output(gpio_base + n, - acs5k_gpio_value[n]); - gpio_export(gpio_base + n, 0); /* Export, direction locked down */ - } - - return 0; -} - -static struct pca953x_platform_data acs5k_i2c_pca9555_platdata = { - .gpio_base = 16, /* Start directly after the CPU's GPIO */ - .invert = 0, /* Do not invert */ - .setup = acs5k_pca9555_setup, -}; - -static struct i2c_board_info acs5k_i2c_devs[] __initdata = { - { - I2C_BOARD_INFO("pcf8563", 0x51), - }, - { - I2C_BOARD_INFO("pca9555", 0x20), - .platform_data = &acs5k_i2c_pca9555_platdata, - }, -}; - -static void __devinit acs5k_i2c_init(void) -{ - /* The gpio interface */ - platform_device_register(&acs5k_i2c_device); - /* I2C devices */ - i2c_register_board_info(0, acs5k_i2c_devs, - ARRAY_SIZE(acs5k_i2c_devs)); -} - -static struct mtd_partition acs5k_nor_partitions[] = { - [0] = { - .name = "Boot Agent and config", - .size = SZ_256K, - .offset = 0, - .mask_flags = MTD_WRITEABLE, - }, - [1] = { - .name = "Kernel", - .size = SZ_1M, - .offset = SZ_256K, - }, - [2] = { - .name = "SquashFS1", - .size = SZ_2M, - .offset = SZ_256K + SZ_1M, - }, - [3] = { - .name = "SquashFS2", - .size = SZ_4M + SZ_2M, - .offset = SZ_256K + SZ_1M + SZ_2M, - }, - [4] = { - .name = "Data", - .size = SZ_16M + SZ_4M + SZ_2M + SZ_512K, /* 22.5 MB */ - .offset = SZ_256K + SZ_8M + SZ_1M, - } -}; - -static struct physmap_flash_data acs5k_nor_pdata = { - .width = 4, - .nr_parts = ARRAY_SIZE(acs5k_nor_partitions), - .parts = acs5k_nor_partitions, -}; - -static struct resource acs5k_nor_resource[] = { - [0] = { - .start = SZ_32M, /* We expect the bootloader to map - * the flash here. - */ - .end = SZ_32M + SZ_16M - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = SZ_32M + SZ_16M, - .end = SZ_32M + SZ_32M - SZ_256K - 1, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device acs5k_device_nor = { - .name = "physmap-flash", - .id = -1, - .num_resources = ARRAY_SIZE(acs5k_nor_resource), - .resource = acs5k_nor_resource, - .dev = { - .platform_data = &acs5k_nor_pdata, - }, -}; - -static void __init acs5k_register_nor(void) -{ - int ret; - - if (acs5k_nor_partitions[0].mask_flags == 0) - printk(KERN_WARNING "Warning: Unprotecting bootloader and configuration partition\n"); - - ret = platform_device_register(&acs5k_device_nor); - if (ret < 0) - printk(KERN_ERR "failed to register physmap-flash device\n"); -} - -static int __init acs5k_protection_setup(char *s) -{ - /* We can't allocate anything here but we should be able - * to trivially parse s and decide if we can protect the - * bootloader partition or not - */ - if (strcmp(s, "no") == 0) - acs5k_nor_partitions[0].mask_flags = 0; - - return 1; -} - -__setup("protect_bootloader=", acs5k_protection_setup); - -static void __init acs5k_init_gpio(void) -{ - int i; - - ks8695_register_gpios(); - for (i = 0; i < 4; ++i) - gpio_request(i, "ACS5K IRQ"); - gpio_request(7, "ACS5K KS_FRDY"); - for (i = 8; i < 16; ++i) - gpio_request(i, "ACS5K Unused"); - - gpio_request(3, "ACS5K CAN Control"); - gpio_request(6, "ACS5K Heartbeat"); - gpio_direction_output(3, 1); /* Default CAN_RESET high */ - gpio_direction_output(6, 0); /* Default KS8695_ACTIVE low */ - gpio_export(3, 0); /* export CAN_RESET as output only */ - gpio_export(6, 0); /* export KS8695_ACTIVE as output only */ -} - -static void __init acs5k_init(void) -{ - acs5k_init_gpio(); - - /* Network device */ - ks8695_add_device_lan(); /* eth0 = LAN */ - ks8695_add_device_wan(); /* ethX = WAN */ - - /* NOR devices */ - acs5k_register_nor(); - - /* I2C bus */ - acs5k_i2c_init(); -} - -MACHINE_START(ACS5K, "Brivo Systems LLC ACS-5000 Master board") - /* Maintainer: Simtec Electronics. */ - .phys_io = KS8695_IO_PA, - .io_pg_offst = (KS8695_IO_VA >> 18) & 0xfffc, - .boot_params = KS8695_SDRAM_PA + 0x100, - .map_io = ks8695_map_io, - .init_irq = ks8695_init_irq, - .init_machine = acs5k_init, - .timer = &ks8695_timer, -MACHINE_END diff --git a/trunk/arch/arm/mach-ks8695/include/mach/system.h b/trunk/arch/arm/mach-ks8695/include/mach/system.h index fb1dda9be2d0..5a9b032bdbeb 100644 --- a/trunk/arch/arm/mach-ks8695/include/mach/system.h +++ b/trunk/arch/arm/mach-ks8695/include/mach/system.h @@ -27,7 +27,7 @@ static void arch_idle(void) } -static void arch_reset(char mode, const char *cmd) +static void arch_reset(char mode) { unsigned int reg; diff --git a/trunk/arch/arm/mach-l7200/include/mach/system.h b/trunk/arch/arm/mach-l7200/include/mach/system.h index e0dd3b6ae4aa..5272abee0d0e 100644 --- a/trunk/arch/arm/mach-l7200/include/mach/system.h +++ b/trunk/arch/arm/mach-l7200/include/mach/system.h @@ -19,7 +19,7 @@ static inline void arch_idle(void) *(unsigned long *)(IO_BASE + 0x50004) = 1; /* idle mode */ } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { if (mode == 's') { cpu_reset(0); diff --git a/trunk/arch/arm/mach-lh7a40x/include/mach/system.h b/trunk/arch/arm/mach-lh7a40x/include/mach/system.h index 45a56d3b93d7..fa46bb1ef07b 100644 --- a/trunk/arch/arm/mach-lh7a40x/include/mach/system.h +++ b/trunk/arch/arm/mach-lh7a40x/include/mach/system.h @@ -13,7 +13,7 @@ static inline void arch_idle(void) cpu_do_idle (); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { cpu_reset (0); } diff --git a/trunk/arch/arm/mach-loki/include/mach/system.h b/trunk/arch/arm/mach-loki/include/mach/system.h index c1de36fe9b37..8db1147d4ec5 100644 --- a/trunk/arch/arm/mach-loki/include/mach/system.h +++ b/trunk/arch/arm/mach-loki/include/mach/system.h @@ -17,7 +17,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { /* * Enable soft reset to assert RSTOUTn. diff --git a/trunk/arch/arm/mach-msm/board-halibut.c b/trunk/arch/arm/mach-msm/board-halibut.c index e61967dde9a1..c2a96e3965a6 100644 --- a/trunk/arch/arm/mach-msm/board-halibut.c +++ b/trunk/arch/arm/mach-msm/board-halibut.c @@ -27,7 +27,6 @@ #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-msm/include/mach/system.h b/trunk/arch/arm/mach-msm/include/mach/system.h index 574ccc493daf..f05ad2e0f235 100644 --- a/trunk/arch/arm/mach-msm/include/mach/system.h +++ b/trunk/arch/arm/mach-msm/include/mach/system.h @@ -17,7 +17,7 @@ void arch_idle(void); -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { for (;;) ; /* depends on IPC w/ other core */ } diff --git a/trunk/arch/arm/mach-mv78xx0/Kconfig b/trunk/arch/arm/mach-mv78xx0/Kconfig index 6fbe68fe4412..d83cb86837db 100644 --- a/trunk/arch/arm/mach-mv78xx0/Kconfig +++ b/trunk/arch/arm/mach-mv78xx0/Kconfig @@ -8,12 +8,6 @@ config MACH_DB78X00_BP Say 'Y' here if you want your kernel to support the Marvell DB-78x00-BP Development Board. -config MACH_RD78X00_MASA - bool "Marvell RD-78x00-mASA Reference Design" - help - Say 'Y' here if you want your kernel to support the - Marvell RD-78x00-mASA Reference Design. - endmenu endif diff --git a/trunk/arch/arm/mach-mv78xx0/Makefile b/trunk/arch/arm/mach-mv78xx0/Makefile index da628b7f3bb6..ec16c05c3b1b 100644 --- a/trunk/arch/arm/mach-mv78xx0/Makefile +++ b/trunk/arch/arm/mach-mv78xx0/Makefile @@ -1,3 +1,2 @@ obj-y += common.o addr-map.o irq.o pcie.o obj-$(CONFIG_MACH_DB78X00_BP) += db78x00-bp-setup.o -obj-$(CONFIG_MACH_RD78X00_MASA) += rd78x00-masa-setup.o diff --git a/trunk/arch/arm/mach-mv78xx0/common.c b/trunk/arch/arm/mach-mv78xx0/common.c index a575daaa62d1..b0e4e0d8f506 100644 --- a/trunk/arch/arm/mach-mv78xx0/common.c +++ b/trunk/arch/arm/mach-mv78xx0/common.c @@ -14,9 +14,7 @@ #include #include #include -#include #include -#include #include #include #include @@ -432,22 +430,9 @@ static struct platform_device mv78xx0_ge10 = { void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data) { - u32 dev, rev; - eth_data->shared = &mv78xx0_ge10_shared; mv78xx0_ge10.dev.platform_data = eth_data; - /* - * On the Z0, ge10 and ge11 are internally connected back - * to back, and not brought out. - */ - mv78xx0_pcie_id(&dev, &rev); - if (dev == MV78X00_Z0_DEV_ID) { - eth_data->phy_addr = MV643XX_ETH_PHY_NONE; - eth_data->speed = SPEED_1000; - eth_data->duplex = DUPLEX_FULL; - } - platform_device_register(&mv78xx0_ge10_shared); platform_device_register(&mv78xx0_ge10); } @@ -499,101 +484,13 @@ static struct platform_device mv78xx0_ge11 = { void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data) { - u32 dev, rev; - eth_data->shared = &mv78xx0_ge11_shared; mv78xx0_ge11.dev.platform_data = eth_data; - /* - * On the Z0, ge10 and ge11 are internally connected back - * to back, and not brought out. - */ - mv78xx0_pcie_id(&dev, &rev); - if (dev == MV78X00_Z0_DEV_ID) { - eth_data->phy_addr = MV643XX_ETH_PHY_NONE; - eth_data->speed = SPEED_1000; - eth_data->duplex = DUPLEX_FULL; - } - platform_device_register(&mv78xx0_ge11_shared); platform_device_register(&mv78xx0_ge11); } -/***************************************************************************** - * I2C bus 0 - ****************************************************************************/ - -static struct mv64xxx_i2c_pdata mv78xx0_i2c_0_pdata = { - .freq_m = 8, /* assumes 166 MHz TCLK */ - .freq_n = 3, - .timeout = 1000, /* Default timeout of 1 second */ -}; - -static struct resource mv78xx0_i2c_0_resources[] = { - { - .name = "i2c 0 base", - .start = I2C_0_PHYS_BASE, - .end = I2C_0_PHYS_BASE + 0x1f, - .flags = IORESOURCE_MEM, - }, { - .name = "i2c 0 irq", - .start = IRQ_MV78XX0_I2C_0, - .end = IRQ_MV78XX0_I2C_0, - .flags = IORESOURCE_IRQ, - }, -}; - - -static struct platform_device mv78xx0_i2c_0 = { - .name = MV64XXX_I2C_CTLR_NAME, - .id = 0, - .num_resources = ARRAY_SIZE(mv78xx0_i2c_0_resources), - .resource = mv78xx0_i2c_0_resources, - .dev = { - .platform_data = &mv78xx0_i2c_0_pdata, - }, -}; - -/***************************************************************************** - * I2C bus 1 - ****************************************************************************/ - -static struct mv64xxx_i2c_pdata mv78xx0_i2c_1_pdata = { - .freq_m = 8, /* assumes 166 MHz TCLK */ - .freq_n = 3, - .timeout = 1000, /* Default timeout of 1 second */ -}; - -static struct resource mv78xx0_i2c_1_resources[] = { - { - .name = "i2c 1 base", - .start = I2C_1_PHYS_BASE, - .end = I2C_1_PHYS_BASE + 0x1f, - .flags = IORESOURCE_MEM, - }, { - .name = "i2c 1 irq", - .start = IRQ_MV78XX0_I2C_1, - .end = IRQ_MV78XX0_I2C_1, - .flags = IORESOURCE_IRQ, - }, -}; - - -static struct platform_device mv78xx0_i2c_1 = { - .name = MV64XXX_I2C_CTLR_NAME, - .id = 1, - .num_resources = ARRAY_SIZE(mv78xx0_i2c_1_resources), - .resource = mv78xx0_i2c_1_resources, - .dev = { - .platform_data = &mv78xx0_i2c_1_pdata, - }, -}; - -void __init mv78xx0_i2c_init(void) -{ - platform_device_register(&mv78xx0_i2c_0); - platform_device_register(&mv78xx0_i2c_1); -} /***************************************************************************** * SATA @@ -822,32 +719,6 @@ struct sys_timer mv78xx0_timer = { /***************************************************************************** * General ****************************************************************************/ -static char * __init mv78xx0_id(void) -{ - u32 dev, rev; - - mv78xx0_pcie_id(&dev, &rev); - - if (dev == MV78X00_Z0_DEV_ID) { - if (rev == MV78X00_REV_Z0) - return "MV78X00-Z0"; - else - return "MV78X00-Rev-Unsupported"; - } else if (dev == MV78100_DEV_ID) { - if (rev == MV78100_REV_A0) - return "MV78100-A0"; - else - return "MV78100-Rev-Unsupported"; - } else if (dev == MV78200_DEV_ID) { - if (rev == MV78100_REV_A0) - return "MV78200-A0"; - else - return "MV78200-Rev-Unsupported"; - } else { - return "Device-Unknown"; - } -} - static int __init is_l2_writethrough(void) { return !!(readl(CPU_CONTROL) & L2_WRITETHROUGH); @@ -866,8 +737,7 @@ void __init mv78xx0_init(void) get_pclk_l2clk(hclk, core_index, &pclk, &l2clk); tclk = get_tclk(); - printk(KERN_INFO "%s ", mv78xx0_id()); - printk("core #%d, ", core_index); + printk(KERN_INFO "MV78xx0 core #%d, ", core_index); printk("PCLK = %dMHz, ", (pclk + 499999) / 1000000); printk("L2 = %dMHz, ", (l2clk + 499999) / 1000000); printk("HCLK = %dMHz, ", (hclk + 499999) / 1000000); diff --git a/trunk/arch/arm/mach-mv78xx0/common.h b/trunk/arch/arm/mach-mv78xx0/common.h index befc22475469..78af5de319dd 100644 --- a/trunk/arch/arm/mach-mv78xx0/common.h +++ b/trunk/arch/arm/mach-mv78xx0/common.h @@ -29,8 +29,6 @@ void mv78xx0_setup_pcie_io_win(int window, u32 base, u32 size, void mv78xx0_setup_pcie_mem_win(int window, u32 base, u32 size, int maj, int min); -void mv78xx0_pcie_id(u32 *dev, u32 *rev); - void mv78xx0_ehci0_init(void); void mv78xx0_ehci1_init(void); void mv78xx0_ehci2_init(void); @@ -44,7 +42,6 @@ void mv78xx0_uart0_init(void); void mv78xx0_uart1_init(void); void mv78xx0_uart2_init(void); void mv78xx0_uart3_init(void); -void mv78xx0_i2c_init(void); extern struct sys_timer mv78xx0_timer; diff --git a/trunk/arch/arm/mach-mv78xx0/db78x00-bp-setup.c b/trunk/arch/arm/mach-mv78xx0/db78x00-bp-setup.c index efdabe04c69e..2e285bbb7bbd 100644 --- a/trunk/arch/arm/mach-mv78xx0/db78x00-bp-setup.c +++ b/trunk/arch/arm/mach-mv78xx0/db78x00-bp-setup.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include #include @@ -29,22 +28,21 @@ static struct mv643xx_eth_platform_data db78x00_ge01_data = { }; static struct mv643xx_eth_platform_data db78x00_ge10_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(10), + .phy_addr = MV643XX_ETH_PHY_NONE, + .speed = SPEED_1000, + .duplex = DUPLEX_FULL, }; static struct mv643xx_eth_platform_data db78x00_ge11_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(11), + .phy_addr = MV643XX_ETH_PHY_NONE, + .speed = SPEED_1000, + .duplex = DUPLEX_FULL, }; static struct mv_sata_platform_data db78x00_sata_data = { .n_ports = 2, }; -static struct i2c_board_info __initdata db78x00_i2c_rtc = { - I2C_BOARD_INFO("ds1338", 0x68), -}; - - static void __init db78x00_init(void) { /* @@ -66,8 +64,6 @@ static void __init db78x00_init(void) mv78xx0_sata_init(&db78x00_sata_data); mv78xx0_uart0_init(); mv78xx0_uart2_init(); - mv78xx0_i2c_init(); - i2c_register_board_info(0, &db78x00_i2c_rtc, 1); } else { mv78xx0_uart1_init(); mv78xx0_uart3_init(); diff --git a/trunk/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/trunk/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h index 582cffc733ad..e930ea5330a2 100644 --- a/trunk/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h +++ b/trunk/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h @@ -79,18 +79,6 @@ #define IRQ_MASK_HIGH_OFF 0x0014 #define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) -/* - * Supported devices and revisions. - */ -#define MV78X00_Z0_DEV_ID 0x6381 -#define MV78X00_REV_Z0 1 - -#define MV78100_DEV_ID 0x7810 -#define MV78100_REV_A0 1 - -#define MV78200_DEV_ID 0x7820 -#define MV78200_REV_A0 1 - /* * Register Map */ @@ -102,8 +90,6 @@ #define DEV_BUS_VIRT_BASE (MV78XX0_REGS_VIRT_BASE | 0x10000) #define SAMPLE_AT_RESET_LOW (DEV_BUS_VIRT_BASE | 0x0030) #define SAMPLE_AT_RESET_HIGH (DEV_BUS_VIRT_BASE | 0x0034) -#define I2C_0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1000) -#define I2C_1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x1100) #define UART0_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2000) #define UART0_VIRT_BASE (DEV_BUS_VIRT_BASE | 0x2000) #define UART1_PHYS_BASE (DEV_BUS_PHYS_BASE | 0x2100) diff --git a/trunk/arch/arm/mach-mv78xx0/include/mach/system.h b/trunk/arch/arm/mach-mv78xx0/include/mach/system.h index 1d6350b22d0b..7d5179408832 100644 --- a/trunk/arch/arm/mach-mv78xx0/include/mach/system.h +++ b/trunk/arch/arm/mach-mv78xx0/include/mach/system.h @@ -17,7 +17,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { /* * Enable soft reset to assert RSTOUTn. diff --git a/trunk/arch/arm/mach-mv78xx0/irq.c b/trunk/arch/arm/mach-mv78xx0/irq.c index 30b7e4bcdbc7..e273418797b4 100644 --- a/trunk/arch/arm/mach-mv78xx0/irq.c +++ b/trunk/arch/arm/mach-mv78xx0/irq.c @@ -40,7 +40,7 @@ void __init mv78xx0_init_irq(void) writel(0, GPIO_EDGE_CAUSE(0)); for (i = IRQ_MV78XX0_GPIO_START; i < NR_IRQS; i++) { - set_irq_chip(i, &orion_gpio_irq_chip); + set_irq_chip(i, &orion_gpio_irq_level_chip); set_irq_handler(i, handle_level_irq); irq_desc[i].status |= IRQ_LEVEL; set_irq_flags(i, IRQF_VALID); diff --git a/trunk/arch/arm/mach-mv78xx0/pcie.c b/trunk/arch/arm/mach-mv78xx0/pcie.c index a560439dcc3c..aad3a7a2f830 100644 --- a/trunk/arch/arm/mach-mv78xx0/pcie.c +++ b/trunk/arch/arm/mach-mv78xx0/pcie.c @@ -33,12 +33,6 @@ static struct resource pcie_io_space; static struct resource pcie_mem_space; -void __init mv78xx0_pcie_id(u32 *dev, u32 *rev) -{ - *dev = orion_pcie_dev_id((void __iomem *)PCIE00_VIRT_BASE); - *rev = orion_pcie_rev((void __iomem *)PCIE00_VIRT_BASE); -} - static void __init mv78xx0_pcie_preinit(void) { int i; diff --git a/trunk/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c b/trunk/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c deleted file mode 100644 index e136b7a03355..000000000000 --- a/trunk/arch/arm/mach-mv78xx0/rd78x00-masa-setup.c +++ /dev/null @@ -1,88 +0,0 @@ -/* - * arch/arm/mach-mv78x00/rd78x00-masa-setup.c - * - * Marvell RD-78x00-mASA Development Board Setup - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "common.h" - -static struct mv643xx_eth_platform_data rd78x00_masa_ge00_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(8), -}; - -static struct mv643xx_eth_platform_data rd78x00_masa_ge01_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(9), -}; - -static struct mv643xx_eth_platform_data rd78x00_masa_ge10_data = { -}; - -static struct mv643xx_eth_platform_data rd78x00_masa_ge11_data = { -}; - -static struct mv_sata_platform_data rd78x00_masa_sata_data = { - .n_ports = 2, -}; - -static void __init rd78x00_masa_init(void) -{ - /* - * Basic MV78x00 setup. Needs to be called early. - */ - mv78xx0_init(); - - /* - * Partition on-chip peripherals between the two CPU cores. - */ - if (mv78xx0_core_index() == 0) { - mv78xx0_ehci0_init(); - mv78xx0_ehci1_init(); - mv78xx0_ge00_init(&rd78x00_masa_ge00_data); - mv78xx0_ge10_init(&rd78x00_masa_ge10_data); - mv78xx0_sata_init(&rd78x00_masa_sata_data); - mv78xx0_uart0_init(); - mv78xx0_uart2_init(); - } else { - mv78xx0_ehci2_init(); - mv78xx0_ge01_init(&rd78x00_masa_ge01_data); - mv78xx0_ge11_init(&rd78x00_masa_ge11_data); - mv78xx0_uart1_init(); - mv78xx0_uart3_init(); - } -} - -static int __init rd78x00_pci_init(void) -{ - /* - * Assign all PCIe devices to CPU core #0. - */ - if (machine_is_rd78x00_masa() && mv78xx0_core_index() == 0) - mv78xx0_pcie_init(1, 1); - - return 0; -} -subsys_initcall(rd78x00_pci_init); - -MACHINE_START(RD78X00_MASA, "Marvell RD-78x00-MASA Development Board") - /* Maintainer: Lennert Buytenhek */ - .phys_io = MV78XX0_REGS_PHYS_BASE, - .io_pg_offst = ((MV78XX0_REGS_VIRT_BASE) >> 18) & 0xfffc, - .boot_params = 0x00000100, - .init_machine = rd78x00_masa_init, - .map_io = mv78xx0_map_io, - .init_irq = mv78xx0_init_irq, - .timer = &mv78xx0_timer, -MACHINE_END diff --git a/trunk/arch/arm/mach-mx1/Kconfig b/trunk/arch/arm/mach-mx1/Kconfig index eb7660f5d4b7..2b59fc74784f 100644 --- a/trunk/arch/arm/mach-mx1/Kconfig +++ b/trunk/arch/arm/mach-mx1/Kconfig @@ -1,6 +1,6 @@ if ARCH_MX1 -comment "MX1 platforms:" +comment "MX1 Platforms" config MACH_MXLADS bool @@ -11,9 +11,4 @@ config ARCH_MX1ADS help Say Y here if you are using Motorola MX1ADS/MXLADS boards -config MACH_SCB9328 - bool "Synertronixx scb9328" - help - Say Y here if you are using a Synertronixx scb9328 board - endif diff --git a/trunk/arch/arm/mach-mx1/Makefile b/trunk/arch/arm/mach-mx1/Makefile index 82f1309568ef..b969719011fa 100644 --- a/trunk/arch/arm/mach-mx1/Makefile +++ b/trunk/arch/arm/mach-mx1/Makefile @@ -8,4 +8,3 @@ obj-y += generic.o clock.o devices.o # Specific board support obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o -obj-$(CONFIG_MACH_SCB9328) += scb9328.o \ No newline at end of file diff --git a/trunk/arch/arm/mach-mx1/clock.c b/trunk/arch/arm/mach-mx1/clock.c index 0d0f306851d0..4bcd1ece55f5 100644 --- a/trunk/arch/arm/mach-mx1/clock.c +++ b/trunk/arch/arm/mach-mx1/clock.c @@ -25,7 +25,6 @@ #include #include -#include #include "crm_regs.h" static int _clk_enable(struct clk *clk) @@ -88,6 +87,33 @@ static int _clk_parent_set_rate(struct clk *clk, unsigned long rate) return clk->parent->set_rate(clk->parent, rate); } +/* + * get the system pll clock in Hz + * + * mfi + mfn / (mfd +1) + * f = 2 * f_ref * -------------------- + * pd + 1 + */ +static unsigned long mx1_decode_pll(unsigned int pll, u32 f_ref) +{ + unsigned long long ll; + unsigned long quot; + + u32 mfi = (pll >> 10) & 0xf; + u32 mfn = pll & 0x3ff; + u32 mfd = (pll >> 16) & 0x3ff; + u32 pd = (pll >> 26) & 0xf; + + mfi = mfi <= 5 ? 5 : mfi; + + ll = 2 * (unsigned long long)f_ref * + ((mfi << 16) + (mfn << 16) / (mfd + 1)); + quot = (pd + 1) * (1 << 16); + ll += quot / 2; + do_div(ll, quot); + return (unsigned long)ll; +} + static unsigned long clk16m_get_rate(struct clk *clk) { return 16000000; @@ -162,7 +188,7 @@ static struct clk prem_clk = { static unsigned long system_clk_get_rate(struct clk *clk) { - return mxc_decode_pll(__raw_readl(CCM_SPCTL0), + return mx1_decode_pll(__raw_readl(CCM_SPCTL0), clk_get_rate(clk->parent)); } @@ -174,7 +200,7 @@ static struct clk system_clk = { static unsigned long mcu_clk_get_rate(struct clk *clk) { - return mxc_decode_pll(__raw_readl(CCM_MPCTL0), + return mx1_decode_pll(__raw_readl(CCM_MPCTL0), clk_get_rate(clk->parent)); } @@ -462,7 +488,7 @@ static struct clk clko_clk = { }; static struct clk dma_clk = { - .name = "dma", + .name = "dma_clk", .parent = &hclk, .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, @@ -513,7 +539,7 @@ static struct clk gpt_clk = { }; static struct clk uart_clk = { - .name = "uart", + .name = "uart_clk", .parent = &perclk[0], .round_rate = _clk_parent_round_rate, .set_rate = _clk_parent_set_rate, @@ -595,7 +621,7 @@ static struct clk *mxc_clks[] = { &rtc_clk, }; -int __init mx1_clocks_init(unsigned long fref) +int __init mxc_clocks_init(unsigned long fref) { struct clk **clkp; unsigned int reg; @@ -626,7 +652,5 @@ int __init mx1_clocks_init(unsigned long fref) clk_enable(&hclk); clk_enable(&fclk); - mxc_timer_init(&gpt_clk); - return 0; } diff --git a/trunk/arch/arm/mach-mx1/devices.c b/trunk/arch/arm/mach-mx1/devices.c index 97f42d96d7a1..686d8d2dbb24 100644 --- a/trunk/arch/arm/mach-mx1/devices.c +++ b/trunk/arch/arm/mach-mx1/devices.c @@ -23,11 +23,8 @@ #include #include #include -#include #include -#include "devices.h" - static struct resource imx_csi_resources[] = { [0] = { .start = 0x00224000, diff --git a/trunk/arch/arm/mach-mx1/mx1ads.c b/trunk/arch/arm/mach-mx1/mx1ads.c index 7ae229bc1b79..2e4b185fe4a9 100644 --- a/trunk/arch/arm/mach-mx1/mx1ads.c +++ b/trunk/arch/arm/mach-mx1/mx1ads.c @@ -16,22 +16,15 @@ #include #include #include -#include -#include #include #include #include -#include #include #include #include -#include -#ifdef CONFIG_I2C_IMX -#include -#endif -#include +#include #include "devices.h" /* @@ -110,55 +103,6 @@ static struct platform_device flash_device = { .num_resources = 1, }; -/* - * I2C - */ - -#ifdef CONFIG_I2C_IMX -static int i2c_pins[] = { - PA15_PF_I2C_SDA, - PA16_PF_I2C_SCL, -}; - -static int i2c_init(struct device *dev) -{ - return mxc_gpio_setup_multiple_pins(i2c_pins, - ARRAY_SIZE(i2c_pins), "I2C"); -} - -static void i2c_exit(struct device *dev) -{ - mxc_gpio_release_multiple_pins(i2c_pins, - ARRAY_SIZE(i2c_pins)); -} - -static struct pcf857x_platform_data pcf857x_data[] = { - { - .gpio_base = 4 * 32, - }, { - .gpio_base = 4 * 32 + 16, - } -}; - -static struct imxi2c_platform_data mx1ads_i2c_data = { - .bitrate = 100000, - .init = i2c_init, - .exit = i2c_exit, -}; - -static struct i2c_board_info mx1ads_i2c_devices[] = { - { - I2C_BOARD_INFO("pcf857x", 0x22), - .type = "pcf8575", - .platform_data = &pcf857x_data[0], - }, { - I2C_BOARD_INFO("pcf857x", 0x24), - .type = "pcf8575", - .platform_data = &pcf857x_data[1], - }, -}; -#endif - /* * Board init */ @@ -170,19 +114,12 @@ static void __init mx1ads_init(void) /* Physmap flash */ mxc_register_device(&flash_device, &mx1ads_flash_data); - - /* I2C */ -#ifdef CONFIG_I2C_IMX - i2c_register_board_info(0, mx1ads_i2c_devices, - ARRAY_SIZE(mx1ads_i2c_devices)); - - mxc_register_device(&imx_i2c_device, &mx1ads_i2c_data); -#endif } static void __init mx1ads_timer_init(void) { - mx1_clocks_init(32000); + mxc_clocks_init(32000); + mxc_timer_init("gpt_clk"); } struct sys_timer mx1ads_timer = { diff --git a/trunk/arch/arm/mach-mx1/scb9328.c b/trunk/arch/arm/mach-mx1/scb9328.c deleted file mode 100644 index 0e71f3fa28bf..000000000000 --- a/trunk/arch/arm/mach-mx1/scb9328.c +++ /dev/null @@ -1,160 +0,0 @@ -/* - * linux/arch/arm/mach-mx1/scb9328.c - * - * Copyright (c) 2004 Sascha Hauer - * Copyright (c) 2006-2008 Juergen Beisert - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include - -#include -#include -#include - -#include -#include -#include -#include -#include - -#include "devices.h" - -/* - * This scb9328 has a 32MiB flash - */ -static struct resource flash_resource = { - .start = IMX_CS0_PHYS, - .end = IMX_CS0_PHYS + (32 * 1024 * 1024) - 1, - .flags = IORESOURCE_MEM, -}; - -static struct physmap_flash_data scb_flash_data = { - .width = 2, -}; - -static struct platform_device scb_flash_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &scb_flash_data, - }, - .resource = &flash_resource, - .num_resources = 1, -}; - -/* - * scb9328 has a DM9000 network controller - * connected to CS5, with 16 bit data path - * and interrupt connected to GPIO 3 - */ - -/* - * internal datapath is fixed 16 bit - */ -static struct dm9000_plat_data dm9000_platdata = { - .flags = DM9000_PLATF_16BITONLY, -}; - -/* - * the DM9000 drivers wants two defined address spaces - * to gain access to address latch registers and the data path. - */ -static struct resource dm9000x_resources[] = { - [0] = { - .name = "address area", - .start = IMX_CS5_PHYS, - .end = IMX_CS5_PHYS + 1, - .flags = IORESOURCE_MEM /* address access */ - }, - [1] = { - .name = "data area", - .start = IMX_CS5_PHYS + 4, - .end = IMX_CS5_PHYS + 5, - .flags = IORESOURCE_MEM /* data access */ - }, - [2] = { - .start = IRQ_GPIOC(3), - .end = IRQ_GPIOC(3), - .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL - }, -}; - -static struct platform_device dm9000x_device = { - .name = "dm9000", - .id = 0, - .num_resources = ARRAY_SIZE(dm9000x_resources), - .resource = dm9000x_resources, - .dev = { - .platform_data = &dm9000_platdata, - } -}; - -static int mxc_uart1_pins[] = { - PC9_PF_UART1_CTS, - PC10_PF_UART1_RTS, - PC11_PF_UART1_TXD, - PC12_PF_UART1_RXD, -}; - -static int uart1_mxc_init(struct platform_device *pdev) -{ - return mxc_gpio_setup_multiple_pins(mxc_uart1_pins, - ARRAY_SIZE(mxc_uart1_pins), "UART1"); -} - -static int uart1_mxc_exit(struct platform_device *pdev) -{ - mxc_gpio_release_multiple_pins(mxc_uart1_pins, - ARRAY_SIZE(mxc_uart1_pins)); - return 0; -} - -static struct imxuart_platform_data uart_pdata = { - .init = uart1_mxc_init, - .exit = uart1_mxc_exit, - .flags = IMXUART_HAVE_RTSCTS, -}; - -static struct platform_device *devices[] __initdata = { - &scb_flash_device, - &dm9000x_device, -}; - -/* - * scb9328_init - Init the CPU card itself - */ -static void __init scb9328_init(void) -{ - mxc_register_device(&imx_uart1_device, &uart_pdata); - - printk(KERN_INFO"Scb9328: Adding devices\n"); - platform_add_devices(devices, ARRAY_SIZE(devices)); -} - -static void __init scb9328_timer_init(void) -{ - mx1_clocks_init(32000); -} - -static struct sys_timer scb9328_timer = { - .init = scb9328_timer_init, -}; - -MACHINE_START(SCB9328, "Synertronixx scb9328") - /* Sascha Hauer */ - .phys_io = 0x00200000, - .io_pg_offst = ((0xe0200000) >> 18) & 0xfffc, - .boot_params = 0x08000100, - .map_io = mxc_map_io, - .init_irq = mxc_init_irq, - .timer = &scb9328_timer, - .init_machine = scb9328_init, -MACHINE_END diff --git a/trunk/arch/arm/mach-mx2/Kconfig b/trunk/arch/arm/mach-mx2/Kconfig index 42a788842f49..1eaa97cb716d 100644 --- a/trunk/arch/arm/mach-mx2/Kconfig +++ b/trunk/arch/arm/mach-mx2/Kconfig @@ -1,22 +1,14 @@ -if ARCH_MX2 - -choice - prompt "CPUs:" - default MACH_MX21 - -config MACH_MX21 - bool "i.MX21 support" - help - This enables support for Freescale's MX2 based i.MX21 processor. +comment "MX2 family CPU support" + depends on ARCH_MX2 config MACH_MX27 bool "i.MX27 support" + depends on ARCH_MX2 help This enables support for Freescale's MX2 based i.MX27 processor. -endchoice - -comment "MX2 platforms:" +comment "MX2 Platforms" + depends on ARCH_MX2 config MACH_MX27ADS bool "MX27ADS platform" @@ -45,5 +37,3 @@ config MACH_PCM970_BASEBOARD PCM970 evaluation board. endchoice - -endif diff --git a/trunk/arch/arm/mach-mx2/Makefile b/trunk/arch/arm/mach-mx2/Makefile index 6e1a2bffc812..382d86080e86 100644 --- a/trunk/arch/arm/mach-mx2/Makefile +++ b/trunk/arch/arm/mach-mx2/Makefile @@ -6,8 +6,6 @@ obj-y := system.o generic.o devices.o serial.o -obj-$(CONFIG_MACH_MX21) += clock_imx21.o - obj-$(CONFIG_MACH_MX27) += cpu_imx27.o obj-$(CONFIG_MACH_MX27) += clock_imx27.o diff --git a/trunk/arch/arm/mach-mx2/Makefile.boot b/trunk/arch/arm/mach-mx2/Makefile.boot index e867398a8fdb..696831dcd485 100644 --- a/trunk/arch/arm/mach-mx2/Makefile.boot +++ b/trunk/arch/arm/mach-mx2/Makefile.boot @@ -1,7 +1,3 @@ -zreladdr-$(CONFIG_MACH_MX21) := 0xC0008000 -params_phys-$(CONFIG_MACH_MX21) := 0xC0000100 -initrd_phys-$(CONFIG_MACH_MX21) := 0xC0800000 - -zreladdr-$(CONFIG_MACH_MX27) := 0xA0008000 -params_phys-$(CONFIG_MACH_MX27) := 0xA0000100 -initrd_phys-$(CONFIG_MACH_MX27) := 0xA0800000 + zreladdr-y := 0xA0008000 +params_phys-y := 0xA0000100 +initrd_phys-y := 0xA0800000 diff --git a/trunk/arch/arm/mach-mx2/clock_imx21.c b/trunk/arch/arm/mach-mx2/clock_imx21.c deleted file mode 100644 index 2dee5c87614c..000000000000 --- a/trunk/arch/arm/mach-mx2/clock_imx21.c +++ /dev/null @@ -1,984 +0,0 @@ -/* - * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. - * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * Copyright 2008 Martin Fuzzey, mfuzzey@gmail.com - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#include -#include -#include - -#include -#include -#include -#include - -#include "crm_regs.h" - -static int _clk_enable(struct clk *clk) -{ - u32 reg; - - reg = __raw_readl(clk->enable_reg); - reg |= 1 << clk->enable_shift; - __raw_writel(reg, clk->enable_reg); - return 0; -} - -static void _clk_disable(struct clk *clk) -{ - u32 reg; - - reg = __raw_readl(clk->enable_reg); - reg &= ~(1 << clk->enable_shift); - __raw_writel(reg, clk->enable_reg); -} - -static int _clk_spll_enable(struct clk *clk) -{ - u32 reg; - - reg = __raw_readl(CCM_CSCR); - reg |= CCM_CSCR_SPEN; - __raw_writel(reg, CCM_CSCR); - - while ((__raw_readl(CCM_SPCTL1) & CCM_SPCTL1_LF) == 0) - ; - return 0; -} - -static void _clk_spll_disable(struct clk *clk) -{ - u32 reg; - - reg = __raw_readl(CCM_CSCR); - reg &= ~CCM_CSCR_SPEN; - __raw_writel(reg, CCM_CSCR); -} - - -#define CSCR() (__raw_readl(CCM_CSCR)) -#define PCDR0() (__raw_readl(CCM_PCDR0)) -#define PCDR1() (__raw_readl(CCM_PCDR1)) - -static unsigned long _clk_perclkx_round_rate(struct clk *clk, - unsigned long rate) -{ - u32 div; - unsigned long parent_rate; - - parent_rate = clk_get_rate(clk->parent); - - div = parent_rate / rate; - if (parent_rate % rate) - div++; - - if (div > 64) - div = 64; - - return parent_rate / div; -} - -static int _clk_perclkx_set_rate(struct clk *clk, unsigned long rate) -{ - u32 reg; - u32 div; - unsigned long parent_rate; - - parent_rate = clk_get_rate(clk->parent); - - if (clk->id < 0 || clk->id > 3) - return -EINVAL; - - div = parent_rate / rate; - if (div > 64 || div < 1 || ((parent_rate / div) != rate)) - return -EINVAL; - div--; - - reg = - __raw_readl(CCM_PCDR1) & ~(CCM_PCDR1_PERDIV1_MASK << - (clk->id << 3)); - reg |= div << (clk->id << 3); - __raw_writel(reg, CCM_PCDR1); - - return 0; -} - -static unsigned long _clk_usb_recalc(struct clk *clk) -{ - unsigned long usb_pdf; - unsigned long parent_rate; - - parent_rate = clk_get_rate(clk->parent); - - usb_pdf = (CSCR() & CCM_CSCR_USB_MASK) >> CCM_CSCR_USB_OFFSET; - - return parent_rate / (usb_pdf + 1U); -} - -static unsigned long _clk_ssix_recalc(struct clk *clk, unsigned long pdf) -{ - unsigned long parent_rate; - - parent_rate = clk_get_rate(clk->parent); - - pdf = (pdf < 2) ? 124UL : pdf; /* MX21 & MX27 TO1 */ - - return 2UL * parent_rate / pdf; -} - -static unsigned long _clk_ssi1_recalc(struct clk *clk) -{ - return _clk_ssix_recalc(clk, - (PCDR0() & CCM_PCDR0_SSI1BAUDDIV_MASK) - >> CCM_PCDR0_SSI1BAUDDIV_OFFSET); -} - -static unsigned long _clk_ssi2_recalc(struct clk *clk) -{ - return _clk_ssix_recalc(clk, - (PCDR0() & CCM_PCDR0_SSI2BAUDDIV_MASK) >> - CCM_PCDR0_SSI2BAUDDIV_OFFSET); -} - -static unsigned long _clk_nfc_recalc(struct clk *clk) -{ - unsigned long nfc_pdf; - unsigned long parent_rate; - - parent_rate = clk_get_rate(clk->parent); - - nfc_pdf = (PCDR0() & CCM_PCDR0_NFCDIV_MASK) - >> CCM_PCDR0_NFCDIV_OFFSET; - - return parent_rate / (nfc_pdf + 1); -} - -static unsigned long _clk_parent_round_rate(struct clk *clk, unsigned long rate) -{ - return clk->parent->round_rate(clk->parent, rate); -} - -static int _clk_parent_set_rate(struct clk *clk, unsigned long rate) -{ - return clk->parent->set_rate(clk->parent, rate); -} - -static unsigned long external_high_reference; /* in Hz */ - -static unsigned long get_high_reference_clock_rate(struct clk *clk) -{ - return external_high_reference; -} - -/* - * the high frequency external clock reference - * Default case is 26MHz. - */ -static struct clk ckih_clk = { - .get_rate = get_high_reference_clock_rate, -}; - -static unsigned long external_low_reference; /* in Hz */ - -static unsigned long get_low_reference_clock_rate(struct clk *clk) -{ - return external_low_reference; -} - -/* - * the low frequency external clock reference - * Default case is 32.768kHz. - */ -static struct clk ckil_clk = { - .get_rate = get_low_reference_clock_rate, -}; - - -static unsigned long _clk_fpm_recalc(struct clk *clk) -{ - return clk_get_rate(clk->parent) * 512; -} - -/* Output of frequency pre multiplier */ -static struct clk fpm_clk = { - .parent = &ckil_clk, - .get_rate = _clk_fpm_recalc, -}; - -static unsigned long get_mpll_clk(struct clk *clk) -{ - uint32_t reg; - unsigned long ref_clk; - unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0; - unsigned long long temp; - - ref_clk = clk_get_rate(clk->parent); - - reg = __raw_readl(CCM_MPCTL0); - pdf = (reg & CCM_MPCTL0_PD_MASK) >> CCM_MPCTL0_PD_OFFSET; - mfd = (reg & CCM_MPCTL0_MFD_MASK) >> CCM_MPCTL0_MFD_OFFSET; - mfi = (reg & CCM_MPCTL0_MFI_MASK) >> CCM_MPCTL0_MFI_OFFSET; - mfn = (reg & CCM_MPCTL0_MFN_MASK) >> CCM_MPCTL0_MFN_OFFSET; - - mfi = (mfi <= 5) ? 5 : mfi; - temp = 2LL * ref_clk * mfn; - do_div(temp, mfd + 1); - temp = 2LL * ref_clk * mfi + temp; - do_div(temp, pdf + 1); - - return (unsigned long)temp; -} - -static struct clk mpll_clk = { - .parent = &ckih_clk, - .get_rate = get_mpll_clk, -}; - -static unsigned long _clk_fclk_get_rate(struct clk *clk) -{ - unsigned long parent_rate; - u32 div; - - div = (CSCR() & CCM_CSCR_PRESC_MASK) >> CCM_CSCR_PRESC_OFFSET; - parent_rate = clk_get_rate(clk->parent); - - return parent_rate / (div+1); -} - -static struct clk fclk_clk = { - .parent = &mpll_clk, - .get_rate = _clk_fclk_get_rate -}; - -static unsigned long get_spll_clk(struct clk *clk) -{ - uint32_t reg; - unsigned long ref_clk; - unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0; - unsigned long long temp; - - ref_clk = clk_get_rate(clk->parent); - - reg = __raw_readl(CCM_SPCTL0); - pdf = (reg & CCM_SPCTL0_PD_MASK) >> CCM_SPCTL0_PD_OFFSET; - mfd = (reg & CCM_SPCTL0_MFD_MASK) >> CCM_SPCTL0_MFD_OFFSET; - mfi = (reg & CCM_SPCTL0_MFI_MASK) >> CCM_SPCTL0_MFI_OFFSET; - mfn = (reg & CCM_SPCTL0_MFN_MASK) >> CCM_SPCTL0_MFN_OFFSET; - - mfi = (mfi <= 5) ? 5 : mfi; - temp = 2LL * ref_clk * mfn; - do_div(temp, mfd + 1); - temp = 2LL * ref_clk * mfi + temp; - do_div(temp, pdf + 1); - - return (unsigned long)temp; -} - -static struct clk spll_clk = { - .parent = &ckih_clk, - .get_rate = get_spll_clk, - .enable = _clk_spll_enable, - .disable = _clk_spll_disable, -}; - -static unsigned long get_hclk_clk(struct clk *clk) -{ - unsigned long rate; - unsigned long bclk_pdf; - - bclk_pdf = (CSCR() & CCM_CSCR_BCLK_MASK) - >> CCM_CSCR_BCLK_OFFSET; - - rate = clk_get_rate(clk->parent); - return rate / (bclk_pdf + 1); -} - -static struct clk hclk_clk = { - .parent = &fclk_clk, - .get_rate = get_hclk_clk, -}; - -static unsigned long get_ipg_clk(struct clk *clk) -{ - unsigned long rate; - unsigned long ipg_pdf; - - ipg_pdf = (CSCR() & CCM_CSCR_IPDIV) >> CCM_CSCR_IPDIV_OFFSET; - - rate = clk_get_rate(clk->parent); - return rate / (ipg_pdf + 1); -} - -static struct clk ipg_clk = { - .parent = &hclk_clk, - .get_rate = get_ipg_clk, -}; - -static unsigned long _clk_perclkx_recalc(struct clk *clk) -{ - unsigned long perclk_pdf; - unsigned long parent_rate; - - parent_rate = clk_get_rate(clk->parent); - - if (clk->id < 0 || clk->id > 3) - return 0; - - perclk_pdf = (PCDR1() >> (clk->id << 3)) & CCM_PCDR1_PERDIV1_MASK; - - return parent_rate / (perclk_pdf + 1); -} - -static struct clk per_clk[] = { - { - .id = 0, - .parent = &mpll_clk, - .get_rate = _clk_perclkx_recalc, - }, { - .id = 1, - .parent = &mpll_clk, - .get_rate = _clk_perclkx_recalc, - }, { - .id = 2, - .parent = &mpll_clk, - .round_rate = _clk_perclkx_round_rate, - .set_rate = _clk_perclkx_set_rate, - .get_rate = _clk_perclkx_recalc, - /* Enable/Disable done via lcd_clkc[1] */ - }, { - .id = 3, - .parent = &mpll_clk, - .round_rate = _clk_perclkx_round_rate, - .set_rate = _clk_perclkx_set_rate, - .get_rate = _clk_perclkx_recalc, - /* Enable/Disable done via csi_clk[1] */ - }, -}; - -static struct clk uart_ipg_clk[]; - -static struct clk uart_clk[] = { - { - .id = 0, - .parent = &per_clk[0], - .secondary = &uart_ipg_clk[0], - }, { - .id = 1, - .parent = &per_clk[0], - .secondary = &uart_ipg_clk[1], - }, { - .id = 2, - .parent = &per_clk[0], - .secondary = &uart_ipg_clk[2], - }, { - .id = 3, - .parent = &per_clk[0], - .secondary = &uart_ipg_clk[3], - }, -}; - -static struct clk uart_ipg_clk[] = { - { - .id = 0, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_UART1_REG, - .enable_shift = CCM_PCCR_UART1_OFFSET, - .disable = _clk_disable, - }, { - .id = 1, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_UART2_REG, - .enable_shift = CCM_PCCR_UART2_OFFSET, - .disable = _clk_disable, - }, { - .id = 2, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_UART3_REG, - .enable_shift = CCM_PCCR_UART3_OFFSET, - .disable = _clk_disable, - }, { - .id = 3, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_UART4_REG, - .enable_shift = CCM_PCCR_UART4_OFFSET, - .disable = _clk_disable, - }, -}; - -static struct clk gpt_ipg_clk[]; - -static struct clk gpt_clk[] = { - { - .id = 0, - .parent = &per_clk[0], - .secondary = &gpt_ipg_clk[0], - }, { - .id = 1, - .parent = &per_clk[0], - .secondary = &gpt_ipg_clk[1], - }, { - .id = 2, - .parent = &per_clk[0], - .secondary = &gpt_ipg_clk[2], - }, -}; - -static struct clk gpt_ipg_clk[] = { - { - .id = 0, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_GPT1_REG, - .enable_shift = CCM_PCCR_GPT1_OFFSET, - .disable = _clk_disable, - }, { - .id = 1, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_GPT2_REG, - .enable_shift = CCM_PCCR_GPT2_OFFSET, - .disable = _clk_disable, - }, { - .id = 2, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_GPT3_REG, - .enable_shift = CCM_PCCR_GPT3_OFFSET, - .disable = _clk_disable, - }, -}; - -static struct clk pwm_clk[] = { - { - .parent = &per_clk[0], - .secondary = &pwm_clk[1], - }, { - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_PWM_REG, - .enable_shift = CCM_PCCR_PWM_OFFSET, - .disable = _clk_disable, - }, -}; - -static struct clk sdhc_ipg_clk[]; - -static struct clk sdhc_clk[] = { - { - .id = 0, - .parent = &per_clk[1], - .secondary = &sdhc_ipg_clk[0], - }, { - .id = 1, - .parent = &per_clk[1], - .secondary = &sdhc_ipg_clk[1], - }, -}; - -static struct clk sdhc_ipg_clk[] = { - { - .id = 0, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_SDHC1_REG, - .enable_shift = CCM_PCCR_SDHC1_OFFSET, - .disable = _clk_disable, - }, { - .id = 1, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_SDHC2_REG, - .enable_shift = CCM_PCCR_SDHC2_OFFSET, - .disable = _clk_disable, - }, -}; - -static struct clk cspi_ipg_clk[]; - -static struct clk cspi_clk[] = { - { - .id = 0, - .parent = &per_clk[1], - .secondary = &cspi_ipg_clk[0], - }, { - .id = 1, - .parent = &per_clk[1], - .secondary = &cspi_ipg_clk[1], - }, { - .id = 2, - .parent = &per_clk[1], - .secondary = &cspi_ipg_clk[2], - }, -}; - -static struct clk cspi_ipg_clk[] = { - { - .id = 0, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_CSPI1_REG, - .enable_shift = CCM_PCCR_CSPI1_OFFSET, - .disable = _clk_disable, - }, { - .id = 1, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_CSPI2_REG, - .enable_shift = CCM_PCCR_CSPI2_OFFSET, - .disable = _clk_disable, - }, { - .id = 3, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_CSPI3_REG, - .enable_shift = CCM_PCCR_CSPI3_OFFSET, - .disable = _clk_disable, - }, -}; - -static struct clk lcdc_clk[] = { - { - .parent = &per_clk[2], - .secondary = &lcdc_clk[1], - .round_rate = _clk_parent_round_rate, - .set_rate = _clk_parent_set_rate, - }, { - .parent = &ipg_clk, - .secondary = &lcdc_clk[2], - .enable = _clk_enable, - .enable_reg = CCM_PCCR_LCDC_REG, - .enable_shift = CCM_PCCR_LCDC_OFFSET, - .disable = _clk_disable, - }, { - .parent = &hclk_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_HCLK_LCDC_REG, - .enable_shift = CCM_PCCR_HCLK_LCDC_OFFSET, - .disable = _clk_disable, - }, -}; - -static struct clk csi_clk[] = { - { - .parent = &per_clk[3], - .secondary = &csi_clk[1], - .round_rate = _clk_parent_round_rate, - .set_rate = _clk_parent_set_rate, - }, { - .parent = &hclk_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_HCLK_CSI_REG, - .enable_shift = CCM_PCCR_HCLK_CSI_OFFSET, - .disable = _clk_disable, - }, -}; - -static struct clk usb_clk[] = { - { - .parent = &spll_clk, - .get_rate = _clk_usb_recalc, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_USBOTG_REG, - .enable_shift = CCM_PCCR_USBOTG_OFFSET, - .disable = _clk_disable, - }, { - .parent = &hclk_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_HCLK_USBOTG_REG, - .enable_shift = CCM_PCCR_HCLK_USBOTG_OFFSET, - .disable = _clk_disable, - } -}; - -static struct clk ssi_ipg_clk[]; - -static struct clk ssi_clk[] = { - { - .id = 0, - .parent = &mpll_clk, - .secondary = &ssi_ipg_clk[0], - .get_rate = _clk_ssi1_recalc, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_SSI1_BAUD_REG, - .enable_shift = CCM_PCCR_SSI1_BAUD_OFFSET, - .disable = _clk_disable, - }, { - .id = 1, - .parent = &mpll_clk, - .secondary = &ssi_ipg_clk[1], - .get_rate = _clk_ssi2_recalc, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_SSI2_BAUD_REG, - .enable_shift = CCM_PCCR_SSI2_BAUD_OFFSET, - .disable = _clk_disable, - }, -}; - -static struct clk ssi_ipg_clk[] = { - { - .id = 0, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_SSI1_REG, - .enable_shift = CCM_PCCR_SSI1_IPG_OFFSET, - .disable = _clk_disable, - }, { - .id = 1, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_SSI2_REG, - .enable_shift = CCM_PCCR_SSI2_IPG_OFFSET, - .disable = _clk_disable, - }, -}; - - -static struct clk nfc_clk = { - .parent = &fclk_clk, - .get_rate = _clk_nfc_recalc, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_NFC_REG, - .enable_shift = CCM_PCCR_NFC_OFFSET, - .disable = _clk_disable, -}; - -static struct clk dma_clk[] = { - { - .parent = &hclk_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_DMA_REG, - .enable_shift = CCM_PCCR_DMA_OFFSET, - .disable = _clk_disable, - .secondary = &dma_clk[1], - }, { - .enable = _clk_enable, - .enable_reg = CCM_PCCR_HCLK_DMA_REG, - .enable_shift = CCM_PCCR_HCLK_DMA_OFFSET, - .disable = _clk_disable, - }, -}; - -static struct clk brom_clk = { - .parent = &hclk_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_HCLK_BROM_REG, - .enable_shift = CCM_PCCR_HCLK_BROM_OFFSET, - .disable = _clk_disable, -}; - -static struct clk emma_clk[] = { - { - .parent = &hclk_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_EMMA_REG, - .enable_shift = CCM_PCCR_EMMA_OFFSET, - .disable = _clk_disable, - .secondary = &emma_clk[1], - }, { - .enable = _clk_enable, - .enable_reg = CCM_PCCR_HCLK_EMMA_REG, - .enable_shift = CCM_PCCR_HCLK_EMMA_OFFSET, - .disable = _clk_disable, - } -}; - -static struct clk slcdc_clk[] = { - { - .parent = &hclk_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_SLCDC_REG, - .enable_shift = CCM_PCCR_SLCDC_OFFSET, - .disable = _clk_disable, - .secondary = &slcdc_clk[1], - }, { - .enable = _clk_enable, - .enable_reg = CCM_PCCR_HCLK_SLCDC_REG, - .enable_shift = CCM_PCCR_HCLK_SLCDC_OFFSET, - .disable = _clk_disable, - } -}; - -static struct clk wdog_clk = { - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_WDT_REG, - .enable_shift = CCM_PCCR_WDT_OFFSET, - .disable = _clk_disable, -}; - -static struct clk gpio_clk = { - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_GPIO_REG, - .enable_shift = CCM_PCCR_GPIO_OFFSET, - .disable = _clk_disable, -}; - -static struct clk i2c_clk = { - .id = 0, - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_I2C1_REG, - .enable_shift = CCM_PCCR_I2C1_OFFSET, - .disable = _clk_disable, -}; - -static struct clk kpp_clk = { - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_KPP_REG, - .enable_shift = CCM_PCCR_KPP_OFFSET, - .disable = _clk_disable, -}; - -static struct clk owire_clk = { - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_OWIRE_REG, - .enable_shift = CCM_PCCR_OWIRE_OFFSET, - .disable = _clk_disable, -}; - -static struct clk rtc_clk = { - .parent = &ipg_clk, - .enable = _clk_enable, - .enable_reg = CCM_PCCR_RTC_REG, - .enable_shift = CCM_PCCR_RTC_OFFSET, - .disable = _clk_disable, -}; - -static unsigned long _clk_clko_round_rate(struct clk *clk, unsigned long rate) -{ - u32 div; - unsigned long parent_rate; - - parent_rate = clk_get_rate(clk->parent); - div = parent_rate / rate; - if (parent_rate % rate) - div++; - - if (div > 8) - div = 8; - - return parent_rate / div; -} - -static int _clk_clko_set_rate(struct clk *clk, unsigned long rate) -{ - u32 reg; - u32 div; - unsigned long parent_rate; - - parent_rate = clk_get_rate(clk->parent); - - div = parent_rate / rate; - - if (div > 8 || div < 1 || ((parent_rate / div) != rate)) - return -EINVAL; - div--; - - reg = __raw_readl(CCM_PCDR0); - - if (clk->parent == &usb_clk[0]) { - reg &= ~CCM_PCDR0_48MDIV_MASK; - reg |= div << CCM_PCDR0_48MDIV_OFFSET; - } - __raw_writel(reg, CCM_PCDR0); - - return 0; -} - -static unsigned long _clk_clko_recalc(struct clk *clk) -{ - u32 div = 0; - unsigned long parent_rate; - - parent_rate = clk_get_rate(clk->parent); - - if (clk->parent == &usb_clk[0]) /* 48M */ - div = __raw_readl(CCM_PCDR0) & CCM_PCDR0_48MDIV_MASK - >> CCM_PCDR0_48MDIV_OFFSET; - div++; - - return parent_rate / div; -} - -static struct clk clko_clk; - -static int _clk_clko_set_parent(struct clk *clk, struct clk *parent) -{ - u32 reg; - - reg = __raw_readl(CCM_CCSR) & ~CCM_CCSR_CLKOSEL_MASK; - - if (parent == &ckil_clk) - reg |= 0 << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &fpm_clk) - reg |= 1 << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &ckih_clk) - reg |= 2 << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == mpll_clk.parent) - reg |= 3 << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == spll_clk.parent) - reg |= 4 << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &mpll_clk) - reg |= 5 << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &spll_clk) - reg |= 6 << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &fclk_clk) - reg |= 7 << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &hclk_clk) - reg |= 8 << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &ipg_clk) - reg |= 9 << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &per_clk[0]) - reg |= 0xA << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &per_clk[1]) - reg |= 0xB << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &per_clk[2]) - reg |= 0xC << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &per_clk[3]) - reg |= 0xD << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &ssi_clk[0]) - reg |= 0xE << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &ssi_clk[1]) - reg |= 0xF << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &nfc_clk) - reg |= 0x10 << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &usb_clk[0]) - reg |= 0x14 << CCM_CCSR_CLKOSEL_OFFSET; - else if (parent == &clko_clk) - reg |= 0x15 << CCM_CCSR_CLKOSEL_OFFSET; - else - return -EINVAL; - - __raw_writel(reg, CCM_CCSR); - - return 0; -} - -static struct clk clko_clk = { - .get_rate = _clk_clko_recalc, - .set_rate = _clk_clko_set_rate, - .round_rate = _clk_clko_round_rate, - .set_parent = _clk_clko_set_parent, -}; - - -#define _REGISTER_CLOCK(d, n, c) \ - { \ - .dev_id = d, \ - .con_id = n, \ - .clk = &c, \ - }, -static struct clk_lookup lookups[] __initdata = { -/* It's unlikely that any driver wants one of them directly: - _REGISTER_CLOCK(NULL, "ckih", ckih_clk) - _REGISTER_CLOCK(NULL, "ckil", ckil_clk) - _REGISTER_CLOCK(NULL, "fpm", fpm_clk) - _REGISTER_CLOCK(NULL, "mpll", mpll_clk) - _REGISTER_CLOCK(NULL, "spll", spll_clk) - _REGISTER_CLOCK(NULL, "fclk", fclk_clk) - _REGISTER_CLOCK(NULL, "hclk", hclk_clk) - _REGISTER_CLOCK(NULL, "ipg", ipg_clk) -*/ - _REGISTER_CLOCK(NULL, "perclk1", per_clk[0]) - _REGISTER_CLOCK(NULL, "perclk2", per_clk[1]) - _REGISTER_CLOCK(NULL, "perclk3", per_clk[2]) - _REGISTER_CLOCK(NULL, "perclk4", per_clk[3]) - _REGISTER_CLOCK(NULL, "clko", clko_clk) - _REGISTER_CLOCK("imx-uart.0", NULL, uart_clk[0]) - _REGISTER_CLOCK("imx-uart.1", NULL, uart_clk[1]) - _REGISTER_CLOCK("imx-uart.2", NULL, uart_clk[2]) - _REGISTER_CLOCK("imx-uart.3", NULL, uart_clk[3]) - _REGISTER_CLOCK(NULL, "gpt1", gpt_clk[0]) - _REGISTER_CLOCK(NULL, "gpt1", gpt_clk[1]) - _REGISTER_CLOCK(NULL, "gpt1", gpt_clk[2]) - _REGISTER_CLOCK(NULL, "pwm", pwm_clk[0]) - _REGISTER_CLOCK(NULL, "sdhc1", sdhc_clk[0]) - _REGISTER_CLOCK(NULL, "sdhc2", sdhc_clk[1]) - _REGISTER_CLOCK(NULL, "cspi1", cspi_clk[0]) - _REGISTER_CLOCK(NULL, "cspi2", cspi_clk[1]) - _REGISTER_CLOCK(NULL, "cspi3", cspi_clk[2]) - _REGISTER_CLOCK(NULL, "lcdc", lcdc_clk[0]) - _REGISTER_CLOCK(NULL, "csi", csi_clk[0]) - _REGISTER_CLOCK(NULL, "usb", usb_clk[0]) - _REGISTER_CLOCK(NULL, "ssi1", ssi_clk[0]) - _REGISTER_CLOCK(NULL, "ssi2", ssi_clk[1]) - _REGISTER_CLOCK(NULL, "nfc", nfc_clk) - _REGISTER_CLOCK(NULL, "dma", dma_clk[0]) - _REGISTER_CLOCK(NULL, "brom", brom_clk) - _REGISTER_CLOCK(NULL, "emma", emma_clk[0]) - _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk[0]) - _REGISTER_CLOCK(NULL, "wdog", wdog_clk) - _REGISTER_CLOCK(NULL, "gpio", gpio_clk) - _REGISTER_CLOCK(NULL, "i2c", i2c_clk) - _REGISTER_CLOCK("mxc-keypad", NULL, kpp_clk) - _REGISTER_CLOCK(NULL, "owire", owire_clk) - _REGISTER_CLOCK(NULL, "rtc", rtc_clk) -}; - -/* - * must be called very early to get information about the - * available clock rate when the timer framework starts - */ -int __init mx21_clocks_init(unsigned long lref, unsigned long href) -{ - int i; - u32 cscr; - - external_low_reference = lref; - external_high_reference = href; - - /* detect clock reference for both system PLL */ - cscr = CSCR(); - if (cscr & CCM_CSCR_MCU) - mpll_clk.parent = &ckih_clk; - else - mpll_clk.parent = &fpm_clk; - - if (cscr & CCM_CSCR_SP) - spll_clk.parent = &ckih_clk; - else - spll_clk.parent = &fpm_clk; - - for (i = 0; i < ARRAY_SIZE(lookups); i++) - clkdev_add(&lookups[i]); - - /* Turn off all clock gates */ - __raw_writel(0, CCM_PCCR0); - __raw_writel(CCM_PCCR_GPT1_MASK, CCM_PCCR1); - - /* This turns of the serial PLL as well */ - spll_clk.disable(&spll_clk); - - /* This will propagate to all children and init all the clock rates. */ - clk_enable(&per_clk[0]); - clk_enable(&gpio_clk); - -#ifdef CONFIG_DEBUG_LL_CONSOLE - clk_enable(&uart_clk[0]); -#endif - - mxc_timer_init(&gpt_clk[0]); - return 0; -} diff --git a/trunk/arch/arm/mach-mx2/clock_imx27.c b/trunk/arch/arm/mach-mx2/clock_imx27.c index 3f7280c490f0..c69896d011a1 100644 --- a/trunk/arch/arm/mach-mx2/clock_imx27.c +++ b/trunk/arch/arm/mach-mx2/clock_imx27.c @@ -1,7 +1,6 @@ /* * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright 2008 Juergen Beisert, kernel@pengutronix.de - * Copyright 2008 Martin Fuzzey, mfuzzey@gmail.com * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -21,60 +20,23 @@ #include #include #include - -#include -#include +#include #include #include -#include - -/* Register offsets */ -#define CCM_CSCR (IO_ADDRESS(CCM_BASE_ADDR) + 0x0) -#define CCM_MPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x4) -#define CCM_MPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x8) -#define CCM_SPCTL0 (IO_ADDRESS(CCM_BASE_ADDR) + 0xC) -#define CCM_SPCTL1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x10) -#define CCM_OSC26MCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x14) -#define CCM_PCDR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x18) -#define CCM_PCDR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x1c) -#define CCM_PCCR0 (IO_ADDRESS(CCM_BASE_ADDR) + 0x20) -#define CCM_PCCR1 (IO_ADDRESS(CCM_BASE_ADDR) + 0x24) -#define CCM_CCSR (IO_ADDRESS(CCM_BASE_ADDR) + 0x28) -#define CCM_PMCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x2c) -#define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30) -#define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34) - -#define CCM_CSCR_UPDATE_DIS (1 << 31) -#define CCM_CSCR_SSI2 (1 << 23) -#define CCM_CSCR_SSI1 (1 << 22) -#define CCM_CSCR_VPU (1 << 21) -#define CCM_CSCR_MSHC (1 << 20) -#define CCM_CSCR_SPLLRES (1 << 19) -#define CCM_CSCR_MPLLRES (1 << 18) -#define CCM_CSCR_SP (1 << 17) -#define CCM_CSCR_MCU (1 << 16) -#define CCM_CSCR_OSC26MDIV (1 << 4) -#define CCM_CSCR_OSC26M (1 << 3) -#define CCM_CSCR_FPM (1 << 2) -#define CCM_CSCR_SPEN (1 << 1) -#define CCM_CSCR_MPEN (1 << 0) - -/* i.MX27 TO 2+ */ -#define CCM_CSCR_ARM_SRC (1 << 15) - -#define CCM_SPCTL1_LF (1 << 15) -#define CCM_SPCTL1_BRMO (1 << 6) - -static struct clk mpll_main1_clk, mpll_main2_clk; - -static int clk_pccr_enable(struct clk *clk) +#include + +#include "crm_regs.h" + +static struct clk ckil_clk; +static struct clk mpll_clk; +static struct clk mpll_main_clk[]; +static struct clk spll_clk; + +static int _clk_enable(struct clk *clk) { unsigned long reg; - if (!clk->enable_reg) - return 0; - reg = __raw_readl(clk->enable_reg); reg |= 1 << clk->enable_shift; __raw_writel(reg, clk->enable_reg); @@ -82,19 +44,16 @@ static int clk_pccr_enable(struct clk *clk) return 0; } -static void clk_pccr_disable(struct clk *clk) +static void _clk_disable(struct clk *clk) { unsigned long reg; - if (!clk->enable_reg) - return; - reg = __raw_readl(clk->enable_reg); reg &= ~(1 << clk->enable_shift); __raw_writel(reg, clk->enable_reg); } -static int clk_spll_enable(struct clk *clk) +static int _clk_spll_enable(struct clk *clk) { unsigned long reg; @@ -102,12 +61,13 @@ static int clk_spll_enable(struct clk *clk) reg |= CCM_CSCR_SPEN; __raw_writel(reg, CCM_CSCR); - while (!(__raw_readl(CCM_SPCTL1) & CCM_SPCTL1_LF)); + while ((__raw_readl(CCM_SPCTL1) & CCM_SPCTL1_LF) == 0) + ; return 0; } -static void clk_spll_disable(struct clk *clk) +static void _clk_spll_disable(struct clk *clk) { unsigned long reg; @@ -116,30 +76,192 @@ static void clk_spll_disable(struct clk *clk) __raw_writel(reg, CCM_CSCR); } -static int clk_cpu_set_parent(struct clk *clk, struct clk *parent) +static void _clk_pccr01_enable(unsigned long mask0, unsigned long mask1) +{ + unsigned long reg; + + reg = __raw_readl(CCM_PCCR0); + reg |= mask0; + __raw_writel(reg, CCM_PCCR0); + + reg = __raw_readl(CCM_PCCR1); + reg |= mask1; + __raw_writel(reg, CCM_PCCR1); + +} + +static void _clk_pccr01_disable(unsigned long mask0, unsigned long mask1) +{ + unsigned long reg; + + reg = __raw_readl(CCM_PCCR0); + reg &= ~mask0; + __raw_writel(reg, CCM_PCCR0); + + reg = __raw_readl(CCM_PCCR1); + reg &= ~mask1; + __raw_writel(reg, CCM_PCCR1); +} + +static void _clk_pccr10_enable(unsigned long mask1, unsigned long mask0) +{ + unsigned long reg; + + reg = __raw_readl(CCM_PCCR1); + reg |= mask1; + __raw_writel(reg, CCM_PCCR1); + + reg = __raw_readl(CCM_PCCR0); + reg |= mask0; + __raw_writel(reg, CCM_PCCR0); +} + +static void _clk_pccr10_disable(unsigned long mask1, unsigned long mask0) +{ + unsigned long reg; + + reg = __raw_readl(CCM_PCCR1); + reg &= ~mask1; + __raw_writel(reg, CCM_PCCR1); + + reg = __raw_readl(CCM_PCCR0); + reg &= ~mask0; + __raw_writel(reg, CCM_PCCR0); +} + +static int _clk_dma_enable(struct clk *clk) +{ + _clk_pccr01_enable(CCM_PCCR0_DMA_MASK, CCM_PCCR1_HCLK_DMA_MASK); + + return 0; +} + +static void _clk_dma_disable(struct clk *clk) +{ + _clk_pccr01_disable(CCM_PCCR0_DMA_MASK, CCM_PCCR1_HCLK_DMA_MASK); +} + +static int _clk_rtic_enable(struct clk *clk) +{ + _clk_pccr01_enable(CCM_PCCR0_RTIC_MASK, CCM_PCCR1_HCLK_RTIC_MASK); + + return 0; +} + +static void _clk_rtic_disable(struct clk *clk) +{ + _clk_pccr01_disable(CCM_PCCR0_RTIC_MASK, CCM_PCCR1_HCLK_RTIC_MASK); +} + +static int _clk_emma_enable(struct clk *clk) +{ + _clk_pccr01_enable(CCM_PCCR0_EMMA_MASK, CCM_PCCR1_HCLK_EMMA_MASK); + + return 0; +} + +static void _clk_emma_disable(struct clk *clk) +{ + _clk_pccr01_disable(CCM_PCCR0_EMMA_MASK, CCM_PCCR1_HCLK_EMMA_MASK); +} + +static int _clk_slcdc_enable(struct clk *clk) +{ + _clk_pccr01_enable(CCM_PCCR0_SLCDC_MASK, CCM_PCCR1_HCLK_SLCDC_MASK); + + return 0; +} + +static void _clk_slcdc_disable(struct clk *clk) +{ + _clk_pccr01_disable(CCM_PCCR0_SLCDC_MASK, CCM_PCCR1_HCLK_SLCDC_MASK); +} + +static int _clk_fec_enable(struct clk *clk) +{ + _clk_pccr01_enable(CCM_PCCR0_FEC_MASK, CCM_PCCR1_HCLK_FEC_MASK); + + return 0; +} + +static void _clk_fec_disable(struct clk *clk) +{ + _clk_pccr01_disable(CCM_PCCR0_FEC_MASK, CCM_PCCR1_HCLK_FEC_MASK); +} + +static int _clk_vpu_enable(struct clk *clk) +{ + unsigned long reg; + + reg = __raw_readl(CCM_PCCR1); + reg |= CCM_PCCR1_VPU_BAUD_MASK | CCM_PCCR1_HCLK_VPU_MASK; + __raw_writel(reg, CCM_PCCR1); + + return 0; +} + +static void _clk_vpu_disable(struct clk *clk) { - int cscr = __raw_readl(CCM_CSCR); + unsigned long reg; + + reg = __raw_readl(CCM_PCCR1); + reg &= ~(CCM_PCCR1_VPU_BAUD_MASK | CCM_PCCR1_HCLK_VPU_MASK); + __raw_writel(reg, CCM_PCCR1); +} + +static int _clk_sahara2_enable(struct clk *clk) +{ + _clk_pccr01_enable(CCM_PCCR0_SAHARA_MASK, CCM_PCCR1_HCLK_SAHARA_MASK); + + return 0; +} + +static void _clk_sahara2_disable(struct clk *clk) +{ + _clk_pccr01_disable(CCM_PCCR0_SAHARA_MASK, CCM_PCCR1_HCLK_SAHARA_MASK); +} + +static int _clk_mstick1_enable(struct clk *clk) +{ + _clk_pccr10_enable(CCM_PCCR1_MSHC_BAUD_MASK, CCM_PCCR0_MSHC_MASK); + + return 0; +} + +static void _clk_mstick1_disable(struct clk *clk) +{ + _clk_pccr10_disable(CCM_PCCR1_MSHC_BAUD_MASK, CCM_PCCR0_MSHC_MASK); +} + +#define CSCR() (__raw_readl(CCM_CSCR)) +#define PCDR0() (__raw_readl(CCM_PCDR0)) +#define PCDR1() (__raw_readl(CCM_PCDR1)) + +static int _clk_cpu_set_parent(struct clk *clk, struct clk *parent) +{ + int cscr = CSCR(); if (clk->parent == parent) return 0; if (mx27_revision() >= CHIP_REV_2_0) { - if (parent == &mpll_main1_clk) { + if (parent == &mpll_main_clk[0]) { cscr |= CCM_CSCR_ARM_SRC; } else { - if (parent == &mpll_main2_clk) + if (parent == &mpll_main_clk[1]) cscr &= ~CCM_CSCR_ARM_SRC; else return -EINVAL; } __raw_writel(cscr, CCM_CSCR); - clk->parent = parent; - return 0; - } - return -ENODEV; + } else + return -ENODEV; + + clk->parent = parent; + return 0; } -static unsigned long round_rate_cpu(struct clk *clk, unsigned long rate) +static unsigned long _clk_cpu_round_rate(struct clk *clk, unsigned long rate) { int div; unsigned long parent_rate; @@ -156,7 +278,7 @@ static unsigned long round_rate_cpu(struct clk *clk, unsigned long rate) return parent_rate / div; } -static int set_rate_cpu(struct clk *clk, unsigned long rate) +static int _clk_cpu_set_rate(struct clk *clk, unsigned long rate) { unsigned int div; uint32_t reg; @@ -173,18 +295,19 @@ static int set_rate_cpu(struct clk *clk, unsigned long rate) reg = __raw_readl(CCM_CSCR); if (mx27_revision() >= CHIP_REV_2_0) { - reg &= ~(3 << 12); - reg |= div << 12; - reg &= ~(CCM_CSCR_FPM | CCM_CSCR_SPEN); - __raw_writel(reg | CCM_CSCR_UPDATE_DIS, CCM_CSCR); + reg &= ~CCM_CSCR_ARM_MASK; + reg |= div << CCM_CSCR_ARM_OFFSET; + reg &= ~0x06; + __raw_writel(reg | 0x80000000, CCM_CSCR); } else { - printk(KERN_ERR "Can't set CPU frequency!\n"); + printk(KERN_ERR "Cant set CPU frequency!\n"); } return 0; } -static unsigned long round_rate_per(struct clk *clk, unsigned long rate) +static unsigned long _clk_perclkx_round_rate(struct clk *clk, + unsigned long rate) { u32 div; unsigned long parent_rate; @@ -201,7 +324,7 @@ static unsigned long round_rate_per(struct clk *clk, unsigned long rate) return parent_rate / div; } -static int set_rate_per(struct clk *clk, unsigned long rate) +static int _clk_perclkx_set_rate(struct clk *clk, unsigned long rate) { u32 reg; u32 div; @@ -217,65 +340,84 @@ static int set_rate_per(struct clk *clk, unsigned long rate) return -EINVAL; div--; - reg = __raw_readl(CCM_PCDR1) & ~(0x3f << (clk->id << 3)); + reg = + __raw_readl(CCM_PCDR1) & ~(CCM_PCDR1_PERDIV1_MASK << + (clk->id << 3)); reg |= div << (clk->id << 3); __raw_writel(reg, CCM_PCDR1); return 0; } -static unsigned long get_rate_usb(struct clk *clk) +static unsigned long _clk_usb_recalc(struct clk *clk) { unsigned long usb_pdf; unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); - usb_pdf = (__raw_readl(CCM_CSCR) >> 28) & 0x7; + usb_pdf = (CSCR() & CCM_CSCR_USB_MASK) >> CCM_CSCR_USB_OFFSET; return parent_rate / (usb_pdf + 1U); } -static unsigned long get_rate_ssix(struct clk *clk, unsigned long pdf) +static unsigned long _clk_ssi1_recalc(struct clk *clk) { + unsigned long ssi1_pdf; unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); + ssi1_pdf = (PCDR0() & CCM_PCDR0_SSI1BAUDDIV_MASK) >> + CCM_PCDR0_SSI1BAUDDIV_OFFSET; + if (mx27_revision() >= CHIP_REV_2_0) - pdf += 4; /* MX27 TO2+ */ + ssi1_pdf += 4; else - pdf = (pdf < 2) ? 124UL : pdf; /* MX21 & MX27 TO1 */ + ssi1_pdf = (ssi1_pdf < 2) ? 124UL : ssi1_pdf; - return 2UL * parent_rate / pdf; + return 2UL * parent_rate / ssi1_pdf; } -static unsigned long get_rate_ssi1(struct clk *clk) +static unsigned long _clk_ssi2_recalc(struct clk *clk) { - return get_rate_ssix(clk, (__raw_readl(CCM_PCDR0) >> 16) & 0x3f); -} + unsigned long ssi2_pdf; + unsigned long parent_rate; -static unsigned long get_rate_ssi2(struct clk *clk) -{ - return get_rate_ssix(clk, (__raw_readl(CCM_PCDR0) >> 26) & 0x3f); + parent_rate = clk_get_rate(clk->parent); + + ssi2_pdf = (PCDR0() & CCM_PCDR0_SSI2BAUDDIV_MASK) >> + CCM_PCDR0_SSI2BAUDDIV_OFFSET; + + if (mx27_revision() >= CHIP_REV_2_0) + ssi2_pdf += 4; + else + ssi2_pdf = (ssi2_pdf < 2) ? 124UL : ssi2_pdf; + + return 2UL * parent_rate / ssi2_pdf; } -static unsigned long get_rate_nfc(struct clk *clk) +static unsigned long _clk_nfc_recalc(struct clk *clk) { unsigned long nfc_pdf; unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); - if (mx27_revision() >= CHIP_REV_2_0) - nfc_pdf = (__raw_readl(CCM_PCDR0) >> 6) & 0xf; - else - nfc_pdf = (__raw_readl(CCM_PCDR0) >> 12) & 0xf; + if (mx27_revision() >= CHIP_REV_2_0) { + nfc_pdf = + (PCDR0() & CCM_PCDR0_NFCDIV2_MASK) >> + CCM_PCDR0_NFCDIV2_OFFSET; + } else { + nfc_pdf = + (PCDR0() & CCM_PCDR0_NFCDIV_MASK) >> + CCM_PCDR0_NFCDIV_OFFSET; + } return parent_rate / (nfc_pdf + 1); } -static unsigned long get_rate_vpu(struct clk *clk) +static unsigned long _clk_vpu_recalc(struct clk *clk) { unsigned long vpu_pdf; unsigned long parent_rate; @@ -283,27 +425,25 @@ static unsigned long get_rate_vpu(struct clk *clk) parent_rate = clk_get_rate(clk->parent); if (mx27_revision() >= CHIP_REV_2_0) { - vpu_pdf = (__raw_readl(CCM_PCDR0) >> 10) & 0x3f; + vpu_pdf = + (PCDR0() & CCM_PCDR0_VPUDIV2_MASK) >> + CCM_PCDR0_VPUDIV2_OFFSET; vpu_pdf += 4; } else { - vpu_pdf = (__raw_readl(CCM_PCDR0) >> 8) & 0xf; + vpu_pdf = + (PCDR0() & CCM_PCDR0_VPUDIV_MASK) >> + CCM_PCDR0_VPUDIV_OFFSET; vpu_pdf = (vpu_pdf < 2) ? 124 : vpu_pdf; } - return 2UL * parent_rate / vpu_pdf; } -static unsigned long round_rate_parent(struct clk *clk, unsigned long rate) +static unsigned long _clk_parent_round_rate(struct clk *clk, unsigned long rate) { return clk->parent->round_rate(clk->parent, rate); } -static unsigned long get_rate_parent(struct clk *clk) -{ - return clk_get_rate(clk->parent); -} - -static int set_rate_parent(struct clk *clk, unsigned long rate) +static int _clk_parent_set_rate(struct clk *clk, unsigned long rate) { return clk->parent->set_rate(clk->parent, rate); } @@ -311,380 +451,1112 @@ static int set_rate_parent(struct clk *clk, unsigned long rate) /* in Hz */ static unsigned long external_high_reference = 26000000; -static unsigned long get_rate_high_reference(struct clk *clk) +static unsigned long get_high_reference_clock_rate(struct clk *clk) { return external_high_reference; } +/* + * the high frequency external clock reference + * Default case is 26MHz. Could be changed at runtime + * with a call to change_external_high_reference() + */ +static struct clk ckih_clk = { + .name = "ckih", + .get_rate = get_high_reference_clock_rate, +}; + /* in Hz */ static unsigned long external_low_reference = 32768; -static unsigned long get_rate_low_reference(struct clk *clk) +static unsigned long get_low_reference_clock_rate(struct clk *clk) { return external_low_reference; } -static unsigned long get_rate_fpm(struct clk *clk) -{ - return clk_get_rate(clk->parent) * 1024; -} +/* + * the low frequency external clock reference + * Default case is 32.768kHz Could be changed at runtime + * with a call to change_external_low_reference() + */ +static struct clk ckil_clk = { + .name = "ckil", + .get_rate = get_low_reference_clock_rate, +}; -static unsigned long get_rate_mpll(struct clk *clk) +static unsigned long get_mpll_clk(struct clk *clk) { - return mxc_decode_pll(__raw_readl(CCM_MPCTL0), - clk_get_rate(clk->parent)); + uint32_t reg; + unsigned long ref_clk; + unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0; + unsigned long long temp; + + ref_clk = clk_get_rate(clk->parent); + + reg = __raw_readl(CCM_MPCTL0); + pdf = (reg & CCM_MPCTL0_PD_MASK) >> CCM_MPCTL0_PD_OFFSET; + mfd = (reg & CCM_MPCTL0_MFD_MASK) >> CCM_MPCTL0_MFD_OFFSET; + mfi = (reg & CCM_MPCTL0_MFI_MASK) >> CCM_MPCTL0_MFI_OFFSET; + mfn = (reg & CCM_MPCTL0_MFN_MASK) >> CCM_MPCTL0_MFN_OFFSET; + + mfi = (mfi <= 5) ? 5 : mfi; + temp = 2LL * ref_clk * mfn; + do_div(temp, mfd + 1); + temp = 2LL * ref_clk * mfi + temp; + do_div(temp, pdf + 1); + + return (unsigned long)temp; } -static unsigned long get_rate_mpll_main(struct clk *clk) +static struct clk mpll_clk = { + .name = "mpll", + .parent = &ckih_clk, + .get_rate = get_mpll_clk, +}; + +static unsigned long _clk_mpll_main_get_rate(struct clk *clk) { unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); /* i.MX27 TO2: - * clk->id == 0: arm clock source path 1 which is from 2 * MPLL / 2 - * clk->id == 1: arm clock source path 2 which is from 2 * MPLL / 3 + * clk->id == 0: arm clock source path 1 which is from 2*MPLL/DIV_2 + * clk->id == 1: arm clock source path 2 which is from 2*MPLL/DIV_3 */ + if (mx27_revision() >= CHIP_REV_2_0 && clk->id == 1) return 2UL * parent_rate / 3UL; return parent_rate; } -static unsigned long get_rate_spll(struct clk *clk) +static struct clk mpll_main_clk[] = { + { + /* For i.MX27 TO2, it is the MPLL path 1 of ARM core + * It provide the clock source whose rate is same as MPLL + */ + .name = "mpll_main", + .id = 0, + .parent = &mpll_clk, + .get_rate = _clk_mpll_main_get_rate + }, { + /* For i.MX27 TO2, it is the MPLL path 2 of ARM core + * It provide the clock source whose rate is same MPLL * 2/3 + */ + .name = "mpll_main", + .id = 1, + .parent = &mpll_clk, + .get_rate = _clk_mpll_main_get_rate + } +}; + +static unsigned long get_spll_clk(struct clk *clk) { uint32_t reg; - unsigned long rate; + unsigned long ref_clk; + unsigned long mfi = 0, mfn = 0, mfd = 0, pdf = 0; + unsigned long long temp; - rate = clk_get_rate(clk->parent); + ref_clk = clk_get_rate(clk->parent); reg = __raw_readl(CCM_SPCTL0); - - /* On TO2 we have to write the value back. Otherwise we - * read 0 from this register the next time. - */ + /*TODO: This is TO2 Bug */ if (mx27_revision() >= CHIP_REV_2_0) __raw_writel(reg, CCM_SPCTL0); - return mxc_decode_pll(reg, rate); + pdf = (reg & CCM_SPCTL0_PD_MASK) >> CCM_SPCTL0_PD_OFFSET; + mfd = (reg & CCM_SPCTL0_MFD_MASK) >> CCM_SPCTL0_MFD_OFFSET; + mfi = (reg & CCM_SPCTL0_MFI_MASK) >> CCM_SPCTL0_MFI_OFFSET; + mfn = (reg & CCM_SPCTL0_MFN_MASK) >> CCM_SPCTL0_MFN_OFFSET; + + mfi = (mfi <= 5) ? 5 : mfi; + temp = 2LL * ref_clk * mfn; + do_div(temp, mfd + 1); + temp = 2LL * ref_clk * mfi + temp; + do_div(temp, pdf + 1); + + return (unsigned long)temp; } -static unsigned long get_rate_cpu(struct clk *clk) +static struct clk spll_clk = { + .name = "spll", + .parent = &ckih_clk, + .get_rate = get_spll_clk, + .enable = _clk_spll_enable, + .disable = _clk_spll_disable, +}; + +static unsigned long get_cpu_clk(struct clk *clk) { u32 div; unsigned long rate; if (mx27_revision() >= CHIP_REV_2_0) - div = (__raw_readl(CCM_CSCR) >> 12) & 0x3; + div = (CSCR() & CCM_CSCR_ARM_MASK) >> CCM_CSCR_ARM_OFFSET; else - div = (__raw_readl(CCM_CSCR) >> 13) & 0x7; + div = (CSCR() & CCM_CSCR_PRESC_MASK) >> CCM_CSCR_PRESC_OFFSET; rate = clk_get_rate(clk->parent); return rate / (div + 1); } -static unsigned long get_rate_ahb(struct clk *clk) +static struct clk cpu_clk = { + .name = "cpu_clk", + .parent = &mpll_main_clk[1], + .set_parent = _clk_cpu_set_parent, + .round_rate = _clk_cpu_round_rate, + .get_rate = get_cpu_clk, + .set_rate = _clk_cpu_set_rate, +}; + +static unsigned long get_ahb_clk(struct clk *clk) { - unsigned long rate, bclk_pdf; + unsigned long rate; + unsigned long bclk_pdf; if (mx27_revision() >= CHIP_REV_2_0) - bclk_pdf = (__raw_readl(CCM_CSCR) >> 8) & 0x3; + bclk_pdf = (CSCR() & CCM_CSCR_AHB_MASK) + >> CCM_CSCR_AHB_OFFSET; else - bclk_pdf = (__raw_readl(CCM_CSCR) >> 9) & 0xf; + bclk_pdf = (CSCR() & CCM_CSCR_BCLK_MASK) + >> CCM_CSCR_BCLK_OFFSET; rate = clk_get_rate(clk->parent); return rate / (bclk_pdf + 1); } -static unsigned long get_rate_ipg(struct clk *clk) +static struct clk ahb_clk = { + .name = "ahb_clk", + .parent = &mpll_main_clk[1], + .get_rate = get_ahb_clk, +}; + +static unsigned long get_ipg_clk(struct clk *clk) { - unsigned long rate, ipg_pdf; + unsigned long rate; + unsigned long ipg_pdf; if (mx27_revision() >= CHIP_REV_2_0) return clk_get_rate(clk->parent); else - ipg_pdf = (__raw_readl(CCM_CSCR) >> 8) & 1; + ipg_pdf = (CSCR() & CCM_CSCR_IPDIV) >> CCM_CSCR_IPDIV_OFFSET; rate = clk_get_rate(clk->parent); return rate / (ipg_pdf + 1); } -static unsigned long get_rate_per(struct clk *clk) +static struct clk ipg_clk = { + .name = "ipg_clk", + .parent = &ahb_clk, + .get_rate = get_ipg_clk, +}; + +static unsigned long _clk_perclkx_recalc(struct clk *clk) { - unsigned long perclk_pdf, parent_rate; + unsigned long perclk_pdf; + unsigned long parent_rate; parent_rate = clk_get_rate(clk->parent); if (clk->id < 0 || clk->id > 3) return 0; - perclk_pdf = (__raw_readl(CCM_PCDR1) >> (clk->id << 3)) & 0x3f; + perclk_pdf = (PCDR1() >> (clk->id << 3)) & CCM_PCDR1_PERDIV1_MASK; return parent_rate / (perclk_pdf + 1); } -/* - * the high frequency external clock reference - * Default case is 26MHz. Could be changed at runtime - * with a call to change_external_high_reference() - */ -static struct clk ckih_clk = { - .get_rate = get_rate_high_reference, +static struct clk per_clk[] = { + { + .name = "per_clk", + .id = 0, + .parent = &mpll_main_clk[1], + .get_rate = _clk_perclkx_recalc, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_PERCLK1_OFFSET, + .disable = _clk_disable, + }, { + .name = "per_clk", + .id = 1, + .parent = &mpll_main_clk[1], + .get_rate = _clk_perclkx_recalc, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_PERCLK2_OFFSET, + .disable = _clk_disable, + }, { + .name = "per_clk", + .id = 2, + .parent = &mpll_main_clk[1], + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .get_rate = _clk_perclkx_recalc, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_PERCLK3_OFFSET, + .disable = _clk_disable, + }, { + .name = "per_clk", + .id = 3, + .parent = &mpll_main_clk[1], + .round_rate = _clk_perclkx_round_rate, + .set_rate = _clk_perclkx_set_rate, + .get_rate = _clk_perclkx_recalc, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_PERCLK4_OFFSET, + .disable = _clk_disable, + }, }; -static struct clk mpll_clk = { - .parent = &ckih_clk, - .get_rate = get_rate_mpll, +struct clk uart1_clk[] = { + { + .name = "uart_clk", + .id = 0, + .parent = &per_clk[0], + .secondary = &uart1_clk[1], + }, { + .name = "uart_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_UART1_OFFSET, + .disable = _clk_disable, + }, }; -/* For i.MX27 TO2, it is the MPLL path 1 of ARM core - * It provides the clock source whose rate is same as MPLL - */ -static struct clk mpll_main1_clk = { - .id = 0, - .parent = &mpll_clk, - .get_rate = get_rate_mpll_main, +struct clk uart2_clk[] = { + { + .name = "uart_clk", + .id = 1, + .parent = &per_clk[0], + .secondary = &uart2_clk[1], + }, { + .name = "uart_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_UART2_OFFSET, + .disable = _clk_disable, + }, }; -/* For i.MX27 TO2, it is the MPLL path 2 of ARM core - * It provides the clock source whose rate is same MPLL * 2 / 3 - */ -static struct clk mpll_main2_clk = { - .id = 1, - .parent = &mpll_clk, - .get_rate = get_rate_mpll_main, +struct clk uart3_clk[] = { + { + .name = "uart_clk", + .id = 2, + .parent = &per_clk[0], + .secondary = &uart3_clk[1], + }, { + .name = "uart_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_UART3_OFFSET, + .disable = _clk_disable, + }, }; -static struct clk ahb_clk = { - .parent = &mpll_main2_clk, - .get_rate = get_rate_ahb, +struct clk uart4_clk[] = { + { + .name = "uart_clk", + .id = 3, + .parent = &per_clk[0], + .secondary = &uart4_clk[1], + }, { + .name = "uart_ipg_clk", + .id = 3, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_UART4_OFFSET, + .disable = _clk_disable, + }, }; -static struct clk ipg_clk = { - .parent = &ahb_clk, - .get_rate = get_rate_ipg, +struct clk uart5_clk[] = { + { + .name = "uart_clk", + .id = 4, + .parent = &per_clk[0], + .secondary = &uart5_clk[1], + }, { + .name = "uart_ipg_clk", + .id = 4, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_UART5_OFFSET, + .disable = _clk_disable, + }, }; -static struct clk cpu_clk = { - .parent = &mpll_main2_clk, - .set_parent = clk_cpu_set_parent, - .round_rate = round_rate_cpu, - .get_rate = get_rate_cpu, - .set_rate = set_rate_cpu, +struct clk uart6_clk[] = { + { + .name = "uart_clk", + .id = 5, + .parent = &per_clk[0], + .secondary = &uart6_clk[1], + }, { + .name = "uart_ipg_clk", + .id = 5, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_UART6_OFFSET, + .disable = _clk_disable, + }, }; -static struct clk spll_clk = { - .parent = &ckih_clk, - .get_rate = get_rate_spll, - .enable = clk_spll_enable, - .disable = clk_spll_disable, +static struct clk gpt1_clk[] = { + { + .name = "gpt_clk", + .id = 0, + .parent = &per_clk[0], + .secondary = &gpt1_clk[1], + }, { + .name = "gpt_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_GPT1_OFFSET, + .disable = _clk_disable, + }, }; -/* - * the low frequency external clock reference - * Default case is 32.768kHz. - */ -static struct clk ckil_clk = { - .get_rate = get_rate_low_reference, +static struct clk gpt2_clk[] = { + { + .name = "gpt_clk", + .id = 1, + .parent = &per_clk[0], + .secondary = &gpt2_clk[1], + }, { + .name = "gpt_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_GPT2_OFFSET, + .disable = _clk_disable, + }, +}; + +static struct clk gpt3_clk[] = { + { + .name = "gpt_clk", + .id = 2, + .parent = &per_clk[0], + .secondary = &gpt3_clk[1], + }, { + .name = "gpt_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_GPT3_OFFSET, + .disable = _clk_disable, + }, }; -/* Output of frequency pre multiplier */ -static struct clk fpm_clk = { - .parent = &ckil_clk, - .get_rate = get_rate_fpm, +static struct clk gpt4_clk[] = { + { + .name = "gpt_clk", + .id = 3, + .parent = &per_clk[0], + .secondary = &gpt4_clk[1], + }, { + .name = "gpt_ipg_clk", + .id = 3, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_GPT4_OFFSET, + .disable = _clk_disable, + }, }; -#define PCCR0 CCM_PCCR0 -#define PCCR1 CCM_PCCR1 +static struct clk gpt5_clk[] = { + { + .name = "gpt_clk", + .id = 4, + .parent = &per_clk[0], + .secondary = &gpt5_clk[1], + }, { + .name = "gpt_ipg_clk", + .id = 4, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_GPT5_OFFSET, + .disable = _clk_disable, + }, +}; -#define DEFINE_CLOCK(name, i, er, es, gr, s, p) \ - static struct clk name = { \ - .id = i, \ - .enable_reg = er, \ - .enable_shift = es, \ - .get_rate = gr, \ - .enable = clk_pccr_enable, \ - .disable = clk_pccr_disable, \ - .secondary = s, \ - .parent = p, \ - } +static struct clk gpt6_clk[] = { + { + .name = "gpt_clk", + .id = 5, + .parent = &per_clk[0], + .secondary = &gpt6_clk[1], + }, { + .name = "gpt_ipg_clk", + .id = 5, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_GPT6_OFFSET, + .disable = _clk_disable, + }, +}; + +static struct clk pwm_clk[] = { + { + .name = "pwm_clk", + .parent = &per_clk[0], + .secondary = &pwm_clk[1], + }, { + .name = "pwm_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_PWM_OFFSET, + .disable = _clk_disable, + }, +}; + +static struct clk sdhc1_clk[] = { + { + .name = "sdhc_clk", + .id = 0, + .parent = &per_clk[1], + .secondary = &sdhc1_clk[1], + }, { + .name = "sdhc_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_SDHC1_OFFSET, + .disable = _clk_disable, + }, +}; + +static struct clk sdhc2_clk[] = { + { + .name = "sdhc_clk", + .id = 1, + .parent = &per_clk[1], + .secondary = &sdhc2_clk[1], + }, { + .name = "sdhc_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_SDHC2_OFFSET, + .disable = _clk_disable, + }, +}; + +static struct clk sdhc3_clk[] = { + { + .name = "sdhc_clk", + .id = 2, + .parent = &per_clk[1], + .secondary = &sdhc3_clk[1], + }, { + .name = "sdhc_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_SDHC3_OFFSET, + .disable = _clk_disable, + }, +}; + +static struct clk cspi1_clk[] = { + { + .name = "cspi_clk", + .id = 0, + .parent = &per_clk[1], + .secondary = &cspi1_clk[1], + }, { + .name = "cspi_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_CSPI1_OFFSET, + .disable = _clk_disable, + }, +}; + +static struct clk cspi2_clk[] = { + { + .name = "cspi_clk", + .id = 1, + .parent = &per_clk[1], + .secondary = &cspi2_clk[1], + }, { + .name = "cspi_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_CSPI2_OFFSET, + .disable = _clk_disable, + }, +}; + +static struct clk cspi3_clk[] = { + { + .name = "cspi_clk", + .id = 2, + .parent = &per_clk[1], + .secondary = &cspi3_clk[1], + }, { + .name = "cspi_ipg_clk", + .id = 2, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_CSPI3_OFFSET, + .disable = _clk_disable, + }, +}; + +static struct clk lcdc_clk[] = { + { + .name = "lcdc_clk", + .parent = &per_clk[2], + .secondary = &lcdc_clk[1], + .round_rate = _clk_parent_round_rate, + .set_rate = _clk_parent_set_rate, + }, { + .name = "lcdc_ipg_clk", + .parent = &ipg_clk, + .secondary = &lcdc_clk[2], + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_LCDC_OFFSET, + .disable = _clk_disable, + }, { + .name = "lcdc_ahb_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_HCLK_LCDC_OFFSET, + .disable = _clk_disable, + }, +}; + +static struct clk csi_clk[] = { + { + .name = "csi_perclk", + .parent = &per_clk[3], + .secondary = &csi_clk[1], + .round_rate = _clk_parent_round_rate, + .set_rate = _clk_parent_set_rate, + }, { + .name = "csi_ahb_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_HCLK_CSI_OFFSET, + .disable = _clk_disable, + }, +}; -#define DEFINE_CLOCK1(name, i, er, es, getsetround, s, p) \ - static struct clk name = { \ - .id = i, \ - .enable_reg = er, \ - .enable_shift = es, \ - .get_rate = get_rate_##getsetround, \ - .set_rate = set_rate_##getsetround, \ - .round_rate = round_rate_##getsetround, \ - .enable = clk_pccr_enable, \ - .disable = clk_pccr_disable, \ - .secondary = s, \ - .parent = p, \ +static struct clk usb_clk[] = { + { + .name = "usb_clk", + .parent = &spll_clk, + .get_rate = _clk_usb_recalc, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_USBOTG_OFFSET, + .disable = _clk_disable, + }, { + .name = "usb_ahb_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_HCLK_USBOTG_OFFSET, + .disable = _clk_disable, } +}; -/* Forward declaration to keep the following list in order */ -static struct clk slcdc_clk1, sahara2_clk1, rtic_clk1, fec_clk1, emma_clk1, - dma_clk1, lcdc_clk2, vpu_clk1; - -/* All clocks we can gate through PCCRx in the order of PCCRx bits */ -DEFINE_CLOCK(ssi2_clk1, 1, PCCR0, 0, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(ssi1_clk1, 0, PCCR0, 1, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(slcdc_clk, 0, PCCR0, 2, NULL, &slcdc_clk1, &ahb_clk); -DEFINE_CLOCK(sdhc3_clk1, 0, PCCR0, 3, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(sdhc2_clk1, 0, PCCR0, 4, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(sdhc1_clk1, 0, PCCR0, 5, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(scc_clk, 0, PCCR0, 6, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(sahara2_clk, 0, PCCR0, 7, NULL, &sahara2_clk1, &ahb_clk); -DEFINE_CLOCK(rtic_clk, 0, PCCR0, 8, NULL, &rtic_clk1, &ahb_clk); -DEFINE_CLOCK(rtc_clk, 0, PCCR0, 9, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(pwm_clk1, 0, PCCR0, 11, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(owire_clk, 0, PCCR0, 12, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(mstick_clk1, 0, PCCR0, 13, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(lcdc_clk1, 0, PCCR0, 14, NULL, &lcdc_clk2, &ipg_clk); -DEFINE_CLOCK(kpp_clk, 0, PCCR0, 15, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(iim_clk, 0, PCCR0, 16, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(i2c2_clk, 1, PCCR0, 17, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(i2c1_clk, 0, PCCR0, 18, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(gpt6_clk1, 0, PCCR0, 29, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(gpt5_clk1, 0, PCCR0, 20, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(gpt4_clk1, 0, PCCR0, 21, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(gpt3_clk1, 0, PCCR0, 22, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(gpt2_clk1, 0, PCCR0, 23, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(gpt1_clk1, 0, PCCR0, 24, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(gpio_clk, 0, PCCR0, 25, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(fec_clk, 0, PCCR0, 26, NULL, &fec_clk1, &ahb_clk); -DEFINE_CLOCK(emma_clk, 0, PCCR0, 27, NULL, &emma_clk1, &ahb_clk); -DEFINE_CLOCK(dma_clk, 0, PCCR0, 28, NULL, &dma_clk1, &ahb_clk); -DEFINE_CLOCK(cspi13_clk1, 0, PCCR0, 29, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(cspi2_clk1, 0, PCCR0, 30, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(cspi1_clk1, 0, PCCR0, 31, NULL, NULL, &ipg_clk); - -DEFINE_CLOCK(mstick_clk, 0, PCCR1, 2, NULL, &mstick_clk1, &ipg_clk); -DEFINE_CLOCK(nfc_clk, 0, PCCR1, 3, get_rate_nfc, NULL, &cpu_clk); -DEFINE_CLOCK(ssi2_clk, 1, PCCR1, 4, get_rate_ssi2, &ssi2_clk1, &mpll_main2_clk); -DEFINE_CLOCK(ssi1_clk, 0, PCCR1, 5, get_rate_ssi1, &ssi1_clk1, &mpll_main2_clk); -DEFINE_CLOCK(vpu_clk, 0, PCCR1, 6, get_rate_vpu, &vpu_clk1, &mpll_main2_clk); -DEFINE_CLOCK1(per4_clk, 3, PCCR1, 7, per, NULL, &mpll_main2_clk); -DEFINE_CLOCK1(per3_clk, 2, PCCR1, 8, per, NULL, &mpll_main2_clk); -DEFINE_CLOCK1(per2_clk, 1, PCCR1, 9, per, NULL, &mpll_main2_clk); -DEFINE_CLOCK1(per1_clk, 0, PCCR1, 10, per, NULL, &mpll_main2_clk); -DEFINE_CLOCK(usb_clk1, 0, PCCR1, 11, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(slcdc_clk1, 0, PCCR1, 12, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(sahara2_clk1, 0, PCCR1, 13, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(rtic_clk1, 0, PCCR1, 14, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(lcdc_clk2, 0, PCCR1, 15, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(vpu_clk1, 0, PCCR1, 16, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(fec_clk1, 0, PCCR1, 17, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(emma_clk1, 0, PCCR1, 18, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(emi_clk, 0, PCCR1, 19, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(dma_clk1, 0, PCCR1, 20, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(csi_clk1, 0, PCCR1, 21, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(brom_clk, 0, PCCR1, 22, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(ata_clk, 0, PCCR1, 23, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(wdog_clk, 0, PCCR1, 24, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(usb_clk, 0, PCCR1, 25, get_rate_usb, &usb_clk1, &spll_clk); -DEFINE_CLOCK(uart6_clk1, 0, PCCR1, 26, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(uart5_clk1, 0, PCCR1, 27, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(uart4_clk1, 0, PCCR1, 28, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(uart3_clk1, 0, PCCR1, 29, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(uart2_clk1, 0, PCCR1, 30, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(uart1_clk1, 0, PCCR1, 31, NULL, NULL, &ipg_clk); - -/* Clocks we cannot directly gate, but drivers need their rates */ -DEFINE_CLOCK(cspi1_clk, 0, 0, 0, NULL, &cspi1_clk1, &per2_clk); -DEFINE_CLOCK(cspi2_clk, 1, 0, 0, NULL, &cspi2_clk1, &per2_clk); -DEFINE_CLOCK(cspi3_clk, 2, 0, 0, NULL, &cspi13_clk1, &per2_clk); -DEFINE_CLOCK(sdhc1_clk, 0, 0, 0, NULL, &sdhc1_clk1, &per2_clk); -DEFINE_CLOCK(sdhc2_clk, 1, 0, 0, NULL, &sdhc2_clk1, &per2_clk); -DEFINE_CLOCK(sdhc3_clk, 2, 0, 0, NULL, &sdhc3_clk1, &per2_clk); -DEFINE_CLOCK(pwm_clk, 0, 0, 0, NULL, &pwm_clk1, &per1_clk); -DEFINE_CLOCK(gpt1_clk, 0, 0, 0, NULL, &gpt1_clk1, &per1_clk); -DEFINE_CLOCK(gpt2_clk, 1, 0, 0, NULL, &gpt2_clk1, &per1_clk); -DEFINE_CLOCK(gpt3_clk, 2, 0, 0, NULL, &gpt3_clk1, &per1_clk); -DEFINE_CLOCK(gpt4_clk, 3, 0, 0, NULL, &gpt4_clk1, &per1_clk); -DEFINE_CLOCK(gpt5_clk, 4, 0, 0, NULL, &gpt5_clk1, &per1_clk); -DEFINE_CLOCK(gpt6_clk, 5, 0, 0, NULL, &gpt6_clk1, &per1_clk); -DEFINE_CLOCK(uart1_clk, 0, 0, 0, NULL, &uart1_clk1, &per1_clk); -DEFINE_CLOCK(uart2_clk, 1, 0, 0, NULL, &uart2_clk1, &per1_clk); -DEFINE_CLOCK(uart3_clk, 2, 0, 0, NULL, &uart3_clk1, &per1_clk); -DEFINE_CLOCK(uart4_clk, 3, 0, 0, NULL, &uart4_clk1, &per1_clk); -DEFINE_CLOCK(uart5_clk, 4, 0, 0, NULL, &uart5_clk1, &per1_clk); -DEFINE_CLOCK(uart6_clk, 5, 0, 0, NULL, &uart6_clk1, &per1_clk); -DEFINE_CLOCK1(lcdc_clk, 0, 0, 0, parent, &lcdc_clk1, &per3_clk); -DEFINE_CLOCK1(csi_clk, 0, 0, 0, parent, &csi_clk1, &per4_clk); - -#define _REGISTER_CLOCK(d, n, c) \ - { \ - .dev_id = d, \ - .con_id = n, \ - .clk = &c, \ +static struct clk ssi1_clk[] = { + { + .name = "ssi_clk", + .id = 0, + .parent = &mpll_main_clk[1], + .secondary = &ssi1_clk[1], + .get_rate = _clk_ssi1_recalc, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_SSI1_BAUD_OFFSET, + .disable = _clk_disable, + }, { + .name = "ssi_ipg_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_SSI1_IPG_OFFSET, + .disable = _clk_disable, }, +}; + +static struct clk ssi2_clk[] = { + { + .name = "ssi_clk", + .id = 1, + .parent = &mpll_main_clk[1], + .secondary = &ssi2_clk[1], + .get_rate = _clk_ssi2_recalc, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_SSI2_BAUD_OFFSET, + .disable = _clk_disable, + }, { + .name = "ssi_ipg_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_SSI2_IPG_OFFSET, + .disable = _clk_disable, + }, +}; + +static struct clk nfc_clk = { + .name = "nfc_clk", + .parent = &cpu_clk, + .get_rate = _clk_nfc_recalc, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_NFC_BAUD_OFFSET, + .disable = _clk_disable, +}; + +static struct clk vpu_clk = { + .name = "vpu_clk", + .parent = &mpll_main_clk[1], + .get_rate = _clk_vpu_recalc, + .enable = _clk_vpu_enable, + .disable = _clk_vpu_disable, +}; + +static struct clk dma_clk = { + .name = "dma_clk", + .parent = &ahb_clk, + .enable = _clk_dma_enable, + .disable = _clk_dma_disable, +}; + +static struct clk rtic_clk = { + .name = "rtic_clk", + .parent = &ahb_clk, + .enable = _clk_rtic_enable, + .disable = _clk_rtic_disable, +}; -static struct clk_lookup lookups[] __initdata = { - _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) - _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) - _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) - _REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk) - _REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk) - _REGISTER_CLOCK("imx-uart.5", NULL, uart6_clk) - _REGISTER_CLOCK(NULL, "gpt1", gpt1_clk) - _REGISTER_CLOCK(NULL, "gpt2", gpt2_clk) - _REGISTER_CLOCK(NULL, "gpt3", gpt3_clk) - _REGISTER_CLOCK(NULL, "gpt4", gpt4_clk) - _REGISTER_CLOCK(NULL, "gpt5", gpt5_clk) - _REGISTER_CLOCK(NULL, "gpt6", gpt6_clk) - _REGISTER_CLOCK("mxc_pwm.0", NULL, pwm_clk) - _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk) - _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk) - _REGISTER_CLOCK("mxc-mmc.2", NULL, sdhc3_clk) - _REGISTER_CLOCK(NULL, "cspi1", cspi1_clk) - _REGISTER_CLOCK(NULL, "cspi2", cspi2_clk) - _REGISTER_CLOCK(NULL, "cspi3", cspi3_clk) - _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk) - _REGISTER_CLOCK(NULL, "csi", csi_clk) - _REGISTER_CLOCK(NULL, "usb", usb_clk) - _REGISTER_CLOCK(NULL, "ssi1", ssi1_clk) - _REGISTER_CLOCK(NULL, "ssi2", ssi2_clk) - _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) - _REGISTER_CLOCK(NULL, "vpu", vpu_clk) - _REGISTER_CLOCK(NULL, "dma", dma_clk) - _REGISTER_CLOCK(NULL, "rtic", rtic_clk) - _REGISTER_CLOCK(NULL, "brom", brom_clk) - _REGISTER_CLOCK(NULL, "emma", emma_clk) - _REGISTER_CLOCK(NULL, "slcdc", slcdc_clk) - _REGISTER_CLOCK("fec.0", NULL, fec_clk) - _REGISTER_CLOCK(NULL, "emi", emi_clk) - _REGISTER_CLOCK(NULL, "sahara2", sahara2_clk) - _REGISTER_CLOCK(NULL, "ata", ata_clk) - _REGISTER_CLOCK(NULL, "mstick", mstick_clk) - _REGISTER_CLOCK(NULL, "wdog", wdog_clk) - _REGISTER_CLOCK(NULL, "gpio", gpio_clk) - _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) - _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) - _REGISTER_CLOCK(NULL, "iim", iim_clk) - _REGISTER_CLOCK(NULL, "kpp", kpp_clk) - _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk) - _REGISTER_CLOCK(NULL, "rtc", rtc_clk) - _REGISTER_CLOCK(NULL, "scc", scc_clk) -}; - -/* Adjust the clock path for TO2 and later */ -static void __init to2_adjust_clocks(void) -{ - unsigned long cscr = __raw_readl(CCM_CSCR); +static struct clk brom_clk = { + .name = "brom_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_HCLK_BROM_OFFSET, + .disable = _clk_disable, +}; + +static struct clk emma_clk = { + .name = "emma_clk", + .parent = &ahb_clk, + .enable = _clk_emma_enable, + .disable = _clk_emma_disable, +}; + +static struct clk slcdc_clk = { + .name = "slcdc_clk", + .parent = &ahb_clk, + .enable = _clk_slcdc_enable, + .disable = _clk_slcdc_disable, +}; + +static struct clk fec_clk = { + .name = "fec_clk", + .parent = &ahb_clk, + .enable = _clk_fec_enable, + .disable = _clk_fec_disable, +}; + +static struct clk emi_clk = { + .name = "emi_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_HCLK_EMI_OFFSET, + .disable = _clk_disable, +}; + +static struct clk sahara2_clk = { + .name = "sahara_clk", + .parent = &ahb_clk, + .enable = _clk_sahara2_enable, + .disable = _clk_sahara2_disable, +}; + +static struct clk ata_clk = { + .name = "ata_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_HCLK_ATA_OFFSET, + .disable = _clk_disable, +}; + +static struct clk mstick1_clk = { + .name = "mstick1_clk", + .parent = &ipg_clk, + .enable = _clk_mstick1_enable, + .disable = _clk_mstick1_disable, +}; + +static struct clk wdog_clk = { + .name = "wdog_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR1_WDT_OFFSET, + .disable = _clk_disable, +}; + +static struct clk gpio_clk = { + .name = "gpio_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR1, + .enable_shift = CCM_PCCR0_GPIO_OFFSET, + .disable = _clk_disable, +}; + +static struct clk i2c_clk[] = { + { + .name = "i2c_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_I2C1_OFFSET, + .disable = _clk_disable, + }, { + .name = "i2c_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_I2C2_OFFSET, + .disable = _clk_disable, + }, +}; + +static struct clk iim_clk = { + .name = "iim_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_IIM_OFFSET, + .disable = _clk_disable, +}; + +static struct clk kpp_clk = { + .name = "kpp_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_KPP_OFFSET, + .disable = _clk_disable, +}; + +static struct clk owire_clk = { + .name = "owire_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_OWIRE_OFFSET, + .disable = _clk_disable, +}; + +static struct clk rtc_clk = { + .name = "rtc_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_RTC_OFFSET, + .disable = _clk_disable, +}; + +static struct clk scc_clk = { + .name = "scc_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = CCM_PCCR0, + .enable_shift = CCM_PCCR0_SCC_OFFSET, + .disable = _clk_disable, +}; + +static unsigned long _clk_clko_round_rate(struct clk *clk, unsigned long rate) +{ + u32 div; + unsigned long parent_rate; + + parent_rate = clk_get_rate(clk->parent); + div = parent_rate / rate; + if (parent_rate % rate) + div++; + + if (div > 8) + div = 8; + + return parent_rate / div; +} + +static int _clk_clko_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg; + u32 div; + unsigned long parent_rate; + + parent_rate = clk_get_rate(clk->parent); + + div = parent_rate / rate; + + if (div > 8 || div < 1 || ((parent_rate / div) != rate)) + return -EINVAL; + div--; + + reg = __raw_readl(CCM_PCDR0) & ~CCM_PCDR0_CLKODIV_MASK; + reg |= div << CCM_PCDR0_CLKODIV_OFFSET; + __raw_writel(reg, CCM_PCDR0); + + return 0; +} + +static unsigned long _clk_clko_recalc(struct clk *clk) +{ + u32 div; + unsigned long parent_rate; + + parent_rate = clk_get_rate(clk->parent); + + div = __raw_readl(CCM_PCDR0) & CCM_PCDR0_CLKODIV_MASK >> + CCM_PCDR0_CLKODIV_OFFSET; + div++; + + return parent_rate / div; +} + +static int _clk_clko_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(CCM_CCSR) & ~CCM_CCSR_CLKOSEL_MASK; + + if (parent == &ckil_clk) + reg |= 0 << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &ckih_clk) + reg |= 2 << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == mpll_clk.parent) + reg |= 3 << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == spll_clk.parent) + reg |= 4 << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &mpll_clk) + reg |= 5 << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &spll_clk) + reg |= 6 << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &cpu_clk) + reg |= 7 << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &ahb_clk) + reg |= 8 << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &ipg_clk) + reg |= 9 << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &per_clk[0]) + reg |= 0xA << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &per_clk[1]) + reg |= 0xB << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &per_clk[2]) + reg |= 0xC << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &per_clk[3]) + reg |= 0xD << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &ssi1_clk[0]) + reg |= 0xE << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &ssi2_clk[0]) + reg |= 0xF << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &nfc_clk) + reg |= 0x10 << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &mstick1_clk) + reg |= 0x11 << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &vpu_clk) + reg |= 0x12 << CCM_CCSR_CLKOSEL_OFFSET; + else if (parent == &usb_clk[0]) + reg |= 0x15 << CCM_CCSR_CLKOSEL_OFFSET; + else + return -EINVAL; + + __raw_writel(reg, CCM_CCSR); + + return 0; +} + +static int _clk_clko_enable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(CCM_PCDR0) | CCM_PCDR0_CLKO_EN; + __raw_writel(reg, CCM_PCDR0); + + return 0; +} + +static void _clk_clko_disable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(CCM_PCDR0) & ~CCM_PCDR0_CLKO_EN; + __raw_writel(reg, CCM_PCDR0); +} + +static struct clk clko_clk = { + .name = "clko_clk", + .get_rate = _clk_clko_recalc, + .set_rate = _clk_clko_set_rate, + .round_rate = _clk_clko_round_rate, + .set_parent = _clk_clko_set_parent, + .enable = _clk_clko_enable, + .disable = _clk_clko_disable, +}; + +static struct clk *mxc_clks[] = { + &ckih_clk, + &ckil_clk, + &mpll_clk, + &mpll_main_clk[0], + &mpll_main_clk[1], + &spll_clk, + &cpu_clk, + &ahb_clk, + &ipg_clk, + &per_clk[0], + &per_clk[1], + &per_clk[2], + &per_clk[3], + &clko_clk, + &uart1_clk[0], + &uart1_clk[1], + &uart2_clk[0], + &uart2_clk[1], + &uart3_clk[0], + &uart3_clk[1], + &uart4_clk[0], + &uart4_clk[1], + &uart5_clk[0], + &uart5_clk[1], + &uart6_clk[0], + &uart6_clk[1], + &gpt1_clk[0], + &gpt1_clk[1], + &gpt2_clk[0], + &gpt2_clk[1], + &gpt3_clk[0], + &gpt3_clk[1], + &gpt4_clk[0], + &gpt4_clk[1], + &gpt5_clk[0], + &gpt5_clk[1], + &gpt6_clk[0], + &gpt6_clk[1], + &pwm_clk[0], + &pwm_clk[1], + &sdhc1_clk[0], + &sdhc1_clk[1], + &sdhc2_clk[0], + &sdhc2_clk[1], + &sdhc3_clk[0], + &sdhc3_clk[1], + &cspi1_clk[0], + &cspi1_clk[1], + &cspi2_clk[0], + &cspi2_clk[1], + &cspi3_clk[0], + &cspi3_clk[1], + &lcdc_clk[0], + &lcdc_clk[1], + &lcdc_clk[2], + &csi_clk[0], + &csi_clk[1], + &usb_clk[0], + &usb_clk[1], + &ssi1_clk[0], + &ssi1_clk[1], + &ssi2_clk[0], + &ssi2_clk[1], + &nfc_clk, + &vpu_clk, + &dma_clk, + &rtic_clk, + &brom_clk, + &emma_clk, + &slcdc_clk, + &fec_clk, + &emi_clk, + &sahara2_clk, + &ata_clk, + &mstick1_clk, + &wdog_clk, + &gpio_clk, + &i2c_clk[0], + &i2c_clk[1], + &iim_clk, + &kpp_clk, + &owire_clk, + &rtc_clk, + &scc_clk, +}; + +void __init change_external_low_reference(unsigned long new_ref) +{ + external_low_reference = new_ref; +} + +unsigned long __init clk_early_get_timer_rate(void) +{ + return clk_get_rate(&per_clk[0]); +} + +static void __init probe_mxc_clocks(void) +{ + int i; if (mx27_revision() >= CHIP_REV_2_0) { - if (cscr & CCM_CSCR_ARM_SRC) - cpu_clk.parent = &mpll_main1_clk; + if (CSCR() & 0x8000) + cpu_clk.parent = &mpll_main_clk[0]; - if (!(cscr & CCM_CSCR_SSI2)) - ssi1_clk.parent = &spll_clk; + if (!(CSCR() & 0x00800000)) + ssi2_clk[0].parent = &spll_clk; - if (!(cscr & CCM_CSCR_SSI1)) - ssi1_clk.parent = &spll_clk; + if (!(CSCR() & 0x00400000)) + ssi1_clk[0].parent = &spll_clk; - if (!(cscr & CCM_CSCR_VPU)) + if (!(CSCR() & 0x00200000)) vpu_clk.parent = &spll_clk; } else { cpu_clk.parent = &mpll_clk; @@ -693,13 +1565,11 @@ static void __init to2_adjust_clocks(void) cpu_clk.set_rate = NULL; ahb_clk.parent = &mpll_clk; - per1_clk.parent = &mpll_clk; - per2_clk.parent = &mpll_clk; - per3_clk.parent = &mpll_clk; - per4_clk.parent = &mpll_clk; + for (i = 0; i < sizeof(per_clk) / sizeof(per_clk[0]); i++) + per_clk[i].parent = &mpll_clk; - ssi1_clk.parent = &mpll_clk; - ssi2_clk.parent = &mpll_clk; + ssi1_clk[0].parent = &mpll_clk; + ssi2_clk[0].parent = &mpll_clk; vpu_clk.parent = &mpll_clk; } @@ -709,47 +1579,47 @@ static void __init to2_adjust_clocks(void) * must be called very early to get information about the * available clock rate when the timer framework starts */ -int __init mx27_clocks_init(unsigned long fref) +int __init mxc_clocks_init(unsigned long fref) { - u32 cscr = __raw_readl(CCM_CSCR); - int i; + u32 cscr; + struct clk **clkp; external_high_reference = fref; - /* detect clock reference for both system PLLs */ + /* detect clock reference for both system PLL */ + cscr = CSCR(); if (cscr & CCM_CSCR_MCU) mpll_clk.parent = &ckih_clk; else - mpll_clk.parent = &fpm_clk; + mpll_clk.parent = &ckil_clk; if (cscr & CCM_CSCR_SP) spll_clk.parent = &ckih_clk; else - spll_clk.parent = &fpm_clk; + spll_clk.parent = &ckil_clk; - to2_adjust_clocks(); + probe_mxc_clocks(); - for (i = 0; i < ARRAY_SIZE(lookups); i++) - clkdev_add(&lookups[i]); + per_clk[0].enable(&per_clk[0]); + gpt1_clk[1].enable(&gpt1_clk[1]); - /* Turn off all clocks we do not need */ - __raw_writel(0, CCM_PCCR0); - __raw_writel((1 << 10) | (1 << 19), CCM_PCCR1); + for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) + clk_register(*clkp); + /* Turn off all possible clocks */ + __raw_writel(CCM_PCCR0_GPT1_MASK, CCM_PCCR0); + __raw_writel(CCM_PCCR1_PERCLK1_MASK | CCM_PCCR1_HCLK_EMI_MASK, + CCM_PCCR1); spll_clk.disable(&spll_clk); - /* enable basic clocks */ - clk_enable(&per1_clk); - clk_enable(&gpio_clk); + /* This will propagate to all children and init all the clock rates */ + clk_enable(&emi_clk); + clk_enable(&gpio_clk); clk_enable(&iim_clk); - + clk_enable(&gpt1_clk[0]); #ifdef CONFIG_DEBUG_LL_CONSOLE - clk_enable(&uart1_clk); + clk_enable(&uart1_clk[0]); #endif - - mxc_timer_init(&gpt1_clk); - return 0; } - diff --git a/trunk/arch/arm/mach-mx2/cpu_imx27.c b/trunk/arch/arm/mach-mx2/cpu_imx27.c index d9e3bf9644c9..239308fe6652 100644 --- a/trunk/arch/arm/mach-mx2/cpu_imx27.c +++ b/trunk/arch/arm/mach-mx2/cpu_imx27.c @@ -26,11 +26,11 @@ #include +#include "crm_regs.h" + static int cpu_silicon_rev = -1; static int cpu_partnumber; -#define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */ - static void query_silicon_parameter(void) { u32 val; diff --git a/trunk/arch/arm/mach-mx2/crm_regs.h b/trunk/arch/arm/mach-mx2/crm_regs.h index 749de76b3f95..94644cd0a0fc 100644 --- a/trunk/arch/arm/mach-mx2/crm_regs.h +++ b/trunk/arch/arm/mach-mx2/crm_regs.h @@ -38,36 +38,42 @@ #define CCM_PMCOUNT (IO_ADDRESS(CCM_BASE_ADDR) + 0x30) #define CCM_WKGDCTL (IO_ADDRESS(CCM_BASE_ADDR) + 0x34) -#define CCM_CSCR_PRESC_OFFSET 29 -#define CCM_CSCR_PRESC_MASK (0x7 << CCM_CSCR_PRESC_OFFSET) - -#define CCM_CSCR_USB_OFFSET 26 -#define CCM_CSCR_USB_MASK (0x7 << CCM_CSCR_USB_OFFSET) +#define CCM_CSCR_USB_OFFSET 28 +#define CCM_CSCR_USB_MASK (0x7 << 28) #define CCM_CSCR_SD_OFFSET 24 -#define CCM_CSCR_SD_MASK (0x3 << CCM_CSCR_SD_OFFSET) -#define CCM_CSCR_SPLLRES (1 << 22) -#define CCM_CSCR_MPLLRES (1 << 21) -#define CCM_CSCR_SSI2_OFFSET 20 -#define CCM_CSCR_SSI2 (1 << CCM_CSCR_SSI2_OFFSET) -#define CCM_CSCR_SSI1_OFFSET 19 -#define CCM_CSCR_SSI1 (1 << CCM_CSCR_SSI1_OFFSET) -#define CCM_CSCR_FIR_OFFSET 18 -#define CCM_CSCR_FIR (1 << CCM_CSCR_FIR_OFFSET) +#define CCM_CSCR_SD_MASK (0x3 << 24) +#define CCM_CSCR_SSI2 (1 << 23) +#define CCM_CSCR_SSI2_OFFSET 23 +#define CCM_CSCR_SSI1 (1 << 22) +#define CCM_CSCR_SSI1_OFFSET 22 +#define CCM_CSCR_VPU (1 << 21) +#define CCM_CSCR_VPU_OFFSET 21 +#define CCM_CSCR_MSHC (1 << 20) +#define CCM_CSCR_SPLLRES (1 << 19) +#define CCM_CSCR_MPLLRES (1 << 18) #define CCM_CSCR_SP (1 << 17) #define CCM_CSCR_MCU (1 << 16) -#define CCM_CSCR_BCLK_OFFSET 10 -#define CCM_CSCR_BCLK_MASK (0xf << CCM_CSCR_BCLK_OFFSET) -#define CCM_CSCR_IPDIV_OFFSET 9 -#define CCM_CSCR_IPDIV (1 << CCM_CSCR_IPDIV_OFFSET) - +/* CCM_CSCR_ARM_xxx just be avaliable on i.MX27 TO2*/ +#define CCM_CSCR_ARM_SRC (1 << 15) +#define CCM_CSCR_ARM_OFFSET 12 +#define CCM_CSCR_ARM_MASK (0x3 << 12) +/* CCM_CSCR_ARM_xxx just be avaliable on i.MX27 TO2*/ +#define CCM_CSCR_PRESC_OFFSET 13 +#define CCM_CSCR_PRESC_MASK (0x7 << 13) +#define CCM_CSCR_BCLK_OFFSET 9 +#define CCM_CSCR_BCLK_MASK (0xf << 9) +#define CCM_CSCR_IPDIV_OFFSET 8 +#define CCM_CSCR_IPDIV (1 << 8) +/* CCM_CSCR_AHB_xxx just be avaliable on i.MX27 TO2*/ +#define CCM_CSCR_AHB_OFFSET 8 +#define CCM_CSCR_AHB_MASK (0x3 << 8) +/* CCM_CSCR_AHB_xxx just be avaliable on i.MX27 TO2*/ #define CCM_CSCR_OSC26MDIV (1 << 4) #define CCM_CSCR_OSC26M (1 << 3) #define CCM_CSCR_FPM (1 << 2) #define CCM_CSCR_SPEN (1 << 1) #define CCM_CSCR_MPEN 1 - - #define CCM_MPCTL0_CPLM (1 << 31) #define CCM_MPCTL0_PD_OFFSET 26 #define CCM_MPCTL0_PD_MASK (0xf << 26) @@ -103,14 +109,25 @@ #define CCM_PCDR0_SSI2BAUDDIV_OFFSET 26 #define CCM_PCDR0_SSI2BAUDDIV_MASK (0x3f << 26) +#define CCM_PCDR0_CLKO_EN 25 +#define CCM_PCDR0_CLKODIV_OFFSET 22 +#define CCM_PCDR0_CLKODIV_MASK (0x7 << 22) #define CCM_PCDR0_SSI1BAUDDIV_OFFSET 16 #define CCM_PCDR0_SSI1BAUDDIV_MASK (0x3f << 16) +/*The difinition for i.MX27 TO2*/ +#define CCM_PCDR0_VPUDIV2_OFFSET 10 +#define CCM_PCDR0_VPUDIV2_MASK (0x3f << 10) +#define CCM_PCDR0_NFCDIV2_OFFSET 6 +#define CCM_PCDR0_NFCDIV2_MASK (0xf << 6) +#define CCM_PCDR0_MSHCDIV2_MASK 0x3f +/*The difinition for i.MX27 TO2*/ #define CCM_PCDR0_NFCDIV_OFFSET 12 #define CCM_PCDR0_NFCDIV_MASK (0xf << 12) -#define CCM_PCDR0_48MDIV_OFFSET 5 -#define CCM_PCDR0_48MDIV_MASK (0x7 << CCM_PCDR0_48MDIV_OFFSET) -#define CCM_PCDR0_FIRIDIV_OFFSET 0 -#define CCM_PCDR0_FIRIDIV_MASK 0x1f +#define CCM_PCDR0_VPUDIV_OFFSET 8 +#define CCM_PCDR0_VPUDIV_MASK (0xf << 8) +#define CCM_PCDR0_MSHCDIV_OFFSET 0 +#define CCM_PCDR0_MSHCDIV_MASK 0x1f + #define CCM_PCDR1_PERDIV4_OFFSET 24 #define CCM_PCDR1_PERDIV4_MASK (0x3f << 24) #define CCM_PCDR1_PERDIV3_OFFSET 16 @@ -120,135 +137,133 @@ #define CCM_PCDR1_PERDIV1_OFFSET 0 #define CCM_PCDR1_PERDIV1_MASK 0x3f -#define CCM_PCCR_HCLK_CSI_OFFSET 31 -#define CCM_PCCR_HCLK_CSI_REG CCM_PCCR0 -#define CCM_PCCR_HCLK_DMA_OFFSET 30 -#define CCM_PCCR_HCLK_DMA_REG CCM_PCCR0 -#define CCM_PCCR_HCLK_BROM_OFFSET 28 -#define CCM_PCCR_HCLK_BROM_REG CCM_PCCR0 -#define CCM_PCCR_HCLK_EMMA_OFFSET 27 -#define CCM_PCCR_HCLK_EMMA_REG CCM_PCCR0 -#define CCM_PCCR_HCLK_LCDC_OFFSET 26 -#define CCM_PCCR_HCLK_LCDC_REG CCM_PCCR0 -#define CCM_PCCR_HCLK_SLCDC_OFFSET 25 -#define CCM_PCCR_HCLK_SLCDC_REG CCM_PCCR0 -#define CCM_PCCR_HCLK_USBOTG_OFFSET 24 -#define CCM_PCCR_HCLK_USBOTG_REG CCM_PCCR0 -#define CCM_PCCR_HCLK_BMI_OFFSET 23 -#define CCM_PCCR_BMI_MASK (1 << CCM_PCCR_BMI_MASK) -#define CCM_PCCR_HCLK_BMI_REG CCM_PCCR0 -#define CCM_PCCR_PERCLK4_OFFSET 22 -#define CCM_PCCR_PERCLK4_REG CCM_PCCR0 -#define CCM_PCCR_SLCDC_OFFSET 21 -#define CCM_PCCR_SLCDC_REG CCM_PCCR0 -#define CCM_PCCR_FIRI_BAUD_OFFSET 20 -#define CCM_PCCR_FIRI_BAUD_MASK (1 << CCM_PCCR_FIRI_BAUD_MASK) -#define CCM_PCCR_FIRI_BAUD_REG CCM_PCCR0 -#define CCM_PCCR_NFC_OFFSET 19 -#define CCM_PCCR_NFC_REG CCM_PCCR0 -#define CCM_PCCR_LCDC_OFFSET 18 -#define CCM_PCCR_LCDC_REG CCM_PCCR0 -#define CCM_PCCR_SSI1_BAUD_OFFSET 17 -#define CCM_PCCR_SSI1_BAUD_REG CCM_PCCR0 -#define CCM_PCCR_SSI2_BAUD_OFFSET 16 -#define CCM_PCCR_SSI2_BAUD_REG CCM_PCCR0 -#define CCM_PCCR_EMMA_OFFSET 15 -#define CCM_PCCR_EMMA_REG CCM_PCCR0 -#define CCM_PCCR_USBOTG_OFFSET 14 -#define CCM_PCCR_USBOTG_REG CCM_PCCR0 -#define CCM_PCCR_DMA_OFFSET 13 -#define CCM_PCCR_DMA_REG CCM_PCCR0 -#define CCM_PCCR_I2C1_OFFSET 12 -#define CCM_PCCR_I2C1_REG CCM_PCCR0 -#define CCM_PCCR_GPIO_OFFSET 11 -#define CCM_PCCR_GPIO_REG CCM_PCCR0 -#define CCM_PCCR_SDHC2_OFFSET 10 -#define CCM_PCCR_SDHC2_REG CCM_PCCR0 -#define CCM_PCCR_SDHC1_OFFSET 9 -#define CCM_PCCR_SDHC1_REG CCM_PCCR0 -#define CCM_PCCR_FIRI_OFFSET 8 -#define CCM_PCCR_FIRI_MASK (1 << CCM_PCCR_BAUD_MASK) -#define CCM_PCCR_FIRI_REG CCM_PCCR0 -#define CCM_PCCR_SSI2_IPG_OFFSET 7 -#define CCM_PCCR_SSI2_REG CCM_PCCR0 -#define CCM_PCCR_SSI1_IPG_OFFSET 6 -#define CCM_PCCR_SSI1_REG CCM_PCCR0 -#define CCM_PCCR_CSPI2_OFFSET 5 -#define CCM_PCCR_CSPI2_REG CCM_PCCR0 -#define CCM_PCCR_CSPI1_OFFSET 4 -#define CCM_PCCR_CSPI1_REG CCM_PCCR0 -#define CCM_PCCR_UART4_OFFSET 3 -#define CCM_PCCR_UART4_REG CCM_PCCR0 -#define CCM_PCCR_UART3_OFFSET 2 -#define CCM_PCCR_UART3_REG CCM_PCCR0 -#define CCM_PCCR_UART2_OFFSET 1 -#define CCM_PCCR_UART2_REG CCM_PCCR0 -#define CCM_PCCR_UART1_OFFSET 0 -#define CCM_PCCR_UART1_REG CCM_PCCR0 - -#define CCM_PCCR_OWIRE_OFFSET 31 -#define CCM_PCCR_OWIRE_REG CCM_PCCR1 -#define CCM_PCCR_KPP_OFFSET 30 -#define CCM_PCCR_KPP_REG CCM_PCCR1 -#define CCM_PCCR_RTC_OFFSET 29 -#define CCM_PCCR_RTC_REG CCM_PCCR1 -#define CCM_PCCR_PWM_OFFSET 28 -#define CCM_PCCR_PWM_REG CCM_PCCR1 -#define CCM_PCCR_GPT3_OFFSET 27 -#define CCM_PCCR_GPT3_REG CCM_PCCR1 -#define CCM_PCCR_GPT2_OFFSET 26 -#define CCM_PCCR_GPT2_REG CCM_PCCR1 -#define CCM_PCCR_GPT1_OFFSET 25 -#define CCM_PCCR_GPT1_REG CCM_PCCR1 -#define CCM_PCCR_WDT_OFFSET 24 -#define CCM_PCCR_WDT_REG CCM_PCCR1 -#define CCM_PCCR_CSPI3_OFFSET 23 -#define CCM_PCCR_CSPI3_REG CCM_PCCR1 - -#define CCM_PCCR_CSPI1_MASK (1 << CCM_PCCR_CSPI1_OFFSET) -#define CCM_PCCR_CSPI2_MASK (1 << CCM_PCCR_CSPI2_OFFSET) -#define CCM_PCCR_CSPI3_MASK (1 << CCM_PCCR_CSPI3_OFFSET) -#define CCM_PCCR_DMA_MASK (1 << CCM_PCCR_DMA_OFFSET) -#define CCM_PCCR_EMMA_MASK (1 << CCM_PCCR_EMMA_OFFSET) -#define CCM_PCCR_GPIO_MASK (1 << CCM_PCCR_GPIO_OFFSET) -#define CCM_PCCR_GPT1_MASK (1 << CCM_PCCR_GPT1_OFFSET) -#define CCM_PCCR_GPT2_MASK (1 << CCM_PCCR_GPT2_OFFSET) -#define CCM_PCCR_GPT3_MASK (1 << CCM_PCCR_GPT3_OFFSET) -#define CCM_PCCR_HCLK_BROM_MASK (1 << CCM_PCCR_HCLK_BROM_OFFSET) -#define CCM_PCCR_HCLK_CSI_MASK (1 << CCM_PCCR_HCLK_CSI_OFFSET) -#define CCM_PCCR_HCLK_DMA_MASK (1 << CCM_PCCR_HCLK_DMA_OFFSET) -#define CCM_PCCR_HCLK_EMMA_MASK (1 << CCM_PCCR_HCLK_EMMA_OFFSET) -#define CCM_PCCR_HCLK_LCDC_MASK (1 << CCM_PCCR_HCLK_LCDC_OFFSET) -#define CCM_PCCR_HCLK_SLCDC_MASK (1 << CCM_PCCR_HCLK_SLCDC_OFFSET) -#define CCM_PCCR_HCLK_USBOTG_MASK (1 << CCM_PCCR_HCLK_USBOTG_OFFSET) -#define CCM_PCCR_I2C1_MASK (1 << CCM_PCCR_I2C1_OFFSET) -#define CCM_PCCR_KPP_MASK (1 << CCM_PCCR_KPP_OFFSET) -#define CCM_PCCR_LCDC_MASK (1 << CCM_PCCR_LCDC_OFFSET) -#define CCM_PCCR_NFC_MASK (1 << CCM_PCCR_NFC_OFFSET) -#define CCM_PCCR_OWIRE_MASK (1 << CCM_PCCR_OWIRE_OFFSET) -#define CCM_PCCR_PERCLK4_MASK (1 << CCM_PCCR_PERCLK4_OFFSET) -#define CCM_PCCR_PWM_MASK (1 << CCM_PCCR_PWM_OFFSET) -#define CCM_PCCR_RTC_MASK (1 << CCM_PCCR_RTC_OFFSET) -#define CCM_PCCR_SDHC1_MASK (1 << CCM_PCCR_SDHC1_OFFSET) -#define CCM_PCCR_SDHC2_MASK (1 << CCM_PCCR_SDHC2_OFFSET) -#define CCM_PCCR_SLCDC_MASK (1 << CCM_PCCR_SLCDC_OFFSET) -#define CCM_PCCR_SSI1_BAUD_MASK (1 << CCM_PCCR_SSI1_BAUD_OFFSET) -#define CCM_PCCR_SSI1_IPG_MASK (1 << CCM_PCCR_SSI1_IPG_OFFSET) -#define CCM_PCCR_SSI2_BAUD_MASK (1 << CCM_PCCR_SSI2_BAUD_OFFSET) -#define CCM_PCCR_SSI2_IPG_MASK (1 << CCM_PCCR_SSI2_IPG_OFFSET) -#define CCM_PCCR_UART1_MASK (1 << CCM_PCCR_UART1_OFFSET) -#define CCM_PCCR_UART2_MASK (1 << CCM_PCCR_UART2_OFFSET) -#define CCM_PCCR_UART3_MASK (1 << CCM_PCCR_UART3_OFFSET) -#define CCM_PCCR_UART4_MASK (1 << CCM_PCCR_UART4_OFFSET) -#define CCM_PCCR_USBOTG_MASK (1 << CCM_PCCR_USBOTG_OFFSET) -#define CCM_PCCR_WDT_MASK (1 << CCM_PCCR_WDT_OFFSET) +#define CCM_PCCR0_CSPI1_OFFSET 31 +#define CCM_PCCR0_CSPI1_MASK (1 << 31) +#define CCM_PCCR0_CSPI2_OFFSET 30 +#define CCM_PCCR0_CSPI2_MASK (1 << 30) +#define CCM_PCCR0_CSPI3_OFFSET 29 +#define CCM_PCCR0_CSPI3_MASK (1 << 29) +#define CCM_PCCR0_DMA_OFFSET 28 +#define CCM_PCCR0_DMA_MASK (1 << 28) +#define CCM_PCCR0_EMMA_OFFSET 27 +#define CCM_PCCR0_EMMA_MASK (1 << 27) +#define CCM_PCCR0_FEC_OFFSET 26 +#define CCM_PCCR0_FEC_MASK (1 << 26) +#define CCM_PCCR0_GPIO_OFFSET 25 +#define CCM_PCCR0_GPIO_MASK (1 << 25) +#define CCM_PCCR0_GPT1_OFFSET 24 +#define CCM_PCCR0_GPT1_MASK (1 << 24) +#define CCM_PCCR0_GPT2_OFFSET 23 +#define CCM_PCCR0_GPT2_MASK (1 << 23) +#define CCM_PCCR0_GPT3_OFFSET 22 +#define CCM_PCCR0_GPT3_MASK (1 << 22) +#define CCM_PCCR0_GPT4_OFFSET 21 +#define CCM_PCCR0_GPT4_MASK (1 << 21) +#define CCM_PCCR0_GPT5_OFFSET 20 +#define CCM_PCCR0_GPT5_MASK (1 << 20) +#define CCM_PCCR0_GPT6_OFFSET 19 +#define CCM_PCCR0_GPT6_MASK (1 << 19) +#define CCM_PCCR0_I2C1_OFFSET 18 +#define CCM_PCCR0_I2C1_MASK (1 << 18) +#define CCM_PCCR0_I2C2_OFFSET 17 +#define CCM_PCCR0_I2C2_MASK (1 << 17) +#define CCM_PCCR0_IIM_OFFSET 16 +#define CCM_PCCR0_IIM_MASK (1 << 16) +#define CCM_PCCR0_KPP_OFFSET 15 +#define CCM_PCCR0_KPP_MASK (1 << 15) +#define CCM_PCCR0_LCDC_OFFSET 14 +#define CCM_PCCR0_LCDC_MASK (1 << 14) +#define CCM_PCCR0_MSHC_OFFSET 13 +#define CCM_PCCR0_MSHC_MASK (1 << 13) +#define CCM_PCCR0_OWIRE_OFFSET 12 +#define CCM_PCCR0_OWIRE_MASK (1 << 12) +#define CCM_PCCR0_PWM_OFFSET 11 +#define CCM_PCCR0_PWM_MASK (1 << 11) +#define CCM_PCCR0_RTC_OFFSET 9 +#define CCM_PCCR0_RTC_MASK (1 << 9) +#define CCM_PCCR0_RTIC_OFFSET 8 +#define CCM_PCCR0_RTIC_MASK (1 << 8) +#define CCM_PCCR0_SAHARA_OFFSET 7 +#define CCM_PCCR0_SAHARA_MASK (1 << 7) +#define CCM_PCCR0_SCC_OFFSET 6 +#define CCM_PCCR0_SCC_MASK (1 << 6) +#define CCM_PCCR0_SDHC1_OFFSET 5 +#define CCM_PCCR0_SDHC1_MASK (1 << 5) +#define CCM_PCCR0_SDHC2_OFFSET 4 +#define CCM_PCCR0_SDHC2_MASK (1 << 4) +#define CCM_PCCR0_SDHC3_OFFSET 3 +#define CCM_PCCR0_SDHC3_MASK (1 << 3) +#define CCM_PCCR0_SLCDC_OFFSET 2 +#define CCM_PCCR0_SLCDC_MASK (1 << 2) +#define CCM_PCCR0_SSI1_IPG_OFFSET 1 +#define CCM_PCCR0_SSI1_IPG_MASK (1 << 1) +#define CCM_PCCR0_SSI2_IPG_OFFSET 0 +#define CCM_PCCR0_SSI2_IPG_MASK (1 << 0) +#define CCM_PCCR1_UART1_OFFSET 31 +#define CCM_PCCR1_UART1_MASK (1 << 31) +#define CCM_PCCR1_UART2_OFFSET 30 +#define CCM_PCCR1_UART2_MASK (1 << 30) +#define CCM_PCCR1_UART3_OFFSET 29 +#define CCM_PCCR1_UART3_MASK (1 << 29) +#define CCM_PCCR1_UART4_OFFSET 28 +#define CCM_PCCR1_UART4_MASK (1 << 28) +#define CCM_PCCR1_UART5_OFFSET 27 +#define CCM_PCCR1_UART5_MASK (1 << 27) +#define CCM_PCCR1_UART6_OFFSET 26 +#define CCM_PCCR1_UART6_MASK (1 << 26) +#define CCM_PCCR1_USBOTG_OFFSET 25 +#define CCM_PCCR1_USBOTG_MASK (1 << 25) +#define CCM_PCCR1_WDT_OFFSET 24 +#define CCM_PCCR1_WDT_MASK (1 << 24) +#define CCM_PCCR1_HCLK_ATA_OFFSET 23 +#define CCM_PCCR1_HCLK_ATA_MASK (1 << 23) +#define CCM_PCCR1_HCLK_BROM_OFFSET 22 +#define CCM_PCCR1_HCLK_BROM_MASK (1 << 22) +#define CCM_PCCR1_HCLK_CSI_OFFSET 21 +#define CCM_PCCR1_HCLK_CSI_MASK (1 << 21) +#define CCM_PCCR1_HCLK_DMA_OFFSET 20 +#define CCM_PCCR1_HCLK_DMA_MASK (1 << 20) +#define CCM_PCCR1_HCLK_EMI_OFFSET 19 +#define CCM_PCCR1_HCLK_EMI_MASK (1 << 19) +#define CCM_PCCR1_HCLK_EMMA_OFFSET 18 +#define CCM_PCCR1_HCLK_EMMA_MASK (1 << 18) +#define CCM_PCCR1_HCLK_FEC_OFFSET 17 +#define CCM_PCCR1_HCLK_FEC_MASK (1 << 17) +#define CCM_PCCR1_HCLK_VPU_OFFSET 16 +#define CCM_PCCR1_HCLK_VPU_MASK (1 << 16) +#define CCM_PCCR1_HCLK_LCDC_OFFSET 15 +#define CCM_PCCR1_HCLK_LCDC_MASK (1 << 15) +#define CCM_PCCR1_HCLK_RTIC_OFFSET 14 +#define CCM_PCCR1_HCLK_RTIC_MASK (1 << 14) +#define CCM_PCCR1_HCLK_SAHARA_OFFSET 13 +#define CCM_PCCR1_HCLK_SAHARA_MASK (1 << 13) +#define CCM_PCCR1_HCLK_SLCDC_OFFSET 12 +#define CCM_PCCR1_HCLK_SLCDC_MASK (1 << 12) +#define CCM_PCCR1_HCLK_USBOTG_OFFSET 11 +#define CCM_PCCR1_HCLK_USBOTG_MASK (1 << 11) +#define CCM_PCCR1_PERCLK1_OFFSET 10 +#define CCM_PCCR1_PERCLK1_MASK (1 << 10) +#define CCM_PCCR1_PERCLK2_OFFSET 9 +#define CCM_PCCR1_PERCLK2_MASK (1 << 9) +#define CCM_PCCR1_PERCLK3_OFFSET 8 +#define CCM_PCCR1_PERCLK3_MASK (1 << 8) +#define CCM_PCCR1_PERCLK4_OFFSET 7 +#define CCM_PCCR1_PERCLK4_MASK (1 << 7) +#define CCM_PCCR1_VPU_BAUD_OFFSET 6 +#define CCM_PCCR1_VPU_BAUD_MASK (1 << 6) +#define CCM_PCCR1_SSI1_BAUD_OFFSET 5 +#define CCM_PCCR1_SSI1_BAUD_MASK (1 << 5) +#define CCM_PCCR1_SSI2_BAUD_OFFSET 4 +#define CCM_PCCR1_SSI2_BAUD_MASK (1 << 4) +#define CCM_PCCR1_NFC_BAUD_OFFSET 3 +#define CCM_PCCR1_NFC_BAUD_MASK (1 << 3) +#define CCM_PCCR1_MSHC_BAUD_OFFSET 2 +#define CCM_PCCR1_MSHC_BAUD_MASK (1 << 2) #define CCM_CCSR_32KSR (1 << 15) - #define CCM_CCSR_CLKMODE1 (1 << 9) #define CCM_CCSR_CLKMODE0 (1 << 8) - #define CCM_CCSR_CLKOSEL_OFFSET 0 #define CCM_CCSR_CLKOSEL_MASK 0x1f diff --git a/trunk/arch/arm/mach-mx2/devices.c b/trunk/arch/arm/mach-mx2/devices.c index f81aa8a8fbb4..2f9240be1c76 100644 --- a/trunk/arch/arm/mach-mx2/devices.c +++ b/trunk/arch/arm/mach-mx2/devices.c @@ -34,10 +34,6 @@ #include #include -#include -#include - -#include "devices.h" /* * Resource definition for the MXC IrDA @@ -229,217 +225,37 @@ struct platform_device mxc_nand_device = { .resource = mxc_nand_resources, }; -#ifdef CONFIG_FB_IMX -/* - * lcdc: - * - i.MX1: the basic controller - * - i.MX21: to be checked - * - i.MX27: like i.MX1, with slightly variations - */ -static struct resource mxc_fb[] = { - { - .start = LCDC_BASE_ADDR, - .end = LCDC_BASE_ADDR + 0xFFF, - .flags = IORESOURCE_MEM, - }, - { - .start = MXC_INT_LCDC, - .end = MXC_INT_LCDC, - .flags = IORESOURCE_IRQ, - } -}; - -/* mxc lcd driver */ -struct platform_device mxc_fb_device = { - .name = "imx-fb", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_fb), - .resource = mxc_fb, - .dev = { - .coherent_dma_mask = 0xFFFFFFFF, - }, -}; -#endif - -#ifdef CONFIG_MACH_MX27 -static struct resource mxc_fec_resources[] = { - { - .start = FEC_BASE_ADDR, - .end = FEC_BASE_ADDR + 0xfff, - .flags = IORESOURCE_MEM - }, { - .start = MXC_INT_FEC, - .end = MXC_INT_FEC, - .flags = IORESOURCE_IRQ - }, -}; - -struct platform_device mxc_fec_device = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_fec_resources), - .resource = mxc_fec_resources, -}; -#endif - -static struct resource mxc_i2c_1_resources[] = { - [0] = { - .start = I2C_BASE_ADDR, - .end = I2C_BASE_ADDR + 0x0fff, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = MXC_INT_I2C, - .end = MXC_INT_I2C, - .flags = IORESOURCE_IRQ - } -}; - -struct platform_device mxc_i2c_device0 = { - .name = "imx-i2c", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_i2c_1_resources), - .resource = mxc_i2c_1_resources -}; - -#ifdef CONFIG_MACH_MX27 -static struct resource mxc_i2c_2_resources[] = { - [0] = { - .start = I2C2_BASE_ADDR, - .end = I2C2_BASE_ADDR + 0x0fff, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = MXC_INT_I2C2, - .end = MXC_INT_I2C2, - .flags = IORESOURCE_IRQ - } -}; - -struct platform_device mxc_i2c_device1 = { - .name = "imx-i2c", - .id = 1, - .num_resources = ARRAY_SIZE(mxc_i2c_2_resources), - .resource = mxc_i2c_2_resources -}; -#endif - -static struct resource mxc_pwm_resources[] = { - [0] = { - .start = PWM_BASE_ADDR, - .end = PWM_BASE_ADDR + 0x0fff, - .flags = IORESOURCE_MEM - }, - [1] = { - .start = MXC_INT_PWM, - .end = MXC_INT_PWM, - .flags = IORESOURCE_IRQ, - } -}; - -struct platform_device mxc_pwm_device = { - .name = "mxc_pwm", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_pwm_resources), - .resource = mxc_pwm_resources -}; - -/* - * Resource definition for the MXC SDHC - */ -static struct resource mxc_sdhc1_resources[] = { - [0] = { - .start = SDHC1_BASE_ADDR, - .end = SDHC1_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = MXC_INT_SDHC1, - .end = MXC_INT_SDHC1, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = DMA_REQ_SDHC1, - .end = DMA_REQ_SDHC1, - .flags = IORESOURCE_DMA - }, -}; - -static u64 mxc_sdhc1_dmamask = 0xffffffffUL; - -struct platform_device mxc_sdhc_device0 = { - .name = "mxc-mmc", - .id = 0, - .dev = { - .dma_mask = &mxc_sdhc1_dmamask, - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(mxc_sdhc1_resources), - .resource = mxc_sdhc1_resources, -}; - -static struct resource mxc_sdhc2_resources[] = { - [0] = { - .start = SDHC2_BASE_ADDR, - .end = SDHC2_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = MXC_INT_SDHC2, - .end = MXC_INT_SDHC2, - .flags = IORESOURCE_IRQ, - }, - [2] = { - .start = DMA_REQ_SDHC2, - .end = DMA_REQ_SDHC2, - .flags = IORESOURCE_DMA - }, -}; - -static u64 mxc_sdhc2_dmamask = 0xffffffffUL; - -struct platform_device mxc_sdhc_device1 = { - .name = "mxc-mmc", - .id = 1, - .dev = { - .dma_mask = &mxc_sdhc2_dmamask, - .coherent_dma_mask = 0xffffffff, - }, - .num_resources = ARRAY_SIZE(mxc_sdhc2_resources), - .resource = mxc_sdhc2_resources, -}; - /* GPIO port description */ static struct mxc_gpio_port imx_gpio_ports[] = { [0] = { .chip.label = "gpio-0", .irq = MXC_INT_GPIO, - .base = IO_ADDRESS(GPIO_BASE_ADDR), + .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 0), .virtual_irq_start = MXC_GPIO_IRQ_START, }, [1] = { .chip.label = "gpio-1", - .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x100), + .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 1), .virtual_irq_start = MXC_GPIO_IRQ_START + 32, }, [2] = { .chip.label = "gpio-2", - .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x200), + .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 2), .virtual_irq_start = MXC_GPIO_IRQ_START + 64, }, [3] = { .chip.label = "gpio-3", - .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x300), + .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 3), .virtual_irq_start = MXC_GPIO_IRQ_START + 96, }, [4] = { .chip.label = "gpio-4", - .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x400), + .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 4), .virtual_irq_start = MXC_GPIO_IRQ_START + 128, }, [5] = { .chip.label = "gpio-5", - .base = IO_ADDRESS(GPIO_BASE_ADDR + 0x500), + .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 5), .virtual_irq_start = MXC_GPIO_IRQ_START + 160, } }; diff --git a/trunk/arch/arm/mach-mx2/devices.h b/trunk/arch/arm/mach-mx2/devices.h index 049005bb6aa9..1e8cb577a642 100644 --- a/trunk/arch/arm/mach-mx2/devices.h +++ b/trunk/arch/arm/mach-mx2/devices.h @@ -1,3 +1,4 @@ + extern struct platform_device mxc_gpt1; extern struct platform_device mxc_gpt2; extern struct platform_device mxc_gpt3; @@ -13,10 +14,3 @@ extern struct platform_device mxc_uart_device4; extern struct platform_device mxc_uart_device5; extern struct platform_device mxc_w1_master_device; extern struct platform_device mxc_nand_device; -extern struct platform_device mxc_fb_device; -extern struct platform_device mxc_fec_device; -extern struct platform_device mxc_pwm_device; -extern struct platform_device mxc_i2c_device0; -extern struct platform_device mxc_i2c_device1; -extern struct platform_device mxc_sdhc_device0; -extern struct platform_device mxc_sdhc_device1; diff --git a/trunk/arch/arm/mach-mx2/generic.c b/trunk/arch/arm/mach-mx2/generic.c index bd51dd04948e..dea6521d4d5c 100644 --- a/trunk/arch/arm/mach-mx2/generic.c +++ b/trunk/arch/arm/mach-mx2/generic.c @@ -21,7 +21,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-mx2/mx27ads.c b/trunk/arch/arm/mach-mx2/mx27ads.c index 4a3b097adc12..2b5c67f54571 100644 --- a/trunk/arch/arm/mach-mx2/mx27ads.c +++ b/trunk/arch/arm/mach-mx2/mx27ads.c @@ -31,7 +31,7 @@ #include #include #include -#include +#include #include #include "devices.h" @@ -135,7 +135,6 @@ static int uart_mxc_port3_exit(struct platform_device *pdev) { mxc_gpio_release_multiple_pins(mxc_uart3_pins, ARRAY_SIZE(mxc_uart3_pins)); - return 0; } static int mxc_uart4_pins[] = { @@ -180,7 +179,6 @@ static int uart_mxc_port5_exit(struct platform_device *pdev) static struct platform_device *platform_devices[] __initdata = { &mx27ads_nor_mtd_device, - &mxc_fec_device, }; static int mxc_fec_pins[] = { @@ -198,7 +196,7 @@ static int mxc_fec_pins[] = { PD11_AOUT_FEC_TX_CLK, PD12_AOUT_FEC_RXD0, PD13_AOUT_FEC_RX_DV, - PD14_AOUT_FEC_RX_CLK, + PD14_AOUT_FEC_CLR, PD15_AOUT_FEC_COL, PD16_AIN_FEC_TX_ER, PF23_AIN_FEC_TX_EN @@ -210,6 +208,12 @@ static void gpio_fec_active(void) ARRAY_SIZE(mxc_fec_pins), "FEC"); } +static void gpio_fec_inactive(void) +{ + mxc_gpio_release_multiple_pins(mxc_fec_pins, + ARRAY_SIZE(mxc_fec_pins)); +} + static struct imxuart_platform_data uart_pdata[] = { { .init = uart_mxc_port0_init, @@ -259,10 +263,11 @@ static void __init mx27ads_timer_init(void) if ((__raw_readw(PBC_VERSION_REG) & CKIH_27MHZ_BIT_SET) == 0) fref = 27000000; - mx27_clocks_init(fref); + mxc_clocks_init(fref); + mxc_timer_init("gpt_clk.0"); } -static struct sys_timer mx27ads_timer = { +struct sys_timer mx27ads_timer = { .init = mx27ads_timer_init, }; @@ -275,7 +280,7 @@ static struct map_desc mx27ads_io_desc[] __initdata = { }, }; -static void __init mx27ads_map_io(void) +void __init mx27ads_map_io(void) { mxc_map_io(); iotable_init(mx27ads_io_desc, ARRAY_SIZE(mx27ads_io_desc)); diff --git a/trunk/arch/arm/mach-mx2/pcm038.c b/trunk/arch/arm/mach-mx2/pcm038.c index aa4eaa61d1b5..dfd4156da7d5 100644 --- a/trunk/arch/arm/mach-mx2/pcm038.c +++ b/trunk/arch/arm/mach-mx2/pcm038.c @@ -20,18 +20,11 @@ #include #include #include -#include -#include -#include - #include #include #include #include -#include -#ifdef CONFIG_I2C_IMX -#include -#endif +#include #include #include #include @@ -128,10 +121,10 @@ static int uart_mxc_port1_exit(struct platform_device *pdev) return 0; } -static int mxc_uart2_pins[] = { PE8_PF_UART3_TXD, +static int mxc_uart2_pins[] = { PE10_PF_UART3_CTS, PE9_PF_UART3_RXD, PE10_PF_UART3_CTS, - PE11_PF_UART3_RTS }; + PE9_PF_UART3_RXD }; static int uart_mxc_port2_init(struct platform_device *pdev) { @@ -177,7 +170,7 @@ static int mxc_fec_pins[] = { PD11_AOUT_FEC_TX_CLK, PD12_AOUT_FEC_RXD0, PD13_AOUT_FEC_RX_DV, - PD14_AOUT_FEC_RX_CLK, + PD14_AOUT_FEC_CLR, PD15_AOUT_FEC_COL, PD16_AIN_FEC_TX_ER, PF23_AIN_FEC_TX_EN @@ -189,6 +182,12 @@ static void gpio_fec_active(void) ARRAY_SIZE(mxc_fec_pins), "FEC"); } +static void gpio_fec_inactive(void) +{ + mxc_gpio_release_multiple_pins(mxc_fec_pins, + ARRAY_SIZE(mxc_fec_pins)); +} + static struct mxc_nand_platform_data pcm038_nand_board_info = { .width = 1, .hw_ecc = 1, @@ -197,7 +196,6 @@ static struct mxc_nand_platform_data pcm038_nand_board_info = { static struct platform_device *platform_devices[] __initdata = { &pcm038_nor_mtd_device, &mxc_w1_master_device, - &mxc_fec_device, &pcm038_sram_mtd_device, }; @@ -210,51 +208,6 @@ static void __init pcm038_init_sram(void) __raw_writel(0x22220a00, CSCR_A(1)); } -#ifdef CONFIG_I2C_IMX -static int mxc_i2c1_pins[] = { - PC5_PF_I2C2_SDA, - PC6_PF_I2C2_SCL -}; - -static int pcm038_i2c_1_init(struct device *dev) -{ - return mxc_gpio_setup_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins), - "I2C1"); -} - -static void pcm038_i2c_1_exit(struct device *dev) -{ - mxc_gpio_release_multiple_pins(mxc_i2c1_pins, ARRAY_SIZE(mxc_i2c1_pins)); -} - -static struct imxi2c_platform_data pcm038_i2c_1_data = { - .bitrate = 100000, - .init = pcm038_i2c_1_init, - .exit = pcm038_i2c_1_exit, -}; - -static struct at24_platform_data board_eeprom = { - .byte_len = 4096, - .page_size = 32, - .flags = AT24_FLAG_ADDR16, -}; - -static struct i2c_board_info pcm038_i2c_devices[] = { - [0] = { - I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ - .platform_data = &board_eeprom, - }, - [1] = { - I2C_BOARD_INFO("rtc-pcf8563", 0x51), - .type = "pcf8563" - }, - [2] = { - I2C_BOARD_INFO("lm75", 0x4a), - .type = "lm75" - } -}; -#endif - static void __init pcm038_init(void) { gpio_fec_active(); @@ -264,17 +217,9 @@ static void __init pcm038_init(void) mxc_register_device(&mxc_uart_device1, &uart_pdata[1]); mxc_register_device(&mxc_uart_device2, &uart_pdata[2]); - mxc_gpio_mode(PE16_AF_OWIRE); + mxc_gpio_mode(PE16_AF_RTCK); /* OWIRE */ mxc_register_device(&mxc_nand_device, &pcm038_nand_board_info); -#ifdef CONFIG_I2C_IMX - /* only the i2c master 1 is used on this CPU card */ - i2c_register_board_info(1, pcm038_i2c_devices, - ARRAY_SIZE(pcm038_i2c_devices)); - - mxc_register_device(&mxc_i2c_device1, &pcm038_i2c_1_data); -#endif - platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); #ifdef CONFIG_MACH_PCM970_BASEBOARD @@ -284,10 +229,11 @@ static void __init pcm038_init(void) static void __init pcm038_timer_init(void) { - mx27_clocks_init(26000000); + mxc_clocks_init(26000000); + mxc_timer_init("gpt_clk.0"); } -static struct sys_timer pcm038_timer = { +struct sys_timer pcm038_timer = { .init = pcm038_timer_init, }; diff --git a/trunk/arch/arm/mach-mx2/pcm970-baseboard.c b/trunk/arch/arm/mach-mx2/pcm970-baseboard.c index bf4e520bc1bc..a560cd6ad23d 100644 --- a/trunk/arch/arm/mach-mx2/pcm970-baseboard.c +++ b/trunk/arch/arm/mach-mx2/pcm970-baseboard.c @@ -17,137 +17,8 @@ */ #include -#include -#include - -#include - #include -#include -#include -#include -#include - -#include "devices.h" - -static int pcm970_sdhc2_get_ro(struct device *dev) -{ - return gpio_get_value(GPIO_PORTC + 28); -} - -static int pcm970_sdhc2_pins[] = { - PB4_PF_SD2_D0, - PB5_PF_SD2_D1, - PB6_PF_SD2_D2, - PB7_PF_SD2_D3, - PB8_PF_SD2_CMD, - PB9_PF_SD2_CLK, -}; - -static int pcm970_sdhc2_init(struct device *dev, irq_handler_t detect_irq, void *data) -{ - int ret; - - ret = mxc_gpio_setup_multiple_pins(pcm970_sdhc2_pins, - ARRAY_SIZE(pcm970_sdhc2_pins), "sdhc2"); - if(ret) - return ret; - - ret = request_irq(IRQ_GPIOC(29), detect_irq, 0, - "imx-mmc-detect", data); - if (ret) - goto out_release_gpio; - - set_irq_type(IRQ_GPIOC(29), IRQF_TRIGGER_FALLING); - - ret = gpio_request(GPIO_PORTC + 28, "imx-mmc-ro"); - if (ret) - goto out_release_gpio; - - mxc_gpio_mode((GPIO_PORTC | 28) | GPIO_GPIO | GPIO_IN); - gpio_direction_input(GPIO_PORTC + 28); - - return 0; - -out_release_gpio: - mxc_gpio_release_multiple_pins(pcm970_sdhc2_pins, - ARRAY_SIZE(pcm970_sdhc2_pins)); - return ret; -} - -static void pcm970_sdhc2_exit(struct device *dev, void *data) -{ - free_irq(IRQ_GPIOC(29), data); - gpio_free(GPIO_PORTC + 28); - mxc_gpio_release_multiple_pins(pcm970_sdhc2_pins, - ARRAY_SIZE(pcm970_sdhc2_pins)); -} - -static struct imxmmc_platform_data sdhc_pdata = { - .get_ro = pcm970_sdhc2_get_ro, - .init = pcm970_sdhc2_init, - .exit = pcm970_sdhc2_exit, -}; - -static int mxc_fb_pins[] = { - PA5_PF_LSCLK, PA6_PF_LD0, PA7_PF_LD1, PA8_PF_LD2, - PA9_PF_LD3, PA10_PF_LD4, PA11_PF_LD5, PA12_PF_LD6, - PA13_PF_LD7, PA14_PF_LD8, PA15_PF_LD9, PA16_PF_LD10, - PA17_PF_LD11, PA18_PF_LD12, PA19_PF_LD13, PA20_PF_LD14, - PA21_PF_LD15, PA22_PF_LD16, PA23_PF_LD17, PA24_PF_REV, - PA25_PF_CLS, PA26_PF_PS, PA27_PF_SPL_SPR, PA28_PF_HSYNC, - PA29_PF_VSYNC, PA30_PF_CONTRAST, PA31_PF_OE_ACD -}; - -static int pcm038_fb_init(struct platform_device *pdev) -{ - return mxc_gpio_setup_multiple_pins(mxc_fb_pins, - ARRAY_SIZE(mxc_fb_pins), "FB"); -} - -static int pcm038_fb_exit(struct platform_device *pdev) -{ - mxc_gpio_release_multiple_pins(mxc_fb_pins, ARRAY_SIZE(mxc_fb_pins)); - - return 0; -} - -/* - * Connected is a portrait Sharp-QVGA display - * of type: LQ035Q7DH06 - */ -static struct imx_fb_platform_data pcm038_fb_data = { - .pixclock = 188679, /* in ps (5.3MHz) */ - .xres = 240, - .yres = 320, - - .bpp = 16, - .hsync_len = 7, - .left_margin = 5, - .right_margin = 16, - - .vsync_len = 1, - .upper_margin = 7, - .lower_margin = 9, - .fixed_screen_cpu = 0, - - /* - * - HSYNC active high - * - VSYNC active high - * - clk notenabled while idle - * - clock not inverted - * - data not inverted - * - data enable low active - * - enable sharp mode - */ - .pcr = 0xFA0080C0, - .pwmr = 0x00A903FF, - .lscr1 = 0x00120300, - .dmacr = 0x00020010, - - .init = pcm038_fb_init, - .exit = pcm038_fb_exit, -}; +#include /* * system init for baseboard usage. Will be called by pcm038 init. @@ -157,6 +28,4 @@ static struct imx_fb_platform_data pcm038_fb_data = { */ void __init pcm970_baseboard_init(void) { - mxc_register_device(&mxc_fb_device, &pcm038_fb_data); - mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata); } diff --git a/trunk/arch/arm/mach-mx2/serial.c b/trunk/arch/arm/mach-mx2/serial.c index 40a485cdc10e..16debc296dad 100644 --- a/trunk/arch/arm/mach-mx2/serial.c +++ b/trunk/arch/arm/mach-mx2/serial.c @@ -22,7 +22,6 @@ #include #include #include -#include "devices.h" static struct resource uart0[] = { { @@ -100,7 +99,6 @@ struct platform_device mxc_uart_device3 = { .num_resources = ARRAY_SIZE(uart3), }; -#ifdef CONFIG_MACH_MX27 static struct resource uart4[] = { { .start = UART5_BASE_ADDR, @@ -138,4 +136,3 @@ struct platform_device mxc_uart_device5 = { .resource = uart5, .num_resources = ARRAY_SIZE(uart5), }; -#endif diff --git a/trunk/arch/arm/mach-mx2/system.c b/trunk/arch/arm/mach-mx2/system.c index 92c79d4bd162..7b8269719d11 100644 --- a/trunk/arch/arm/mach-mx2/system.c +++ b/trunk/arch/arm/mach-mx2/system.c @@ -46,7 +46,7 @@ void arch_idle(void) /* * Reset the system. It is called by machine_restart(). */ -void arch_reset(char mode, const char *cmd) +void arch_reset(char mode) { struct clk *clk; diff --git a/trunk/arch/arm/mach-mx3/Kconfig b/trunk/arch/arm/mach-mx3/Kconfig index d6235583e979..e79659e8176e 100644 --- a/trunk/arch/arm/mach-mx3/Kconfig +++ b/trunk/arch/arm/mach-mx3/Kconfig @@ -1,40 +1,21 @@ -if ARCH_MX3 - -config ARCH_MX31 - bool - -config ARCH_MX35 - bool - -comment "MX3 platforms:" +menu "MX3 Options" + depends on ARCH_MX3 config MACH_MX31ADS bool "Support MX31ADS platforms" - select ARCH_MX31 default y help Include support for MX31ADS platform. This includes specific configurations for the board and its peripherals. -config MACH_MX31ADS_WM1133_EV1 - bool "Support Wolfson Microelectronics 1133-EV1 module" - depends on MACH_MX31ADS - select MFD_WM8350_CONFIG_MODE_0 - select MFD_WM8352_CONFIG_MODE_0 - help - Include support for the Wolfson Microelectronics 1133-EV1 PMU - and audio module for the MX31ADS platform. - config MACH_PCM037 - bool "Support Phytec pcm037 (i.MX31) platforms" - select ARCH_MX31 + bool "Support Phytec pcm037 platforms" help Include support for Phytec pcm037 platform. This includes specific configurations for the board and its peripherals. config MACH_MX31LITE bool "Support MX31 LITEKIT (LogicPD)" - select ARCH_MX31 default n help Include support for MX31 LITEKIT platform. This includes specific @@ -42,7 +23,6 @@ config MACH_MX31LITE config MACH_MX31_3DS bool "Support MX31PDK (3DS)" - select ARCH_MX31 default n help Include support for MX31PDK (3DS) platform. This includes specific @@ -50,18 +30,10 @@ config MACH_MX31_3DS config MACH_MX31MOBOARD bool "Support mx31moboard platforms (EPFL Mobots group)" - select ARCH_MX31 default n help Include support for mx31moboard platform. This includes specific configurations for the board and its peripherals. -config MACH_QONG - bool "Support Dave/DENX QongEVB-LITE platform" - select ARCH_MX31 - default n - help - Include support for Dave/DENX QongEVB-LITE platform. This includes - specific configurations for the board and its peripherals. +endmenu -endif diff --git a/trunk/arch/arm/mach-mx3/Makefile b/trunk/arch/arm/mach-mx3/Makefile index 272c8a953b30..5a151540fe83 100644 --- a/trunk/arch/arm/mach-mx3/Makefile +++ b/trunk/arch/arm/mach-mx3/Makefile @@ -4,13 +4,9 @@ # Object file lists. -obj-y := mm.o devices.o -obj-$(CONFIG_ARCH_MX31) += clock.o iomux.o -obj-$(CONFIG_ARCH_MX35) += clock-imx35.o +obj-y := mm.o clock.o devices.o iomux.o obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o obj-$(CONFIG_MACH_PCM037) += pcm037.o obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o -obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \ - mx31moboard-marxbot.o -obj-$(CONFIG_MACH_QONG) += qong.o +obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o diff --git a/trunk/arch/arm/mach-mx3/clock-imx35.c b/trunk/arch/arm/mach-mx3/clock-imx35.c deleted file mode 100644 index 53a112d4e04a..000000000000 --- a/trunk/arch/arm/mach-mx3/clock-imx35.c +++ /dev/null @@ -1,487 +0,0 @@ -/* - * Copyright (C) 2009 by Sascha Hauer, Pengutronix - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, - * MA 02110-1301, USA. - */ - -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#define CCM_BASE IO_ADDRESS(CCM_BASE_ADDR) - -#define CCM_CCMR 0x00 -#define CCM_PDR0 0x04 -#define CCM_PDR1 0x08 -#define CCM_PDR2 0x0C -#define CCM_PDR3 0x10 -#define CCM_PDR4 0x14 -#define CCM_RCSR 0x18 -#define CCM_MPCTL 0x1C -#define CCM_PPCTL 0x20 -#define CCM_ACMR 0x24 -#define CCM_COSR 0x28 -#define CCM_CGR0 0x2C -#define CCM_CGR1 0x30 -#define CCM_CGR2 0x34 -#define CCM_CGR3 0x38 - -#ifdef HAVE_SET_RATE_SUPPORT -static void calc_dividers(u32 div, u32 *pre, u32 *post, u32 maxpost) -{ - u32 min_pre, temp_pre, old_err, err; - - min_pre = (div - 1) / maxpost + 1; - old_err = 8; - - for (temp_pre = 8; temp_pre >= min_pre; temp_pre--) { - if (div > (temp_pre * maxpost)) - break; - - if (div < (temp_pre * temp_pre)) - continue; - - err = div % temp_pre; - - if (err == 0) { - *pre = temp_pre; - break; - } - - err = temp_pre - err; - - if (err < old_err) { - old_err = err; - *pre = temp_pre; - } - } - - *post = (div + *pre - 1) / *pre; -} - -/* get the best values for a 3-bit divider combined with a 6-bit divider */ -static void calc_dividers_3_6(u32 div, u32 *pre, u32 *post) -{ - if (div >= 512) { - *pre = 8; - *post = 64; - } else if (div >= 64) { - calc_dividers(div, pre, post, 64); - } else if (div <= 8) { - *pre = div; - *post = 1; - } else { - *pre = 1; - *post = div; - } -} - -/* get the best values for two cascaded 3-bit dividers */ -static void calc_dividers_3_3(u32 div, u32 *pre, u32 *post) -{ - if (div >= 64) { - *pre = *post = 8; - } else if (div > 8) { - calc_dividers(div, pre, post, 8); - } else { - *pre = 1; - *post = div; - } -} -#endif - -static unsigned long get_rate_mpll(void) -{ - ulong mpctl = __raw_readl(CCM_BASE + CCM_MPCTL); - - return mxc_decode_pll(mpctl, 24000000); -} - -static unsigned long get_rate_ppll(void) -{ - ulong ppctl = __raw_readl(CCM_BASE + CCM_PPCTL); - - return mxc_decode_pll(ppctl, 24000000); -} - -struct arm_ahb_div { - unsigned char arm, ahb, sel; -}; - -static struct arm_ahb_div clk_consumer[] = { - { .arm = 1, .ahb = 4, .sel = 0}, - { .arm = 1, .ahb = 3, .sel = 1}, - { .arm = 2, .ahb = 2, .sel = 0}, - { .arm = 0, .ahb = 0, .sel = 0}, - { .arm = 0, .ahb = 0, .sel = 0}, - { .arm = 0, .ahb = 0, .sel = 0}, - { .arm = 4, .ahb = 1, .sel = 0}, - { .arm = 1, .ahb = 5, .sel = 0}, - { .arm = 1, .ahb = 8, .sel = 0}, - { .arm = 1, .ahb = 6, .sel = 1}, - { .arm = 2, .ahb = 4, .sel = 0}, - { .arm = 0, .ahb = 0, .sel = 0}, - { .arm = 0, .ahb = 0, .sel = 0}, - { .arm = 0, .ahb = 0, .sel = 0}, - { .arm = 4, .ahb = 2, .sel = 0}, - { .arm = 0, .ahb = 0, .sel = 0}, -}; - -static struct arm_ahb_div clk_automotive[] = { - { .arm = 1, .ahb = 3, .sel = 0}, - { .arm = 1, .ahb = 2, .sel = 1}, - { .arm = 2, .ahb = 1, .sel = 1}, - { .arm = 0, .ahb = 0, .sel = 0}, - { .arm = 1, .ahb = 6, .sel = 0}, - { .arm = 1, .ahb = 4, .sel = 1}, - { .arm = 2, .ahb = 2, .sel = 1}, - { .arm = 0, .ahb = 0, .sel = 0}, -}; - -static unsigned long get_rate_arm(void) -{ - unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); - struct arm_ahb_div *aad; - unsigned long fref = get_rate_mpll(); - - if (pdr0 & 1) { - /* consumer path */ - aad = &clk_consumer[(pdr0 >> 16) & 0xf]; - if (aad->sel) - fref = fref * 2 / 3; - } else { - /* auto path */ - aad = &clk_automotive[(pdr0 >> 9) & 0x7]; - if (aad->sel) - fref = fref * 3 / 4; - } - return fref / aad->arm; -} - -static unsigned long get_rate_ahb(struct clk *clk) -{ - unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); - struct arm_ahb_div *aad; - unsigned long fref = get_rate_mpll(); - - if (pdr0 & 1) - /* consumer path */ - aad = &clk_consumer[(pdr0 >> 16) & 0xf]; - else - /* auto path */ - aad = &clk_automotive[(pdr0 >> 9) & 0x7]; - - return fref / aad->ahb; -} - -static unsigned long get_rate_ipg(struct clk *clk) -{ - return get_rate_ahb(NULL) >> 1; -} - -static unsigned long get_3_3_div(unsigned long in) -{ - return (((in >> 3) & 0x7) + 1) * ((in & 0x7) + 1); -} - -static unsigned long get_rate_uart(struct clk *clk) -{ - unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); - unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); - unsigned long div = get_3_3_div(pdr4 >> 10); - - if (pdr3 & (1 << 14)) - return get_rate_arm() / div; - else - return get_rate_ppll() / div; -} - -static unsigned long get_rate_sdhc(struct clk *clk) -{ - unsigned long pdr3 = __raw_readl(CCM_BASE + CCM_PDR3); - unsigned long div, rate; - - if (pdr3 & (1 << 6)) - rate = get_rate_arm(); - else - rate = get_rate_ppll(); - - switch (clk->id) { - default: - case 0: - div = pdr3 & 0x3f; - break; - case 1: - div = (pdr3 >> 8) & 0x3f; - break; - case 2: - div = (pdr3 >> 16) & 0x3f; - break; - } - - return rate / get_3_3_div(div); -} - -static unsigned long get_rate_mshc(struct clk *clk) -{ - unsigned long pdr1 = __raw_readl(CCM_BASE + CCM_PDR1); - unsigned long div1, div2, rate; - - if (pdr1 & (1 << 7)) - rate = get_rate_arm(); - else - rate = get_rate_ppll(); - - div1 = (pdr1 >> 29) & 0x7; - div2 = (pdr1 >> 22) & 0x3f; - - return rate / ((div1 + 1) * (div2 + 1)); -} - -static unsigned long get_rate_ssi(struct clk *clk) -{ - unsigned long pdr2 = __raw_readl(CCM_BASE + CCM_PDR2); - unsigned long div1, div2, rate; - - if (pdr2 & (1 << 6)) - rate = get_rate_arm(); - else - rate = get_rate_ppll(); - - switch (clk->id) { - default: - case 0: - div1 = pdr2 & 0x3f; - div2 = (pdr2 >> 24) & 0x7; - break; - case 1: - div1 = (pdr2 >> 8) & 0x3f; - div2 = (pdr2 >> 27) & 0x7; - break; - } - - return rate / ((div1 + 1) * (div2 + 1)); -} - -static unsigned long get_rate_csi(struct clk *clk) -{ - unsigned long pdr2 = __raw_readl(CCM_BASE + CCM_PDR2); - unsigned long rate; - - if (pdr2 & (1 << 7)) - rate = get_rate_arm(); - else - rate = get_rate_ppll(); - - return rate / get_3_3_div((pdr2 >> 16) & 0x3f); -} - -static unsigned long get_rate_ipg_per(struct clk *clk) -{ - unsigned long pdr0 = __raw_readl(CCM_BASE + CCM_PDR0); - unsigned long pdr4 = __raw_readl(CCM_BASE + CCM_PDR4); - unsigned long div1, div2; - - if (pdr0 & (1 << 26)) { - div1 = (pdr4 >> 19) & 0x7; - div2 = (pdr4 >> 16) & 0x7; - return get_rate_arm() / ((div1 + 1) * (div2 + 1)); - } else { - div1 = (pdr0 >> 12) & 0x7; - return get_rate_ahb(NULL) / div1; - } -} - -static int clk_cgr_enable(struct clk *clk) -{ - u32 reg; - - reg = __raw_readl(clk->enable_reg); - reg |= 3 << clk->enable_shift; - __raw_writel(reg, clk->enable_reg); - - return 0; -} - -static void clk_cgr_disable(struct clk *clk) -{ - u32 reg; - - reg = __raw_readl(clk->enable_reg); - reg &= ~(3 << clk->enable_shift); - __raw_writel(reg, clk->enable_reg); -} - -#define DEFINE_CLOCK(name, i, er, es, gr, sr) \ - static struct clk name = { \ - .id = i, \ - .enable_reg = CCM_BASE + er, \ - .enable_shift = es, \ - .get_rate = gr, \ - .set_rate = sr, \ - .enable = clk_cgr_enable, \ - .disable = clk_cgr_disable, \ - } - -DEFINE_CLOCK(asrc_clk, 0, CCM_CGR0, 0, NULL, NULL); -DEFINE_CLOCK(ata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL); -DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0, 4, NULL, NULL); -DEFINE_CLOCK(can1_clk, 0, CCM_CGR0, 6, get_rate_ipg, NULL); -DEFINE_CLOCK(can2_clk, 1, CCM_CGR0, 8, get_rate_ipg, NULL); -DEFINE_CLOCK(cspi1_clk, 0, CCM_CGR0, 10, get_rate_ipg, NULL); -DEFINE_CLOCK(cspi2_clk, 1, CCM_CGR0, 12, get_rate_ipg, NULL); -DEFINE_CLOCK(ect_clk, 0, CCM_CGR0, 14, get_rate_ipg, NULL); -DEFINE_CLOCK(edio_clk, 0, CCM_CGR0, 16, NULL, NULL); -DEFINE_CLOCK(emi_clk, 0, CCM_CGR0, 18, get_rate_ipg, NULL); -DEFINE_CLOCK(epit1_clk, 0, CCM_CGR0, 20, get_rate_ipg_per, NULL); -DEFINE_CLOCK(epit2_clk, 1, CCM_CGR0, 22, get_rate_ipg_per, NULL); -DEFINE_CLOCK(esai_clk, 0, CCM_CGR0, 24, NULL, NULL); -DEFINE_CLOCK(esdhc1_clk, 0, CCM_CGR0, 26, get_rate_sdhc, NULL); -DEFINE_CLOCK(esdhc2_clk, 1, CCM_CGR0, 28, get_rate_sdhc, NULL); -DEFINE_CLOCK(esdhc3_clk, 2, CCM_CGR0, 30, get_rate_sdhc, NULL); - -DEFINE_CLOCK(fec_clk, 0, CCM_CGR1, 0, get_rate_ipg, NULL); -DEFINE_CLOCK(gpio1_clk, 0, CCM_CGR1, 2, NULL, NULL); -DEFINE_CLOCK(gpio2_clk, 1, CCM_CGR1, 4, NULL, NULL); -DEFINE_CLOCK(gpio3_clk, 2, CCM_CGR1, 6, NULL, NULL); -DEFINE_CLOCK(gpt_clk, 0, CCM_CGR1, 8, get_rate_ipg, NULL); -DEFINE_CLOCK(i2c1_clk, 0, CCM_CGR1, 10, get_rate_ipg_per, NULL); -DEFINE_CLOCK(i2c2_clk, 1, CCM_CGR1, 12, get_rate_ipg_per, NULL); -DEFINE_CLOCK(i2c3_clk, 2, CCM_CGR1, 14, get_rate_ipg_per, NULL); -DEFINE_CLOCK(iomuxc_clk, 0, CCM_CGR1, 16, NULL, NULL); -DEFINE_CLOCK(ipu_clk, 0, CCM_CGR1, 18, NULL, NULL); -DEFINE_CLOCK(kpp_clk, 0, CCM_CGR1, 20, get_rate_ipg, NULL); -DEFINE_CLOCK(mlb_clk, 0, CCM_CGR1, 22, get_rate_ahb, NULL); -DEFINE_CLOCK(mshc_clk, 0, CCM_CGR1, 24, get_rate_mshc, NULL); -DEFINE_CLOCK(owire_clk, 0, CCM_CGR1, 26, get_rate_ipg_per, NULL); -DEFINE_CLOCK(pwm_clk, 0, CCM_CGR1, 28, get_rate_ipg_per, NULL); -DEFINE_CLOCK(rngc_clk, 0, CCM_CGR1, 30, get_rate_ipg, NULL); - -DEFINE_CLOCK(rtc_clk, 0, CCM_CGR2, 0, get_rate_ipg, NULL); -DEFINE_CLOCK(rtic_clk, 0, CCM_CGR2, 2, get_rate_ahb, NULL); -DEFINE_CLOCK(scc_clk, 0, CCM_CGR2, 4, get_rate_ipg, NULL); -DEFINE_CLOCK(sdma_clk, 0, CCM_CGR2, 6, NULL, NULL); -DEFINE_CLOCK(spba_clk, 0, CCM_CGR2, 8, get_rate_ipg, NULL); -DEFINE_CLOCK(spdif_clk, 0, CCM_CGR2, 10, NULL, NULL); -DEFINE_CLOCK(ssi1_clk, 0, CCM_CGR2, 12, get_rate_ssi, NULL); -DEFINE_CLOCK(ssi2_clk, 1, CCM_CGR2, 14, get_rate_ssi, NULL); -DEFINE_CLOCK(uart1_clk, 0, CCM_CGR2, 16, get_rate_uart, NULL); -DEFINE_CLOCK(uart2_clk, 1, CCM_CGR2, 18, get_rate_uart, NULL); -DEFINE_CLOCK(uart3_clk, 2, CCM_CGR2, 20, get_rate_uart, NULL); -DEFINE_CLOCK(usbotg_clk, 0, CCM_CGR2, 22, NULL, NULL); -DEFINE_CLOCK(wdog_clk, 0, CCM_CGR2, 24, NULL, NULL); -DEFINE_CLOCK(max_clk, 0, CCM_CGR2, 26, NULL, NULL); -DEFINE_CLOCK(admux_clk, 0, CCM_CGR2, 30, NULL, NULL); - -DEFINE_CLOCK(csi_clk, 0, CCM_CGR3, 0, get_rate_csi, NULL); -DEFINE_CLOCK(iim_clk, 0, CCM_CGR3, 2, NULL, NULL); -DEFINE_CLOCK(gpu2d_clk, 0, CCM_CGR3, 4, NULL, NULL); - -#define _REGISTER_CLOCK(d, n, c) \ - { \ - .dev_id = d, \ - .con_id = n, \ - .clk = &c, \ - }, - -static struct clk_lookup lookups[] __initdata = { - _REGISTER_CLOCK(NULL, "asrc", asrc_clk) - _REGISTER_CLOCK(NULL, "ata", ata_clk) - _REGISTER_CLOCK(NULL, "audmux", audmux_clk) - _REGISTER_CLOCK(NULL, "can", can1_clk) - _REGISTER_CLOCK(NULL, "can", can2_clk) - _REGISTER_CLOCK("spi_imx.0", NULL, cspi1_clk) - _REGISTER_CLOCK("spi_imx.1", NULL, cspi2_clk) - _REGISTER_CLOCK(NULL, "ect", ect_clk) - _REGISTER_CLOCK(NULL, "edio", edio_clk) - _REGISTER_CLOCK(NULL, "emi", emi_clk) - _REGISTER_CLOCK(NULL, "epit", epit1_clk) - _REGISTER_CLOCK(NULL, "epit", epit2_clk) - _REGISTER_CLOCK(NULL, "esai", esai_clk) - _REGISTER_CLOCK(NULL, "sdhc", esdhc1_clk) - _REGISTER_CLOCK(NULL, "sdhc", esdhc2_clk) - _REGISTER_CLOCK(NULL, "sdhc", esdhc3_clk) - _REGISTER_CLOCK("fec.0", NULL, fec_clk) - _REGISTER_CLOCK(NULL, "gpio", gpio1_clk) - _REGISTER_CLOCK(NULL, "gpio", gpio2_clk) - _REGISTER_CLOCK(NULL, "gpio", gpio3_clk) - _REGISTER_CLOCK("gpt.0", NULL, gpt_clk) - _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) - _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) - _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk) - _REGISTER_CLOCK(NULL, "iomuxc", iomuxc_clk) - _REGISTER_CLOCK(NULL, "ipu", ipu_clk) - _REGISTER_CLOCK(NULL, "kpp", kpp_clk) - _REGISTER_CLOCK(NULL, "mlb", mlb_clk) - _REGISTER_CLOCK(NULL, "mshc", mshc_clk) - _REGISTER_CLOCK("mxc_w1", NULL, owire_clk) - _REGISTER_CLOCK(NULL, "pwm", pwm_clk) - _REGISTER_CLOCK(NULL, "rngc", rngc_clk) - _REGISTER_CLOCK(NULL, "rtc", rtc_clk) - _REGISTER_CLOCK(NULL, "rtic", rtic_clk) - _REGISTER_CLOCK(NULL, "scc", scc_clk) - _REGISTER_CLOCK(NULL, "sdma", sdma_clk) - _REGISTER_CLOCK(NULL, "spba", spba_clk) - _REGISTER_CLOCK(NULL, "spdif", spdif_clk) - _REGISTER_CLOCK(NULL, "ssi", ssi1_clk) - _REGISTER_CLOCK(NULL, "ssi", ssi2_clk) - _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) - _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) - _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) - _REGISTER_CLOCK(NULL, "usbotg", usbotg_clk) - _REGISTER_CLOCK("mxc_wdt.0", NULL, wdog_clk) - _REGISTER_CLOCK(NULL, "max", max_clk) - _REGISTER_CLOCK(NULL, "admux", admux_clk) - _REGISTER_CLOCK(NULL, "csi", csi_clk) - _REGISTER_CLOCK(NULL, "iim", iim_clk) - _REGISTER_CLOCK(NULL, "gpu2d", gpu2d_clk) -}; - -int __init mx35_clocks_init() -{ - int i; - unsigned int ll = 0; - - mxc_set_cpu_type(MXC_CPU_MX35); - -#ifdef CONFIG_DEBUG_LL_CONSOLE - ll = (3 << 16); -#endif - - for (i = 0; i < ARRAY_SIZE(lookups); i++) - clkdev_add(&lookups[i]); - - /* Turn off all clocks except the ones we need to survive, namely: - * EMI, GPIO1/2/3, GPT, IOMUX, MAX and eventually uart - */ - __raw_writel((3 << 18), CCM_BASE + CCM_CGR0); - __raw_writel((3 << 2) | (3 << 4) | (3 << 6) | (3 << 8) | (3 << 16), - CCM_BASE + CCM_CGR1); - __raw_writel((3 << 26) | ll, CCM_BASE + CCM_CGR2); - __raw_writel(0, CCM_BASE + CCM_CGR3); - - mxc_timer_init(&gpt_clk); - - return 0; -} - diff --git a/trunk/arch/arm/mach-mx3/clock.c b/trunk/arch/arm/mach-mx3/clock.c index ca46f4801c3d..b1746aae1f89 100644 --- a/trunk/arch/arm/mach-mx3/clock.c +++ b/trunk/arch/arm/mach-mx3/clock.c @@ -23,13 +23,9 @@ #include #include #include - -#include -#include - #include #include -#include +#include #include "crm_regs.h" @@ -68,17 +64,17 @@ static void __calc_pre_post_dividers(u32 div, u32 *pre, u32 *post) } static struct clk mcu_pll_clk; +static struct clk mcu_main_clk; +static struct clk usb_pll_clk; static struct clk serial_pll_clk; static struct clk ipg_clk; static struct clk ckih_clk; +static struct clk ahb_clk; -static int cgr_enable(struct clk *clk) +static int _clk_enable(struct clk *clk) { u32 reg; - if (!clk->enable_reg) - return 0; - reg = __raw_readl(clk->enable_reg); reg |= 3 << clk->enable_shift; __raw_writel(reg, clk->enable_reg); @@ -86,69 +82,133 @@ static int cgr_enable(struct clk *clk) return 0; } -static void cgr_disable(struct clk *clk) +static void _clk_disable(struct clk *clk) { u32 reg; - if (!clk->enable_reg) - return; - reg = __raw_readl(clk->enable_reg); reg &= ~(3 << clk->enable_shift); - - /* special case for EMI clock */ - if (clk->enable_reg == MXC_CCM_CGR2 && clk->enable_shift == 8) - reg |= (1 << clk->enable_shift); - __raw_writel(reg, clk->enable_reg); } -static unsigned long pll_ref_get_rate(void) +static void _clk_emi_disable(struct clk *clk) { - unsigned long ccmr; - unsigned int prcs; + u32 reg; - ccmr = __raw_readl(MXC_CCM_CCMR); - prcs = (ccmr & MXC_CCM_CCMR_PRCS_MASK) >> MXC_CCM_CCMR_PRCS_OFFSET; - if (prcs == 0x1) - return CKIL_CLK_FREQ * 1024; - else - return clk_get_rate(&ckih_clk); + reg = __raw_readl(clk->enable_reg); + reg &= ~(3 << clk->enable_shift); + reg |= (1 << clk->enable_shift); + __raw_writel(reg, clk->enable_reg); } -static unsigned long usb_pll_get_rate(struct clk *clk) +static int _clk_pll_set_rate(struct clk *clk, unsigned long rate) { - unsigned long reg; + u32 reg; + signed long pd = 1; /* Pre-divider */ + signed long mfi; /* Multiplication Factor (Integer part) */ + signed long mfn; /* Multiplication Factor (Integer part) */ + signed long mfd; /* Multiplication Factor (Denominator Part) */ + signed long tmp; + u32 ref_freq = clk_get_rate(clk->parent); - reg = __raw_readl(MXC_CCM_UPCTL); + while (((ref_freq / pd) * 10) > rate) + pd++; - return mxc_decode_pll(reg, pll_ref_get_rate()); -} + if ((ref_freq / pd) < PRE_DIV_MIN_FREQ) + return -EINVAL; -static unsigned long serial_pll_get_rate(struct clk *clk) -{ - unsigned long reg; + /* the ref_freq/2 in the following is to round up */ + mfi = (((rate / 2) * pd) + (ref_freq / 2)) / ref_freq; + if (mfi < 5 || mfi > 15) + return -EINVAL; - reg = __raw_readl(MXC_CCM_SRPCTL); + /* pick a mfd value that will work + * then solve for mfn */ + mfd = ref_freq / 50000; + + /* + * pll_freq * pd * mfd + * mfn = -------------------- - (mfi * mfd) + * 2 * ref_freq + */ + /* the tmp/2 is for rounding */ + tmp = ref_freq / 10000; + mfn = + ((((((rate / 2) + (tmp / 2)) / tmp) * pd) * mfd) / 10000) - + (mfi * mfd); + + mfn = mfn & 0x3ff; + pd--; + mfd--; + + /* Change the Pll value */ + reg = (mfi << MXC_CCM_PCTL_MFI_OFFSET) | + (mfn << MXC_CCM_PCTL_MFN_OFFSET) | + (mfd << MXC_CCM_PCTL_MFD_OFFSET) | (pd << MXC_CCM_PCTL_PD_OFFSET); + + if (clk == &mcu_pll_clk) + __raw_writel(reg, MXC_CCM_MPCTL); + else if (clk == &usb_pll_clk) + __raw_writel(reg, MXC_CCM_UPCTL); + else if (clk == &serial_pll_clk) + __raw_writel(reg, MXC_CCM_SRPCTL); - return mxc_decode_pll(reg, pll_ref_get_rate()); + return 0; } -static unsigned long mcu_pll_get_rate(struct clk *clk) +static unsigned long _clk_pll_get_rate(struct clk *clk) { + long mfi, mfn, mfd, pdf, ref_clk, mfn_abs; unsigned long reg, ccmr; + s64 temp; + unsigned int prcs; ccmr = __raw_readl(MXC_CCM_CCMR); + prcs = (ccmr & MXC_CCM_CCMR_PRCS_MASK) >> MXC_CCM_CCMR_PRCS_OFFSET; + if (prcs == 0x1) + ref_clk = CKIL_CLK_FREQ * 1024; + else + ref_clk = clk_get_rate(&ckih_clk); + + if (clk == &mcu_pll_clk) { + if ((ccmr & MXC_CCM_CCMR_MPE) == 0) + return ref_clk; + if ((ccmr & MXC_CCM_CCMR_MDS) != 0) + return ref_clk; + reg = __raw_readl(MXC_CCM_MPCTL); + } else if (clk == &usb_pll_clk) + reg = __raw_readl(MXC_CCM_UPCTL); + else if (clk == &serial_pll_clk) + reg = __raw_readl(MXC_CCM_SRPCTL); + else { + BUG(); + return 0; + } + + pdf = (reg & MXC_CCM_PCTL_PD_MASK) >> MXC_CCM_PCTL_PD_OFFSET; + mfd = (reg & MXC_CCM_PCTL_MFD_MASK) >> MXC_CCM_PCTL_MFD_OFFSET; + mfi = (reg & MXC_CCM_PCTL_MFI_MASK) >> MXC_CCM_PCTL_MFI_OFFSET; + mfi = (mfi <= 5) ? 5 : mfi; + mfn = mfn_abs = reg & MXC_CCM_PCTL_MFN_MASK; - if (!(ccmr & MXC_CCM_CCMR_MPE) || (ccmr & MXC_CCM_CCMR_MDS)) - return clk_get_rate(&ckih_clk); + if (mfn >= 0x200) { + mfn |= 0xFFFFFE00; + mfn_abs = -mfn; + } + + ref_clk *= 2; + ref_clk /= pdf + 1; - reg = __raw_readl(MXC_CCM_MPCTL); + temp = (u64) ref_clk * mfn_abs; + do_div(temp, mfd + 1); + if (mfn < 0) + temp = -temp; + temp = (ref_clk * mfi) + temp; - return mxc_decode_pll(reg, pll_ref_get_rate()); + return temp; } -static int usb_pll_enable(struct clk *clk) +static int _clk_usb_pll_enable(struct clk *clk) { u32 reg; @@ -162,7 +222,7 @@ static int usb_pll_enable(struct clk *clk) return 0; } -static void usb_pll_disable(struct clk *clk) +static void _clk_usb_pll_disable(struct clk *clk) { u32 reg; @@ -171,7 +231,7 @@ static void usb_pll_disable(struct clk *clk) __raw_writel(reg, MXC_CCM_CCMR); } -static int serial_pll_enable(struct clk *clk) +static int _clk_serial_pll_enable(struct clk *clk) { u32 reg; @@ -185,7 +245,7 @@ static int serial_pll_enable(struct clk *clk) return 0; } -static void serial_pll_disable(struct clk *clk) +static void _clk_serial_pll_disable(struct clk *clk) { u32 reg; @@ -198,7 +258,7 @@ static void serial_pll_disable(struct clk *clk) #define PDR1(mask, off) ((__raw_readl(MXC_CCM_PDR1) & mask) >> off) #define PDR2(mask, off) ((__raw_readl(MXC_CCM_PDR2) & mask) >> off) -static unsigned long mcu_main_get_rate(struct clk *clk) +static unsigned long _clk_mcu_main_get_rate(struct clk *clk) { u32 pmcr0 = __raw_readl(MXC_CCM_PMCR0); @@ -208,7 +268,7 @@ static unsigned long mcu_main_get_rate(struct clk *clk) return clk_get_rate(&mcu_pll_clk); } -static unsigned long ahb_get_rate(struct clk *clk) +static unsigned long _clk_hclk_get_rate(struct clk *clk) { unsigned long max_pdf; @@ -217,7 +277,7 @@ static unsigned long ahb_get_rate(struct clk *clk) return clk_get_rate(clk->parent) / (max_pdf + 1); } -static unsigned long ipg_get_rate(struct clk *clk) +static unsigned long _clk_ipg_get_rate(struct clk *clk) { unsigned long ipg_pdf; @@ -226,7 +286,7 @@ static unsigned long ipg_get_rate(struct clk *clk) return clk_get_rate(clk->parent) / (ipg_pdf + 1); } -static unsigned long nfc_get_rate(struct clk *clk) +static unsigned long _clk_nfc_get_rate(struct clk *clk) { unsigned long nfc_pdf; @@ -235,7 +295,7 @@ static unsigned long nfc_get_rate(struct clk *clk) return clk_get_rate(clk->parent) / (nfc_pdf + 1); } -static unsigned long hsp_get_rate(struct clk *clk) +static unsigned long _clk_hsp_get_rate(struct clk *clk) { unsigned long hsp_pdf; @@ -244,7 +304,7 @@ static unsigned long hsp_get_rate(struct clk *clk) return clk_get_rate(clk->parent) / (hsp_pdf + 1); } -static unsigned long usb_get_rate(struct clk *clk) +static unsigned long _clk_usb_get_rate(struct clk *clk) { unsigned long usb_pdf, usb_prepdf; @@ -255,7 +315,7 @@ static unsigned long usb_get_rate(struct clk *clk) return clk_get_rate(clk->parent) / (usb_prepdf + 1) / (usb_pdf + 1); } -static unsigned long csi_get_rate(struct clk *clk) +static unsigned long _clk_csi_get_rate(struct clk *clk) { u32 reg, pre, post; @@ -269,7 +329,7 @@ static unsigned long csi_get_rate(struct clk *clk) return clk_get_rate(clk->parent) / (pre * post); } -static unsigned long csi_round_rate(struct clk *clk, unsigned long rate) +static unsigned long _clk_csi_round_rate(struct clk *clk, unsigned long rate) { u32 pre, post, parent = clk_get_rate(clk->parent); u32 div = parent / rate; @@ -282,7 +342,7 @@ static unsigned long csi_round_rate(struct clk *clk, unsigned long rate) return parent / (pre * post); } -static int csi_set_rate(struct clk *clk, unsigned long rate) +static int _clk_csi_set_rate(struct clk *clk, unsigned long rate) { u32 reg, div, pre, post, parent = clk_get_rate(clk->parent); @@ -303,7 +363,16 @@ static int csi_set_rate(struct clk *clk, unsigned long rate) return 0; } -static unsigned long ssi1_get_rate(struct clk *clk) +static unsigned long _clk_per_get_rate(struct clk *clk) +{ + unsigned long per_pdf; + + per_pdf = PDR0(MXC_CCM_PDR0_PER_PODF_MASK, + MXC_CCM_PDR0_PER_PODF_OFFSET); + return clk_get_rate(clk->parent) / (per_pdf + 1); +} + +static unsigned long _clk_ssi1_get_rate(struct clk *clk) { unsigned long ssi1_pdf, ssi1_prepdf; @@ -314,7 +383,7 @@ static unsigned long ssi1_get_rate(struct clk *clk) return clk_get_rate(clk->parent) / (ssi1_prepdf + 1) / (ssi1_pdf + 1); } -static unsigned long ssi2_get_rate(struct clk *clk) +static unsigned long _clk_ssi2_get_rate(struct clk *clk) { unsigned long ssi2_pdf, ssi2_prepdf; @@ -325,7 +394,7 @@ static unsigned long ssi2_get_rate(struct clk *clk) return clk_get_rate(clk->parent) / (ssi2_prepdf + 1) / (ssi2_pdf + 1); } -static unsigned long firi_get_rate(struct clk *clk) +static unsigned long _clk_firi_get_rate(struct clk *clk) { unsigned long firi_pdf, firi_prepdf; @@ -336,7 +405,7 @@ static unsigned long firi_get_rate(struct clk *clk) return clk_get_rate(clk->parent) / (firi_prepdf + 1) / (firi_pdf + 1); } -static unsigned long firi_round_rate(struct clk *clk, unsigned long rate) +static unsigned long _clk_firi_round_rate(struct clk *clk, unsigned long rate) { u32 pre, post; u32 parent = clk_get_rate(clk->parent); @@ -351,7 +420,7 @@ static unsigned long firi_round_rate(struct clk *clk, unsigned long rate) } -static int firi_set_rate(struct clk *clk, unsigned long rate) +static int _clk_firi_set_rate(struct clk *clk, unsigned long rate) { u32 reg, div, pre, post, parent = clk_get_rate(clk->parent); @@ -372,12 +441,12 @@ static int firi_set_rate(struct clk *clk, unsigned long rate) return 0; } -static unsigned long mbx_get_rate(struct clk *clk) +static unsigned long _clk_mbx_get_rate(struct clk *clk) { return clk_get_rate(clk->parent) / 2; } -static unsigned long mstick1_get_rate(struct clk *clk) +static unsigned long _clk_mstick1_get_rate(struct clk *clk) { unsigned long msti_pdf; @@ -386,7 +455,7 @@ static unsigned long mstick1_get_rate(struct clk *clk) return clk_get_rate(clk->parent) / (msti_pdf + 1); } -static unsigned long mstick2_get_rate(struct clk *clk) +static unsigned long _clk_mstick2_get_rate(struct clk *clk) { unsigned long msti_pdf; @@ -403,185 +472,661 @@ static unsigned long clk_ckih_get_rate(struct clk *clk) } static struct clk ckih_clk = { + .name = "ckih", .get_rate = clk_ckih_get_rate, }; +static unsigned long clk_ckil_get_rate(struct clk *clk) +{ + return CKIL_CLK_FREQ; +} + +static struct clk ckil_clk = { + .name = "ckil", + .get_rate = clk_ckil_get_rate, +}; + static struct clk mcu_pll_clk = { + .name = "mcu_pll", .parent = &ckih_clk, - .get_rate = mcu_pll_get_rate, + .set_rate = _clk_pll_set_rate, + .get_rate = _clk_pll_get_rate, }; static struct clk mcu_main_clk = { + .name = "mcu_main_clk", .parent = &mcu_pll_clk, - .get_rate = mcu_main_get_rate, + .get_rate = _clk_mcu_main_get_rate, }; static struct clk serial_pll_clk = { + .name = "serial_pll", .parent = &ckih_clk, - .get_rate = serial_pll_get_rate, - .enable = serial_pll_enable, - .disable = serial_pll_disable, + .set_rate = _clk_pll_set_rate, + .get_rate = _clk_pll_get_rate, + .enable = _clk_serial_pll_enable, + .disable = _clk_serial_pll_disable, }; static struct clk usb_pll_clk = { + .name = "usb_pll", .parent = &ckih_clk, - .get_rate = usb_pll_get_rate, - .enable = usb_pll_enable, - .disable = usb_pll_disable, + .set_rate = _clk_pll_set_rate, + .get_rate = _clk_pll_get_rate, + .enable = _clk_usb_pll_enable, + .disable = _clk_usb_pll_disable, }; static struct clk ahb_clk = { + .name = "ahb_clk", .parent = &mcu_main_clk, - .get_rate = ahb_get_rate, -}; - -#define DEFINE_CLOCK(name, i, er, es, gr, s, p) \ - static struct clk name = { \ - .id = i, \ - .enable_reg = er, \ - .enable_shift = es, \ - .get_rate = gr, \ - .enable = cgr_enable, \ - .disable = cgr_disable, \ - .secondary = s, \ - .parent = p, \ - } + .get_rate = _clk_hclk_get_rate, +}; -#define DEFINE_CLOCK1(name, i, er, es, getsetround, s, p) \ - static struct clk name = { \ - .id = i, \ - .enable_reg = er, \ - .enable_shift = es, \ - .get_rate = getsetround##_get_rate, \ - .set_rate = getsetround##_set_rate, \ - .round_rate = getsetround##_round_rate, \ - .enable = cgr_enable, \ - .disable = cgr_disable, \ - .secondary = s, \ - .parent = p, \ - } +static struct clk per_clk = { + .name = "per_clk", + .parent = &usb_pll_clk, + .get_rate = _clk_per_get_rate, +}; + +static struct clk perclk_clk = { + .name = "perclk_clk", + .parent = &ipg_clk, +}; + +static struct clk cspi_clk[] = { + { + .name = "cspi_clk", + .id = 0, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_CSPI1_OFFSET, + .disable = _clk_disable,}, + { + .name = "cspi_clk", + .id = 1, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_CSPI2_OFFSET, + .disable = _clk_disable,}, + { + .name = "cspi_clk", + .id = 2, + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_CSPI3_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk ipg_clk = { + .name = "ipg_clk", + .parent = &ahb_clk, + .get_rate = _clk_ipg_get_rate, +}; + +static struct clk emi_clk = { + .name = "emi_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_EMI_OFFSET, + .disable = _clk_emi_disable, +}; + +static struct clk gpt_clk = { + .name = "gpt_clk", + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_GPT_OFFSET, + .disable = _clk_disable, +}; + +static struct clk pwm_clk = { + .name = "pwm_clk", + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR1_PWM_OFFSET, + .disable = _clk_disable, +}; + +static struct clk epit_clk[] = { + { + .name = "epit_clk", + .id = 0, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_EPIT1_OFFSET, + .disable = _clk_disable,}, + { + .name = "epit_clk", + .id = 1, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_EPIT2_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk nfc_clk = { + .name = "nfc_clk", + .parent = &ahb_clk, + .get_rate = _clk_nfc_get_rate, +}; + +static struct clk scc_clk = { + .name = "scc_clk", + .parent = &ipg_clk, +}; + +static struct clk ipu_clk = { + .name = "ipu_clk", + .parent = &mcu_main_clk, + .get_rate = _clk_hsp_get_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_IPU_OFFSET, + .disable = _clk_disable, +}; + +static struct clk kpp_clk = { + .name = "kpp_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_KPP_OFFSET, + .disable = _clk_disable, +}; + +static struct clk wdog_clk = { + .name = "wdog_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_WDOG_OFFSET, + .disable = _clk_disable, +}; +static struct clk rtc_clk = { + .name = "rtc_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_RTC_OFFSET, + .disable = _clk_disable, +}; + +static struct clk usb_clk[] = { + { + .name = "usb_clk", + .parent = &usb_pll_clk, + .get_rate = _clk_usb_get_rate,}, + { + .name = "usb_ahb_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_USBOTG_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk csi_clk = { + .name = "csi_clk", + .parent = &serial_pll_clk, + .get_rate = _clk_csi_get_rate, + .round_rate = _clk_csi_round_rate, + .set_rate = _clk_csi_set_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_CSI_OFFSET, + .disable = _clk_disable, +}; + +static struct clk uart_clk[] = { + { + .name = "uart_clk", + .id = 0, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_UART1_OFFSET, + .disable = _clk_disable,}, + { + .name = "uart_clk", + .id = 1, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_UART2_OFFSET, + .disable = _clk_disable,}, + { + .name = "uart_clk", + .id = 2, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_UART3_OFFSET, + .disable = _clk_disable,}, + { + .name = "uart_clk", + .id = 3, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_UART4_OFFSET, + .disable = _clk_disable,}, + { + .name = "uart_clk", + .id = 4, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_UART5_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk i2c_clk[] = { + { + .name = "i2c_clk", + .id = 0, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_I2C1_OFFSET, + .disable = _clk_disable,}, + { + .name = "i2c_clk", + .id = 1, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_I2C2_OFFSET, + .disable = _clk_disable,}, + { + .name = "i2c_clk", + .id = 2, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_I2C3_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk owire_clk = { + .name = "owire_clk", + .parent = &perclk_clk, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_OWIRE_OFFSET, + .enable = _clk_enable, + .disable = _clk_disable, +}; -DEFINE_CLOCK(perclk_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); - -DEFINE_CLOCK(sdhc1_clk, 0, MXC_CCM_CGR0, 0, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(sdhc2_clk, 1, MXC_CCM_CGR0, 2, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CGR0, 4, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(epit1_clk, 0, MXC_CCM_CGR0, 6, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(epit2_clk, 1, MXC_CCM_CGR0, 8, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(iim_clk, 0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(ata_clk, 0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(sdma_clk1, 0, MXC_CCM_CGR0, 14, NULL, &sdma_clk1, &ahb_clk); -DEFINE_CLOCK(cspi3_clk, 2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(rng_clk, 0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(uart1_clk, 0, MXC_CCM_CGR0, 20, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(uart2_clk, 1, MXC_CCM_CGR0, 22, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(ssi1_clk, 0, MXC_CCM_CGR0, 24, ssi1_get_rate, NULL, &serial_pll_clk); -DEFINE_CLOCK(i2c1_clk, 0, MXC_CCM_CGR0, 26, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(i2c2_clk, 1, MXC_CCM_CGR0, 28, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(i2c3_clk, 2, MXC_CCM_CGR0, 30, NULL, NULL, &perclk_clk); - -DEFINE_CLOCK(mpeg4_clk, 0, MXC_CCM_CGR1, 0, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1, 2, mstick1_get_rate, NULL, &usb_pll_clk); -DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1, 4, mstick2_get_rate, NULL, &usb_pll_clk); -DEFINE_CLOCK1(csi_clk, 0, MXC_CCM_CGR1, 6, csi, NULL, &ahb_clk); -DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(wdog_clk, 0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(pwm_clk, 0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(usb_clk2, 0, MXC_CCM_CGR1, 18, usb_get_rate, NULL, &ahb_clk); -DEFINE_CLOCK(kpp_clk, 0, MXC_CCM_CGR1, 20, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(ipu_clk, 0, MXC_CCM_CGR1, 22, hsp_get_rate, NULL, &mcu_main_clk); -DEFINE_CLOCK(uart3_clk, 2, MXC_CCM_CGR1, 24, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(uart4_clk, 3, MXC_CCM_CGR1, 26, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(uart5_clk, 4, MXC_CCM_CGR1, 28, NULL, NULL, &perclk_clk); -DEFINE_CLOCK(owire_clk, 0, MXC_CCM_CGR1, 30, NULL, NULL, &perclk_clk); - -DEFINE_CLOCK(ssi2_clk, 1, MXC_CCM_CGR2, 0, ssi2_get_rate, NULL, &serial_pll_clk); -DEFINE_CLOCK(cspi1_clk, 0, MXC_CCM_CGR2, 2, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(cspi2_clk, 1, MXC_CCM_CGR2, 4, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(mbx_clk, 0, MXC_CCM_CGR2, 6, mbx_get_rate, NULL, &ahb_clk); -DEFINE_CLOCK(emi_clk, 0, MXC_CCM_CGR2, 8, NULL, NULL, &ahb_clk); -DEFINE_CLOCK(rtic_clk, 0, MXC_CCM_CGR2, 10, NULL, NULL, &ahb_clk); -DEFINE_CLOCK1(firi_clk, 0, MXC_CCM_CGR2, 12, firi, NULL, &usb_pll_clk); - -DEFINE_CLOCK(sdma_clk2, 0, NULL, 0, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(usb_clk1, 0, NULL, 0, usb_get_rate, NULL, &usb_pll_clk); -DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk); -DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk); -DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk); - -#define _REGISTER_CLOCK(d, n, c) \ - { \ - .dev_id = d, \ - .con_id = n, \ - .clk = &c, \ - }, - -static struct clk_lookup lookups[] __initdata = { - _REGISTER_CLOCK(NULL, "emi", emi_clk) - _REGISTER_CLOCK(NULL, "cspi", cspi1_clk) - _REGISTER_CLOCK(NULL, "cspi", cspi2_clk) - _REGISTER_CLOCK(NULL, "cspi", cspi3_clk) - _REGISTER_CLOCK(NULL, "gpt", gpt_clk) - _REGISTER_CLOCK(NULL, "pwm", pwm_clk) - _REGISTER_CLOCK(NULL, "wdog", wdog_clk) - _REGISTER_CLOCK(NULL, "rtc", rtc_clk) - _REGISTER_CLOCK(NULL, "epit", epit1_clk) - _REGISTER_CLOCK(NULL, "epit", epit2_clk) - _REGISTER_CLOCK("mxc_nand.0", NULL, nfc_clk) - _REGISTER_CLOCK("ipu-core", NULL, ipu_clk) - _REGISTER_CLOCK("mx3_sdc_fb", NULL, ipu_clk) - _REGISTER_CLOCK(NULL, "kpp", kpp_clk) - _REGISTER_CLOCK("fsl-usb2-udc", "usb", usb_clk1) - _REGISTER_CLOCK("fsl-usb2-udc", "usb_ahb", usb_clk2) - _REGISTER_CLOCK("mx3-camera.0", "csi", csi_clk) - _REGISTER_CLOCK("imx-uart.0", NULL, uart1_clk) - _REGISTER_CLOCK("imx-uart.1", NULL, uart2_clk) - _REGISTER_CLOCK("imx-uart.2", NULL, uart3_clk) - _REGISTER_CLOCK("imx-uart.3", NULL, uart4_clk) - _REGISTER_CLOCK("imx-uart.4", NULL, uart5_clk) - _REGISTER_CLOCK("imx-i2c.0", NULL, i2c1_clk) - _REGISTER_CLOCK("imx-i2c.1", NULL, i2c2_clk) - _REGISTER_CLOCK("imx-i2c.2", NULL, i2c3_clk) - _REGISTER_CLOCK("mxc_w1.0", NULL, owire_clk) - _REGISTER_CLOCK("mxc-mmc.0", NULL, sdhc1_clk) - _REGISTER_CLOCK("mxc-mmc.1", NULL, sdhc2_clk) - _REGISTER_CLOCK(NULL, "ssi", ssi1_clk) - _REGISTER_CLOCK(NULL, "ssi", ssi2_clk) - _REGISTER_CLOCK(NULL, "firi", firi_clk) - _REGISTER_CLOCK(NULL, "ata", ata_clk) - _REGISTER_CLOCK(NULL, "rtic", rtic_clk) - _REGISTER_CLOCK(NULL, "rng", rng_clk) - _REGISTER_CLOCK(NULL, "sdma_ahb", sdma_clk1) - _REGISTER_CLOCK(NULL, "sdma_ipg", sdma_clk2) - _REGISTER_CLOCK(NULL, "mstick", mstick1_clk) - _REGISTER_CLOCK(NULL, "mstick", mstick2_clk) - _REGISTER_CLOCK(NULL, "scc", scc_clk) - _REGISTER_CLOCK(NULL, "iim", iim_clk) - _REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk) - _REGISTER_CLOCK(NULL, "mbx", mbx_clk) -}; - -int __init mx31_clocks_init(unsigned long fref) +static struct clk sdhc_clk[] = { + { + .name = "sdhc_clk", + .id = 0, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_SD_MMC1_OFFSET, + .disable = _clk_disable,}, + { + .name = "sdhc_clk", + .id = 1, + .parent = &perclk_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_SD_MMC2_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk ssi_clk[] = { + { + .name = "ssi_clk", + .parent = &serial_pll_clk, + .get_rate = _clk_ssi1_get_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_SSI1_OFFSET, + .disable = _clk_disable,}, + { + .name = "ssi_clk", + .id = 1, + .parent = &serial_pll_clk, + .get_rate = _clk_ssi2_get_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_SSI2_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk firi_clk = { + .name = "firi_clk", + .parent = &usb_pll_clk, + .round_rate = _clk_firi_round_rate, + .set_rate = _clk_firi_set_rate, + .get_rate = _clk_firi_get_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_FIRI_OFFSET, + .disable = _clk_disable, +}; + +static struct clk ata_clk = { + .name = "ata_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_ATA_OFFSET, + .disable = _clk_disable, +}; + +static struct clk mbx_clk = { + .name = "mbx_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_GACC_OFFSET, + .get_rate = _clk_mbx_get_rate, +}; + +static struct clk vpu_clk = { + .name = "vpu_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_GACC_OFFSET, + .get_rate = _clk_mbx_get_rate, +}; + +static struct clk rtic_clk = { + .name = "rtic_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR2, + .enable_shift = MXC_CCM_CGR2_RTIC_OFFSET, + .disable = _clk_disable, +}; + +static struct clk rng_clk = { + .name = "rng_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_RNG_OFFSET, + .disable = _clk_disable, +}; + +static struct clk sdma_clk[] = { + { + .name = "sdma_ahb_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_SDMA_OFFSET, + .disable = _clk_disable,}, + { + .name = "sdma_ipg_clk", + .parent = &ipg_clk,} +}; + +static struct clk mpeg4_clk = { + .name = "mpeg4_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_HANTRO_OFFSET, + .disable = _clk_disable, +}; + +static struct clk vl2cc_clk = { + .name = "vl2cc_clk", + .parent = &ahb_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_HANTRO_OFFSET, + .disable = _clk_disable, +}; + +static struct clk mstick_clk[] = { + { + .name = "mstick_clk", + .id = 0, + .parent = &usb_pll_clk, + .get_rate = _clk_mstick1_get_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_MEMSTICK1_OFFSET, + .disable = _clk_disable,}, + { + .name = "mstick_clk", + .id = 1, + .parent = &usb_pll_clk, + .get_rate = _clk_mstick2_get_rate, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR1, + .enable_shift = MXC_CCM_CGR1_MEMSTICK2_OFFSET, + .disable = _clk_disable,}, +}; + +static struct clk iim_clk = { + .name = "iim_clk", + .parent = &ipg_clk, + .enable = _clk_enable, + .enable_reg = MXC_CCM_CGR0, + .enable_shift = MXC_CCM_CGR0_IIM_OFFSET, + .disable = _clk_disable, +}; + +static unsigned long _clk_cko1_round_rate(struct clk *clk, unsigned long rate) +{ + u32 div, parent = clk_get_rate(clk->parent); + + div = parent / rate; + if (parent % rate) + div++; + + if (div > 8) + div = 16; + else if (div > 4) + div = 8; + else if (div > 2) + div = 4; + + return parent / div; +} + +static int _clk_cko1_set_rate(struct clk *clk, unsigned long rate) +{ + u32 reg, div, parent = clk_get_rate(clk->parent); + + div = parent / rate; + + if (div == 16) + div = 4; + else if (div == 8) + div = 3; + else if (div == 4) + div = 2; + else if (div == 2) + div = 1; + else if (div == 1) + div = 0; + else + return -EINVAL; + + reg = __raw_readl(MXC_CCM_COSR) & ~MXC_CCM_COSR_CLKOUTDIV_MASK; + reg |= div << MXC_CCM_COSR_CLKOUTDIV_OFFSET; + __raw_writel(reg, MXC_CCM_COSR); + + return 0; +} + +static unsigned long _clk_cko1_get_rate(struct clk *clk) +{ + u32 div; + + div = __raw_readl(MXC_CCM_COSR) & MXC_CCM_COSR_CLKOUTDIV_MASK >> + MXC_CCM_COSR_CLKOUTDIV_OFFSET; + + return clk_get_rate(clk->parent) / (1 << div); +} + +static int _clk_cko1_set_parent(struct clk *clk, struct clk *parent) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_COSR) & ~MXC_CCM_COSR_CLKOSEL_MASK; + + if (parent == &mcu_main_clk) + reg |= 0 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &ipg_clk) + reg |= 1 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &usb_pll_clk) + reg |= 2 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == mcu_main_clk.parent) + reg |= 3 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &ahb_clk) + reg |= 5 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &serial_pll_clk) + reg |= 7 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &ckih_clk) + reg |= 8 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &emi_clk) + reg |= 9 << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &ipu_clk) + reg |= 0xA << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &nfc_clk) + reg |= 0xB << MXC_CCM_COSR_CLKOSEL_OFFSET; + else if (parent == &uart_clk[0]) + reg |= 0xC << MXC_CCM_COSR_CLKOSEL_OFFSET; + else + return -EINVAL; + + __raw_writel(reg, MXC_CCM_COSR); + + return 0; +} + +static int _clk_cko1_enable(struct clk *clk) { u32 reg; - int i; - mxc_set_cpu_type(MXC_CPU_MX31); + reg = __raw_readl(MXC_CCM_COSR) | MXC_CCM_COSR_CLKOEN; + __raw_writel(reg, MXC_CCM_COSR); + + return 0; +} + +static void _clk_cko1_disable(struct clk *clk) +{ + u32 reg; + + reg = __raw_readl(MXC_CCM_COSR) & ~MXC_CCM_COSR_CLKOEN; + __raw_writel(reg, MXC_CCM_COSR); +} + +static struct clk cko1_clk = { + .name = "cko1_clk", + .get_rate = _clk_cko1_get_rate, + .set_rate = _clk_cko1_set_rate, + .round_rate = _clk_cko1_round_rate, + .set_parent = _clk_cko1_set_parent, + .enable = _clk_cko1_enable, + .disable = _clk_cko1_disable, +}; + +static struct clk *mxc_clks[] = { + &ckih_clk, + &ckil_clk, + &mcu_pll_clk, + &usb_pll_clk, + &serial_pll_clk, + &mcu_main_clk, + &ahb_clk, + &per_clk, + &perclk_clk, + &cko1_clk, + &emi_clk, + &cspi_clk[0], + &cspi_clk[1], + &cspi_clk[2], + &ipg_clk, + &gpt_clk, + &pwm_clk, + &wdog_clk, + &rtc_clk, + &epit_clk[0], + &epit_clk[1], + &nfc_clk, + &ipu_clk, + &kpp_clk, + &usb_clk[0], + &usb_clk[1], + &csi_clk, + &uart_clk[0], + &uart_clk[1], + &uart_clk[2], + &uart_clk[3], + &uart_clk[4], + &i2c_clk[0], + &i2c_clk[1], + &i2c_clk[2], + &owire_clk, + &sdhc_clk[0], + &sdhc_clk[1], + &ssi_clk[0], + &ssi_clk[1], + &firi_clk, + &ata_clk, + &rtic_clk, + &rng_clk, + &sdma_clk[0], + &sdma_clk[1], + &mstick_clk[0], + &mstick_clk[1], + &scc_clk, + &iim_clk, +}; + +int __init mxc_clocks_init(unsigned long fref) +{ + u32 reg; + struct clk **clkp; ckih_rate = fref; - for (i = 0; i < ARRAY_SIZE(lookups); i++) - clkdev_add(&lookups[i]); + for (clkp = mxc_clks; clkp < mxc_clks + ARRAY_SIZE(mxc_clks); clkp++) + clk_register(*clkp); + + if (cpu_is_mx31()) { + clk_register(&mpeg4_clk); + clk_register(&mbx_clk); + } else { + clk_register(&vpu_clk); + clk_register(&vl2cc_clk); + } /* Turn off all possible clocks */ - __raw_writel((3 << 4), MXC_CCM_CGR0); + __raw_writel(MXC_CCM_CGR0_GPT_MASK, MXC_CCM_CGR0); __raw_writel(0, MXC_CCM_CGR1); - __raw_writel((3 << 8) | (3 << 14) | (3 << 16)| + + __raw_writel(MXC_CCM_CGR2_EMI_MASK | + MXC_CCM_CGR2_IPMUX1_MASK | + MXC_CCM_CGR2_IPMUX2_MASK | + MXC_CCM_CGR2_MXCCLKENSEL_MASK | /* for MX32 */ + MXC_CCM_CGR2_CHIKCAMPEN_MASK | /* for MX32 */ + MXC_CCM_CGR2_OVRVPUBUSY_MASK | /* for MX32 */ 1 << 27 | 1 << 28, /* Bit 27 and 28 are not defined for MX32, but still required to be set */ MXC_CCM_CGR2); - usb_pll_disable(&usb_pll_clk); + clk_disable(&cko1_clk); + clk_disable(&usb_pll_clk); pr_info("Clock input source is %ld\n", clk_get_rate(&ckih_clk)); @@ -598,8 +1143,6 @@ int __init mx31_clocks_init(unsigned long fref) __raw_writel(reg, MXC_CCM_PMCR1); } - mxc_timer_init(&ipg_clk); - return 0; } diff --git a/trunk/arch/arm/mach-mx3/crm_regs.h b/trunk/arch/arm/mach-mx3/crm_regs.h index adfa3627ad84..4a0e0ede23bb 100644 --- a/trunk/arch/arm/mach-mx3/crm_regs.h +++ b/trunk/arch/arm/mach-mx3/crm_regs.h @@ -91,6 +91,47 @@ #define MXC_CCM_PDR0_MCU_PODF_OFFSET 0 #define MXC_CCM_PDR0_MCU_PODF_MASK 0x7 +#define MXC_CCM_PDR0_HSP_DIV_1 (0x0 << 11) +#define MXC_CCM_PDR0_HSP_DIV_2 (0x1 << 11) +#define MXC_CCM_PDR0_HSP_DIV_3 (0x2 << 11) +#define MXC_CCM_PDR0_HSP_DIV_4 (0x3 << 11) +#define MXC_CCM_PDR0_HSP_DIV_5 (0x4 << 11) +#define MXC_CCM_PDR0_HSP_DIV_6 (0x5 << 11) +#define MXC_CCM_PDR0_HSP_DIV_7 (0x6 << 11) +#define MXC_CCM_PDR0_HSP_DIV_8 (0x7 << 11) + +#define MXC_CCM_PDR0_IPG_DIV_1 (0x0 << 6) +#define MXC_CCM_PDR0_IPG_DIV_2 (0x1 << 6) +#define MXC_CCM_PDR0_IPG_DIV_3 (0x2 << 6) +#define MXC_CCM_PDR0_IPG_DIV_4 (0x3 << 6) + +#define MXC_CCM_PDR0_MAX_DIV_1 (0x0 << 3) +#define MXC_CCM_PDR0_MAX_DIV_2 (0x1 << 3) +#define MXC_CCM_PDR0_MAX_DIV_3 (0x2 << 3) +#define MXC_CCM_PDR0_MAX_DIV_4 (0x3 << 3) +#define MXC_CCM_PDR0_MAX_DIV_5 (0x4 << 3) +#define MXC_CCM_PDR0_MAX_DIV_6 (0x5 << 3) +#define MXC_CCM_PDR0_MAX_DIV_7 (0x6 << 3) +#define MXC_CCM_PDR0_MAX_DIV_8 (0x7 << 3) + +#define MXC_CCM_PDR0_NFC_DIV_1 (0x0 << 8) +#define MXC_CCM_PDR0_NFC_DIV_2 (0x1 << 8) +#define MXC_CCM_PDR0_NFC_DIV_3 (0x2 << 8) +#define MXC_CCM_PDR0_NFC_DIV_4 (0x3 << 8) +#define MXC_CCM_PDR0_NFC_DIV_5 (0x4 << 8) +#define MXC_CCM_PDR0_NFC_DIV_6 (0x5 << 8) +#define MXC_CCM_PDR0_NFC_DIV_7 (0x6 << 8) +#define MXC_CCM_PDR0_NFC_DIV_8 (0x7 << 8) + +#define MXC_CCM_PDR0_MCU_DIV_1 0x0 +#define MXC_CCM_PDR0_MCU_DIV_2 0x1 +#define MXC_CCM_PDR0_MCU_DIV_3 0x2 +#define MXC_CCM_PDR0_MCU_DIV_4 0x3 +#define MXC_CCM_PDR0_MCU_DIV_5 0x4 +#define MXC_CCM_PDR0_MCU_DIV_6 0x5 +#define MXC_CCM_PDR0_MCU_DIV_7 0x6 +#define MXC_CCM_PDR0_MCU_DIV_8 0x7 + #define MXC_CCM_PDR1_USB_PRDF_OFFSET 30 #define MXC_CCM_PDR1_USB_PRDF_MASK (0x3 << 30) #define MXC_CCM_PDR1_USB_PODF_OFFSET 27 @@ -111,6 +152,118 @@ /* Bit definitions for RCSR */ #define MXC_CCM_RCSR_NF16B 0x80000000 +/* Bit definitions for both MCU, USB and SR PLL control registers */ +#define MXC_CCM_PCTL_BRM 0x80000000 +#define MXC_CCM_PCTL_PD_OFFSET 26 +#define MXC_CCM_PCTL_PD_MASK (0xF << 26) +#define MXC_CCM_PCTL_MFD_OFFSET 16 +#define MXC_CCM_PCTL_MFD_MASK (0x3FF << 16) +#define MXC_CCM_PCTL_MFI_OFFSET 10 +#define MXC_CCM_PCTL_MFI_MASK (0xF << 10) +#define MXC_CCM_PCTL_MFN_OFFSET 0 +#define MXC_CCM_PCTL_MFN_MASK 0x3FF + +#define MXC_CCM_CGR0_SD_MMC1_OFFSET 0 +#define MXC_CCM_CGR0_SD_MMC1_MASK (0x3 << 0) +#define MXC_CCM_CGR0_SD_MMC2_OFFSET 2 +#define MXC_CCM_CGR0_SD_MMC2_MASK (0x3 << 2) +#define MXC_CCM_CGR0_GPT_OFFSET 4 +#define MXC_CCM_CGR0_GPT_MASK (0x3 << 4) +#define MXC_CCM_CGR0_EPIT1_OFFSET 6 +#define MXC_CCM_CGR0_EPIT1_MASK (0x3 << 6) +#define MXC_CCM_CGR0_EPIT2_OFFSET 8 +#define MXC_CCM_CGR0_EPIT2_MASK (0x3 << 8) +#define MXC_CCM_CGR0_IIM_OFFSET 10 +#define MXC_CCM_CGR0_IIM_MASK (0x3 << 10) +#define MXC_CCM_CGR0_ATA_OFFSET 12 +#define MXC_CCM_CGR0_ATA_MASK (0x3 << 12) +#define MXC_CCM_CGR0_SDMA_OFFSET 14 +#define MXC_CCM_CGR0_SDMA_MASK (0x3 << 14) +#define MXC_CCM_CGR0_CSPI3_OFFSET 16 +#define MXC_CCM_CGR0_CSPI3_MASK (0x3 << 16) +#define MXC_CCM_CGR0_RNG_OFFSET 18 +#define MXC_CCM_CGR0_RNG_MASK (0x3 << 18) +#define MXC_CCM_CGR0_UART1_OFFSET 20 +#define MXC_CCM_CGR0_UART1_MASK (0x3 << 20) +#define MXC_CCM_CGR0_UART2_OFFSET 22 +#define MXC_CCM_CGR0_UART2_MASK (0x3 << 22) +#define MXC_CCM_CGR0_SSI1_OFFSET 24 +#define MXC_CCM_CGR0_SSI1_MASK (0x3 << 24) +#define MXC_CCM_CGR0_I2C1_OFFSET 26 +#define MXC_CCM_CGR0_I2C1_MASK (0x3 << 26) +#define MXC_CCM_CGR0_I2C2_OFFSET 28 +#define MXC_CCM_CGR0_I2C2_MASK (0x3 << 28) +#define MXC_CCM_CGR0_I2C3_OFFSET 30 +#define MXC_CCM_CGR0_I2C3_MASK (0x3 << 30) + +#define MXC_CCM_CGR1_HANTRO_OFFSET 0 +#define MXC_CCM_CGR1_HANTRO_MASK (0x3 << 0) +#define MXC_CCM_CGR1_MEMSTICK1_OFFSET 2 +#define MXC_CCM_CGR1_MEMSTICK1_MASK (0x3 << 2) +#define MXC_CCM_CGR1_MEMSTICK2_OFFSET 4 +#define MXC_CCM_CGR1_MEMSTICK2_MASK (0x3 << 4) +#define MXC_CCM_CGR1_CSI_OFFSET 6 +#define MXC_CCM_CGR1_CSI_MASK (0x3 << 6) +#define MXC_CCM_CGR1_RTC_OFFSET 8 +#define MXC_CCM_CGR1_RTC_MASK (0x3 << 8) +#define MXC_CCM_CGR1_WDOG_OFFSET 10 +#define MXC_CCM_CGR1_WDOG_MASK (0x3 << 10) +#define MXC_CCM_CGR1_PWM_OFFSET 12 +#define MXC_CCM_CGR1_PWM_MASK (0x3 << 12) +#define MXC_CCM_CGR1_SIM_OFFSET 14 +#define MXC_CCM_CGR1_SIM_MASK (0x3 << 14) +#define MXC_CCM_CGR1_ECT_OFFSET 16 +#define MXC_CCM_CGR1_ECT_MASK (0x3 << 16) +#define MXC_CCM_CGR1_USBOTG_OFFSET 18 +#define MXC_CCM_CGR1_USBOTG_MASK (0x3 << 18) +#define MXC_CCM_CGR1_KPP_OFFSET 20 +#define MXC_CCM_CGR1_KPP_MASK (0x3 << 20) +#define MXC_CCM_CGR1_IPU_OFFSET 22 +#define MXC_CCM_CGR1_IPU_MASK (0x3 << 22) +#define MXC_CCM_CGR1_UART3_OFFSET 24 +#define MXC_CCM_CGR1_UART3_MASK (0x3 << 24) +#define MXC_CCM_CGR1_UART4_OFFSET 26 +#define MXC_CCM_CGR1_UART4_MASK (0x3 << 26) +#define MXC_CCM_CGR1_UART5_OFFSET 28 +#define MXC_CCM_CGR1_UART5_MASK (0x3 << 28) +#define MXC_CCM_CGR1_OWIRE_OFFSET 30 +#define MXC_CCM_CGR1_OWIRE_MASK (0x3 << 30) + +#define MXC_CCM_CGR2_SSI2_OFFSET 0 +#define MXC_CCM_CGR2_SSI2_MASK (0x3 << 0) +#define MXC_CCM_CGR2_CSPI1_OFFSET 2 +#define MXC_CCM_CGR2_CSPI1_MASK (0x3 << 2) +#define MXC_CCM_CGR2_CSPI2_OFFSET 4 +#define MXC_CCM_CGR2_CSPI2_MASK (0x3 << 4) +#define MXC_CCM_CGR2_GACC_OFFSET 6 +#define MXC_CCM_CGR2_GACC_MASK (0x3 << 6) +#define MXC_CCM_CGR2_EMI_OFFSET 8 +#define MXC_CCM_CGR2_EMI_MASK (0x3 << 8) +#define MXC_CCM_CGR2_RTIC_OFFSET 10 +#define MXC_CCM_CGR2_RTIC_MASK (0x3 << 10) +#define MXC_CCM_CGR2_FIRI_OFFSET 12 +#define MXC_CCM_CGR2_FIRI_MASK (0x3 << 12) +#define MXC_CCM_CGR2_IPMUX1_OFFSET 14 +#define MXC_CCM_CGR2_IPMUX1_MASK (0x3 << 14) +#define MXC_CCM_CGR2_IPMUX2_OFFSET 16 +#define MXC_CCM_CGR2_IPMUX2_MASK (0x3 << 16) + +/* These new CGR2 bits are added in MX32 */ +#define MXC_CCM_CGR2_APMSYSCLKSEL_OFFSET 18 +#define MXC_CCM_CGR2_APMSYSCLKSEL_MASK (0x3 << 18) +#define MXC_CCM_CGR2_APMSSICLKSEL_OFFSET 20 +#define MXC_CCM_CGR2_APMSSICLKSEL_MASK (0x3 << 20) +#define MXC_CCM_CGR2_APMPERCLKSEL_OFFSET 22 +#define MXC_CCM_CGR2_APMPERCLKSEL_MASK (0x3 << 22) +#define MXC_CCM_CGR2_MXCCLKENSEL_OFFSET 24 +#define MXC_CCM_CGR2_MXCCLKENSEL_MASK (0x1 << 24) +#define MXC_CCM_CGR2_CHIKCAMPEN_OFFSET 25 +#define MXC_CCM_CGR2_CHIKCAMPEN_MASK (0x1 << 25) +#define MXC_CCM_CGR2_OVRVPUBUSY_OFFSET 26 +#define MXC_CCM_CGR2_OVRVPUBUSY_MASK (0x1 << 26) +#define MXC_CCM_CGR2_APMENA_OFFSET 30 +#define MXC_CCM_CGR2_AOMENA_MASK (0x1 << 30) + /* * LTR0 register offsets */ diff --git a/trunk/arch/arm/mach-mx3/devices.c b/trunk/arch/arm/mach-mx3/devices.c index 380be0c9b213..f8428800f286 100644 --- a/trunk/arch/arm/mach-mx3/devices.c +++ b/trunk/arch/arm/mach-mx3/devices.c @@ -25,8 +25,6 @@ #include #include -#include "devices.h" - static struct resource uart0[] = { { .start = UART1_BASE_ADDR, @@ -84,7 +82,6 @@ struct platform_device mxc_uart_device2 = { .num_resources = ARRAY_SIZE(uart2), }; -#ifdef CONFIG_ARCH_MX31 static struct resource uart3[] = { { .start = UART4_BASE_ADDR, @@ -122,7 +119,6 @@ struct platform_device mxc_uart_device4 = { .resource = uart4, .num_resources = ARRAY_SIZE(uart4), }; -#endif /* CONFIG_ARCH_MX31 */ /* GPIO port description */ static struct mxc_gpio_port imx_gpio_ports[] = { @@ -168,8 +164,8 @@ struct platform_device mxc_w1_master_device = { static struct resource mxc_nand_resources[] = { { - .start = 0, /* runtime dependent */ - .end = 0, + .start = NFC_BASE_ADDR, + .end = NFC_BASE_ADDR + 0xfff, .flags = IORESOURCE_MEM }, { .start = MXC_INT_NANDFC, @@ -184,188 +180,3 @@ struct platform_device mxc_nand_device = { .num_resources = ARRAY_SIZE(mxc_nand_resources), .resource = mxc_nand_resources, }; - -static struct resource mxc_i2c0_resources[] = { - { - .start = I2C_BASE_ADDR, - .end = I2C_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MXC_INT_I2C, - .end = MXC_INT_I2C, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_i2c_device0 = { - .name = "imx-i2c", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_i2c0_resources), - .resource = mxc_i2c0_resources, -}; - -static struct resource mxc_i2c1_resources[] = { - { - .start = I2C2_BASE_ADDR, - .end = I2C2_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MXC_INT_I2C2, - .end = MXC_INT_I2C2, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_i2c_device1 = { - .name = "imx-i2c", - .id = 1, - .num_resources = ARRAY_SIZE(mxc_i2c1_resources), - .resource = mxc_i2c1_resources, -}; - -static struct resource mxc_i2c2_resources[] = { - { - .start = I2C3_BASE_ADDR, - .end = I2C3_BASE_ADDR + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - { - .start = MXC_INT_I2C3, - .end = MXC_INT_I2C3, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxc_i2c_device2 = { - .name = "imx-i2c", - .id = 2, - .num_resources = ARRAY_SIZE(mxc_i2c2_resources), - .resource = mxc_i2c2_resources, -}; - -#ifdef CONFIG_ARCH_MX31 -static struct resource mxcsdhc0_resources[] = { - { - .start = MMC_SDHC1_BASE_ADDR, - .end = MMC_SDHC1_BASE_ADDR + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_MMC_SDHC1, - .end = MXC_INT_MMC_SDHC1, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct resource mxcsdhc1_resources[] = { - { - .start = MMC_SDHC2_BASE_ADDR, - .end = MMC_SDHC2_BASE_ADDR + SZ_16K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_MMC_SDHC2, - .end = MXC_INT_MMC_SDHC2, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mxcsdhc_device0 = { - .name = "mxc-mmc", - .id = 0, - .num_resources = ARRAY_SIZE(mxcsdhc0_resources), - .resource = mxcsdhc0_resources, -}; - -struct platform_device mxcsdhc_device1 = { - .name = "mxc-mmc", - .id = 1, - .num_resources = ARRAY_SIZE(mxcsdhc1_resources), - .resource = mxcsdhc1_resources, -}; -#endif /* CONFIG_ARCH_MX31 */ - -/* i.MX31 Image Processing Unit */ - -/* The resource order is important! */ -static struct resource mx3_ipu_rsrc[] = { - { - .start = IPU_CTRL_BASE_ADDR, - .end = IPU_CTRL_BASE_ADDR + 0x5F, - .flags = IORESOURCE_MEM, - }, { - .start = IPU_CTRL_BASE_ADDR + 0x88, - .end = IPU_CTRL_BASE_ADDR + 0xB3, - .flags = IORESOURCE_MEM, - }, { - .start = MXC_INT_IPU_SYN, - .end = MXC_INT_IPU_SYN, - .flags = IORESOURCE_IRQ, - }, { - .start = MXC_INT_IPU_ERR, - .end = MXC_INT_IPU_ERR, - .flags = IORESOURCE_IRQ, - }, -}; - -struct platform_device mx3_ipu = { - .name = "ipu-core", - .id = -1, - .num_resources = ARRAY_SIZE(mx3_ipu_rsrc), - .resource = mx3_ipu_rsrc, -}; - -static struct resource fb_resources[] = { - { - .start = IPU_CTRL_BASE_ADDR + 0xB4, - .end = IPU_CTRL_BASE_ADDR + 0x1BF, - .flags = IORESOURCE_MEM, - }, -}; - -struct platform_device mx3_fb = { - .name = "mx3_sdc_fb", - .id = -1, - .num_resources = ARRAY_SIZE(fb_resources), - .resource = fb_resources, - .dev = { - .coherent_dma_mask = 0xffffffff, - }, -}; - -#ifdef CONFIG_ARCH_MX35 -static struct resource mxc_fec_resources[] = { - { - .start = MXC_FEC_BASE_ADDR, - .end = MXC_FEC_BASE_ADDR + 0xfff, - .flags = IORESOURCE_MEM - }, { - .start = MXC_INT_FEC, - .end = MXC_INT_FEC, - .flags = IORESOURCE_IRQ - }, -}; - -struct platform_device mxc_fec_device = { - .name = "fec", - .id = 0, - .num_resources = ARRAY_SIZE(mxc_fec_resources), - .resource = mxc_fec_resources, -}; -#endif - -static int mx3_devices_init(void) -{ - if (cpu_is_mx31()) { - mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR; - mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff; - } - if (cpu_is_mx35()) { - mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR; - mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff; - } - - return 0; -} - -subsys_initcall(mx3_devices_init); diff --git a/trunk/arch/arm/mach-mx3/devices.h b/trunk/arch/arm/mach-mx3/devices.h index 88c04b296fab..9949ef4e0694 100644 --- a/trunk/arch/arm/mach-mx3/devices.h +++ b/trunk/arch/arm/mach-mx3/devices.h @@ -6,11 +6,3 @@ extern struct platform_device mxc_uart_device3; extern struct platform_device mxc_uart_device4; extern struct platform_device mxc_w1_master_device; extern struct platform_device mxc_nand_device; -extern struct platform_device mxc_i2c_device0; -extern struct platform_device mxc_i2c_device1; -extern struct platform_device mxc_i2c_device2; -extern struct platform_device mx3_ipu; -extern struct platform_device mx3_fb; -extern struct platform_device mxc_fec_device; -extern struct platform_device mxcsdhc_device0; -extern struct platform_device mxcsdhc_device1; diff --git a/trunk/arch/arm/mach-mx3/iomux.c b/trunk/arch/arm/mach-mx3/iomux.c index 40ffc5a664d9..7a5088b519a8 100644 --- a/trunk/arch/arm/mach-mx3/iomux.c +++ b/trunk/arch/arm/mach-mx3/iomux.c @@ -1,7 +1,6 @@ /* * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved. * Copyright (C) 2008 by Sascha Hauer - * Copyright (C) 2009 by Valentin Longchamp * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -22,7 +21,6 @@ #include #include #include -#include #include #include #include @@ -40,8 +38,6 @@ static DEFINE_SPINLOCK(gpio_mux_lock); #define IOMUX_REG_MASK (IOMUX_PADNUM_MASK & ~0x3) - -unsigned long mxc_pin_alloc_map[NB_PORTS * 32 / BITS_PER_LONG]; /* * set the mode for a IOMUX pin. */ @@ -54,6 +50,9 @@ int mxc_iomux_mode(unsigned int pin_mode) field = pin_mode & 0x3; mode = (pin_mode & IOMUX_MODE_MASK) >> IOMUX_MODE_SHIFT; + pr_debug("%s: reg offset = 0x%x field = %d mode = 0x%02x\n", + __func__, (pin_mode & IOMUX_REG_MASK), field, mode); + spin_lock(&gpio_mux_lock); l = __raw_readl(reg); @@ -93,86 +92,6 @@ void mxc_iomux_set_pad(enum iomux_pins pin, u32 config) } EXPORT_SYMBOL(mxc_iomux_set_pad); -/* - * setups a single pin: - * - reserves the pin so that it is not claimed by another driver - * - setups the iomux according to the configuration - * - if the pin is configured as a GPIO, we claim it through kernel gpiolib - */ -int mxc_iomux_setup_pin(const unsigned int pin, const char *label) -{ - unsigned pad = pin & IOMUX_PADNUM_MASK; - unsigned gpio; - - if (pad >= (PIN_MAX + 1)) { - printk(KERN_ERR "mxc_iomux: Attempt to request nonexistant pin %u for \"%s\"\n", - pad, label ? label : "?"); - return -EINVAL; - } - - if (test_and_set_bit(pad, mxc_pin_alloc_map)) { - printk(KERN_ERR "mxc_iomux: pin %u already used. Allocation for \"%s\" failed\n", - pad, label ? label : "?"); - return -EINVAL; - } - mxc_iomux_mode(pin); - - /* if we have a gpio, we can allocate it */ - gpio = (pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT; - if (gpio < (GPIO_PORT_MAX + 1) * 32) - if (gpio_request(gpio, label)) - return -EINVAL; - - return 0; -} -EXPORT_SYMBOL(mxc_iomux_setup_pin); - -int mxc_iomux_setup_multiple_pins(unsigned int *pin_list, unsigned count, - const char *label) -{ - unsigned int *p = pin_list; - int i; - int ret = -EINVAL; - - for (i = 0; i < count; i++) { - if (mxc_iomux_setup_pin(*p, label)) - goto setup_error; - p++; - } - return 0; - -setup_error: - mxc_iomux_release_multiple_pins(pin_list, i); - return ret; -} -EXPORT_SYMBOL(mxc_iomux_setup_multiple_pins); - -void mxc_iomux_release_pin(const unsigned int pin) -{ - unsigned pad = pin & IOMUX_PADNUM_MASK; - unsigned gpio; - - if (pad < (PIN_MAX + 1)) - clear_bit(pad, mxc_pin_alloc_map); - - gpio = (pin & IOMUX_GPIONUM_MASK) >> IOMUX_GPIONUM_SHIFT; - if (gpio < (GPIO_PORT_MAX + 1) * 32) - gpio_free(gpio); -} -EXPORT_SYMBOL(mxc_iomux_release_pin); - -void mxc_iomux_release_multiple_pins(unsigned int *pin_list, int count) -{ - unsigned int *p = pin_list; - int i; - - for (i = 0; i < count; i++) { - mxc_iomux_release_pin(*p); - p++; - } -} -EXPORT_SYMBOL(mxc_iomux_release_multiple_pins); - /* * This function enables/disables the general purpose function for a particular * signal. @@ -192,3 +111,4 @@ void mxc_iomux_set_gpr(enum iomux_gp_func gp, bool en) spin_unlock(&gpio_mux_lock); } EXPORT_SYMBOL(mxc_iomux_set_gpr); + diff --git a/trunk/arch/arm/mach-mx3/mm.c b/trunk/arch/arm/mach-mx3/mm.c index 9e1459cb4b74..0589b5cd33c7 100644 --- a/trunk/arch/arm/mach-mx3/mm.c +++ b/trunk/arch/arm/mach-mx3/mm.c @@ -22,14 +22,10 @@ #include #include -#include - +#include #include #include -#include - #include -#include /*! * @file mm.c @@ -54,16 +50,6 @@ static struct map_desc mxc_io_desc[] __initdata = { .pfn = __phys_to_pfn(AVIC_BASE_ADDR), .length = AVIC_SIZE, .type = MT_DEVICE_NONSHARED - }, { - .virtual = AIPS1_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), - .length = AIPS1_SIZE, - .type = MT_DEVICE_NONSHARED - }, { - .virtual = AIPS2_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), - .length = AIPS2_SIZE, - .type = MT_DEVICE_NONSHARED }, }; @@ -76,24 +62,3 @@ void __init mxc_map_io(void) { iotable_init(mxc_io_desc, ARRAY_SIZE(mxc_io_desc)); } - -#ifdef CONFIG_CACHE_L2X0 -static int mxc_init_l2x0(void) -{ - void __iomem *l2x0_base; - - l2x0_base = ioremap(L2CC_BASE_ADDR, 4096); - if (IS_ERR(l2x0_base)) { - printk(KERN_ERR "remapping L2 cache area failed with %ld\n", - PTR_ERR(l2x0_base)); - return 0; - } - - l2x0_init(l2x0_base, 0x00030024, 0x00000000); - - return 0; -} - -arch_initcall(mxc_init_l2x0); -#endif - diff --git a/trunk/arch/arm/mach-mx3/mx31ads.c b/trunk/arch/arm/mach-mx3/mx31ads.c index 83e5e8e1276f..f902a7c37c31 100644 --- a/trunk/arch/arm/mach-mx3/mx31ads.c +++ b/trunk/arch/arm/mach-mx3/mx31ads.c @@ -22,8 +22,6 @@ #include #include #include -#include -#include #include #include @@ -37,12 +35,6 @@ #include #include -#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 -#include -#include -#include -#endif - #include "devices.h" /*! @@ -102,16 +94,13 @@ static struct imxuart_platform_data uart_pdata = { .flags = IMXUART_HAVE_RTSCTS, }; -static int uart_pins[] = { - MX31_PIN_CTS1__CTS1, - MX31_PIN_RTS1__RTS1, - MX31_PIN_TXD1__TXD1, - MX31_PIN_RXD1__RXD1 -}; - static inline void mxc_init_imx_uart(void) { - mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0"); + mxc_iomux_mode(MX31_PIN_CTS1__CTS1); + mxc_iomux_mode(MX31_PIN_RTS1__RTS1); + mxc_iomux_mode(MX31_PIN_TXD1__TXD1); + mxc_iomux_mode(MX31_PIN_RXD1__RXD1); + mxc_register_device(&mxc_uart_device0, &uart_pdata); } #else /* !SERIAL_IMX */ @@ -187,7 +176,7 @@ static void __init mx31ads_init_expio(void) /* * Configure INT line as GPIO input */ - mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO), "expio"); + mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO)); /* disable the interrupt and clear the status */ __raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG); @@ -202,300 +191,25 @@ static void __init mx31ads_init_expio(void) set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler); } -#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 -/* This section defines setup for the Wolfson Microelectronics - * 1133-EV1 PMU/audio board. When other PMU boards are supported the - * regulator definitions may be shared with them, but for now they can - * only be used with this board so would generate warnings about - * unused statics and some of the configuration is specific to this - * module. - */ - -/* CPU */ -static struct regulator_consumer_supply sw1a_consumers[] = { - { - .supply = "cpu_vcc", - } -}; - -static struct regulator_init_data sw1a_data = { - .constraints = { - .name = "SW1A", - .min_uV = 1275000, - .max_uV = 1600000, - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | - REGULATOR_CHANGE_MODE, - .valid_modes_mask = REGULATOR_MODE_NORMAL | - REGULATOR_MODE_FAST, - .state_mem = { - .uV = 1400000, - .mode = REGULATOR_MODE_NORMAL, - .enabled = 1, - }, - .initial_state = PM_SUSPEND_MEM, - .always_on = 1, - .boot_on = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(sw1a_consumers), - .consumer_supplies = sw1a_consumers, -}; - -/* System IO - High */ -static struct regulator_init_data viohi_data = { - .constraints = { - .name = "VIOHO", - .min_uV = 2800000, - .max_uV = 2800000, - .state_mem = { - .uV = 2800000, - .mode = REGULATOR_MODE_NORMAL, - .enabled = 1, - }, - .initial_state = PM_SUSPEND_MEM, - .always_on = 1, - .boot_on = 1, - }, -}; - -/* System IO - Low */ -static struct regulator_init_data violo_data = { - .constraints = { - .name = "VIOLO", - .min_uV = 1800000, - .max_uV = 1800000, - .state_mem = { - .uV = 1800000, - .mode = REGULATOR_MODE_NORMAL, - .enabled = 1, - }, - .initial_state = PM_SUSPEND_MEM, - .always_on = 1, - .boot_on = 1, - }, -}; - -/* DDR RAM */ -static struct regulator_init_data sw2a_data = { - .constraints = { - .name = "SW2A", - .min_uV = 1800000, - .max_uV = 1800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .state_mem = { - .uV = 1800000, - .mode = REGULATOR_MODE_NORMAL, - .enabled = 1, - }, - .state_disk = { - .mode = REGULATOR_MODE_NORMAL, - .enabled = 0, - }, - .always_on = 1, - .boot_on = 1, - .initial_state = PM_SUSPEND_MEM, - }, -}; - -static struct regulator_init_data ldo1_data = { - .constraints = { - .name = "VCAM/VMMC1/VMMC2", - .min_uV = 2800000, - .max_uV = 2800000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .apply_uV = 1, - }, -}; - -static struct regulator_consumer_supply ldo2_consumers[] = { - { - .supply = "AVDD", - }, - { - .supply = "HPVDD", - }, -}; - -/* CODEC and SIM */ -static struct regulator_init_data ldo2_data = { - .constraints = { - .name = "VESIM/VSIM/AVDD", - .min_uV = 3300000, - .max_uV = 3300000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .apply_uV = 1, - }, - .num_consumer_supplies = ARRAY_SIZE(ldo2_consumers), - .consumer_supplies = ldo2_consumers, -}; - -/* General */ -static struct regulator_init_data vdig_data = { - .constraints = { - .name = "VDIG", - .min_uV = 1500000, - .max_uV = 1500000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .apply_uV = 1, - .always_on = 1, - .boot_on = 1, - }, -}; - -/* Tranceivers */ -static struct regulator_init_data ldo4_data = { - .constraints = { - .name = "VRF1/CVDD_2.775", - .min_uV = 2500000, - .max_uV = 2500000, - .valid_modes_mask = REGULATOR_MODE_NORMAL, - .apply_uV = 1, - .always_on = 1, - .boot_on = 1, - }, -}; - -static struct wm8350_led_platform_data wm8350_led_data = { - .name = "wm8350:white", - .default_trigger = "heartbeat", - .max_uA = 27899, -}; - -static struct wm8350_audio_platform_data imx32ads_wm8350_setup = { - .vmid_discharge_msecs = 1000, - .drain_msecs = 30, - .cap_discharge_msecs = 700, - .vmid_charge_msecs = 700, - .vmid_s_curve = WM8350_S_CURVE_SLOW, - .dis_out4 = WM8350_DISCHARGE_SLOW, - .dis_out3 = WM8350_DISCHARGE_SLOW, - .dis_out2 = WM8350_DISCHARGE_SLOW, - .dis_out1 = WM8350_DISCHARGE_SLOW, - .vroi_out4 = WM8350_TIE_OFF_500R, - .vroi_out3 = WM8350_TIE_OFF_500R, - .vroi_out2 = WM8350_TIE_OFF_500R, - .vroi_out1 = WM8350_TIE_OFF_500R, - .vroi_enable = 0, - .codec_current_on = WM8350_CODEC_ISEL_1_0, - .codec_current_standby = WM8350_CODEC_ISEL_0_5, - .codec_current_charge = WM8350_CODEC_ISEL_1_5, -}; - -static int mx31_wm8350_init(struct wm8350 *wm8350) -{ - int i; - - wm8350_gpio_config(wm8350, 0, WM8350_GPIO_DIR_IN, - WM8350_GPIO0_PWR_ON_IN, WM8350_GPIO_ACTIVE_LOW, - WM8350_GPIO_PULL_UP, WM8350_GPIO_INVERT_OFF, - WM8350_GPIO_DEBOUNCE_ON); - - wm8350_gpio_config(wm8350, 3, WM8350_GPIO_DIR_IN, - WM8350_GPIO3_PWR_OFF_IN, WM8350_GPIO_ACTIVE_HIGH, - WM8350_GPIO_PULL_DOWN, WM8350_GPIO_INVERT_OFF, - WM8350_GPIO_DEBOUNCE_ON); - - wm8350_gpio_config(wm8350, 4, WM8350_GPIO_DIR_IN, - WM8350_GPIO4_MR_IN, WM8350_GPIO_ACTIVE_HIGH, - WM8350_GPIO_PULL_DOWN, WM8350_GPIO_INVERT_OFF, - WM8350_GPIO_DEBOUNCE_OFF); - - wm8350_gpio_config(wm8350, 7, WM8350_GPIO_DIR_IN, - WM8350_GPIO7_HIBERNATE_IN, WM8350_GPIO_ACTIVE_HIGH, - WM8350_GPIO_PULL_DOWN, WM8350_GPIO_INVERT_OFF, - WM8350_GPIO_DEBOUNCE_OFF); - - wm8350_gpio_config(wm8350, 6, WM8350_GPIO_DIR_OUT, - WM8350_GPIO6_SDOUT_OUT, WM8350_GPIO_ACTIVE_HIGH, - WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF, - WM8350_GPIO_DEBOUNCE_OFF); - - wm8350_gpio_config(wm8350, 8, WM8350_GPIO_DIR_OUT, - WM8350_GPIO8_VCC_FAULT_OUT, WM8350_GPIO_ACTIVE_LOW, - WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF, - WM8350_GPIO_DEBOUNCE_OFF); - - wm8350_gpio_config(wm8350, 9, WM8350_GPIO_DIR_OUT, - WM8350_GPIO9_BATT_FAULT_OUT, WM8350_GPIO_ACTIVE_LOW, - WM8350_GPIO_PULL_NONE, WM8350_GPIO_INVERT_OFF, - WM8350_GPIO_DEBOUNCE_OFF); - - /* Fix up for our own supplies. */ - for (i = 0; i < ARRAY_SIZE(ldo2_consumers); i++) - ldo2_consumers[i].dev = wm8350->dev; - - wm8350_register_regulator(wm8350, WM8350_DCDC_1, &sw1a_data); - wm8350_register_regulator(wm8350, WM8350_DCDC_3, &viohi_data); - wm8350_register_regulator(wm8350, WM8350_DCDC_4, &violo_data); - wm8350_register_regulator(wm8350, WM8350_DCDC_6, &sw2a_data); - wm8350_register_regulator(wm8350, WM8350_LDO_1, &ldo1_data); - wm8350_register_regulator(wm8350, WM8350_LDO_2, &ldo2_data); - wm8350_register_regulator(wm8350, WM8350_LDO_3, &vdig_data); - wm8350_register_regulator(wm8350, WM8350_LDO_4, &ldo4_data); - - /* LEDs */ - wm8350_dcdc_set_slot(wm8350, WM8350_DCDC_5, 1, 1, - WM8350_DC5_ERRACT_SHUTDOWN_CONV); - wm8350_isink_set_flash(wm8350, WM8350_ISINK_A, - WM8350_ISINK_FLASH_DISABLE, - WM8350_ISINK_FLASH_TRIG_BIT, - WM8350_ISINK_FLASH_DUR_32MS, - WM8350_ISINK_FLASH_ON_INSTANT, - WM8350_ISINK_FLASH_OFF_INSTANT, - WM8350_ISINK_FLASH_MODE_EN); - wm8350_dcdc25_set_mode(wm8350, WM8350_DCDC_5, - WM8350_ISINK_MODE_BOOST, - WM8350_ISINK_ILIM_NORMAL, - WM8350_DC5_RMP_20V, - WM8350_DC5_FBSRC_ISINKA); - wm8350_register_led(wm8350, 0, WM8350_DCDC_5, WM8350_ISINK_A, - &wm8350_led_data); - - wm8350->codec.platform_data = &imx32ads_wm8350_setup; - - return 0; -} - -static struct wm8350_platform_data __initdata mx31_wm8350_pdata = { - .init = mx31_wm8350_init, -}; -#endif - -#if defined(CONFIG_I2C_IMX) || defined(CONFIG_I2C_IMX_MODULE) -static struct i2c_board_info __initdata mx31ads_i2c1_devices[] = { -#ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 - { - I2C_BOARD_INFO("wm8350", 0x1a), - .platform_data = &mx31_wm8350_pdata, - .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), - }, -#endif -}; - -static void mxc_init_i2c(void) -{ - i2c_register_board_info(1, mx31ads_i2c1_devices, - ARRAY_SIZE(mx31ads_i2c1_devices)); - - mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MOSI, IOMUX_CONFIG_ALT1)); - mxc_iomux_mode(IOMUX_MODE(MX31_PIN_CSPI2_MISO, IOMUX_CONFIG_ALT1)); - - mxc_register_device(&mxc_i2c_device1, NULL); -} -#else -static void mxc_init_i2c(void) -{ -} -#endif - /*! * This structure defines static mappings for the i.MX31ADS board. */ static struct map_desc mx31ads_io_desc[] __initdata = { { + .virtual = AIPS1_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), + .length = AIPS1_SIZE, + .type = MT_DEVICE_NONSHARED + }, { .virtual = SPBA0_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), .length = SPBA0_SIZE, .type = MT_DEVICE_NONSHARED + }, { + .virtual = AIPS2_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), + .length = AIPS2_SIZE, + .type = MT_DEVICE_NONSHARED }, { .virtual = CS4_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(CS4_BASE_ADDR), @@ -507,13 +221,13 @@ static struct map_desc mx31ads_io_desc[] __initdata = { /*! * Set up static virtual mappings. */ -static void __init mx31ads_map_io(void) +void __init mx31ads_map_io(void) { mxc_map_io(); iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc)); } -static void __init mx31ads_init_irq(void) +void __init mx31ads_init_irq(void) { mxc_init_irq(); mx31ads_init_expio(); @@ -526,15 +240,15 @@ static void __init mxc_board_init(void) { mxc_init_extuart(); mxc_init_imx_uart(); - mxc_init_i2c(); } static void __init mx31ads_timer_init(void) { - mx31_clocks_init(26000000); + mxc_clocks_init(26000000); + mxc_timer_init("ipg_clk.0"); } -static struct sys_timer mx31ads_timer = { +struct sys_timer mx31ads_timer = { .init = mx31ads_timer_init, }; diff --git a/trunk/arch/arm/mach-mx3/mx31lite.c b/trunk/arch/arm/mach-mx3/mx31lite.c index 894d98cd9941..c43440070143 100644 --- a/trunk/arch/arm/mach-mx3/mx31lite.c +++ b/trunk/arch/arm/mach-mx3/mx31lite.c @@ -42,10 +42,20 @@ */ static struct map_desc mx31lite_io_desc[] __initdata = { { + .virtual = AIPS1_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), + .length = AIPS1_SIZE, + .type = MT_DEVICE_NONSHARED + }, { .virtual = SPBA0_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(SPBA0_BASE_ADDR), .length = SPBA0_SIZE, .type = MT_DEVICE_NONSHARED + }, { + .virtual = AIPS2_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), + .length = AIPS2_SIZE, + .type = MT_DEVICE_NONSHARED }, { .virtual = CS4_BASE_ADDR_VIRT, .pfn = __phys_to_pfn(CS4_BASE_ADDR), @@ -72,7 +82,8 @@ static void __init mxc_board_init(void) static void __init mx31lite_timer_init(void) { - mx31_clocks_init(26000000); + mxc_clocks_init(26000000); + mxc_timer_init("ipg_clk.0"); } struct sys_timer mx31lite_timer = { diff --git a/trunk/arch/arm/mach-mx3/mx31moboard-devboard.c b/trunk/arch/arm/mach-mx3/mx31moboard-devboard.c deleted file mode 100644 index d080b4add79c..000000000000 --- a/trunk/arch/arm/mach-mx3/mx31moboard-devboard.c +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include -#include - -#include - -#include -#include -#include -#include - -#include "devices.h" - -static struct imxuart_platform_data uart_pdata = { - .flags = IMXUART_HAVE_RTSCTS, -}; - -static int mxc_uart1_pins[] = { - MX31_PIN_CTS2__CTS2, MX31_PIN_RTS2__RTS2, - MX31_PIN_TXD2__TXD2, MX31_PIN_RXD2__RXD2, -}; - -/* - * system init for baseboard usage. Will be called by mx31moboard init. - */ -void __init mx31moboard_devboard_init(void) -{ - printk(KERN_INFO "Initializing mx31devboard peripherals\n"); - mxc_iomux_setup_multiple_pins(mxc_uart1_pins, ARRAY_SIZE(mxc_uart1_pins), "uart1"); - mxc_register_device(&mxc_uart_device1, &uart_pdata); -} diff --git a/trunk/arch/arm/mach-mx3/mx31moboard-marxbot.c b/trunk/arch/arm/mach-mx3/mx31moboard-marxbot.c deleted file mode 100644 index 9ef9566823fb..000000000000 --- a/trunk/arch/arm/mach-mx3/mx31moboard-marxbot.c +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (C) 2009 Valentin Longchamp, EPFL Mobots group - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include -#include - -#include - -#include -#include -#include -#include - -#include "devices.h" - -/* - * system init for baseboard usage. Will be called by mx31moboard init. - */ -void __init mx31moboard_marxbot_init(void) -{ - printk(KERN_INFO "Initializing mx31marxbot peripherals\n"); -} diff --git a/trunk/arch/arm/mach-mx3/mx31moboard.c b/trunk/arch/arm/mach-mx3/mx31moboard.c index 34c2a1b99d4f..c29098af7394 100644 --- a/trunk/arch/arm/mach-mx3/mx31moboard.c +++ b/trunk/arch/arm/mach-mx3/mx31moboard.c @@ -32,7 +32,6 @@ #include #include #include -#include #include "devices.h" @@ -64,18 +63,6 @@ static struct platform_device *devices[] __initdata = { &mx31moboard_flash, }; -static int mxc_uart0_pins[] = { - MX31_PIN_CTS1__CTS1, MX31_PIN_RTS1__RTS1, - MX31_PIN_TXD1__TXD1, MX31_PIN_RXD1__RXD1, -}; -static int mxc_uart4_pins[] = { - MX31_PIN_PC_RST__CTS5, MX31_PIN_PC_VS2__RTS5, - MX31_PIN_PC_BVD2__TXD5, MX31_PIN_PC_BVD1__RXD5, -}; - -static int mx31moboard_baseboard; -core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); - /* * Board specific initialization. */ @@ -83,29 +70,58 @@ static void __init mxc_board_init(void) { platform_add_devices(devices, ARRAY_SIZE(devices)); - mxc_iomux_setup_multiple_pins(mxc_uart0_pins, ARRAY_SIZE(mxc_uart0_pins), "uart0"); + mxc_iomux_mode(MX31_PIN_CTS1__CTS1); + mxc_iomux_mode(MX31_PIN_RTS1__RTS1); + mxc_iomux_mode(MX31_PIN_TXD1__TXD1); + mxc_iomux_mode(MX31_PIN_RXD1__RXD1); + mxc_register_device(&mxc_uart_device0, &uart_pdata); - mxc_iomux_setup_multiple_pins(mxc_uart4_pins, ARRAY_SIZE(mxc_uart4_pins), "uart4"); + mxc_iomux_mode(MX31_PIN_CTS2__CTS2); + mxc_iomux_mode(MX31_PIN_RTS2__RTS2); + mxc_iomux_mode(MX31_PIN_TXD2__TXD2); + mxc_iomux_mode(MX31_PIN_RXD2__RXD2); + + mxc_register_device(&mxc_uart_device1, &uart_pdata); + + mxc_iomux_mode(MX31_PIN_PC_RST__CTS5); + mxc_iomux_mode(MX31_PIN_PC_VS2__RTS5); + mxc_iomux_mode(MX31_PIN_PC_BVD2__TXD5); + mxc_iomux_mode(MX31_PIN_PC_BVD1__RXD5); + mxc_register_device(&mxc_uart_device4, &uart_pdata); +} - switch (mx31moboard_baseboard) { - case MX31NOBOARD: - break; - case MX31DEVBOARD: - mx31moboard_devboard_init(); - break; - case MX31MARXBOT: - mx31moboard_marxbot_init(); - break; - default: - printk(KERN_ERR "Illegal mx31moboard_baseboard type %d\n", mx31moboard_baseboard); - } +/* + * This structure defines static mappings for the mx31moboard. + */ +static struct map_desc mx31moboard_io_desc[] __initdata = { + { + .virtual = AIPS1_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), + .length = AIPS1_SIZE, + .type = MT_DEVICE_NONSHARED + }, { + .virtual = AIPS2_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), + .length = AIPS2_SIZE, + .type = MT_DEVICE_NONSHARED + }, +}; + +/* + * Set up static virtual mappings. + */ +void __init mx31moboard_map_io(void) +{ + mxc_map_io(); + iotable_init(mx31moboard_io_desc, ARRAY_SIZE(mx31moboard_io_desc)); } static void __init mx31moboard_timer_init(void) { - mx31_clocks_init(26000000); + mxc_clocks_init(26000000); + mxc_timer_init("ipg_clk.0"); } struct sys_timer mx31moboard_timer = { @@ -117,7 +133,7 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") .phys_io = AIPS1_BASE_ADDR, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, - .map_io = mxc_map_io, + .map_io = mx31moboard_map_io, .init_irq = mxc_init_irq, .init_machine = mxc_board_init, .timer = &mx31moboard_timer, diff --git a/trunk/arch/arm/mach-mx3/mx31pdk.c b/trunk/arch/arm/mach-mx3/mx31pdk.c index bc63f1785691..d464d068a4a6 100644 --- a/trunk/arch/arm/mach-mx3/mx31pdk.c +++ b/trunk/arch/arm/mach-mx3/mx31pdk.c @@ -45,19 +45,42 @@ static struct imxuart_platform_data uart_pdata = { .flags = IMXUART_HAVE_RTSCTS, }; -static int uart_pins[] = { - MX31_PIN_CTS1__CTS1, - MX31_PIN_RTS1__RTS1, - MX31_PIN_TXD1__TXD1, - MX31_PIN_RXD1__RXD1 -}; - static inline void mxc_init_imx_uart(void) { - mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), "uart-0"); + mxc_iomux_mode(MX31_PIN_CTS1__CTS1); + mxc_iomux_mode(MX31_PIN_RTS1__RTS1); + mxc_iomux_mode(MX31_PIN_TXD1__TXD1); + mxc_iomux_mode(MX31_PIN_RXD1__RXD1); + mxc_register_device(&mxc_uart_device0, &uart_pdata); } +/*! + * This structure defines static mappings for the i.MX31PDK board. + */ +static struct map_desc mx31pdk_io_desc[] __initdata = { + { + .virtual = AIPS1_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), + .length = AIPS1_SIZE, + .type = MT_DEVICE_NONSHARED + }, { + .virtual = AIPS2_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), + .length = AIPS2_SIZE, + .type = MT_DEVICE_NONSHARED + }, +}; + +/*! + * Set up static virtual mappings. + */ +static void __init mx31pdk_map_io(void) +{ + mxc_map_io(); + iotable_init(mx31pdk_io_desc, ARRAY_SIZE(mx31pdk_io_desc)); +} + /*! * Board specific initialization. */ @@ -68,7 +91,8 @@ static void __init mxc_board_init(void) static void __init mx31pdk_timer_init(void) { - mx31_clocks_init(26000000); + mxc_clocks_init(26000000); + mxc_timer_init("ipg_clk.0"); } static struct sys_timer mx31pdk_timer = { @@ -84,7 +108,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") .phys_io = AIPS1_BASE_ADDR, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, - .map_io = mxc_map_io, + .map_io = mx31pdk_map_io, .init_irq = mxc_init_irq, .init_machine = mxc_board_init, .timer = &mx31pdk_timer, diff --git a/trunk/arch/arm/mach-mx3/pcm037.c b/trunk/arch/arm/mach-mx3/pcm037.c index 5fce022114de..8cea82587222 100644 --- a/trunk/arch/arm/mach-mx3/pcm037.c +++ b/trunk/arch/arm/mach-mx3/pcm037.c @@ -26,8 +26,6 @@ #include #include #include -#include -#include #include #include @@ -39,10 +37,6 @@ #include #include #include -#include -#ifdef CONFIG_I2C_IMX -#include -#endif #include "devices.h" @@ -123,90 +117,12 @@ static struct mxc_nand_platform_data pcm037_nand_board_info = { .hw_ecc = 1, }; -#ifdef CONFIG_I2C_IMX -static int i2c_1_pins[] = { - MX31_PIN_CSPI2_MOSI__SCL, - MX31_PIN_CSPI2_MISO__SDA, -}; - -static int pcm037_i2c_1_init(struct device *dev) -{ - return mxc_iomux_setup_multiple_pins(i2c_1_pins, ARRAY_SIZE(i2c_1_pins), - "i2c-1"); -} - -static void pcm037_i2c_1_exit(struct device *dev) -{ - mxc_iomux_release_multiple_pins(i2c_1_pins, ARRAY_SIZE(i2c_1_pins)); -} - -static struct imxi2c_platform_data pcm037_i2c_1_data = { - .bitrate = 100000, - .init = pcm037_i2c_1_init, - .exit = pcm037_i2c_1_exit, -}; - -static struct at24_platform_data board_eeprom = { - .byte_len = 4096, - .page_size = 32, - .flags = AT24_FLAG_ADDR16, -}; - -static struct i2c_board_info pcm037_i2c_devices[] = { - { - I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */ - .platform_data = &board_eeprom, - }, { - I2C_BOARD_INFO("rtc-pcf8563", 0x51), - .type = "pcf8563", - } -}; -#endif - -static int sdhc1_pins[] = { - MX31_PIN_SD1_DATA3__SD1_DATA3, - MX31_PIN_SD1_DATA2__SD1_DATA2, - MX31_PIN_SD1_DATA1__SD1_DATA1, - MX31_PIN_SD1_DATA0__SD1_DATA0, - MX31_PIN_SD1_CLK__SD1_CLK, - MX31_PIN_SD1_CMD__SD1_CMD, -}; - -static int pcm970_sdhc1_init(struct device *dev, irq_handler_t h, void *data) -{ - return mxc_iomux_setup_multiple_pins(sdhc1_pins, ARRAY_SIZE(sdhc1_pins), - "sdhc-1"); -} - -static void pcm970_sdhc1_exit(struct device *dev, void *data) -{ - mxc_iomux_release_multiple_pins(sdhc1_pins, ARRAY_SIZE(sdhc1_pins)); -} - -/* No card and rw detection at the moment */ -static struct imxmmc_platform_data sdhc_pdata = { - .init = pcm970_sdhc1_init, - .exit = pcm970_sdhc1_exit, -}; - static struct platform_device *devices[] __initdata = { &pcm037_flash, &pcm037_eth, &pcm037_sram_device, }; -static int uart0_pins[] = { - MX31_PIN_CTS1__CTS1, - MX31_PIN_RTS1__RTS1, - MX31_PIN_TXD1__TXD1, - MX31_PIN_RXD1__RXD1 -}; - -static int uart2_pins[] = { - MX31_PIN_CSPI3_MOSI__RXD3, - MX31_PIN_CSPI3_MISO__TXD3 -}; - /* * Board specific initialization. */ @@ -214,33 +130,59 @@ static void __init mxc_board_init(void) { platform_add_devices(devices, ARRAY_SIZE(devices)); - mxc_iomux_setup_multiple_pins(uart0_pins, ARRAY_SIZE(uart0_pins), "uart-0"); + mxc_iomux_mode(MX31_PIN_CTS1__CTS1); + mxc_iomux_mode(MX31_PIN_RTS1__RTS1); + mxc_iomux_mode(MX31_PIN_TXD1__TXD1); + mxc_iomux_mode(MX31_PIN_RXD1__RXD1); + mxc_register_device(&mxc_uart_device0, &uart_pdata); - mxc_iomux_setup_multiple_pins(uart2_pins, ARRAY_SIZE(uart2_pins), "uart-2"); + mxc_iomux_mode(MX31_PIN_CSPI3_MOSI__RXD3); + mxc_iomux_mode(MX31_PIN_CSPI3_MISO__TXD3); + mxc_register_device(&mxc_uart_device2, &uart_pdata); - mxc_iomux_setup_pin(MX31_PIN_BATT_LINE__OWIRE, "batt-0wire"); + mxc_iomux_mode(MX31_PIN_BATT_LINE__OWIRE); mxc_register_device(&mxc_w1_master_device, NULL); /* SMSC9215 IRQ pin */ - if (!mxc_iomux_setup_pin(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO), - "pcm037-eth")) + mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO)); + if (!gpio_request(MX31_PIN_GPIO3_1, "pcm037-eth")) gpio_direction_input(MX31_PIN_GPIO3_1); -#ifdef CONFIG_I2C_IMX - i2c_register_board_info(1, pcm037_i2c_devices, - ARRAY_SIZE(pcm037_i2c_devices)); - - mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data); -#endif mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info); - mxc_register_device(&mxcsdhc_device0, &sdhc_pdata); +} + +/* + * This structure defines static mappings for the pcm037 board. + */ +static struct map_desc pcm037_io_desc[] __initdata = { + { + .virtual = AIPS1_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), + .length = AIPS1_SIZE, + .type = MT_DEVICE_NONSHARED + }, { + .virtual = AIPS2_BASE_ADDR_VIRT, + .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), + .length = AIPS2_SIZE, + .type = MT_DEVICE_NONSHARED + }, +}; + +/* + * Set up static virtual mappings. + */ +void __init pcm037_map_io(void) +{ + mxc_map_io(); + iotable_init(pcm037_io_desc, ARRAY_SIZE(pcm037_io_desc)); } static void __init pcm037_timer_init(void) { - mx31_clocks_init(26000000); + mxc_clocks_init(26000000); + mxc_timer_init("ipg_clk.0"); } struct sys_timer pcm037_timer = { @@ -252,7 +194,7 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037") .phys_io = AIPS1_BASE_ADDR, .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, .boot_params = PHYS_OFFSET + 0x100, - .map_io = mxc_map_io, + .map_io = pcm037_map_io, .init_irq = mxc_init_irq, .init_machine = mxc_board_init, .timer = &pcm037_timer, diff --git a/trunk/arch/arm/mach-mx3/qong.c b/trunk/arch/arm/mach-mx3/qong.c deleted file mode 100644 index 6c4283cec6f4..000000000000 --- a/trunk/arch/arm/mach-mx3/qong.c +++ /dev/null @@ -1,312 +0,0 @@ -/* - * Copyright (C) 2009 Ilya Yanok, Emcraft Systems Ltd, - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "devices.h" - -/* FPGA defines */ -#define QONG_FPGA_VERSION(major, minor, rev) \ - (((major & 0xF) << 12) | ((minor & 0xF) << 8) | (rev & 0xFF)) - -#define QONG_FPGA_BASEADDR CS1_BASE_ADDR -#define QONG_FPGA_PERIPH_SIZE (1 << 24) - -#define QONG_FPGA_CTRL_BASEADDR QONG_FPGA_BASEADDR -#define QONG_FPGA_CTRL_SIZE 0x10 -/* FPGA control registers */ -#define QONG_FPGA_CTRL_VERSION 0x00 - -#define QONG_DNET_ID 1 -#define QONG_DNET_BASEADDR \ - (QONG_FPGA_BASEADDR + QONG_DNET_ID * QONG_FPGA_PERIPH_SIZE) -#define QONG_DNET_SIZE 0x00001000 - -#define QONG_FPGA_IRQ IOMUX_TO_IRQ(MX31_PIN_DTR_DCE1) - -/* - * This file contains the board-specific initialization routines. - */ - -static struct imxuart_platform_data uart_pdata = { - .flags = IMXUART_HAVE_RTSCTS, -}; - -static int uart_pins[] = { - MX31_PIN_CTS1__CTS1, - MX31_PIN_RTS1__RTS1, - MX31_PIN_TXD1__TXD1, - MX31_PIN_RXD1__RXD1 -}; - -static inline void mxc_init_imx_uart(void) -{ - mxc_iomux_setup_multiple_pins(uart_pins, ARRAY_SIZE(uart_pins), - "uart-0"); - mxc_register_device(&mxc_uart_device0, &uart_pdata); -} - -static struct resource dnet_resources[] = { - [0] = { - .name = "dnet-memory", - .start = QONG_DNET_BASEADDR, - .end = QONG_DNET_BASEADDR + QONG_DNET_SIZE - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = QONG_FPGA_IRQ, - .end = QONG_FPGA_IRQ, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device dnet_device = { - .name = "dnet", - .id = -1, - .num_resources = ARRAY_SIZE(dnet_resources), - .resource = dnet_resources, -}; - -static int __init qong_init_dnet(void) -{ - int ret; - - ret = platform_device_register(&dnet_device); - return ret; -} - -/* MTD NOR flash */ - -static struct physmap_flash_data qong_flash_data = { - .width = 2, -}; - -static struct resource qong_flash_resource = { - .start = CS0_BASE_ADDR, - .end = CS0_BASE_ADDR + QONG_NOR_SIZE - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device qong_nor_mtd_device = { - .name = "physmap-flash", - .id = 0, - .dev = { - .platform_data = &qong_flash_data, - }, - .resource = &qong_flash_resource, - .num_resources = 1, -}; - -static void qong_init_nor_mtd(void) -{ - (void)platform_device_register(&qong_nor_mtd_device); -} - -/* - * Hardware specific access to control-lines - */ -static void qong_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) -{ - struct nand_chip *nand_chip = mtd->priv; - - if (cmd == NAND_CMD_NONE) - return; - - if (ctrl & NAND_CLE) - writeb(cmd, nand_chip->IO_ADDR_W + (1 << 24)); - else - writeb(cmd, nand_chip->IO_ADDR_W + (1 << 23)); -} - -/* - * Read the Device Ready pin. - */ -static int qong_nand_device_ready(struct mtd_info *mtd) -{ - return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_NFRB)); -} - -static void qong_nand_select_chip(struct mtd_info *mtd, int chip) -{ - if (chip >= 0) - gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 0); - else - gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 1); -} - -static struct platform_nand_data qong_nand_data = { - .chip = { - .chip_delay = 20, - .options = 0, - }, - .ctrl = { - .cmd_ctrl = qong_nand_cmd_ctrl, - .dev_ready = qong_nand_device_ready, - .select_chip = qong_nand_select_chip, - } -}; - -static struct resource qong_nand_resource = { - .start = CS3_BASE_ADDR, - .end = CS3_BASE_ADDR + SZ_32M - 1, - .flags = IORESOURCE_MEM, -}; - -static struct platform_device qong_nand_device = { - .name = "gen_nand", - .id = -1, - .dev = { - .platform_data = &qong_nand_data, - }, - .num_resources = 1, - .resource = &qong_nand_resource, -}; - -static void __init qong_init_nand_mtd(void) -{ - /* init CS */ - __raw_writel(0x00004f00, CSCR_U(3)); - __raw_writel(0x20013b31, CSCR_L(3)); - __raw_writel(0x00020800, CSCR_A(3)); - mxc_iomux_set_gpr(MUX_SDCTL_CSD1_SEL, true); - - /* enable pin */ - mxc_iomux_mode(IOMUX_MODE(MX31_PIN_NFCE_B, IOMUX_CONFIG_GPIO)); - if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), "nand_enable")) - gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 0); - - /* ready/busy pin */ - mxc_iomux_mode(IOMUX_MODE(MX31_PIN_NFRB, IOMUX_CONFIG_GPIO)); - if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFRB), "nand_rdy")) - gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_NFRB)); - - /* write protect pin */ - mxc_iomux_mode(IOMUX_MODE(MX31_PIN_NFWP_B, IOMUX_CONFIG_GPIO)); - if (!gpio_request(IOMUX_TO_GPIO(MX31_PIN_NFWP_B), "nand_wp")) - gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_NFWP_B)); - - platform_device_register(&qong_nand_device); -} - -static void __init qong_init_fpga(void) -{ - void __iomem *regs; - u32 fpga_ver; - - regs = ioremap(QONG_FPGA_CTRL_BASEADDR, QONG_FPGA_CTRL_SIZE); - if (!regs) { - printk(KERN_ERR "%s: failed to map registers, aborting.\n", - __func__); - return; - } - - fpga_ver = readl(regs + QONG_FPGA_CTRL_VERSION); - iounmap(regs); - printk(KERN_INFO "Qong FPGA version %d.%d.%d\n", - (fpga_ver & 0xF000) >> 12, - (fpga_ver & 0x0F00) >> 8, fpga_ver & 0x00FF); - if (fpga_ver < QONG_FPGA_VERSION(0, 8, 7)) { - printk(KERN_ERR "qong: Unexpected FPGA version, FPGA-based " - "devices won't be registered!\n"); - return; - } - - /* register FPGA-based devices */ - qong_init_nand_mtd(); - qong_init_dnet(); -} - -/* - * This structure defines the MX31 memory map. - */ -static struct map_desc qong_io_desc[] __initdata = { - { - .virtual = AIPS1_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(AIPS1_BASE_ADDR), - .length = AIPS1_SIZE, - .type = MT_DEVICE_NONSHARED - }, { - .virtual = AIPS2_BASE_ADDR_VIRT, - .pfn = __phys_to_pfn(AIPS2_BASE_ADDR), - .length = AIPS2_SIZE, - .type = MT_DEVICE_NONSHARED - } -}; - -/* - * Set up static virtual mappings. - */ -static void __init qong_map_io(void) -{ - mxc_map_io(); - iotable_init(qong_io_desc, ARRAY_SIZE(qong_io_desc)); -} - -/* - * Board specific initialization. - */ -static void __init mxc_board_init(void) -{ - mxc_init_imx_uart(); - qong_init_nor_mtd(); - qong_init_fpga(); -} - -static void __init qong_timer_init(void) -{ - mx31_clocks_init(26000000); -} - -static struct sys_timer qong_timer = { - .init = qong_timer_init, -}; - -/* - * The following uses standard kernel macros defined in arch.h in order to - * initialize __mach_desc_QONG data structure. - */ - -MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") - /* Maintainer: DENX Software Engineering GmbH */ - .phys_io = AIPS1_BASE_ADDR, - .io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc, - .boot_params = PHYS_OFFSET + 0x100, - .map_io = qong_map_io, - .init_irq = mxc_init_irq, - .init_machine = mxc_board_init, - .timer = &qong_timer, -MACHINE_END diff --git a/trunk/arch/arm/mach-netx/include/mach/system.h b/trunk/arch/arm/mach-netx/include/mach/system.h index dc7b4bc003c5..6c1023b8a9ab 100644 --- a/trunk/arch/arm/mach-netx/include/mach/system.h +++ b/trunk/arch/arm/mach-netx/include/mach/system.h @@ -28,7 +28,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { writel(NETX_SYSTEM_RES_CR_FIRMW_RES_EN | NETX_SYSTEM_RES_CR_FIRMW_RES, NETX_SYSTEM_RES_CR); diff --git a/trunk/arch/arm/mach-ns9xxx/include/mach/system.h b/trunk/arch/arm/mach-ns9xxx/include/mach/system.h index 1561588ca364..e2068c57415f 100644 --- a/trunk/arch/arm/mach-ns9xxx/include/mach/system.h +++ b/trunk/arch/arm/mach-ns9xxx/include/mach/system.h @@ -20,7 +20,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { #ifdef CONFIG_PROCESSOR_NS9360 if (processor_is_ns9360()) diff --git a/trunk/arch/arm/mach-omap1/board-h2.c b/trunk/arch/arm/mach-omap1/board-h2.c index 0d784a795092..b240c5f861da 100644 --- a/trunk/arch/arm/mach-omap1/board-h2.c +++ b/trunk/arch/arm/mach-omap1/board-h2.c @@ -37,14 +37,16 @@ #include #include +#include #include -#include #include #include #include #include #include #include +#include +#include static int h2_keymap[] = { KEY(0, 0, KEY_LEFT), @@ -290,6 +292,41 @@ static struct platform_device h2_lcd_device = { .id = -1, }; +static struct omap_mcbsp_reg_cfg mcbsp_regs = { + .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), + .spcr1 = RINTM(3) | RRST, + .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | + RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1), + .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), + .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | + XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG, + .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), + .srgr1 = FWID(15), + .srgr2 = GSYNC | CLKSP | FSGM | FPER(31), + + .pcr0 = CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP, + /*.pcr0 = CLKXP | CLKRP,*/ /* mcbsp: slave */ +}; + +static struct omap_alsa_codec_config alsa_config = { + .name = "H2 TSC2101", + .mcbsp_regs_alsa = &mcbsp_regs, + .codec_configure_dev = NULL, /* tsc2101_configure, */ + .codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */ + .codec_clock_setup = NULL, /* tsc2101_clock_setup, */ + .codec_clock_on = NULL, /* tsc2101_clock_on, */ + .codec_clock_off = NULL, /* tsc2101_clock_off, */ + .get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */ +}; + +static struct platform_device h2_mcbsp1_device = { + .name = "omap_alsa_mcbsp", + .id = 1, + .dev = { + .platform_data = &alsa_config, + }, +}; + static struct platform_device *h2_devices[] __initdata = { &h2_nor_device, &h2_nand_device, @@ -297,6 +334,7 @@ static struct platform_device *h2_devices[] __initdata = { &h2_irda_device, &h2_kp_device, &h2_lcd_device, + &h2_mcbsp1_device, }; static void __init h2_init_smc91x(void) @@ -371,6 +409,11 @@ static struct omap_board_config_kernel h2_config[] __initdata = { #define H2_NAND_RB_GPIO_PIN 62 +static int h2_nand_dev_ready(struct omap_nand_platform_data *data) +{ + return gpio_get_value(H2_NAND_RB_GPIO_PIN); +} + static void __init h2_init(void) { /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped diff --git a/trunk/arch/arm/mach-omap1/board-h3.c b/trunk/arch/arm/mach-omap1/board-h3.c index bf08b6ad22ee..5157eea9be35 100644 --- a/trunk/arch/arm/mach-omap1/board-h3.c +++ b/trunk/arch/arm/mach-omap1/board-h3.c @@ -49,6 +49,8 @@ #include #include #include +#include +#include #define H3_TS_GPIO 48 @@ -385,6 +387,41 @@ static struct spi_board_info h3_spi_board_info[] __initdata = { }, }; +static struct omap_mcbsp_reg_cfg mcbsp_regs = { + .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), + .spcr1 = RINTM(3) | RRST, + .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | + RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1), + .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), + .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | + XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG, + .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), + .srgr1 = FWID(15), + .srgr2 = GSYNC | CLKSP | FSGM | FPER(31), + + .pcr0 = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP, + /*.pcr0 = CLKXP | CLKRP,*/ /* mcbsp: slave */ +}; + +static struct omap_alsa_codec_config alsa_config = { + .name = "H3 TSC2101", + .mcbsp_regs_alsa = &mcbsp_regs, + .codec_configure_dev = NULL, /* tsc2101_configure, */ + .codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */ + .codec_clock_setup = NULL, /* tsc2101_clock_setup, */ + .codec_clock_on = NULL, /* tsc2101_clock_on, */ + .codec_clock_off = NULL, /* tsc2101_clock_off, */ + .get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */ +}; + +static struct platform_device h3_mcbsp1_device = { + .name = "omap_alsa_mcbsp", + .id = 1, + .dev = { + .platform_data = &alsa_config, + }, +}; + static struct platform_device *devices[] __initdata = { &nor_device, &nand_device, @@ -393,6 +430,7 @@ static struct platform_device *devices[] __initdata = { &h3_irda_device, &h3_kp_device, &h3_lcd_device, + &h3_mcbsp1_device, }; static struct omap_usb_config h3_usb_config __initdata = { @@ -434,6 +472,18 @@ static struct i2c_board_info __initdata h3_i2c_board_info[] = { }, }; +static struct omap_gpio_switch h3_gpio_switches[] __initdata = { + { + .name = "mmc_slot", + .gpio = OMAP_MPUIO(1), + .type = OMAP_GPIO_SWITCH_TYPE_COVER, + .debounce_rising = 100, + .debounce_falling = 0, + .notify = h3_mmc_slot_cover_handler, + .notify_data = NULL, + }, +}; + #define H3_NAND_RB_GPIO_PIN 10 static int nand_dev_ready(struct omap_nand_platform_data *data) diff --git a/trunk/arch/arm/mach-omap1/board-innovator.c b/trunk/arch/arm/mach-omap1/board-innovator.c index 071cd02a734e..af2fb9070083 100644 --- a/trunk/arch/arm/mach-omap1/board-innovator.c +++ b/trunk/arch/arm/mach-omap1/board-innovator.c @@ -37,6 +37,8 @@ #include #include #include +#include +#include #include static int innovator_keymap[] = { @@ -113,6 +115,42 @@ static struct platform_device innovator_flash_device = { .resource = &innovator_flash_resource, }; +#define DEFAULT_BITPERSAMPLE 16 + +static struct omap_mcbsp_reg_cfg mcbsp_regs = { + .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), + .spcr1 = RINTM(3) | RRST, + .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | + RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0), + .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), + .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | + XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG, + .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), + .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1), + .srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1), + /*.pcr0 = FSXM | FSRM | CLKXM | CLKRM | CLKXP | CLKRP,*/ /* mcbsp: master */ + .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ +}; + +static struct omap_alsa_codec_config alsa_config = { + .name = "OMAP Innovator AIC23", + .mcbsp_regs_alsa = &mcbsp_regs, + .codec_configure_dev = NULL, /* aic23_configure, */ + .codec_set_samplerate = NULL, /* aic23_set_samplerate, */ + .codec_clock_setup = NULL, /* aic23_clock_setup, */ + .codec_clock_on = NULL, /* aic23_clock_on, */ + .codec_clock_off = NULL, /* aic23_clock_off, */ + .get_default_samplerate = NULL, /* aic23_get_default_samplerate, */ +}; + +static struct platform_device innovator_mcbsp1_device = { + .name = "omap_alsa_mcbsp", + .id = 1, + .dev = { + .platform_data = &alsa_config, + }, +}; + static struct resource innovator_kp_resources[] = { [0] = { .start = INT_KEYBOARD, @@ -189,6 +227,7 @@ static struct platform_device innovator1510_spi_device = { static struct platform_device *innovator1510_devices[] __initdata = { &innovator_flash_device, &innovator1510_smc91x_device, + &innovator_mcbsp1_device, &innovator_kp_device, &innovator1510_lcd_device, &innovator1510_spi_device, diff --git a/trunk/arch/arm/mach-omap1/board-nokia770.c b/trunk/arch/arm/mach-omap1/board-nokia770.c index af51e0b180f2..4970c402a594 100644 --- a/trunk/arch/arm/mach-omap1/board-nokia770.c +++ b/trunk/arch/arm/mach-omap1/board-nokia770.c @@ -32,6 +32,7 @@ #include #include #include +#include #include #include #include @@ -260,13 +261,6 @@ static DEFINE_MUTEX(audio_pwr_lock); */ static int audio_pwr_state = -1; -static inline void aic23_power_up(void) -{ -} -static inline void aic23_power_down(void) -{ -} - /* * audio_pwr_up / down should be called under audio_pwr_lock */ diff --git a/trunk/arch/arm/mach-omap1/board-osk.c b/trunk/arch/arm/mach-omap1/board-osk.c index 1a16ecb2ccc8..ff9e67baa5c9 100644 --- a/trunk/arch/arm/mach-omap1/board-osk.c +++ b/trunk/arch/arm/mach-omap1/board-osk.c @@ -51,6 +51,8 @@ #include #include #include +#include +#include static struct mtd_partition osk_partitions[] = { /* bootloader (U-Boot, etc) in first sector */ @@ -139,10 +141,47 @@ static struct platform_device osk5912_cf_device = { .resource = osk5912_cf_resources, }; +#define DEFAULT_BITPERSAMPLE 16 + +static struct omap_mcbsp_reg_cfg mcbsp_regs = { + .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), + .spcr1 = RINTM(3) | RRST, + .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | + RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0), + .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), + .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | + XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG, + .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), + .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1), + .srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1), + /*.pcr0 = FSXM | FSRM | CLKXM | CLKRM | CLKXP | CLKRP,*/ /* mcbsp: master */ + .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ +}; + +static struct omap_alsa_codec_config alsa_config = { + .name = "OSK AIC23", + .mcbsp_regs_alsa = &mcbsp_regs, + .codec_configure_dev = NULL, /* aic23_configure, */ + .codec_set_samplerate = NULL, /* aic23_set_samplerate, */ + .codec_clock_setup = NULL, /* aic23_clock_setup, */ + .codec_clock_on = NULL, /* aic23_clock_on, */ + .codec_clock_off = NULL, /* aic23_clock_off, */ + .get_default_samplerate = NULL, /* aic23_get_default_samplerate, */ +}; + +static struct platform_device osk5912_mcbsp1_device = { + .name = "omap_alsa_mcbsp", + .id = 1, + .dev = { + .platform_data = &alsa_config, + }, +}; + static struct platform_device *osk5912_devices[] __initdata = { &osk5912_flash_device, &osk5912_smc91x_device, &osk5912_cf_device, + &osk5912_mcbsp1_device, }; static struct gpio_led tps_leds[] = { @@ -220,10 +259,8 @@ static struct i2c_board_info __initdata osk_i2c_board_info[] = { .platform_data = &tps_board, }, - { - I2C_BOARD_INFO("tlv320aic23", 0x1B), - }, /* TODO when driver support is ready: + * - aic23 audio chip at 0x1a * - optionally on Mistral, ov9640 camera sensor at 0x30 */ }; diff --git a/trunk/arch/arm/mach-omap1/board-palmte.c b/trunk/arch/arm/mach-omap1/board-palmte.c index 99f2b43f2541..75e32d35afd9 100644 --- a/trunk/arch/arm/mach-omap1/board-palmte.c +++ b/trunk/arch/arm/mach-omap1/board-palmte.c @@ -42,6 +42,8 @@ #include #include #include +#include +#include static void __init omap_palmte_init_irq(void) { @@ -193,6 +195,15 @@ static struct omap_usb_config palmte_usb_config __initdata = { .pins[0] = 2, }; +static struct omap_mmc_config palmte_mmc_config __initdata = { + .mmc[0] = { + .enabled = 1, + .wp_pin = PALMTE_MMC_WP_GPIO, + .power_pin = PALMTE_MMC_POWER_GPIO, + .switch_pin = PALMTE_MMC_SWITCH_GPIO, + }, +}; + static struct omap_lcd_config palmte_lcd_config __initdata = { .ctrl_name = "internal", }; @@ -201,6 +212,24 @@ static struct omap_uart_config palmte_uart_config __initdata = { .enabled_uarts = (1 << 0) | (1 << 1) | (0 << 2), }; +static struct omap_mcbsp_reg_cfg palmte_mcbsp1_regs = { + .spcr2 = FRST | GRST | XRST | XINTM(3), + .xcr2 = XDATDLY(1) | XFIG, + .xcr1 = XWDLEN1(OMAP_MCBSP_WORD_32), + .pcr0 = SCLKME | FSXP | CLKXP, +}; + +static struct omap_alsa_codec_config palmte_alsa_config = { + .name = "TSC2102 audio", + .mcbsp_regs_alsa = &palmte_mcbsp1_regs, + .codec_configure_dev = NULL, /* tsc2102_configure, */ + .codec_set_samplerate = NULL, /* tsc2102_set_samplerate, */ + .codec_clock_setup = NULL, /* tsc2102_clock_setup, */ + .codec_clock_on = NULL, /* tsc2102_clock_on, */ + .codec_clock_off = NULL, /* tsc2102_clock_off, */ + .get_default_samplerate = NULL, /* tsc2102_get_default_samplerate, */ +}; + #ifdef CONFIG_APM /* * Values measured in 10 minute intervals averaged over 10 samples. diff --git a/trunk/arch/arm/mach-omap1/board-palmtt.c b/trunk/arch/arm/mach-omap1/board-palmtt.c index 1cbc1275c95f..5c001afe8062 100644 --- a/trunk/arch/arm/mach-omap1/board-palmtt.c +++ b/trunk/arch/arm/mach-omap1/board-palmtt.c @@ -30,6 +30,7 @@ #include #include +#include #include #include #include @@ -39,6 +40,7 @@ #include #include #include +#include #include #include @@ -120,6 +122,44 @@ static struct platform_device palmtt_flash_device = { .resource = &palmtt_flash_resource, }; +#define DEFAULT_BITPERSAMPLE 16 + +static struct omap_mcbsp_reg_cfg mcbsp_regs = { + .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), + .spcr1 = RINTM(3) | RRST, + .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | + RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0), + .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | + RWDLEN1(OMAP_MCBSP_WORD_16), + .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | + XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG, + .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | + XWDLEN1(OMAP_MCBSP_WORD_16), + .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1), + .srgr2 = GSYNC | CLKSP | FSGM | + FPER(DEFAULT_BITPERSAMPLE * 2 - 1), + .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ +}; + +static struct omap_alsa_codec_config alsa_config = { + .name = "PalmTT AIC23", + .mcbsp_regs_alsa = &mcbsp_regs, + .codec_configure_dev = NULL, /* aic23_configure, */ + .codec_set_samplerate = NULL, /* aic23_set_samplerate, */ + .codec_clock_setup = NULL, /* aic23_clock_setup, */ + .codec_clock_on = NULL, /* aic23_clock_on, */ + .codec_clock_off = NULL, /* aic23_clock_off, */ + .get_default_samplerate = NULL, /* aic23_get_default_samplerate, */ +}; + +static struct platform_device palmtt_mcbsp1_device = { + .name = "omap_alsa_mcbsp", + .id = 1, + .dev = { + .platform_data = &alsa_config, + }, +}; + static struct resource palmtt_kp_resources[] = { [0] = { .start = INT_KEYBOARD, @@ -217,6 +257,7 @@ static struct platform_device palmtt_led_device = { static struct platform_device *palmtt_devices[] __initdata = { &palmtt_flash_device, + &palmtt_mcbsp1_device, &palmtt_kp_device, &palmtt_lcd_device, &palmtt_irda_device, diff --git a/trunk/arch/arm/mach-omap1/board-palmz71.c b/trunk/arch/arm/mach-omap1/board-palmz71.c index baf5efbfe3e8..cc05257eb1cd 100644 --- a/trunk/arch/arm/mach-omap1/board-palmz71.c +++ b/trunk/arch/arm/mach-omap1/board-palmz71.c @@ -32,6 +32,7 @@ #include #include +#include #include #include #include @@ -178,6 +179,41 @@ static struct platform_device palmz71_spi_device = { .id = -1, }; +#define DEFAULT_BITPERSAMPLE 16 + +static struct omap_mcbsp_reg_cfg mcbsp_regs = { + .spcr2 = FREE | FRST | GRST | XRST | XINTM(3), + .spcr1 = RINTM(3) | RRST, + .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) | + RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(0), + .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16), + .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) | + XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(0) | XFIG, + .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16), + .srgr1 = FWID(DEFAULT_BITPERSAMPLE - 1), + .srgr2 = GSYNC | CLKSP | FSGM | FPER(DEFAULT_BITPERSAMPLE * 2 - 1), + .pcr0 = CLKXP | CLKRP, /* mcbsp: slave */ +}; + +static struct omap_alsa_codec_config alsa_config = { + .name = "PalmZ71 AIC23", + .mcbsp_regs_alsa = &mcbsp_regs, + .codec_configure_dev = NULL, /* aic23_configure */ + .codec_set_samplerate = NULL, /* aic23_set_samplerate */ + .codec_clock_setup = NULL, /* aic23_clock_setup */ + .codec_clock_on = NULL, /* aic23_clock_on */ + .codec_clock_off = NULL, /* aic23_clock_off */ + .get_default_samplerate = NULL, /* aic23_get_default_samplerate */ +}; + +static struct platform_device palmz71_mcbsp1_device = { + .name = "omap_alsa_mcbsp", + .id = 1, + .dev = { + .platform_data = &alsa_config, + }, +}; + static struct omap_backlight_config palmz71_backlight_config = { .default_intensity = 0xa0, }; @@ -193,6 +229,7 @@ static struct platform_device palmz71_backlight_device = { static struct platform_device *devices[] __initdata = { &palmz71_rom_device, &palmz71_kp_device, + &palmz71_mcbsp1_device, &palmz71_lcd_device, &palmz71_irda_device, &palmz71_spi_device, diff --git a/trunk/arch/arm/mach-omap1/board-sx1.c b/trunk/arch/arm/mach-omap1/board-sx1.c index 28c76a1e71c0..8171fe0ca082 100644 --- a/trunk/arch/arm/mach-omap1/board-sx1.c +++ b/trunk/arch/arm/mach-omap1/board-sx1.c @@ -34,12 +34,13 @@ #include #include -#include #include #include #include #include #include +#include +#include #include /* Write to I2C device */ @@ -253,6 +254,35 @@ static struct platform_device sx1_irda_device = { .resource = sx1_irda_resources, }; +/*----------- McBSP & Sound -------------------------*/ + +/* Playback interface - McBSP1 */ +static struct omap_mcbsp_reg_cfg mcbsp1_regs = { + .spcr2 = XINTM(3), /* SPCR2=30 */ + .spcr1 = RINTM(3), /* SPCR1=30 */ + .rcr2 = 0, /* RCR2 =00 */ + .rcr1 = RFRLEN1(1) | RWDLEN1(OMAP_MCBSP_WORD_16), /* RCR1=140 */ + .xcr2 = 0, /* XCR2 = 0 */ + .xcr1 = XFRLEN1(1) | XWDLEN1(OMAP_MCBSP_WORD_16), /* XCR1 = 140 */ + .srgr1 = FWID(15) | CLKGDV(12), /* SRGR1=0f0c */ + .srgr2 = FSGM | FPER(31), /* SRGR2=101f */ + .pcr0 = FSXM | FSRM | CLKXM | CLKRM | FSXP | FSRP | CLKXP | CLKRP, + /* PCR0 =0f0f */ +}; + +static struct omap_alsa_codec_config sx1_alsa_config = { + .name = "SX1 EGold", + .mcbsp_regs_alsa = &mcbsp1_regs, +}; + +static struct platform_device sx1_mcbsp1_device = { + .name = "omap_alsa_mcbsp", + .id = 1, + .dev = { + .platform_data = &sx1_alsa_config, + }, +}; + /*----------- MTD -------------------------*/ static struct mtd_partition sx1_partitions[] = { @@ -364,6 +394,7 @@ static struct platform_device *sx1_devices[] __initdata = { &sx1_flash_device, &sx1_kp_device, &sx1_lcd_device, + &sx1_mcbsp1_device, &sx1_irda_device, }; /*-----------------------------------------*/ @@ -392,9 +423,9 @@ static void __init omap_sx1_init(void) /* turn on USB power */ /* sx1_setusbpower(1); cant do it here because i2c is not ready */ - gpio_request(1, "A_IRDA_OFF"); - gpio_request(11, "A_SWITCH"); - gpio_request(15, "A_USB_ON"); + omap_request_gpio(1); /* A_IRDA_OFF */ + omap_request_gpio(11); /* A_SWITCH */ + omap_request_gpio(15); /* A_USB_ON */ gpio_direction_output(1, 1); /*A_IRDA_OFF = 1 */ gpio_direction_output(11, 0); /*A_SWITCH = 0 */ gpio_direction_output(15, 0); /*A_USB_ON = 0 */ diff --git a/trunk/arch/arm/mach-omap1/board-voiceblue.c b/trunk/arch/arm/mach-omap1/board-voiceblue.c index a7653542a2b0..c224f3c64235 100644 --- a/trunk/arch/arm/mach-omap1/board-voiceblue.c +++ b/trunk/arch/arm/mach-omap1/board-voiceblue.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include diff --git a/trunk/arch/arm/mach-omap1/clock.c b/trunk/arch/arm/mach-omap1/clock.c index dafe4f71d15f..5fba20731710 100644 --- a/trunk/arch/arm/mach-omap1/clock.c +++ b/trunk/arch/arm/mach-omap1/clock.c @@ -20,161 +20,41 @@ #include #include -#include #include #include #include #include -static const struct clkops clkops_generic; -static const struct clkops clkops_uart; -static const struct clkops clkops_dspck; - #include "clock.h" -static int clk_omap1_dummy_enable(struct clk *clk) -{ - return 0; -} - -static void clk_omap1_dummy_disable(struct clk *clk) -{ -} - -static const struct clkops clkops_dummy = { - .enable = clk_omap1_dummy_enable, - .disable = clk_omap1_dummy_disable, -}; - -static struct clk dummy_ck = { - .name = "dummy", - .ops = &clkops_dummy, - .flags = RATE_FIXED, -}; - -struct omap_clk { - u32 cpu; - struct clk_lookup lk; -}; - -#define CLK(dev, con, ck, cp) \ - { \ - .cpu = cp, \ - .lk = { \ - .dev_id = dev, \ - .con_id = con, \ - .clk = ck, \ - }, \ - } - -#define CK_310 (1 << 0) -#define CK_730 (1 << 1) -#define CK_1510 (1 << 2) -#define CK_16XX (1 << 3) - -static struct omap_clk omap_clks[] = { - /* non-ULPD clocks */ - CLK(NULL, "ck_ref", &ck_ref, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "ck_dpll1", &ck_dpll1, CK_16XX | CK_1510 | CK_310), - /* CK_GEN1 clocks */ - CLK(NULL, "ck_dpll1out", &ck_dpll1out.clk, CK_16XX), - CLK(NULL, "ck_sossi", &sossi_ck, CK_16XX), - CLK(NULL, "arm_ck", &arm_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "armper_ck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "arm_gpio_ck", &arm_gpio_ck, CK_1510 | CK_310), - CLK(NULL, "armxor_ck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "armtim_ck", &armtim_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap_wdt", "fck", &armwdt_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap_wdt", "ick", &armper_ck.clk, CK_16XX), - CLK("omap_wdt", "ick", &dummy_ck, CK_1510 | CK_310), - CLK(NULL, "arminth_ck", &arminth_ck1510, CK_1510 | CK_310), - CLK(NULL, "arminth_ck", &arminth_ck16xx, CK_16XX), - /* CK_GEN2 clocks */ - CLK(NULL, "dsp_ck", &dsp_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dspmmu_ck", &dspmmu_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dspper_ck", &dspper_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dspxor_ck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dsptim_ck", &dsptim_ck, CK_16XX | CK_1510 | CK_310), - /* CK_GEN3 clocks */ - CLK(NULL, "tc_ck", &tc_ck.clk, CK_16XX | CK_1510 | CK_310 | CK_730), - CLK(NULL, "tipb_ck", &tipb_ck, CK_1510 | CK_310), - CLK(NULL, "l3_ocpi_ck", &l3_ocpi_ck, CK_16XX), - CLK(NULL, "tc1_ck", &tc1_ck, CK_16XX), - CLK(NULL, "tc2_ck", &tc2_ck, CK_16XX), - CLK(NULL, "dma_ck", &dma_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "dma_lcdfree_ck", &dma_lcdfree_ck, CK_16XX), - CLK(NULL, "api_ck", &api_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "lb_ck", &lb_ck.clk, CK_1510 | CK_310), - CLK(NULL, "rhea1_ck", &rhea1_ck, CK_16XX), - CLK(NULL, "rhea2_ck", &rhea2_ck, CK_16XX), - CLK(NULL, "lcd_ck", &lcd_ck_16xx, CK_16XX | CK_730), - CLK(NULL, "lcd_ck", &lcd_ck_1510.clk, CK_1510 | CK_310), - /* ULPD clocks */ - CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), - CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX), - CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310), - CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX), - CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), - CLK(NULL, "usb_hhc_ck", &usb_hhc_ck1510, CK_1510 | CK_310), - CLK(NULL, "usb_hhc_ck", &usb_hhc_ck16xx, CK_16XX), - CLK(NULL, "usb_dc_ck", &usb_dc_ck, CK_16XX), - CLK(NULL, "mclk", &mclk_1510, CK_1510 | CK_310), - CLK(NULL, "mclk", &mclk_16xx, CK_16XX), - CLK(NULL, "bclk", &bclk_1510, CK_1510 | CK_310), - CLK(NULL, "bclk", &bclk_16xx, CK_16XX), - CLK("mmci-omap.0", "fck", &mmc1_ck, CK_16XX | CK_1510 | CK_310), - CLK("mmci-omap.0", "ick", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("mmci-omap.1", "fck", &mmc2_ck, CK_16XX), - CLK("mmci-omap.1", "ick", &armper_ck.clk, CK_16XX), - /* Virtual clocks */ - CLK(NULL, "mpu", &virtual_ck_mpu, CK_16XX | CK_1510 | CK_310), - CLK("i2c_omap.1", "fck", &i2c_fck, CK_16XX | CK_1510 | CK_310), - CLK("i2c_omap.1", "ick", &i2c_ick, CK_16XX), - CLK("i2c_omap.1", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap_uwire", "fck", &armxor_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap-mcbsp.1", "ick", &dspper_ck, CK_16XX), - CLK("omap-mcbsp.1", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap-mcbsp.2", "ick", &armper_ck.clk, CK_16XX), - CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap-mcbsp.3", "ick", &dspper_ck, CK_16XX), - CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_1510 | CK_310), - CLK("omap-mcbsp.1", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), - CLK("omap-mcbsp.2", "fck", &armper_ck.clk, CK_16XX | CK_1510 | CK_310), - CLK("omap-mcbsp.3", "fck", &dspxor_ck, CK_16XX | CK_1510 | CK_310), -}; - -static int omap1_clk_enable_generic(struct clk * clk); -static int omap1_clk_enable(struct clk *clk); -static void omap1_clk_disable_generic(struct clk * clk); -static void omap1_clk_disable(struct clk *clk); - __u32 arm_idlect1_mask; /*------------------------------------------------------------------------- * Omap1 specific clock functions *-------------------------------------------------------------------------*/ -static unsigned long omap1_watchdog_recalc(struct clk *clk) +static void omap1_watchdog_recalc(struct clk * clk) { - return clk->parent->rate / 14; + clk->rate = clk->parent->rate / 14; } -static unsigned long omap1_uart_recalc(struct clk *clk) +static void omap1_uart_recalc(struct clk * clk) { - unsigned int val = __raw_readl(clk->enable_reg); - return val & clk->enable_bit ? 48000000 : 12000000; + unsigned int val = omap_readl(clk->enable_reg); + if (val & clk->enable_bit) + clk->rate = 48000000; + else + clk->rate = 12000000; } -static unsigned long omap1_sossi_recalc(struct clk *clk) +static void omap1_sossi_recalc(struct clk *clk) { u32 div = omap_readl(MOD_CONF_CTRL_1); div = (div >> 17) & 0x7; div++; - - return clk->parent->rate / div; + clk->rate = clk->parent->rate / div; } static int omap1_clk_enable_dsp_domain(struct clk *clk) @@ -198,11 +78,6 @@ static void omap1_clk_disable_dsp_domain(struct clk *clk) } } -static const struct clkops clkops_dspck = { - .enable = &omap1_clk_enable_dsp_domain, - .disable = &omap1_clk_disable_dsp_domain, -}; - static int omap1_clk_enable_uart_functional(struct clk *clk) { int ret; @@ -230,11 +105,6 @@ static void omap1_clk_disable_uart_functional(struct clk *clk) omap1_clk_disable_generic(clk); } -static const struct clkops clkops_uart = { - .enable = &omap1_clk_enable_uart_functional, - .disable = &omap1_clk_disable_uart_functional, -}; - static void omap1_clk_allow_idle(struct clk *clk) { struct arm_idlect1_clk * iclk = (struct arm_idlect1_clk *)clk; @@ -327,6 +197,9 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) struct clk * parent; unsigned dsor_exp; + if (unlikely(!(clk->flags & RATE_CKCTL))) + return -EINVAL; + parent = clk->parent; if (unlikely(parent == NULL)) return -EIO; @@ -342,15 +215,22 @@ static int calc_dsor_exp(struct clk *clk, unsigned long rate) return dsor_exp; } -static unsigned long omap1_ckctl_recalc(struct clk *clk) +static void omap1_ckctl_recalc(struct clk * clk) { + int dsor; + /* Calculate divisor encoded as 2-bit exponent */ - int dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); + dsor = 1 << (3 & (omap_readw(ARM_CKCTL) >> clk->rate_offset)); - return clk->parent->rate / dsor; + if (unlikely(clk->rate == clk->parent->rate / dsor)) + return; /* No change, quick exit */ + clk->rate = clk->parent->rate / dsor; + + if (unlikely(clk->flags & RATE_PROPAGATES)) + propagate_rate(clk); } -static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) +static void omap1_ckctl_recalc_dsp_domain(struct clk * clk) { int dsor; @@ -365,7 +245,12 @@ static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk) dsor = 1 << (3 & (__raw_readw(DSP_CKCTL) >> clk->rate_offset)); omap1_clk_disable(&api_ck.clk); - return clk->parent->rate / dsor; + if (unlikely(clk->rate == clk->parent->rate / dsor)) + return; /* No change, quick exit */ + clk->rate = clk->parent->rate / dsor; + + if (unlikely(clk->flags & RATE_PROPAGATES)) + propagate_rate(clk); } /* MPU virtual clock functions */ @@ -404,57 +289,35 @@ static int omap1_select_table_rate(struct clk * clk, unsigned long rate) omap_sram_reprogram_clock(ptr->dpllctl_val, ptr->ckctl_val); ck_dpll1.rate = ptr->pll_rate; + propagate_rate(&ck_dpll1); return 0; } static int omap1_clk_set_rate_dsp_domain(struct clk *clk, unsigned long rate) { - int dsor_exp; - u16 regval; - - dsor_exp = calc_dsor_exp(clk, rate); - if (dsor_exp > 3) - dsor_exp = -EINVAL; - if (dsor_exp < 0) - return dsor_exp; - - regval = __raw_readw(DSP_CKCTL); - regval &= ~(3 << clk->rate_offset); - regval |= dsor_exp << clk->rate_offset; - __raw_writew(regval, DSP_CKCTL); - clk->rate = clk->parent->rate / (1 << dsor_exp); - - return 0; -} + int ret = -EINVAL; + int dsor_exp; + __u16 regval; + + if (clk->flags & RATE_CKCTL) { + dsor_exp = calc_dsor_exp(clk, rate); + if (dsor_exp > 3) + dsor_exp = -EINVAL; + if (dsor_exp < 0) + return dsor_exp; + + regval = __raw_readw(DSP_CKCTL); + regval &= ~(3 << clk->rate_offset); + regval |= dsor_exp << clk->rate_offset; + __raw_writew(regval, DSP_CKCTL); + clk->rate = clk->parent->rate / (1 << dsor_exp); + ret = 0; + } -static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate) -{ - int dsor_exp = calc_dsor_exp(clk, rate); - if (dsor_exp < 0) - return dsor_exp; - if (dsor_exp > 3) - dsor_exp = 3; - return clk->parent->rate / (1 << dsor_exp); -} + if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES))) + propagate_rate(clk); -static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate) -{ - int dsor_exp; - u16 regval; - - dsor_exp = calc_dsor_exp(clk, rate); - if (dsor_exp > 3) - dsor_exp = -EINVAL; - if (dsor_exp < 0) - return dsor_exp; - - regval = omap_readw(ARM_CKCTL); - regval &= ~(3 << clk->rate_offset); - regval |= dsor_exp << clk->rate_offset; - regval = verify_ckctl_value(regval); - omap_writew(regval, ARM_CKCTL); - clk->rate = clk->parent->rate / (1 << dsor_exp); - return 0; + return ret; } static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate) @@ -509,14 +372,14 @@ static int omap1_set_uart_rate(struct clk * clk, unsigned long rate) { unsigned int val; - val = __raw_readl(clk->enable_reg); + val = omap_readl(clk->enable_reg); if (rate == 12000000) val &= ~(1 << clk->enable_bit); else if (rate == 48000000) val |= (1 << clk->enable_bit); else return -EINVAL; - __raw_writel(val, clk->enable_reg); + omap_writel(val, clk->enable_reg); clk->rate = rate; return 0; @@ -535,8 +398,8 @@ static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate) else ratio_bits = (dsor - 2) << 2; - ratio_bits |= __raw_readw(clk->enable_reg) & ~0xfd; - __raw_writew(ratio_bits, clk->enable_reg); + ratio_bits |= omap_readw(clk->enable_reg) & ~0xfd; + omap_writew(ratio_bits, clk->enable_reg); return 0; } @@ -560,6 +423,8 @@ static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate) omap_writel(l, MOD_CONF_CTRL_1); clk->rate = p_rate / (div + 1); + if (unlikely(clk->flags & RATE_PROPAGATES)) + propagate_rate(clk); return 0; } @@ -575,8 +440,8 @@ static void omap1_init_ext_clk(struct clk * clk) __u16 ratio_bits; /* Determine current rate and ensure clock is based on 96MHz APLL */ - ratio_bits = __raw_readw(clk->enable_reg) & ~1; - __raw_writew(ratio_bits, clk->enable_reg); + ratio_bits = omap_readw(clk->enable_reg) & ~1; + omap_writew(ratio_bits, clk->enable_reg); ratio_bits = (ratio_bits & 0xfc) >> 2; if (ratio_bits > 6) @@ -603,7 +468,7 @@ static int omap1_clk_enable(struct clk *clk) omap1_clk_deny_idle(clk->parent); } - ret = clk->ops->enable(clk); + ret = clk->enable(clk); if (unlikely(ret != 0) && clk->parent) { omap1_clk_disable(clk->parent); @@ -617,7 +482,7 @@ static int omap1_clk_enable(struct clk *clk) static void omap1_clk_disable(struct clk *clk) { if (clk->usecount > 0 && !(--clk->usecount)) { - clk->ops->disable(clk); + clk->disable(clk); if (likely(clk->parent)) { omap1_clk_disable(clk->parent); if (clk->flags & CLOCK_NO_IDLE_PARENT) @@ -631,6 +496,9 @@ static int omap1_clk_enable_generic(struct clk *clk) __u16 regval16; __u32 regval32; + if (clk->flags & ALWAYS_ENABLED) + return 0; + if (unlikely(clk->enable_reg == NULL)) { printk(KERN_ERR "clock.c: Enable for %s without enable code\n", clk->name); @@ -638,13 +506,25 @@ static int omap1_clk_enable_generic(struct clk *clk) } if (clk->flags & ENABLE_REG_32BIT) { - regval32 = __raw_readl(clk->enable_reg); - regval32 |= (1 << clk->enable_bit); - __raw_writel(regval32, clk->enable_reg); + if (clk->flags & VIRTUAL_IO_ADDRESS) { + regval32 = __raw_readl(clk->enable_reg); + regval32 |= (1 << clk->enable_bit); + __raw_writel(regval32, clk->enable_reg); + } else { + regval32 = omap_readl(clk->enable_reg); + regval32 |= (1 << clk->enable_bit); + omap_writel(regval32, clk->enable_reg); + } } else { - regval16 = __raw_readw(clk->enable_reg); - regval16 |= (1 << clk->enable_bit); - __raw_writew(regval16, clk->enable_reg); + if (clk->flags & VIRTUAL_IO_ADDRESS) { + regval16 = __raw_readw(clk->enable_reg); + regval16 |= (1 << clk->enable_bit); + __raw_writew(regval16, clk->enable_reg); + } else { + regval16 = omap_readw(clk->enable_reg); + regval16 |= (1 << clk->enable_bit); + omap_writew(regval16, clk->enable_reg); + } } return 0; @@ -659,26 +539,44 @@ static void omap1_clk_disable_generic(struct clk *clk) return; if (clk->flags & ENABLE_REG_32BIT) { - regval32 = __raw_readl(clk->enable_reg); - regval32 &= ~(1 << clk->enable_bit); - __raw_writel(regval32, clk->enable_reg); + if (clk->flags & VIRTUAL_IO_ADDRESS) { + regval32 = __raw_readl(clk->enable_reg); + regval32 &= ~(1 << clk->enable_bit); + __raw_writel(regval32, clk->enable_reg); + } else { + regval32 = omap_readl(clk->enable_reg); + regval32 &= ~(1 << clk->enable_bit); + omap_writel(regval32, clk->enable_reg); + } } else { - regval16 = __raw_readw(clk->enable_reg); - regval16 &= ~(1 << clk->enable_bit); - __raw_writew(regval16, clk->enable_reg); + if (clk->flags & VIRTUAL_IO_ADDRESS) { + regval16 = __raw_readw(clk->enable_reg); + regval16 &= ~(1 << clk->enable_bit); + __raw_writew(regval16, clk->enable_reg); + } else { + regval16 = omap_readw(clk->enable_reg); + regval16 &= ~(1 << clk->enable_bit); + omap_writew(regval16, clk->enable_reg); + } } } -static const struct clkops clkops_generic = { - .enable = &omap1_clk_enable_generic, - .disable = &omap1_clk_disable_generic, -}; - static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) { + int dsor_exp; + if (clk->flags & RATE_FIXED) return clk->rate; + if (clk->flags & RATE_CKCTL) { + dsor_exp = calc_dsor_exp(clk, rate); + if (dsor_exp < 0) + return dsor_exp; + if (dsor_exp > 3) + dsor_exp = 3; + return clk->parent->rate / (1 << dsor_exp); + } + if (clk->round_rate != NULL) return clk->round_rate(clk, rate); @@ -688,9 +586,30 @@ static long omap1_clk_round_rate(struct clk *clk, unsigned long rate) static int omap1_clk_set_rate(struct clk *clk, unsigned long rate) { int ret = -EINVAL; + int dsor_exp; + __u16 regval; if (clk->set_rate) ret = clk->set_rate(clk, rate); + else if (clk->flags & RATE_CKCTL) { + dsor_exp = calc_dsor_exp(clk, rate); + if (dsor_exp > 3) + dsor_exp = -EINVAL; + if (dsor_exp < 0) + return dsor_exp; + + regval = omap_readw(ARM_CKCTL); + regval &= ~(3 << clk->rate_offset); + regval |= dsor_exp << clk->rate_offset; + regval = verify_ckctl_value(regval); + omap_writew(regval, ARM_CKCTL); + clk->rate = clk->parent->rate / (1 << dsor_exp); + ret = 0; + } + + if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES))) + propagate_rate(clk); + return ret; } @@ -713,10 +632,17 @@ static void __init omap1_clk_disable_unused(struct clk *clk) } /* Is the clock already disabled? */ - if (clk->flags & ENABLE_REG_32BIT) - regval32 = __raw_readl(clk->enable_reg); - else - regval32 = __raw_readw(clk->enable_reg); + if (clk->flags & ENABLE_REG_32BIT) { + if (clk->flags & VIRTUAL_IO_ADDRESS) + regval32 = __raw_readl(clk->enable_reg); + else + regval32 = omap_readl(clk->enable_reg); + } else { + if (clk->flags & VIRTUAL_IO_ADDRESS) + regval32 = __raw_readw(clk->enable_reg); + else + regval32 = omap_readw(clk->enable_reg); + } if ((regval32 & (1 << clk->enable_bit)) == 0) return; @@ -733,7 +659,7 @@ static void __init omap1_clk_disable_unused(struct clk *clk) } printk(KERN_INFO "Disabling unused clock \"%s\"... ", clk->name); - clk->ops->disable(clk); + clk->disable(clk); printk(" done\n"); } @@ -751,10 +677,10 @@ static struct clk_functions omap1_clk_functions = { int __init omap1_clk_init(void) { - struct omap_clk *c; + struct clk ** clkp; const struct omap_clock_config *info; int crystal_type = 0; /* Default 12 MHz */ - u32 reg, cpu_mask; + u32 reg; #ifdef CONFIG_DEBUG_LL /* Resets some clocks that may be left on from bootloader, @@ -774,25 +700,28 @@ int __init omap1_clk_init(void) /* By default all idlect1 clocks are allowed to idle */ arm_idlect1_mask = ~0; - for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) - clk_init_one(c->lk.clk); + for (clkp = onchip_clks; clkp < onchip_clks+ARRAY_SIZE(onchip_clks); clkp++) { + if (((*clkp)->flags &CLOCK_IN_OMAP1510) && cpu_is_omap1510()) { + clk_register(*clkp); + continue; + } - cpu_mask = 0; - if (cpu_is_omap16xx()) - cpu_mask |= CK_16XX; - if (cpu_is_omap1510()) - cpu_mask |= CK_1510; - if (cpu_is_omap730()) - cpu_mask |= CK_730; - if (cpu_is_omap310()) - cpu_mask |= CK_310; - - for (c = omap_clks; c < omap_clks + ARRAY_SIZE(omap_clks); c++) - if (c->cpu & cpu_mask) { - clkdev_add(&c->lk); - clk_register(c->lk.clk); + if (((*clkp)->flags &CLOCK_IN_OMAP16XX) && cpu_is_omap16xx()) { + clk_register(*clkp); + continue; } + if (((*clkp)->flags &CLOCK_IN_OMAP730) && cpu_is_omap730()) { + clk_register(*clkp); + continue; + } + + if (((*clkp)->flags &CLOCK_IN_OMAP310) && cpu_is_omap310()) { + clk_register(*clkp); + continue; + } + } + info = omap_get_config(OMAP_TAG_CLOCK, struct omap_clock_config); if (info != NULL) { if (!cpu_is_omap15xx()) @@ -840,6 +769,7 @@ int __init omap1_clk_init(void) } } } + propagate_rate(&ck_dpll1); #else /* Find the highest supported frequency and enable it */ if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) { @@ -848,9 +778,9 @@ int __init omap1_clk_init(void) omap_writew(0x2290, DPLL_CTL); omap_writew(cpu_is_omap730() ? 0x3005 : 0x1005, ARM_CKCTL); ck_dpll1.rate = 60000000; + propagate_rate(&ck_dpll1); } #endif - propagate_rate(&ck_dpll1); /* Cache rates for clocks connected to ck_ref (not dpll1) */ propagate_rate(&ck_ref); printk(KERN_INFO "Clocking rate (xtal/DPLL1/MPU): " @@ -902,3 +832,4 @@ int __init omap1_clk_init(void) return 0; } + diff --git a/trunk/arch/arm/mach-omap1/clock.h b/trunk/arch/arm/mach-omap1/clock.h index 17f874271255..c1dcdf18d8dd 100644 --- a/trunk/arch/arm/mach-omap1/clock.h +++ b/trunk/arch/arm/mach-omap1/clock.h @@ -13,22 +13,27 @@ #ifndef __ARCH_ARM_MACH_OMAP1_CLOCK_H #define __ARCH_ARM_MACH_OMAP1_CLOCK_H -static unsigned long omap1_ckctl_recalc(struct clk *clk); -static unsigned long omap1_watchdog_recalc(struct clk *clk); +static int omap1_clk_enable_generic(struct clk * clk); +static void omap1_clk_disable_generic(struct clk * clk); +static void omap1_ckctl_recalc(struct clk * clk); +static void omap1_watchdog_recalc(struct clk * clk); static int omap1_set_sossi_rate(struct clk *clk, unsigned long rate); -static unsigned long omap1_sossi_recalc(struct clk *clk); -static unsigned long omap1_ckctl_recalc_dsp_domain(struct clk *clk); +static void omap1_sossi_recalc(struct clk *clk); +static void omap1_ckctl_recalc_dsp_domain(struct clk * clk); +static int omap1_clk_enable_dsp_domain(struct clk * clk); static int omap1_clk_set_rate_dsp_domain(struct clk * clk, unsigned long rate); +static void omap1_clk_disable_dsp_domain(struct clk * clk); static int omap1_set_uart_rate(struct clk * clk, unsigned long rate); -static unsigned long omap1_uart_recalc(struct clk *clk); +static void omap1_uart_recalc(struct clk * clk); +static int omap1_clk_enable_uart_functional(struct clk * clk); +static void omap1_clk_disable_uart_functional(struct clk * clk); static int omap1_set_ext_clk_rate(struct clk * clk, unsigned long rate); static long omap1_round_ext_clk_rate(struct clk * clk, unsigned long rate); static void omap1_init_ext_clk(struct clk * clk); static int omap1_select_table_rate(struct clk * clk, unsigned long rate); static long omap1_round_to_table_rate(struct clk * clk, unsigned long rate); - -static int omap1_clk_set_rate_ckctl_arm(struct clk *clk, unsigned long rate); -static long omap1_clk_round_rate_ckctl_arm(struct clk *clk, unsigned long rate); +static int omap1_clk_enable(struct clk *clk); +static void omap1_clk_disable(struct clk *clk); struct mpu_rate { unsigned long rate; @@ -147,84 +152,101 @@ static struct mpu_rate rate_table[] = { static struct clk ck_ref = { .name = "ck_ref", - .ops = &clkops_null, .rate = 12000000, + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | ALWAYS_ENABLED, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk ck_dpll1 = { .name = "ck_dpll1", - .ops = &clkops_null, .parent = &ck_ref, + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | RATE_PROPAGATES | ALWAYS_ENABLED, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct arm_idlect1_clk ck_dpll1out = { .clk = { .name = "ck_dpll1out", - .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL | ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .flags = CLOCK_IN_OMAP16XX | CLOCK_IDLE_CONTROL | + ENABLE_REG_32BIT | RATE_PROPAGATES, + .enable_reg = (void __iomem *)ARM_IDLECT2, .enable_bit = EN_CKOUT_ARM, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }, .idlect_shift = 12, }; static struct clk sossi_ck = { .name = "ck_sossi", - .ops = &clkops_generic, .parent = &ck_dpll1out.clk, - .flags = CLOCK_NO_IDLE_PARENT | ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_1), + .flags = CLOCK_IN_OMAP16XX | CLOCK_NO_IDLE_PARENT | + ENABLE_REG_32BIT, + .enable_reg = (void __iomem *)MOD_CONF_CTRL_1, .enable_bit = 16, .recalc = &omap1_sossi_recalc, .set_rate = &omap1_set_sossi_rate, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk arm_ck = { .name = "arm_ck", - .ops = &clkops_null, .parent = &ck_dpll1, + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | RATE_CKCTL | RATE_PROPAGATES | + ALWAYS_ENABLED, .rate_offset = CKCTL_ARMDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct arm_idlect1_clk armper_ck = { .clk = { .name = "armper_ck", - .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | RATE_CKCTL | + CLOCK_IDLE_CONTROL, + .enable_reg = (void __iomem *)ARM_IDLECT2, .enable_bit = EN_PERCK, .rate_offset = CKCTL_PERDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }, .idlect_shift = 2, }; static struct clk arm_gpio_ck = { .name = "arm_gpio_ck", - .ops = &clkops_generic, .parent = &ck_dpll1, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310, + .enable_reg = (void __iomem *)ARM_IDLECT2, .enable_bit = EN_GPIOCK, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct arm_idlect1_clk armxor_ck = { .clk = { .name = "armxor_ck", - .ops = &clkops_generic, .parent = &ck_ref, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, + .enable_reg = (void __iomem *)ARM_IDLECT2, .enable_bit = EN_XORPCK, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }, .idlect_shift = 1, }; @@ -232,12 +254,14 @@ static struct arm_idlect1_clk armxor_ck = { static struct arm_idlect1_clk armtim_ck = { .clk = { .name = "armtim_ck", - .ops = &clkops_generic, .parent = &ck_ref, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, + .enable_reg = (void __iomem *)ARM_IDLECT2, .enable_bit = EN_TIMCK, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }, .idlect_shift = 9, }; @@ -245,166 +269,201 @@ static struct arm_idlect1_clk armtim_ck = { static struct arm_idlect1_clk armwdt_ck = { .clk = { .name = "armwdt_ck", - .ops = &clkops_generic, .parent = &ck_ref, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, + .enable_reg = (void __iomem *)ARM_IDLECT2, .enable_bit = EN_WDTCK, .recalc = &omap1_watchdog_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }, .idlect_shift = 0, }; static struct clk arminth_ck16xx = { .name = "arminth_ck", - .ops = &clkops_null, .parent = &arm_ck, + .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, .recalc = &followparent_recalc, /* Note: On 16xx the frequency can be divided by 2 by programming * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1 * * 1510 version is in TC clocks. */ + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk dsp_ck = { .name = "dsp_ck", - .ops = &clkops_generic, .parent = &ck_dpll1, - .enable_reg = OMAP1_IO_ADDRESS(ARM_CKCTL), + .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + RATE_CKCTL, + .enable_reg = (void __iomem *)ARM_CKCTL, .enable_bit = EN_DSPCK, .rate_offset = CKCTL_DSPDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk dspmmu_ck = { .name = "dspmmu_ck", - .ops = &clkops_null, .parent = &ck_dpll1, + .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + RATE_CKCTL | ALWAYS_ENABLED, .rate_offset = CKCTL_DSPMMUDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk dspper_ck = { .name = "dspper_ck", - .ops = &clkops_dspck, .parent = &ck_dpll1, + .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + RATE_CKCTL | VIRTUAL_IO_ADDRESS, .enable_reg = DSP_IDLECT2, .enable_bit = EN_PERCK, .rate_offset = CKCTL_PERDIV_OFFSET, .recalc = &omap1_ckctl_recalc_dsp_domain, - .round_rate = omap1_clk_round_rate_ckctl_arm, .set_rate = &omap1_clk_set_rate_dsp_domain, + .enable = &omap1_clk_enable_dsp_domain, + .disable = &omap1_clk_disable_dsp_domain, }; static struct clk dspxor_ck = { .name = "dspxor_ck", - .ops = &clkops_dspck, .parent = &ck_ref, + .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + VIRTUAL_IO_ADDRESS, .enable_reg = DSP_IDLECT2, .enable_bit = EN_XORPCK, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_dsp_domain, + .disable = &omap1_clk_disable_dsp_domain, }; static struct clk dsptim_ck = { .name = "dsptim_ck", - .ops = &clkops_dspck, .parent = &ck_ref, + .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + VIRTUAL_IO_ADDRESS, .enable_reg = DSP_IDLECT2, .enable_bit = EN_DSPTIMCK, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_dsp_domain, + .disable = &omap1_clk_disable_dsp_domain, }; /* Tie ARM_IDLECT1:IDLIF_ARM to this logical clock structure */ static struct arm_idlect1_clk tc_ck = { .clk = { .name = "tc_ck", - .ops = &clkops_null, .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL, + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 | + RATE_CKCTL | RATE_PROPAGATES | + ALWAYS_ENABLED | CLOCK_IDLE_CONTROL, .rate_offset = CKCTL_TCDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }, .idlect_shift = 6, }; static struct clk arminth_ck1510 = { .name = "arminth_ck", - .ops = &clkops_null, .parent = &tc_ck.clk, + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | + ALWAYS_ENABLED, .recalc = &followparent_recalc, /* Note: On 1510 the frequency follows TC_CK * * 16xx version is in MPU clocks. */ + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk tipb_ck = { /* No-idle controlled by "tc_ck" */ .name = "tipb_ck", - .ops = &clkops_null, .parent = &tc_ck.clk, + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | + ALWAYS_ENABLED, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk l3_ocpi_ck = { /* No-idle controlled by "tc_ck" */ .name = "l3_ocpi_ck", - .ops = &clkops_generic, .parent = &tc_ck.clk, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), + .flags = CLOCK_IN_OMAP16XX, + .enable_reg = (void __iomem *)ARM_IDLECT3, .enable_bit = EN_OCPI_CK, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk tc1_ck = { .name = "tc1_ck", - .ops = &clkops_generic, .parent = &tc_ck.clk, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), + .flags = CLOCK_IN_OMAP16XX, + .enable_reg = (void __iomem *)ARM_IDLECT3, .enable_bit = EN_TC1_CK, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk tc2_ck = { .name = "tc2_ck", - .ops = &clkops_generic, .parent = &tc_ck.clk, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT3), + .flags = CLOCK_IN_OMAP16XX, + .enable_reg = (void __iomem *)ARM_IDLECT3, .enable_bit = EN_TC2_CK, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk dma_ck = { /* No-idle controlled by "tc_ck" */ .name = "dma_ck", - .ops = &clkops_null, .parent = &tc_ck.clk, + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | ALWAYS_ENABLED, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk dma_lcdfree_ck = { .name = "dma_lcdfree_ck", - .ops = &clkops_null, .parent = &tc_ck.clk, + .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct arm_idlect1_clk api_ck = { .clk = { .name = "api_ck", - .ops = &clkops_generic, .parent = &tc_ck.clk, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | CLOCK_IDLE_CONTROL, + .enable_reg = (void __iomem *)ARM_IDLECT2, .enable_bit = EN_APICK, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }, .idlect_shift = 8, }; @@ -412,238 +471,276 @@ static struct arm_idlect1_clk api_ck = { static struct arm_idlect1_clk lb_ck = { .clk = { .name = "lb_ck", - .ops = &clkops_generic, .parent = &tc_ck.clk, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | + CLOCK_IDLE_CONTROL, + .enable_reg = (void __iomem *)ARM_IDLECT2, .enable_bit = EN_LBCK, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }, .idlect_shift = 4, }; static struct clk rhea1_ck = { .name = "rhea1_ck", - .ops = &clkops_null, .parent = &tc_ck.clk, + .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk rhea2_ck = { .name = "rhea2_ck", - .ops = &clkops_null, .parent = &tc_ck.clk, + .flags = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk lcd_ck_16xx = { .name = "lcd_ck", - .ops = &clkops_generic, .parent = &ck_dpll1, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .flags = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730 | RATE_CKCTL, + .enable_reg = (void __iomem *)ARM_IDLECT2, .enable_bit = EN_LCDCK, .rate_offset = CKCTL_LCDDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct arm_idlect1_clk lcd_ck_1510 = { .clk = { .name = "lcd_ck", - .ops = &clkops_generic, .parent = &ck_dpll1, - .flags = CLOCK_IDLE_CONTROL, - .enable_reg = OMAP1_IO_ADDRESS(ARM_IDLECT2), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | + RATE_CKCTL | CLOCK_IDLE_CONTROL, + .enable_reg = (void __iomem *)ARM_IDLECT2, .enable_bit = EN_LCDCK, .rate_offset = CKCTL_LCDDIV_OFFSET, .recalc = &omap1_ckctl_recalc, - .round_rate = omap1_clk_round_rate_ckctl_arm, - .set_rate = omap1_clk_set_rate_ckctl_arm, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }, .idlect_shift = 3, }; static struct clk uart1_1510 = { .name = "uart1_ck", - .ops = &clkops_null, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 12000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | + ENABLE_REG_32BIT | ALWAYS_ENABLED | + CLOCK_NO_IDLE_PARENT, + .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_bit = 29, /* Chooses between 12MHz and 48MHz */ .set_rate = &omap1_set_uart_rate, .recalc = &omap1_uart_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct uart_clk uart1_16xx = { .clk = { .name = "uart1_ck", - .ops = &clkops_uart, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 48000000, - .flags = RATE_FIXED | ENABLE_REG_32BIT | - CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .flags = CLOCK_IN_OMAP16XX | RATE_FIXED | + ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_bit = 29, + .enable = &omap1_clk_enable_uart_functional, + .disable = &omap1_clk_disable_uart_functional, }, .sysc_addr = 0xfffb0054, }; static struct clk uart2_ck = { .name = "uart2_ck", - .ops = &clkops_null, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 12000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | ENABLE_REG_32BIT | + ALWAYS_ENABLED | CLOCK_NO_IDLE_PARENT, + .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_bit = 30, /* Chooses between 12MHz and 48MHz */ .set_rate = &omap1_set_uart_rate, .recalc = &omap1_uart_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk uart3_1510 = { .name = "uart3_ck", - .ops = &clkops_null, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 12000000, - .flags = ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | + ENABLE_REG_32BIT | ALWAYS_ENABLED | + CLOCK_NO_IDLE_PARENT, + .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_bit = 31, /* Chooses between 12MHz and 48MHz */ .set_rate = &omap1_set_uart_rate, .recalc = &omap1_uart_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct uart_clk uart3_16xx = { .clk = { .name = "uart3_ck", - .ops = &clkops_uart, /* Direct from ULPD, no real parent */ .parent = &armper_ck.clk, .rate = 48000000, - .flags = RATE_FIXED | ENABLE_REG_32BIT | - CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .flags = CLOCK_IN_OMAP16XX | RATE_FIXED | + ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_bit = 31, + .enable = &omap1_clk_enable_uart_functional, + .disable = &omap1_clk_disable_uart_functional, }, .sysc_addr = 0xfffb9854, }; static struct clk usb_clko = { /* 6 MHz output on W4_USB_CLKO */ .name = "usb_clko", - .ops = &clkops_generic, /* Direct from ULPD, no parent */ .rate = 6000000, - .flags = RATE_FIXED | ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(ULPD_CLOCK_CTRL), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT, + .enable_reg = (void __iomem *)ULPD_CLOCK_CTRL, .enable_bit = USB_MCLK_EN_BIT, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk usb_hhc_ck1510 = { .name = "usb_hhc_ck", - .ops = &clkops_generic, /* Direct from ULPD, no parent */ .rate = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */ - .flags = RATE_FIXED | ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | + RATE_FIXED | ENABLE_REG_32BIT, + .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_bit = USB_HOST_HHC_UHOST_EN, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk usb_hhc_ck16xx = { .name = "usb_hhc_ck", - .ops = &clkops_generic, /* Direct from ULPD, no parent */ .rate = 48000000, /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */ - .flags = RATE_FIXED | ENABLE_REG_32BIT, - .enable_reg = OMAP1_IO_ADDRESS(OTG_BASE + 0x08), /* OTG_SYSCON_2 */ + .flags = CLOCK_IN_OMAP16XX | + RATE_FIXED | ENABLE_REG_32BIT, + .enable_reg = (void __iomem *)OTG_BASE + 0x08 /* OTG_SYSCON_2 */, .enable_bit = 8 /* UHOST_EN */, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk usb_dc_ck = { .name = "usb_dc_ck", - .ops = &clkops_generic, /* Direct from ULPD, no parent */ .rate = 48000000, - .flags = RATE_FIXED, - .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .flags = CLOCK_IN_OMAP16XX | RATE_FIXED, + .enable_reg = (void __iomem *)SOFT_REQ_REG, .enable_bit = 4, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk mclk_1510 = { .name = "mclk", - .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ .rate = 12000000, - .flags = RATE_FIXED, - .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), - .enable_bit = 6, + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED, + .enable_reg = (void __iomem *)SOFT_REQ_REG, + .enable_bit = 6, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk mclk_16xx = { .name = "mclk", - .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ - .enable_reg = OMAP1_IO_ADDRESS(COM_CLK_DIV_CTRL_SEL), + .flags = CLOCK_IN_OMAP16XX, + .enable_reg = (void __iomem *)COM_CLK_DIV_CTRL_SEL, .enable_bit = COM_ULPD_PLL_CLK_REQ, .set_rate = &omap1_set_ext_clk_rate, .round_rate = &omap1_round_ext_clk_rate, .init = &omap1_init_ext_clk, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk bclk_1510 = { .name = "bclk", - .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ .rate = 12000000, - .flags = RATE_FIXED, + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | RATE_FIXED, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk bclk_16xx = { .name = "bclk", - .ops = &clkops_generic, /* Direct from ULPD, no parent. May be enabled by ext hardware. */ - .enable_reg = OMAP1_IO_ADDRESS(SWD_CLK_DIV_CTRL_SEL), + .flags = CLOCK_IN_OMAP16XX, + .enable_reg = (void __iomem *)SWD_CLK_DIV_CTRL_SEL, .enable_bit = SWD_ULPD_PLL_CLK_REQ, .set_rate = &omap1_set_ext_clk_rate, .round_rate = &omap1_round_ext_clk_rate, .init = &omap1_init_ext_clk, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk mmc1_ck = { .name = "mmc_ck", - .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ .parent = &armper_ck.clk, .rate = 48000000, - .flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | RATE_FIXED | ENABLE_REG_32BIT | + CLOCK_NO_IDLE_PARENT, + .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_bit = 23, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk mmc2_ck = { .name = "mmc_ck", .id = 1, - .ops = &clkops_generic, /* Functional clock is direct from ULPD, interface clock is ARMPER */ .parent = &armper_ck.clk, .rate = 48000000, - .flags = RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, - .enable_reg = OMAP1_IO_ADDRESS(MOD_CONF_CTRL_0), + .flags = CLOCK_IN_OMAP16XX | + RATE_FIXED | ENABLE_REG_32BIT | CLOCK_NO_IDLE_PARENT, + .enable_reg = (void __iomem *)MOD_CONF_CTRL_0, .enable_bit = 20, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk virtual_ck_mpu = { .name = "mpu", - .ops = &clkops_null, + .flags = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + CLOCK_IN_OMAP310 | VIRTUAL_CLOCK | ALWAYS_ENABLED, .parent = &arm_ck, /* Is smarter alias for */ .recalc = &followparent_recalc, .set_rate = &omap1_select_table_rate, .round_rate = &omap1_round_to_table_rate, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; /* virtual functional clock domain for I2C. Just for making sure that ARMXOR_CK @@ -651,19 +748,78 @@ remains active during MPU idle whenever this is enabled */ static struct clk i2c_fck = { .name = "i2c_fck", .id = 1, - .ops = &clkops_null, - .flags = CLOCK_NO_IDLE_PARENT, + .flags = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | + VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT | + ALWAYS_ENABLED, .parent = &armxor_ck.clk, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, }; static struct clk i2c_ick = { .name = "i2c_ick", .id = 1, - .ops = &clkops_null, - .flags = CLOCK_NO_IDLE_PARENT, + .flags = CLOCK_IN_OMAP16XX | + VIRTUAL_CLOCK | CLOCK_NO_IDLE_PARENT | + ALWAYS_ENABLED, .parent = &armper_ck.clk, .recalc = &followparent_recalc, + .enable = &omap1_clk_enable_generic, + .disable = &omap1_clk_disable_generic, +}; + +static struct clk * onchip_clks[] = { + /* non-ULPD clocks */ + &ck_ref, + &ck_dpll1, + /* CK_GEN1 clocks */ + &ck_dpll1out.clk, + &sossi_ck, + &arm_ck, + &armper_ck.clk, + &arm_gpio_ck, + &armxor_ck.clk, + &armtim_ck.clk, + &armwdt_ck.clk, + &arminth_ck1510, &arminth_ck16xx, + /* CK_GEN2 clocks */ + &dsp_ck, + &dspmmu_ck, + &dspper_ck, + &dspxor_ck, + &dsptim_ck, + /* CK_GEN3 clocks */ + &tc_ck.clk, + &tipb_ck, + &l3_ocpi_ck, + &tc1_ck, + &tc2_ck, + &dma_ck, + &dma_lcdfree_ck, + &api_ck.clk, + &lb_ck.clk, + &rhea1_ck, + &rhea2_ck, + &lcd_ck_16xx, + &lcd_ck_1510.clk, + /* ULPD clocks */ + &uart1_1510, + &uart1_16xx.clk, + &uart2_ck, + &uart3_1510, + &uart3_16xx.clk, + &usb_clko, + &usb_hhc_ck1510, &usb_hhc_ck16xx, + &usb_dc_ck, + &mclk_1510, &mclk_16xx, + &bclk_1510, &bclk_16xx, + &mmc1_ck, + &mmc2_ck, + /* Virtual clocks */ + &virtual_ck_mpu, + &i2c_fck, + &i2c_ick, }; #endif diff --git a/trunk/arch/arm/mach-omap1/devices.c b/trunk/arch/arm/mach-omap1/devices.c index ba5d7c08dc17..77382d8b6b2f 100644 --- a/trunk/arch/arm/mach-omap1/devices.c +++ b/trunk/arch/arm/mach-omap1/devices.c @@ -181,7 +181,7 @@ void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data, } size = OMAP1_MMC_SIZE; - omap_mmc_add("mmci-omap", i, base, size, irq, mmc_data[i]); + omap_mmc_add(i, base, size, irq, mmc_data[i]); }; } diff --git a/trunk/arch/arm/mach-omap1/mcbsp.c b/trunk/arch/arm/mach-omap1/mcbsp.c index d040c3f1027f..4474da7bc88a 100644 --- a/trunk/arch/arm/mach-omap1/mcbsp.c +++ b/trunk/arch/arm/mach-omap1/mcbsp.c @@ -17,7 +17,6 @@ #include #include -#include #include #include #include @@ -28,9 +27,82 @@ #define DPS_RSTCT2_PER_EN (1 << 0) #define DSP_RSTCT2_WD_PER_EN (1 << 1) -static int dsp_use; -static struct clk *api_clk; -static struct clk *dsp_clk; +struct mcbsp_internal_clk { + struct clk clk; + struct clk **childs; + int n_childs; +}; + +#if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX) +static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) +{ + const char *clk_names[] = { "dsp_ck", "api_ck", "dspxor_ck" }; + int i; + + mclk->n_childs = ARRAY_SIZE(clk_names); + mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *), + GFP_KERNEL); + + for (i = 0; i < mclk->n_childs; i++) { + /* We fake a platform device to get correct device id */ + struct platform_device pdev; + + pdev.dev.bus = &platform_bus_type; + pdev.id = mclk->clk.id; + mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]); + if (IS_ERR(mclk->childs[i])) + printk(KERN_ERR "Could not get clock %s (%d).\n", + clk_names[i], mclk->clk.id); + } +} + +static int omap_mcbsp_clk_enable(struct clk *clk) +{ + struct mcbsp_internal_clk *mclk = container_of(clk, + struct mcbsp_internal_clk, clk); + int i; + + for (i = 0; i < mclk->n_childs; i++) + clk_enable(mclk->childs[i]); + return 0; +} + +static void omap_mcbsp_clk_disable(struct clk *clk) +{ + struct mcbsp_internal_clk *mclk = container_of(clk, + struct mcbsp_internal_clk, clk); + int i; + + for (i = 0; i < mclk->n_childs; i++) + clk_disable(mclk->childs[i]); +} + +static struct mcbsp_internal_clk omap_mcbsp_clks[] = { + { + .clk = { + .name = "mcbsp_clk", + .id = 1, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, + { + .clk = { + .name = "mcbsp_clk", + .id = 3, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, +}; + +#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) +#else +#define omap_mcbsp_clks_size 0 +static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks; +static inline void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) +{ } +#endif static void omap1_mcbsp_request(unsigned int id) { @@ -39,40 +111,20 @@ static void omap1_mcbsp_request(unsigned int id) * are DSP public peripherals. */ if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { - if (dsp_use++ == 0) { - api_clk = clk_get(NULL, "api_clk"); - dsp_clk = clk_get(NULL, "dsp_clk"); - if (!IS_ERR(api_clk) && !IS_ERR(dsp_clk)) { - clk_enable(api_clk); - clk_enable(dsp_clk); - - omap_dsp_request_mem(); - /* - * DSP external peripheral reset - * FIXME: This should be moved to dsp code - */ - __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN | - DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2); - } - } + omap_dsp_request_mem(); + /* + * DSP external peripheral reset + * FIXME: This should be moved to dsp code + */ + __raw_writew(__raw_readw(DSP_RSTCT2) | DPS_RSTCT2_PER_EN | + DSP_RSTCT2_WD_PER_EN, DSP_RSTCT2); } } static void omap1_mcbsp_free(unsigned int id) { - if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { - if (--dsp_use == 0) { - omap_dsp_release_mem(); - if (!IS_ERR(api_clk)) { - clk_disable(api_clk); - clk_put(api_clk); - } - if (!IS_ERR(dsp_clk)) { - clk_disable(dsp_clk); - clk_put(dsp_clk); - } - } - } + if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) + omap_dsp_release_mem(); } static struct omap_mcbsp_ops omap1_mcbsp_ops = { @@ -114,7 +166,8 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { .rx_irq = INT_McBSP1RX, .tx_irq = INT_McBSP1TX, .ops = &omap1_mcbsp_ops, - }, + .clk_name = "mcbsp_clk", + }, { .phys_base = OMAP1510_MCBSP2_BASE, .dma_rx_sync = OMAP_DMA_MCBSP2_RX, @@ -130,6 +183,7 @@ static struct omap_mcbsp_platform_data omap15xx_mcbsp_pdata[] = { .rx_irq = INT_McBSP3RX, .tx_irq = INT_McBSP3TX, .ops = &omap1_mcbsp_ops, + .clk_name = "mcbsp_clk", }, }; #define OMAP15XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap15xx_mcbsp_pdata) @@ -147,6 +201,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { .rx_irq = INT_McBSP1RX, .tx_irq = INT_McBSP1TX, .ops = &omap1_mcbsp_ops, + .clk_name = "mcbsp_clk", }, { .phys_base = OMAP1610_MCBSP2_BASE, @@ -163,6 +218,7 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { .rx_irq = INT_McBSP3RX, .tx_irq = INT_McBSP3TX, .ops = &omap1_mcbsp_ops, + .clk_name = "mcbsp_clk", }, }; #define OMAP16XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap16xx_mcbsp_pdata) @@ -173,6 +229,15 @@ static struct omap_mcbsp_platform_data omap16xx_mcbsp_pdata[] = { int __init omap1_mcbsp_init(void) { + int i; + + for (i = 0; i < omap_mcbsp_clks_size; i++) { + if (cpu_is_omap15xx() || cpu_is_omap16xx()) { + omap_mcbsp_clk_init(&omap_mcbsp_clks[i]); + clk_register(&omap_mcbsp_clks[i].clk); + } + } + if (cpu_is_omap730()) omap_mcbsp_count = OMAP730_MCBSP_PDATA_SZ; if (cpu_is_omap15xx()) diff --git a/trunk/arch/arm/mach-omap2/Makefile b/trunk/arch/arm/mach-omap2/Makefile index 9717afcdbda7..bbd12bc10fdc 100644 --- a/trunk/arch/arm/mach-omap2/Makefile +++ b/trunk/arch/arm/mach-omap2/Makefile @@ -3,7 +3,7 @@ # # Common support -obj-y := irq.o id.o io.o sdrc.o control.o prcm.o clock.o mux.o \ +obj-y := irq.o id.o io.o memory.o control.o prcm.o clock.o mux.o \ devices.o serial.o gpmc.o timer-gp.o powerdomain.o \ clockdomain.o @@ -14,10 +14,6 @@ obj-$(CONFIG_ARCH_OMAP2420) += sram242x.o obj-$(CONFIG_ARCH_OMAP2430) += sram243x.o obj-$(CONFIG_ARCH_OMAP3) += sram34xx.o -# SMS/SDRC -obj-$(CONFIG_ARCH_OMAP2) += sdrc2xxx.o -# obj-$(CONFIG_ARCH_OMAP3) += sdrc3xxx.o - # Power Management ifeq ($(CONFIG_PM),y) obj-y += pm.o diff --git a/trunk/arch/arm/mach-omap2/board-2430sdp.c b/trunk/arch/arm/mach-omap2/board-2430sdp.c index 7b29e1d00f23..83fa37211d77 100644 --- a/trunk/arch/arm/mach-omap2/board-2430sdp.c +++ b/trunk/arch/arm/mach-omap2/board-2430sdp.c @@ -185,7 +185,7 @@ static inline void __init sdp2430_init_smc91x(void) static void __init omap_2430sdp_init_irq(void) { - omap2_init_common_hw(NULL); + omap2_init_common_hw(); omap_init_irq(); omap_gpio_init(); sdp2430_init_smc91x(); diff --git a/trunk/arch/arm/mach-omap2/board-apollon.c b/trunk/arch/arm/mach-omap2/board-apollon.c index 0c911f414d8d..bf1e5d32c2a3 100644 --- a/trunk/arch/arm/mach-omap2/board-apollon.c +++ b/trunk/arch/arm/mach-omap2/board-apollon.c @@ -22,6 +22,8 @@ #include #include #include +#include +#include #include #include #include @@ -249,7 +251,7 @@ static inline void __init apollon_init_smc91x(void) static void __init omap_apollon_init_irq(void) { - omap2_init_common_hw(NULL); + omap2_init_common_hw(); omap_init_irq(); omap_gpio_init(); apollon_init_smc91x(); @@ -280,16 +282,65 @@ static void __init apollon_led_init(void) { /* LED0 - AA10 */ omap_cfg_reg(AA10_242X_GPIO13); - gpio_request(LED0_GPIO13, "LED0"); - gpio_direction_output(LED0_GPIO13, 0); + omap_request_gpio(LED0_GPIO13); + omap_set_gpio_direction(LED0_GPIO13, 0); + omap_set_gpio_dataout(LED0_GPIO13, 0); /* LED1 - AA6 */ omap_cfg_reg(AA6_242X_GPIO14); - gpio_request(LED1_GPIO14, "LED1"); - gpio_direction_output(LED1_GPIO14, 0); + omap_request_gpio(LED1_GPIO14); + omap_set_gpio_direction(LED1_GPIO14, 0); + omap_set_gpio_dataout(LED1_GPIO14, 0); /* LED2 - AA4 */ omap_cfg_reg(AA4_242X_GPIO15); - gpio_request(LED2_GPIO15, "LED2"); - gpio_direction_output(LED2_GPIO15, 0); + omap_request_gpio(LED2_GPIO15); + omap_set_gpio_direction(LED2_GPIO15, 0); + omap_set_gpio_dataout(LED2_GPIO15, 0); +} + +static irqreturn_t apollon_sw_interrupt(int irq, void *ignored) +{ + static unsigned int led0, led1, led2; + + if (irq == OMAP_GPIO_IRQ(SW_ENTER_GPIO16)) + omap_set_gpio_dataout(LED0_GPIO13, led0 ^= 1); + else if (irq == OMAP_GPIO_IRQ(SW_UP_GPIO17)) + omap_set_gpio_dataout(LED1_GPIO14, led1 ^= 1); + else if (irq == OMAP_GPIO_IRQ(SW_DOWN_GPIO58)) + omap_set_gpio_dataout(LED2_GPIO15, led2 ^= 1); + + return IRQ_HANDLED; +} + +static void __init apollon_sw_init(void) +{ + /* Enter SW - Y11 */ + omap_cfg_reg(Y11_242X_GPIO16); + omap_request_gpio(SW_ENTER_GPIO16); + gpio_direction_input(SW_ENTER_GPIO16); + /* Up SW - AA12 */ + omap_cfg_reg(AA12_242X_GPIO17); + omap_request_gpio(SW_UP_GPIO17); + gpio_direction_input(SW_UP_GPIO17); + /* Down SW - AA8 */ + omap_cfg_reg(AA8_242X_GPIO58); + omap_request_gpio(SW_DOWN_GPIO58); + gpio_direction_input(SW_DOWN_GPIO58); + + set_irq_type(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), IRQ_TYPE_EDGE_RISING); + if (request_irq(OMAP_GPIO_IRQ(SW_ENTER_GPIO16), &apollon_sw_interrupt, + IRQF_SHARED, "enter sw", + &apollon_sw_interrupt)) + return; + set_irq_type(OMAP_GPIO_IRQ(SW_UP_GPIO17), IRQ_TYPE_EDGE_RISING); + if (request_irq(OMAP_GPIO_IRQ(SW_UP_GPIO17), &apollon_sw_interrupt, + IRQF_SHARED, "up sw", + &apollon_sw_interrupt)) + return; + set_irq_type(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), IRQ_TYPE_EDGE_RISING); + if (request_irq(OMAP_GPIO_IRQ(SW_DOWN_GPIO58), &apollon_sw_interrupt, + IRQF_SHARED, "down sw", + &apollon_sw_interrupt)) + return; } static void __init apollon_usb_init(void) @@ -306,6 +357,7 @@ static void __init omap_apollon_init(void) u32 v; apollon_led_init(); + apollon_sw_init(); apollon_flash_init(); apollon_usb_init(); diff --git a/trunk/arch/arm/mach-omap2/board-generic.c b/trunk/arch/arm/mach-omap2/board-generic.c index 3492162a65c3..3b34c20d1df4 100644 --- a/trunk/arch/arm/mach-omap2/board-generic.c +++ b/trunk/arch/arm/mach-omap2/board-generic.c @@ -33,7 +33,7 @@ static void __init omap_generic_init_irq(void) { - omap2_init_common_hw(NULL); + omap2_init_common_hw(); omap_init_irq(); } diff --git a/trunk/arch/arm/mach-omap2/board-h4.c b/trunk/arch/arm/mach-omap2/board-h4.c index ef55b45ab769..5e9b14675b1e 100644 --- a/trunk/arch/arm/mach-omap2/board-h4.c +++ b/trunk/arch/arm/mach-omap2/board-h4.c @@ -363,7 +363,7 @@ static void __init h4_init_flash(void) static void __init omap_h4_init_irq(void) { - omap2_init_common_hw(NULL); + omap2_init_common_hw(); omap_init_irq(); omap_gpio_init(); h4_init_flash(); diff --git a/trunk/arch/arm/mach-omap2/board-ldp.c b/trunk/arch/arm/mach-omap2/board-ldp.c index 73e3fdb2d20a..aa6972781e4a 100644 --- a/trunk/arch/arm/mach-omap2/board-ldp.c +++ b/trunk/arch/arm/mach-omap2/board-ldp.c @@ -81,14 +81,14 @@ static inline void __init ldp_init_smc911x(void) } ldp_smc911x_resources[0].start = cs_mem_base + 0x0; - ldp_smc911x_resources[0].end = cs_mem_base + 0xff; + ldp_smc911x_resources[0].end = cs_mem_base + 0xf; udelay(100); eth_gpio = LDP_SMC911X_GPIO; ldp_smc911x_resources[1].start = OMAP_GPIO_IRQ(eth_gpio); - if (gpio_request(eth_gpio, "smc911x irq") < 0) { + if (omap_request_gpio(eth_gpio) < 0) { printk(KERN_ERR "Failed to request GPIO%d for smc911x IRQ\n", eth_gpio); return; @@ -98,7 +98,7 @@ static inline void __init ldp_init_smc911x(void) static void __init omap_ldp_init_irq(void) { - omap2_init_common_hw(NULL); + omap2_init_common_hw(); omap_init_irq(); omap_gpio_init(); ldp_init_smc911x(); diff --git a/trunk/arch/arm/mach-omap2/board-omap3beagle.c b/trunk/arch/arm/mach-omap2/board-omap3beagle.c index b70b1e65034b..9e5ada01b5fa 100644 --- a/trunk/arch/arm/mach-omap2/board-omap3beagle.c +++ b/trunk/arch/arm/mach-omap2/board-omap3beagle.c @@ -28,8 +28,6 @@ #include #include -#include - #include #include #include @@ -122,9 +120,6 @@ static int beagle_twl_gpio_setup(struct device *dev, unsigned gpio, unsigned ngpio) { /* gpio + 0 is "mmc0_cd" (input/IRQ) */ - omap_cfg_reg(AH8_34XX_GPIO29); - mmc[0].gpio_cd = gpio + 0; - twl4030_mmc_init(mmc); /* REVISIT: need ehci-omap hooks for external VBUS * power switch and overcurrent detect @@ -178,15 +173,13 @@ static int __init omap3_beagle_i2c_init(void) #ifdef CONFIG_I2C2_OMAP_BEAGLE omap_register_i2c_bus(2, 400, NULL, 0); #endif - /* Bus 3 is attached to the DVI port where devices like the pico DLP - * projector don't work reliably with 400kHz */ - omap_register_i2c_bus(3, 100, NULL, 0); + omap_register_i2c_bus(3, 400, NULL, 0); return 0; } static void __init omap3_beagle_init_irq(void) { - omap2_init_common_hw(NULL); + omap2_init_common_hw(); omap_init_irq(); omap_gpio_init(); } @@ -311,6 +304,10 @@ static void __init omap3_beagle_init(void) omap_board_config_size = ARRAY_SIZE(omap3_beagle_config); omap_serial_init(); + omap_cfg_reg(AH8_34XX_GPIO29); + mmc[0].gpio_cd = gpio + 0; + twl4030_mmc_init(mmc); + omap_cfg_reg(J25_34XX_GPIO170); gpio_request(170, "DVI_nPD"); /* REVISIT leave DVI powered down until it's needed ... */ diff --git a/trunk/arch/arm/mach-omap2/clock.c b/trunk/arch/arm/mach-omap2/clock.c index 4247a1534411..ad721e0cbf7a 100644 --- a/trunk/arch/arm/mach-omap2/clock.c +++ b/trunk/arch/arm/mach-omap2/clock.c @@ -26,10 +26,11 @@ #include #include +#include #include #include -#include +#include "memory.h" #include "sdrc.h" #include "clock.h" #include "prm.h" @@ -45,7 +46,7 @@ #define DPLL_MIN_DIVIDER 1 /* Possible error results from _dpll_test_mult */ -#define DPLL_MULT_UNDERFLOW -1 +#define DPLL_MULT_UNDERFLOW (1 << 0) /* * Scale factor to mitigate roundoff errors in DPLL rate rounding. @@ -58,90 +59,12 @@ #define DPLL_ROUNDING_VAL ((DPLL_SCALE_BASE / 2) * \ (DPLL_SCALE_FACTOR / DPLL_SCALE_BASE)) -/* DPLL valid Fint frequency band limits - from 34xx TRM Section 4.7.6.2 */ -#define DPLL_FINT_BAND1_MIN 750000 -#define DPLL_FINT_BAND1_MAX 2100000 -#define DPLL_FINT_BAND2_MIN 7500000 -#define DPLL_FINT_BAND2_MAX 21000000 - -/* _dpll_test_fint() return codes */ -#define DPLL_FINT_UNDERFLOW -1 -#define DPLL_FINT_INVALID -2 - u8 cpu_mask; /*------------------------------------------------------------------------- * OMAP2/3 specific clock functions *-------------------------------------------------------------------------*/ -/** - * _omap2xxx_clk_commit - commit clock parent/rate changes in hardware - * @clk: struct clk * - * - * If @clk has the DELAYED_APP flag set, meaning that parent/rate changes - * don't take effect until the VALID_CONFIG bit is written, write the - * VALID_CONFIG bit and wait for the write to complete. No return value. - */ -static void _omap2xxx_clk_commit(struct clk *clk) -{ - if (!cpu_is_omap24xx()) - return; - - if (!(clk->flags & DELAYED_APP)) - return; - - prm_write_mod_reg(OMAP24XX_VALID_CONFIG, OMAP24XX_GR_MOD, - OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET); - /* OCP barrier */ - prm_read_mod_reg(OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET); -} - -/* - * _dpll_test_fint - test whether an Fint value is valid for the DPLL - * @clk: DPLL struct clk to test - * @n: divider value (N) to test - * - * Tests whether a particular divider @n will result in a valid DPLL - * internal clock frequency Fint. See the 34xx TRM 4.7.6.2 "DPLL Jitter - * Correction". Returns 0 if OK, -1 if the enclosing loop can terminate - * (assuming that it is counting N upwards), or -2 if the enclosing loop - * should skip to the next iteration (again assuming N is increasing). - */ -static int _dpll_test_fint(struct clk *clk, u8 n) -{ - struct dpll_data *dd; - long fint; - int ret = 0; - - dd = clk->dpll_data; - - /* DPLL divider must result in a valid jitter correction val */ - fint = clk->parent->rate / (n + 1); - if (fint < DPLL_FINT_BAND1_MIN) { - - pr_debug("rejecting n=%d due to Fint failure, " - "lowering max_divider\n", n); - dd->max_divider = n; - ret = DPLL_FINT_UNDERFLOW; - - } else if (fint > DPLL_FINT_BAND1_MAX && - fint < DPLL_FINT_BAND2_MIN) { - - pr_debug("rejecting n=%d due to Fint failure\n", n); - ret = DPLL_FINT_INVALID; - - } else if (fint > DPLL_FINT_BAND2_MAX) { - - pr_debug("rejecting n=%d due to Fint failure, " - "boosting min_divider\n", n); - dd->min_divider = n; - ret = DPLL_FINT_INVALID; - - } - - return ret; -} - /** * omap2_init_clk_clkdm - look up a clockdomain name, store pointer in clk * @clk: OMAP clock struct ptr to use @@ -197,7 +120,7 @@ void omap2_init_clksel_parent(struct clk *clk) clk->name, clks->parent->name, ((clk->parent) ? clk->parent->name : "NULL")); - clk_reparent(clk, clks->parent); + clk->parent = clks->parent; }; found = 1; } @@ -211,52 +134,25 @@ void omap2_init_clksel_parent(struct clk *clk) return; } -/** - * omap2_get_dpll_rate - returns the current DPLL CLKOUT rate - * @clk: struct clk * of a DPLL - * - * DPLLs can be locked or bypassed - basically, enabled or disabled. - * When locked, the DPLL output depends on the M and N values. When - * bypassed, on OMAP2xxx, the output rate is either the 32KiHz clock - * or sys_clk. Bypass rates on OMAP3 depend on the DPLL: DPLLs 1 and - * 2 are bypassed with dpll1_fclk and dpll2_fclk respectively - * (generated by DPLL3), while DPLL 3, 4, and 5 bypass rates are sys_clk. - * Returns the current DPLL CLKOUT rate (*not* CLKOUTX2) if the DPLL is - * locked, or the appropriate bypass rate if the DPLL is bypassed, or 0 - * if the clock @clk is not a DPLL. - */ +/* Returns the DPLL rate */ u32 omap2_get_dpll_rate(struct clk *clk) { long long dpll_clk; - u32 dpll_mult, dpll_div, v; + u32 dpll_mult, dpll_div, dpll; struct dpll_data *dd; dd = clk->dpll_data; + /* REVISIT: What do we return on error? */ if (!dd) return 0; - /* Return bypass rate if DPLL is bypassed */ - v = __raw_readl(dd->control_reg); - v &= dd->enable_mask; - v >>= __ffs(dd->enable_mask); - - if (cpu_is_omap24xx()) { - if (v == OMAP2XXX_EN_DPLL_LPBYPASS || - v == OMAP2XXX_EN_DPLL_FRBYPASS) - return dd->clk_bypass->rate; - } else if (cpu_is_omap34xx()) { - if (v == OMAP3XXX_EN_DPLL_LPBYPASS || - v == OMAP3XXX_EN_DPLL_FRBYPASS) - return dd->clk_bypass->rate; - } - - v = __raw_readl(dd->mult_div1_reg); - dpll_mult = v & dd->mult_mask; + dpll = __raw_readl(dd->mult_div1_reg); + dpll_mult = dpll & dd->mult_mask; dpll_mult >>= __ffs(dd->mult_mask); - dpll_div = v & dd->div1_mask; + dpll_div = dpll & dd->div1_mask; dpll_div >>= __ffs(dd->div1_mask); - dpll_clk = (long long)dd->clk_ref->rate * dpll_mult; + dpll_clk = (long long)clk->parent->rate * dpll_mult; do_div(dpll_clk, dpll_div + 1); return dpll_clk; @@ -266,11 +162,14 @@ u32 omap2_get_dpll_rate(struct clk *clk) * Used for clocks that have the same value as the parent clock, * divided by some factor */ -unsigned long omap2_fixed_divisor_recalc(struct clk *clk) +void omap2_fixed_divisor_recalc(struct clk *clk) { WARN_ON(!clk->fixed_div); - return clk->parent->rate / clk->fixed_div; + clk->rate = clk->parent->rate / clk->fixed_div; + + if (clk->flags & RATE_PROPAGATES) + propagate_rate(clk); } /** @@ -291,10 +190,11 @@ int omap2_wait_clock_ready(void __iomem *reg, u32 mask, const char *name) * 24xx uses 0 to indicate not ready, and 1 to indicate ready. * 34xx reverses this, just to keep us on our toes */ - if (cpu_mask & (RATE_IN_242X | RATE_IN_243X)) + if (cpu_mask & (RATE_IN_242X | RATE_IN_243X)) { ena = mask; - else if (cpu_mask & RATE_IN_343X) + } else if (cpu_mask & RATE_IN_343X) { ena = 0; + } /* Wait for lock */ while (((__raw_readl(reg) & mask) != ena) && @@ -328,12 +228,31 @@ static void omap2_clk_wait_ready(struct clk *clk) * it and pull it into struct clk itself somehow. */ reg = clk->enable_reg; + if ((((u32)reg & 0xff) >= CM_FCLKEN1) && + (((u32)reg & 0xff) <= OMAP24XX_CM_FCLKEN2)) + other_reg = (void __iomem *)(((u32)reg & ~0xf0) | 0x10); /* CM_ICLKEN* */ + else if ((((u32)reg & 0xff) >= CM_ICLKEN1) && + (((u32)reg & 0xff) <= OMAP24XX_CM_ICLKEN4)) + other_reg = (void __iomem *)(((u32)reg & ~0xf0) | 0x00); /* CM_FCLKEN* */ + else + return; - /* - * Convert CM_ICLKEN* <-> CM_FCLKEN*. This conversion assumes - * it's just a matter of XORing the bits. - */ - other_reg = (void __iomem *)((u32)reg ^ (CM_FCLKEN ^ CM_ICLKEN)); + /* REVISIT: What are the appropriate exclusions for 34XX? */ + /* No check for DSS or cam clocks */ + if (cpu_is_omap24xx() && ((u32)reg & 0x0f) == 0) { /* CM_{F,I}CLKEN1 */ + if (clk->enable_bit == OMAP24XX_EN_DSS2_SHIFT || + clk->enable_bit == OMAP24XX_EN_DSS1_SHIFT || + clk->enable_bit == OMAP24XX_EN_CAM_SHIFT) + return; + } + + /* REVISIT: What are the appropriate exclusions for 34XX? */ + /* OMAP3: ignore DSS-mod clocks */ + if (cpu_is_omap34xx() && + (((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(OMAP3430_DSS_MOD, 0) || + ((((u32)reg & ~0xff) == (u32)OMAP_CM_REGADDR(CORE_MOD, 0)) && + clk->enable_bit == OMAP3430_EN_SSI_SHIFT))) + return; /* Check if both functional and interface clocks * are running. */ @@ -345,9 +264,18 @@ static void omap2_clk_wait_ready(struct clk *clk) omap2_wait_clock_ready(st_reg, bit, clk->name); } -static int omap2_dflt_clk_enable(struct clk *clk) +/* Enables clock without considering parent dependencies or use count + * REVISIT: Maybe change this to use clk->enable like on omap1? + */ +int _omap2_clk_enable(struct clk *clk) { - u32 v; + u32 regval32; + + if (clk->flags & (ALWAYS_ENABLED | PARENT_CONTROLS_CLOCK)) + return 0; + + if (clk->enable) + return clk->enable(clk); if (unlikely(clk->enable_reg == NULL)) { printk(KERN_ERR "clock.c: Enable for %s without enable code\n", @@ -355,38 +283,33 @@ static int omap2_dflt_clk_enable(struct clk *clk) return 0; /* REVISIT: -EINVAL */ } - v = __raw_readl(clk->enable_reg); + regval32 = __raw_readl(clk->enable_reg); if (clk->flags & INVERT_ENABLE) - v &= ~(1 << clk->enable_bit); + regval32 &= ~(1 << clk->enable_bit); else - v |= (1 << clk->enable_bit); - __raw_writel(v, clk->enable_reg); - v = __raw_readl(clk->enable_reg); /* OCP barrier */ + regval32 |= (1 << clk->enable_bit); + __raw_writel(regval32, clk->enable_reg); + wmb(); + + omap2_clk_wait_ready(clk); return 0; } -static int omap2_dflt_clk_enable_wait(struct clk *clk) +/* Disables clock without considering parent dependencies or use count */ +void _omap2_clk_disable(struct clk *clk) { - int ret; + u32 regval32; - if (!clk->enable_reg) { - printk(KERN_ERR "clock.c: Enable for %s without enable code\n", - clk->name); - return 0; /* REVISIT: -EINVAL */ - } - - ret = omap2_dflt_clk_enable(clk); - if (ret == 0) - omap2_clk_wait_ready(clk); - return ret; -} + if (clk->flags & (ALWAYS_ENABLED | PARENT_CONTROLS_CLOCK)) + return; -static void omap2_dflt_clk_disable(struct clk *clk) -{ - u32 v; + if (clk->disable) { + clk->disable(clk); + return; + } - if (!clk->enable_reg) { + if (clk->enable_reg == NULL) { /* * 'Independent' here refers to a clock which is not * controlled by its parent. @@ -396,44 +319,20 @@ static void omap2_dflt_clk_disable(struct clk *clk) return; } - v = __raw_readl(clk->enable_reg); + regval32 = __raw_readl(clk->enable_reg); if (clk->flags & INVERT_ENABLE) - v |= (1 << clk->enable_bit); + regval32 |= (1 << clk->enable_bit); else - v &= ~(1 << clk->enable_bit); - __raw_writel(v, clk->enable_reg); - /* No OCP barrier needed here since it is a disable operation */ -} - -const struct clkops clkops_omap2_dflt_wait = { - .enable = omap2_dflt_clk_enable_wait, - .disable = omap2_dflt_clk_disable, -}; - -const struct clkops clkops_omap2_dflt = { - .enable = omap2_dflt_clk_enable, - .disable = omap2_dflt_clk_disable, -}; - -/* Enables clock without considering parent dependencies or use count - * REVISIT: Maybe change this to use clk->enable like on omap1? - */ -static int _omap2_clk_enable(struct clk *clk) -{ - return clk->ops->enable(clk); -} - -/* Disables clock without considering parent dependencies or use count */ -static void _omap2_clk_disable(struct clk *clk) -{ - clk->ops->disable(clk); + regval32 &= ~(1 << clk->enable_bit); + __raw_writel(regval32, clk->enable_reg); + wmb(); } void omap2_clk_disable(struct clk *clk) { if (clk->usecount > 0 && !(--clk->usecount)) { _omap2_clk_disable(clk); - if (clk->parent) + if (likely((u32)clk->parent)) omap2_clk_disable(clk->parent); if (clk->clkdm) omap2_clkdm_clk_disable(clk->clkdm, clk); @@ -446,29 +345,30 @@ int omap2_clk_enable(struct clk *clk) int ret = 0; if (clk->usecount++ == 0) { - if (clk->clkdm) - omap2_clkdm_clk_enable(clk->clkdm, clk); - - if (clk->parent) { + if (likely((u32)clk->parent)) ret = omap2_clk_enable(clk->parent); - if (ret) - goto err; + + if (unlikely(ret != 0)) { + clk->usecount--; + return ret; } + if (clk->clkdm) + omap2_clkdm_clk_enable(clk->clkdm, clk); + ret = _omap2_clk_enable(clk); - if (ret) { - if (clk->parent) - omap2_clk_disable(clk->parent); - goto err; + if (unlikely(ret != 0)) { + if (clk->clkdm) + omap2_clkdm_clk_disable(clk->clkdm, clk); + + if (clk->parent) { + omap2_clk_disable(clk->parent); + clk->usecount--; + } } } - return ret; -err: - if (clk->clkdm) - omap2_clkdm_clk_disable(clk->clkdm, clk); - clk->usecount--; return ret; } @@ -476,22 +376,24 @@ int omap2_clk_enable(struct clk *clk) * Used for clocks that are part of CLKSEL_xyz governed clocks. * REVISIT: Maybe change to use clk->enable() functions like on omap1? */ -unsigned long omap2_clksel_recalc(struct clk *clk) +void omap2_clksel_recalc(struct clk *clk) { - unsigned long rate; u32 div = 0; pr_debug("clock: recalc'ing clksel clk %s\n", clk->name); div = omap2_clksel_get_divisor(clk); if (div == 0) - return clk->rate; + return; - rate = clk->parent->rate / div; + if (unlikely(clk->rate == clk->parent->rate / div)) + return; + clk->rate = clk->parent->rate / div; - pr_debug("clock: new clock rate is %ld (div %d)\n", rate, div); + pr_debug("clock: new clock rate is %ld (div %d)\n", clk->rate, div); - return rate; + if (unlikely(clk->flags & RATE_PROPAGATES)) + propagate_rate(clk); } /** @@ -503,8 +405,8 @@ unsigned long omap2_clksel_recalc(struct clk *clk) * the element associated with the supplied parent clock address. * Returns a pointer to the struct clksel on success or NULL on error. */ -static const struct clksel *omap2_get_clksel_by_parent(struct clk *clk, - struct clk *src_clk) +const struct clksel *omap2_get_clksel_by_parent(struct clk *clk, + struct clk *src_clk) { const struct clksel *clks; @@ -553,7 +455,7 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, *new_div = 1; clks = omap2_get_clksel_by_parent(clk, clk->parent); - if (!clks) + if (clks == NULL) return ~0; for (clkr = clks->rates; clkr->div; clkr++) { @@ -612,7 +514,7 @@ long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate) /* Given a clock and a rate apply a clock specific rounding function */ long omap2_clk_round_rate(struct clk *clk, unsigned long rate) { - if (clk->round_rate) + if (clk->round_rate != NULL) return clk->round_rate(clk, rate); if (clk->flags & RATE_FIXED) @@ -638,7 +540,7 @@ u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val) const struct clksel_rate *clkr; clks = omap2_get_clksel_by_parent(clk, clk->parent); - if (!clks) + if (clks == NULL) return 0; for (clkr = clks->rates; clkr->div; clkr++) { @@ -663,7 +565,7 @@ u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val) * * Given a struct clk of a rate-selectable clksel clock, and a clock divisor, * find the corresponding register field value. The return register value is - * the value before left-shifting. Returns ~0 on error + * the value before left-shifting. Returns 0xffffffff on error */ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) { @@ -674,8 +576,8 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) WARN_ON(div == 0); clks = omap2_get_clksel_by_parent(clk, clk->parent); - if (!clks) - return ~0; + if (clks == NULL) + return 0; for (clkr = clks->rates; clkr->div; clkr++) { if ((clkr->flags & cpu_mask) && (clkr->div == div)) @@ -686,12 +588,29 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) printk(KERN_ERR "clock: Could not find divisor %d for " "clock %s parent %s\n", div, clk->name, clk->parent->name); - return ~0; + return 0; } return clkr->val; } +/** + * omap2_get_clksel - find clksel register addr & field mask for a clk + * @clk: struct clk to use + * @field_mask: ptr to u32 to store the register field mask + * + * Returns the address of the clksel register upon success or NULL on error. + */ +void __iomem *omap2_get_clksel(struct clk *clk, u32 *field_mask) +{ + if (unlikely((clk->clksel_reg == NULL) || (clk->clksel_mask == NULL))) + return NULL; + + *field_mask = clk->clksel_mask; + + return clk->clksel_reg; +} + /** * omap2_clksel_get_divisor - get current divider applied to parent clock. * @clk: OMAP struct clk to use. @@ -700,41 +619,49 @@ u32 omap2_divisor_to_clksel(struct clk *clk, u32 div) */ u32 omap2_clksel_get_divisor(struct clk *clk) { - u32 v; + u32 field_mask, field_val; + void __iomem *div_addr; - if (!clk->clksel_mask) + div_addr = omap2_get_clksel(clk, &field_mask); + if (div_addr == NULL) return 0; - v = __raw_readl(clk->clksel_reg) & clk->clksel_mask; - v >>= __ffs(clk->clksel_mask); + field_val = __raw_readl(div_addr) & field_mask; + field_val >>= __ffs(field_mask); - return omap2_clksel_to_divisor(clk, v); + return omap2_clksel_to_divisor(clk, field_val); } int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) { - u32 v, field_val, validrate, new_div = 0; - - if (!clk->clksel_mask) - return -EINVAL; + u32 field_mask, field_val, reg_val, validrate, new_div = 0; + void __iomem *div_addr; validrate = omap2_clksel_round_rate_div(clk, rate, &new_div); if (validrate != rate) return -EINVAL; + div_addr = omap2_get_clksel(clk, &field_mask); + if (div_addr == NULL) + return -EINVAL; + field_val = omap2_divisor_to_clksel(clk, new_div); if (field_val == ~0) return -EINVAL; - v = __raw_readl(clk->clksel_reg); - v &= ~clk->clksel_mask; - v |= field_val << __ffs(clk->clksel_mask); - __raw_writel(v, clk->clksel_reg); - v = __raw_readl(clk->clksel_reg); /* OCP barrier */ + reg_val = __raw_readl(div_addr); + reg_val &= ~field_mask; + reg_val |= (field_val << __ffs(field_mask)); + __raw_writel(reg_val, div_addr); + wmb(); clk->rate = clk->parent->rate / new_div; - _omap2xxx_clk_commit(clk); + if (clk->flags & DELAYED_APP && cpu_is_omap24xx()) { + prm_write_mod_reg(OMAP24XX_VALID_CONFIG, + OMAP24XX_GR_MOD, OMAP24XX_PRCM_CLKCFG_CTRL_OFFSET); + wmb(); + } return 0; } @@ -753,28 +680,35 @@ int omap2_clk_set_rate(struct clk *clk, unsigned long rate) return -EINVAL; /* dpll_ck, core_ck, virt_prcm_set; plus all clksel clocks */ - if (clk->set_rate) + if (clk->set_rate != NULL) ret = clk->set_rate(clk, rate); + if (unlikely(ret == 0 && (clk->flags & RATE_PROPAGATES))) + propagate_rate(clk); + return ret; } /* * Converts encoded control register address into a full address - * On error, the return value (parent_div) will be 0. + * On error, *src_addr will be returned as 0. */ -static u32 _omap2_clksel_get_src_field(struct clk *src_clk, struct clk *clk, - u32 *field_val) +static u32 omap2_clksel_get_src_field(void __iomem **src_addr, + struct clk *src_clk, u32 *field_mask, + struct clk *clk, u32 *parent_div) { const struct clksel *clks; const struct clksel_rate *clkr; + *parent_div = 0; + *src_addr = NULL; + clks = omap2_get_clksel_by_parent(clk, src_clk); - if (!clks) + if (clks == NULL) return 0; for (clkr = clks->rates; clkr->div; clkr++) { - if (clkr->flags & cpu_mask && clkr->flags & DEFAULT_RATE) + if (clkr->flags & (cpu_mask | DEFAULT_RATE)) break; /* Found the default rate for this platform */ } @@ -788,35 +722,47 @@ static u32 _omap2_clksel_get_src_field(struct clk *src_clk, struct clk *clk, /* Should never happen. Add a clksel mask to the struct clk. */ WARN_ON(clk->clksel_mask == 0); - *field_val = clkr->val; + *field_mask = clk->clksel_mask; + *src_addr = clk->clksel_reg; + *parent_div = clkr->div; - return clkr->div; + return clkr->val; } int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) { - u32 field_val, v, parent_div; + void __iomem *src_addr; + u32 field_val, field_mask, reg_val, parent_div; - if (clk->flags & CONFIG_PARTICIPANT) + if (unlikely(clk->flags & CONFIG_PARTICIPANT)) return -EINVAL; if (!clk->clksel) return -EINVAL; - parent_div = _omap2_clksel_get_src_field(new_parent, clk, &field_val); - if (!parent_div) + field_val = omap2_clksel_get_src_field(&src_addr, new_parent, + &field_mask, clk, &parent_div); + if (src_addr == NULL) return -EINVAL; + if (clk->usecount > 0) + _omap2_clk_disable(clk); + /* Set new source value (previous dividers if any in effect) */ - v = __raw_readl(clk->clksel_reg); - v &= ~clk->clksel_mask; - v |= field_val << __ffs(clk->clksel_mask); - __raw_writel(v, clk->clksel_reg); - v = __raw_readl(clk->clksel_reg); /* OCP barrier */ + reg_val = __raw_readl(src_addr) & ~field_mask; + reg_val |= (field_val << __ffs(field_mask)); + __raw_writel(reg_val, src_addr); + wmb(); + + if (clk->flags & DELAYED_APP && cpu_is_omap24xx()) { + __raw_writel(OMAP24XX_VALID_CONFIG, OMAP24XX_PRCM_CLKCFG_CTRL); + wmb(); + } - _omap2xxx_clk_commit(clk); + if (clk->usecount > 0) + _omap2_clk_enable(clk); - clk_reparent(clk, new_parent); + clk->parent = new_parent; /* CLKSEL clocks follow their parents' rates, divided by a divisor */ clk->rate = new_parent->rate; @@ -827,6 +773,9 @@ int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent) pr_debug("clock: set parent of %s to %s (new rate %ld)\n", clk->name, clk->parent->name, clk->rate); + if (unlikely(clk->flags & RATE_PROPAGATES)) + propagate_rate(clk); + return 0; } @@ -856,8 +805,7 @@ int omap2_dpll_set_rate_tolerance(struct clk *clk, unsigned int tolerance) return 0; } -static unsigned long _dpll_compute_new_rate(unsigned long parent_rate, - unsigned int m, unsigned int n) +static unsigned long _dpll_compute_new_rate(unsigned long parent_rate, unsigned int m, unsigned int n) { unsigned long long num; @@ -890,7 +838,7 @@ static int _dpll_test_mult(int *m, int n, unsigned long *new_rate, unsigned long target_rate, unsigned long parent_rate) { - int r = 0, carry = 0; + int flags = 0, carry = 0; /* Unscale m and round if necessary */ if (*m % DPLL_SCALE_FACTOR >= DPLL_ROUNDING_VAL) @@ -911,13 +859,13 @@ static int _dpll_test_mult(int *m, int n, unsigned long *new_rate, if (*m < DPLL_MIN_MULTIPLIER) { *m = DPLL_MIN_MULTIPLIER; *new_rate = 0; - r = DPLL_MULT_UNDERFLOW; + flags = DPLL_MULT_UNDERFLOW; } if (*new_rate == 0) *new_rate = _dpll_compute_new_rate(parent_rate, *m, n); - return r; + return flags; } /** @@ -941,65 +889,54 @@ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate) int m, n, r, e, scaled_max_m; unsigned long scaled_rt_rp, new_rate; int min_e = -1, min_e_m = -1, min_e_n = -1; - struct dpll_data *dd; if (!clk || !clk->dpll_data) return ~0; - dd = clk->dpll_data; - pr_debug("clock: starting DPLL round_rate for clock %s, target rate " "%ld\n", clk->name, target_rate); - scaled_rt_rp = target_rate / (dd->clk_ref->rate / DPLL_SCALE_FACTOR); - scaled_max_m = dd->max_multiplier * DPLL_SCALE_FACTOR; + scaled_rt_rp = target_rate / (clk->parent->rate / DPLL_SCALE_FACTOR); + scaled_max_m = clk->dpll_data->max_multiplier * DPLL_SCALE_FACTOR; - dd->last_rounded_rate = 0; + clk->dpll_data->last_rounded_rate = 0; - for (n = dd->min_divider; n <= dd->max_divider; n++) { - - /* Is the (input clk, divider) pair valid for the DPLL? */ - r = _dpll_test_fint(clk, n); - if (r == DPLL_FINT_UNDERFLOW) - break; - else if (r == DPLL_FINT_INVALID) - continue; + for (n = clk->dpll_data->max_divider; n >= DPLL_MIN_DIVIDER; n--) { /* Compute the scaled DPLL multiplier, based on the divider */ m = scaled_rt_rp * n; /* - * Since we're counting n up, a m overflow means we - * can bail out completely (since as n increases in - * the next iteration, there's no way that m can - * increase beyond the current m) + * Since we're counting n down, a m overflow means we can + * can immediately skip to the next n */ if (m > scaled_max_m) - break; + continue; r = _dpll_test_mult(&m, n, &new_rate, target_rate, - dd->clk_ref->rate); - - /* m can't be set low enough for this n - try with a larger n */ - if (r == DPLL_MULT_UNDERFLOW) - continue; + clk->parent->rate); e = target_rate - new_rate; pr_debug("clock: n = %d: m = %d: rate error is %d " "(new_rate = %ld)\n", n, m, e, new_rate); if (min_e == -1 || - min_e >= (int)(abs(e) - dd->rate_tolerance)) { + min_e >= (int)(abs(e) - clk->dpll_data->rate_tolerance)) { min_e = e; min_e_m = m; min_e_n = n; pr_debug("clock: found new least error %d\n", min_e); - - /* We found good settings -- bail out now */ - if (min_e <= dd->rate_tolerance) - break; } + + /* + * Since we're counting n down, a m underflow means we + * can bail out completely (since as n decreases in + * the next iteration, there's no way that m can + * increase beyond the current m) + */ + if (r & DPLL_MULT_UNDERFLOW) + break; } if (min_e < 0) { @@ -1007,17 +944,17 @@ long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate) return ~0; } - dd->last_rounded_m = min_e_m; - dd->last_rounded_n = min_e_n; - dd->last_rounded_rate = _dpll_compute_new_rate(dd->clk_ref->rate, - min_e_m, min_e_n); + clk->dpll_data->last_rounded_m = min_e_m; + clk->dpll_data->last_rounded_n = min_e_n; + clk->dpll_data->last_rounded_rate = + _dpll_compute_new_rate(clk->parent->rate, min_e_m, min_e_n); pr_debug("clock: final least error: e = %d, m = %d, n = %d\n", min_e, min_e_m, min_e_n); pr_debug("clock: final rate: %ld (target rate: %ld)\n", - dd->last_rounded_rate, target_rate); + clk->dpll_data->last_rounded_rate, target_rate); - return dd->last_rounded_rate; + return clk->dpll_data->last_rounded_rate; } /*------------------------------------------------------------------------- @@ -1036,10 +973,6 @@ void omap2_clk_disable_unused(struct clk *clk) return; printk(KERN_INFO "Disabling unused clock \"%s\"\n", clk->name); - if (cpu_is_omap34xx()) { - omap2_clk_enable(clk); - omap2_clk_disable(clk); - } else - _omap2_clk_disable(clk); + _omap2_clk_disable(clk); } #endif diff --git a/trunk/arch/arm/mach-omap2/clock.h b/trunk/arch/arm/mach-omap2/clock.h index 2679ddfa6424..1fb330e0847d 100644 --- a/trunk/arch/arm/mach-omap2/clock.h +++ b/trunk/arch/arm/mach-omap2/clock.h @@ -21,28 +21,13 @@ /* The maximum error between a target DPLL rate and the rounded rate in Hz */ #define DEFAULT_DPLL_RATE_TOLERANCE 50000 -/* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */ -#define CORE_CLK_SRC_32K 0x0 -#define CORE_CLK_SRC_DPLL 0x1 -#define CORE_CLK_SRC_DPLL_X2 0x2 - -/* OMAP2xxx CM_CLKEN_PLL.EN_DPLL bits - for omap2_get_dpll_rate() */ -#define OMAP2XXX_EN_DPLL_LPBYPASS 0x1 -#define OMAP2XXX_EN_DPLL_FRBYPASS 0x2 -#define OMAP2XXX_EN_DPLL_LOCKED 0x3 - -/* OMAP3xxx CM_CLKEN_PLL*.EN_*_DPLL bits - for omap2_get_dpll_rate() */ -#define OMAP3XXX_EN_DPLL_LPBYPASS 0x5 -#define OMAP3XXX_EN_DPLL_FRBYPASS 0x6 -#define OMAP3XXX_EN_DPLL_LOCKED 0x7 - int omap2_clk_init(void); int omap2_clk_enable(struct clk *clk); void omap2_clk_disable(struct clk *clk); long omap2_clk_round_rate(struct clk *clk, unsigned long rate); int omap2_clk_set_rate(struct clk *clk, unsigned long rate); int omap2_clk_set_parent(struct clk *clk, struct clk *new_parent); -int omap2_dpll_set_rate_tolerance(struct clk *clk, unsigned int tolerance); +int omap2_dpll_rate_tolerance_set(struct clk *clk, unsigned int tolerance); long omap2_dpll_round_rate(struct clk *clk, unsigned long target_rate); #ifdef CONFIG_OMAP_RESET_CLOCKS @@ -51,7 +36,7 @@ void omap2_clk_disable_unused(struct clk *clk); #define omap2_clk_disable_unused NULL #endif -unsigned long omap2_clksel_recalc(struct clk *clk); +void omap2_clksel_recalc(struct clk *clk); void omap2_init_clk_clkdm(struct clk *clk); void omap2_init_clksel_parent(struct clk *clk); u32 omap2_clksel_get_divisor(struct clk *clk); @@ -59,16 +44,13 @@ u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, u32 *new_div); u32 omap2_clksel_to_divisor(struct clk *clk, u32 field_val); u32 omap2_divisor_to_clksel(struct clk *clk, u32 div); -unsigned long omap2_fixed_divisor_recalc(struct clk *clk); +void omap2_fixed_divisor_recalc(struct clk *clk); long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate); int omap2_clksel_set_rate(struct clk *clk, unsigned long rate); u32 omap2_get_dpll_rate(struct clk *clk); int omap2_wait_clock_ready(void __iomem *reg, u32 cval, const char *name); void omap2_clk_prepare_for_reboot(void); -extern const struct clkops clkops_omap2_dflt_wait; -extern const struct clkops clkops_omap2_dflt; - extern u8 cpu_mask; /* clksel_rate data common to 24xx/343x */ diff --git a/trunk/arch/arm/mach-omap2/clock24xx.c b/trunk/arch/arm/mach-omap2/clock24xx.c index 1e839c5a28c5..d382eb0184ac 100644 --- a/trunk/arch/arm/mach-omap2/clock24xx.c +++ b/trunk/arch/arm/mach-omap2/clock24xx.c @@ -31,192 +31,15 @@ #include #include #include -#include -#include +#include "memory.h" #include "clock.h" +#include "clock24xx.h" #include "prm.h" #include "prm-regbits-24xx.h" #include "cm.h" #include "cm-regbits-24xx.h" -static const struct clkops clkops_oscck; -static const struct clkops clkops_fixed; - -#include "clock24xx.h" - -struct omap_clk { - u32 cpu; - struct clk_lookup lk; -}; - -#define CLK(dev, con, ck, cp) \ - { \ - .cpu = cp, \ - .lk = { \ - .dev_id = dev, \ - .con_id = con, \ - .clk = ck, \ - }, \ - } - -#define CK_243X (1 << 0) -#define CK_242X (1 << 1) - -static struct omap_clk omap24xx_clks[] = { - /* external root sources */ - CLK(NULL, "func_32k_ck", &func_32k_ck, CK_243X | CK_242X), - CLK(NULL, "osc_ck", &osc_ck, CK_243X | CK_242X), - CLK(NULL, "sys_ck", &sys_ck, CK_243X | CK_242X), - CLK(NULL, "alt_ck", &alt_ck, CK_243X | CK_242X), - /* internal analog sources */ - CLK(NULL, "dpll_ck", &dpll_ck, CK_243X | CK_242X), - CLK(NULL, "apll96_ck", &apll96_ck, CK_243X | CK_242X), - CLK(NULL, "apll54_ck", &apll54_ck, CK_243X | CK_242X), - /* internal prcm root sources */ - CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X | CK_242X), - CLK(NULL, "core_ck", &core_ck, CK_243X | CK_242X), - CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X | CK_242X), - CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X | CK_242X), - CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X | CK_242X), - CLK(NULL, "ck_wdt1_osc", &wdt1_osc_ck, CK_243X | CK_242X), - CLK(NULL, "sys_clkout_src", &sys_clkout_src, CK_243X | CK_242X), - CLK(NULL, "sys_clkout", &sys_clkout, CK_243X | CK_242X), - CLK(NULL, "sys_clkout2_src", &sys_clkout2_src, CK_242X), - CLK(NULL, "sys_clkout2", &sys_clkout2, CK_242X), - CLK(NULL, "emul_ck", &emul_ck, CK_242X), - /* mpu domain clocks */ - CLK(NULL, "mpu_ck", &mpu_ck, CK_243X | CK_242X), - /* dsp domain clocks */ - CLK(NULL, "dsp_fck", &dsp_fck, CK_243X | CK_242X), - CLK(NULL, "dsp_irate_ick", &dsp_irate_ick, CK_243X | CK_242X), - CLK(NULL, "dsp_ick", &dsp_ick, CK_242X), - CLK(NULL, "iva2_1_ick", &iva2_1_ick, CK_243X), - CLK(NULL, "iva1_ifck", &iva1_ifck, CK_242X), - CLK(NULL, "iva1_mpu_int_ifck", &iva1_mpu_int_ifck, CK_242X), - /* GFX domain clocks */ - CLK(NULL, "gfx_3d_fck", &gfx_3d_fck, CK_243X | CK_242X), - CLK(NULL, "gfx_2d_fck", &gfx_2d_fck, CK_243X | CK_242X), - CLK(NULL, "gfx_ick", &gfx_ick, CK_243X | CK_242X), - /* Modem domain clocks */ - CLK(NULL, "mdm_ick", &mdm_ick, CK_243X), - CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), - /* DSS domain clocks */ - CLK(NULL, "dss_ick", &dss_ick, CK_243X | CK_242X), - CLK(NULL, "dss1_fck", &dss1_fck, CK_243X | CK_242X), - CLK(NULL, "dss2_fck", &dss2_fck, CK_243X | CK_242X), - CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X | CK_242X), - /* L3 domain clocks */ - CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X | CK_242X), - CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X | CK_242X), - CLK(NULL, "usb_l4_ick", &usb_l4_ick, CK_243X | CK_242X), - /* L4 domain clocks */ - CLK(NULL, "l4_ck", &l4_ck, CK_243X | CK_242X), - CLK(NULL, "ssi_l4_ick", &ssi_l4_ick, CK_243X | CK_242X), - /* virtual meta-group clock */ - CLK(NULL, "virt_prcm_set", &virt_prcm_set, CK_243X | CK_242X), - /* general l4 interface ck, multi-parent functional clk */ - CLK(NULL, "gpt1_ick", &gpt1_ick, CK_243X | CK_242X), - CLK(NULL, "gpt1_fck", &gpt1_fck, CK_243X | CK_242X), - CLK(NULL, "gpt2_ick", &gpt2_ick, CK_243X | CK_242X), - CLK(NULL, "gpt2_fck", &gpt2_fck, CK_243X | CK_242X), - CLK(NULL, "gpt3_ick", &gpt3_ick, CK_243X | CK_242X), - CLK(NULL, "gpt3_fck", &gpt3_fck, CK_243X | CK_242X), - CLK(NULL, "gpt4_ick", &gpt4_ick, CK_243X | CK_242X), - CLK(NULL, "gpt4_fck", &gpt4_fck, CK_243X | CK_242X), - CLK(NULL, "gpt5_ick", &gpt5_ick, CK_243X | CK_242X), - CLK(NULL, "gpt5_fck", &gpt5_fck, CK_243X | CK_242X), - CLK(NULL, "gpt6_ick", &gpt6_ick, CK_243X | CK_242X), - CLK(NULL, "gpt6_fck", &gpt6_fck, CK_243X | CK_242X), - CLK(NULL, "gpt7_ick", &gpt7_ick, CK_243X | CK_242X), - CLK(NULL, "gpt7_fck", &gpt7_fck, CK_243X | CK_242X), - CLK(NULL, "gpt8_ick", &gpt8_ick, CK_243X | CK_242X), - CLK(NULL, "gpt8_fck", &gpt8_fck, CK_243X | CK_242X), - CLK(NULL, "gpt9_ick", &gpt9_ick, CK_243X | CK_242X), - CLK(NULL, "gpt9_fck", &gpt9_fck, CK_243X | CK_242X), - CLK(NULL, "gpt10_ick", &gpt10_ick, CK_243X | CK_242X), - CLK(NULL, "gpt10_fck", &gpt10_fck, CK_243X | CK_242X), - CLK(NULL, "gpt11_ick", &gpt11_ick, CK_243X | CK_242X), - CLK(NULL, "gpt11_fck", &gpt11_fck, CK_243X | CK_242X), - CLK(NULL, "gpt12_ick", &gpt12_ick, CK_243X | CK_242X), - CLK(NULL, "gpt12_fck", &gpt12_fck, CK_243X | CK_242X), - CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_243X | CK_242X), - CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_243X | CK_242X), - CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_243X | CK_242X), - CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_243X | CK_242X), - CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_243X), - CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_243X), - CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_243X), - CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_243X), - CLK("omap-mcbsp.5", "ick", &mcbsp5_ick, CK_243X), - CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_243X), - CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_243X | CK_242X), - CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_243X | CK_242X), - CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_243X | CK_242X), - CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_243X | CK_242X), - CLK("omap2_mcspi.3", "ick", &mcspi3_ick, CK_243X), - CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_243X), - CLK(NULL, "uart1_ick", &uart1_ick, CK_243X | CK_242X), - CLK(NULL, "uart1_fck", &uart1_fck, CK_243X | CK_242X), - CLK(NULL, "uart2_ick", &uart2_ick, CK_243X | CK_242X), - CLK(NULL, "uart2_fck", &uart2_fck, CK_243X | CK_242X), - CLK(NULL, "uart3_ick", &uart3_ick, CK_243X | CK_242X), - CLK(NULL, "uart3_fck", &uart3_fck, CK_243X | CK_242X), - CLK(NULL, "gpios_ick", &gpios_ick, CK_243X | CK_242X), - CLK(NULL, "gpios_fck", &gpios_fck, CK_243X | CK_242X), - CLK("omap_wdt", "ick", &mpu_wdt_ick, CK_243X | CK_242X), - CLK("omap_wdt", "fck", &mpu_wdt_fck, CK_243X | CK_242X), - CLK(NULL, "sync_32k_ick", &sync_32k_ick, CK_243X | CK_242X), - CLK(NULL, "wdt1_ick", &wdt1_ick, CK_243X | CK_242X), - CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_243X | CK_242X), - CLK(NULL, "icr_ick", &icr_ick, CK_243X), - CLK("omap24xxcam", "fck", &cam_fck, CK_243X | CK_242X), - CLK("omap24xxcam", "ick", &cam_ick, CK_243X | CK_242X), - CLK(NULL, "mailboxes_ick", &mailboxes_ick, CK_243X | CK_242X), - CLK(NULL, "wdt4_ick", &wdt4_ick, CK_243X | CK_242X), - CLK(NULL, "wdt4_fck", &wdt4_fck, CK_243X | CK_242X), - CLK(NULL, "wdt3_ick", &wdt3_ick, CK_242X), - CLK(NULL, "wdt3_fck", &wdt3_fck, CK_242X), - CLK(NULL, "mspro_ick", &mspro_ick, CK_243X | CK_242X), - CLK(NULL, "mspro_fck", &mspro_fck, CK_243X | CK_242X), - CLK("mmci-omap.0", "ick", &mmc_ick, CK_242X), - CLK("mmci-omap.0", "fck", &mmc_fck, CK_242X), - CLK(NULL, "fac_ick", &fac_ick, CK_243X | CK_242X), - CLK(NULL, "fac_fck", &fac_fck, CK_243X | CK_242X), - CLK(NULL, "eac_ick", &eac_ick, CK_242X), - CLK(NULL, "eac_fck", &eac_fck, CK_242X), - CLK("omap_hdq.0", "ick", &hdq_ick, CK_243X | CK_242X), - CLK("omap_hdq.1", "fck", &hdq_fck, CK_243X | CK_242X), - CLK("i2c_omap.1", "ick", &i2c1_ick, CK_243X | CK_242X), - CLK("i2c_omap.1", "fck", &i2c1_fck, CK_242X), - CLK("i2c_omap.1", "fck", &i2chs1_fck, CK_243X), - CLK("i2c_omap.2", "ick", &i2c2_ick, CK_243X | CK_242X), - CLK("i2c_omap.2", "fck", &i2c2_fck, CK_242X), - CLK("i2c_omap.2", "fck", &i2chs2_fck, CK_243X), - CLK(NULL, "gpmc_fck", &gpmc_fck, CK_243X | CK_242X), - CLK(NULL, "sdma_fck", &sdma_fck, CK_243X | CK_242X), - CLK(NULL, "sdma_ick", &sdma_ick, CK_243X | CK_242X), - CLK(NULL, "vlynq_ick", &vlynq_ick, CK_242X), - CLK(NULL, "vlynq_fck", &vlynq_fck, CK_242X), - CLK(NULL, "sdrc_ick", &sdrc_ick, CK_243X), - CLK(NULL, "des_ick", &des_ick, CK_243X | CK_242X), - CLK(NULL, "sha_ick", &sha_ick, CK_243X | CK_242X), - CLK("omap_rng", "ick", &rng_ick, CK_243X | CK_242X), - CLK(NULL, "aes_ick", &aes_ick, CK_243X | CK_242X), - CLK(NULL, "pka_ick", &pka_ick, CK_243X | CK_242X), - CLK(NULL, "usb_fck", &usb_fck, CK_243X | CK_242X), - CLK(NULL, "usbhs_ick", &usbhs_ick, CK_243X), - CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_243X), - CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_243X), - CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_243X), - CLK("mmci-omap-hs.1", "fck", &mmchs2_fck, CK_243X), - CLK(NULL, "gpio5_ick", &gpio5_ick, CK_243X), - CLK(NULL, "gpio5_fck", &gpio5_fck, CK_243X), - CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X), - CLK("mmci-omap-hs.0", "mmchsdb_fck", &mmchsdb1_fck, CK_243X), - CLK("mmci-omap-hs.1", "mmchsdb_fck", &mmchsdb2_fck, CK_243X), -}; - /* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */ #define EN_APLL_STOPPED 0 #define EN_APLL_LOCKED 3 @@ -236,32 +59,19 @@ static struct clk *sclk; * Omap24xx specific clock functions *-------------------------------------------------------------------------*/ -/** - * omap2xxx_clk_get_core_rate - return the CORE_CLK rate - * @clk: pointer to the combined dpll_ck + core_ck (currently "dpll_ck") - * - * Returns the CORE_CLK rate. CORE_CLK can have one of three rate - * sources on OMAP2xxx: the DPLL CLKOUT rate, DPLL CLKOUTX2, or 32KHz - * (the latter is unusual). This currently should be called with - * struct clk *dpll_ck, which is a composite clock of dpll_ck and - * core_ck. - */ -static unsigned long omap2xxx_clk_get_core_rate(struct clk *clk) +/* This actually returns the rate of core_ck, not dpll_ck. */ +static u32 omap2_get_dpll_rate_24xx(struct clk *tclk) { - long long core_clk; - u32 v; - - core_clk = omap2_get_dpll_rate(clk); + long long dpll_clk; + u8 amult; - v = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2); - v &= OMAP24XX_CORE_CLK_SRC_MASK; + dpll_clk = omap2_get_dpll_rate(tclk); - if (v == CORE_CLK_SRC_32K) - core_clk = 32768; - else - core_clk *= v; + amult = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2); + amult &= OMAP24XX_CORE_CLK_SRC_MASK; + dpll_clk *= amult; - return core_clk; + return dpll_clk; } static int omap2_enable_osc_ck(struct clk *clk) @@ -286,11 +96,6 @@ static void omap2_disable_osc_ck(struct clk *clk) OMAP24XX_PRCM_CLKSRC_CTRL); } -static const struct clkops clkops_oscck = { - .enable = &omap2_enable_osc_ck, - .disable = &omap2_disable_osc_ck, -}; - #ifdef OLD_CK /* Recalculate SYST_CLK */ static void omap2_sys_clk_recalc(struct clk * clk) @@ -344,16 +149,11 @@ static void omap2_clk_fixed_disable(struct clk *clk) cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); } -static const struct clkops clkops_fixed = { - .enable = &omap2_clk_fixed_enable, - .disable = &omap2_clk_fixed_disable, -}; - /* * Uses the current prcm set to tell if a rate is valid. * You can go slower, but not faster within a given rate set. */ -static long omap2_dpllcore_round_rate(unsigned long target_rate) +long omap2_dpllcore_round_rate(unsigned long target_rate) { u32 high, low, core_clk_src; @@ -382,9 +182,11 @@ static long omap2_dpllcore_round_rate(unsigned long target_rate) } -static unsigned long omap2_dpllcore_recalc(struct clk *clk) +static void omap2_dpllcore_recalc(struct clk *clk) { - return omap2xxx_clk_get_core_rate(clk); + clk->rate = omap2_get_dpll_rate_24xx(clk); + + propagate_rate(clk); } static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) @@ -393,19 +195,22 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) u32 bypass = 0; struct prcm_config tmpset; const struct dpll_data *dd; + unsigned long flags; + int ret = -EINVAL; - cur_rate = omap2xxx_clk_get_core_rate(&dpll_ck); + local_irq_save(flags); + cur_rate = omap2_get_dpll_rate_24xx(&dpll_ck); mult = cm_read_mod_reg(PLL_MOD, CM_CLKSEL2); mult &= OMAP24XX_CORE_CLK_SRC_MASK; if ((rate == (cur_rate / 2)) && (mult == 2)) { - omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); + omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL, 1); } else if ((rate == (cur_rate * 2)) && (mult == 1)) { - omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); + omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL_X2, 1); } else if (rate != cur_rate) { valid_rate = omap2_dpllcore_round_rate(rate); if (valid_rate != rate) - return -EINVAL; + goto dpll_exit; if (mult == 1) low = curr_prcm_set->dpll_speed; @@ -414,7 +219,7 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) dd = clk->dpll_data; if (!dd) - return -EINVAL; + goto dpll_exit; tmpset.cm_clksel1_pll = __raw_readl(dd->mult_div1_reg); tmpset.cm_clksel1_pll &= ~(dd->mult_mask | @@ -440,19 +245,22 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) if (rate == curr_prcm_set->xtal_speed) /* If asking for 1-1 */ bypass = 1; - /* For omap2xxx_sdrc_init_params() */ - omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); + omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL_X2, 1); /* For init_mem */ /* Force dll lock mode */ omap2_set_prcm(tmpset.cm_clksel1_pll, tmpset.base_sdrc_rfr, bypass); /* Errata: ret dll entry state */ - omap2xxx_sdrc_init_params(omap2xxx_sdrc_dll_is_unlocked()); - omap2xxx_sdrc_reprogram(done_rate, 0); + omap2_init_memory_params(omap2_dll_force_needed()); + omap2_reprogram_sdrc(done_rate, 0); } + omap2_dpllcore_recalc(&dpll_ck); + ret = 0; - return 0; +dpll_exit: + local_irq_restore(flags); + return(ret); } /** @@ -461,9 +269,9 @@ static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate) * * Set virt_prcm_set's rate to the mpu_speed field of the current PRCM set. */ -static unsigned long omap2_table_mpu_recalc(struct clk *clk) +static void omap2_table_mpu_recalc(struct clk *clk) { - return curr_prcm_set->mpu_speed; + clk->rate = curr_prcm_set->mpu_speed; } /* @@ -529,12 +337,12 @@ static int omap2_select_table_rate(struct clk *clk, unsigned long rate) } curr_prcm_set = prcm; - cur_rate = omap2xxx_clk_get_core_rate(&dpll_ck); + cur_rate = omap2_get_dpll_rate_24xx(&dpll_ck); if (prcm->dpll_speed == cur_rate / 2) { - omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL, 1); + omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL, 1); } else if (prcm->dpll_speed == cur_rate * 2) { - omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); + omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL_X2, 1); } else if (prcm->dpll_speed != cur_rate) { local_irq_save(flags); @@ -558,67 +366,27 @@ static int omap2_select_table_rate(struct clk *clk, unsigned long rate) /* Major subsystem dividers */ tmp = cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) & OMAP24XX_CLKSEL_DSS2_MASK; - cm_write_mod_reg(prcm->cm_clksel1_core | tmp, CORE_MOD, - CM_CLKSEL1); - + cm_write_mod_reg(prcm->cm_clksel1_core | tmp, CORE_MOD, CM_CLKSEL1); if (cpu_is_omap2430()) cm_write_mod_reg(prcm->cm_clksel_mdm, OMAP2430_MDM_MOD, CM_CLKSEL); - /* x2 to enter omap2xxx_sdrc_init_params() */ - omap2xxx_sdrc_reprogram(CORE_CLK_SRC_DPLL_X2, 1); + /* x2 to enter init_mem */ + omap2_reprogram_sdrc(CORE_CLK_SRC_DPLL_X2, 1); omap2_set_prcm(prcm->cm_clksel1_pll, prcm->base_sdrc_rfr, bypass); - omap2xxx_sdrc_init_params(omap2xxx_sdrc_dll_is_unlocked()); - omap2xxx_sdrc_reprogram(done_rate, 0); + omap2_init_memory_params(omap2_dll_force_needed()); + omap2_reprogram_sdrc(done_rate, 0); local_irq_restore(flags); } + omap2_dpllcore_recalc(&dpll_ck); return 0; } -#ifdef CONFIG_CPU_FREQ -/* - * Walk PRCM rate table and fillout cpufreq freq_table - */ -static struct cpufreq_frequency_table freq_table[ARRAY_SIZE(rate_table)]; - -void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table) -{ - struct prcm_config *prcm; - int i = 0; - - for (prcm = rate_table; prcm->mpu_speed; prcm++) { - if (!(prcm->flags & cpu_mask)) - continue; - if (prcm->xtal_speed != sys_ck.rate) - continue; - - /* don't put bypass rates in table */ - if (prcm->dpll_speed == prcm->xtal_speed) - continue; - - freq_table[i].index = i; - freq_table[i].frequency = prcm->mpu_speed / 1000; - i++; - } - - if (i == 0) { - printk(KERN_WARNING "%s: failed to initialize frequency " - "table\n", __func__); - return; - } - - freq_table[i].index = i; - freq_table[i].frequency = CPUFREQ_TABLE_END; - - *table = &freq_table[0]; -} -#endif - static struct clk_functions omap2_clk_functions = { .clk_enable = omap2_clk_enable, .clk_disable = omap2_clk_disable, @@ -626,27 +394,24 @@ static struct clk_functions omap2_clk_functions = { .clk_set_rate = omap2_clk_set_rate, .clk_set_parent = omap2_clk_set_parent, .clk_disable_unused = omap2_clk_disable_unused, -#ifdef CONFIG_CPU_FREQ - .clk_init_cpufreq_table = omap2_clk_init_cpufreq_table, -#endif }; static u32 omap2_get_apll_clkin(void) { - u32 aplls, srate = 0; + u32 aplls, sclk = 0; aplls = cm_read_mod_reg(PLL_MOD, CM_CLKSEL1); aplls &= OMAP24XX_APLLS_CLKIN_MASK; aplls >>= OMAP24XX_APLLS_CLKIN_SHIFT; if (aplls == APLLS_CLKIN_19_2MHZ) - srate = 19200000; + sclk = 19200000; else if (aplls == APLLS_CLKIN_13MHZ) - srate = 13000000; + sclk = 13000000; else if (aplls == APLLS_CLKIN_12MHZ) - srate = 12000000; + sclk = 12000000; - return srate; + return sclk; } static u32 omap2_get_sysclkdiv(void) @@ -660,14 +425,16 @@ static u32 omap2_get_sysclkdiv(void) return div; } -static unsigned long omap2_osc_clk_recalc(struct clk *clk) +static void omap2_osc_clk_recalc(struct clk *clk) { - return omap2_get_apll_clkin() * omap2_get_sysclkdiv(); + clk->rate = omap2_get_apll_clkin() * omap2_get_sysclkdiv(); + propagate_rate(clk); } -static unsigned long omap2_sys_clk_recalc(struct clk *clk) +static void omap2_sys_clk_recalc(struct clk *clk) { - return clk->parent->rate / omap2_get_sysclkdiv(); + clk->rate = clk->parent->rate / omap2_get_sysclkdiv(); + propagate_rate(clk); } /* @@ -693,7 +460,7 @@ static int __init omap2_clk_arch_init(void) if (!mpurate) return -EINVAL; - if (clk_set_rate(&virt_prcm_set, mpurate)) + if (omap2_select_table_rate(&virt_prcm_set, mpurate)) printk(KERN_ERR "Could not find matching MPU rate\n"); recalculate_root_clocks(); @@ -710,8 +477,8 @@ arch_initcall(omap2_clk_arch_init); int __init omap2_clk_init(void) { struct prcm_config *prcm; - struct omap_clk *c; - u32 clkrate, cpu_mask; + struct clk **clkp; + u32 clkrate; if (cpu_is_omap242x()) cpu_mask = RATE_IN_242X; @@ -720,28 +487,26 @@ int __init omap2_clk_init(void) clk_init(&omap2_clk_functions); - osc_ck.rate = omap2_osc_clk_recalc(&osc_ck); - propagate_rate(&osc_ck); - sys_ck.rate = omap2_sys_clk_recalc(&sys_ck); - propagate_rate(&sys_ck); + omap2_osc_clk_recalc(&osc_ck); + omap2_sys_clk_recalc(&sys_ck); - for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++) - clk_init_one(c->lk.clk); + for (clkp = onchip_24xx_clks; + clkp < onchip_24xx_clks + ARRAY_SIZE(onchip_24xx_clks); + clkp++) { - cpu_mask = 0; - if (cpu_is_omap2420()) - cpu_mask |= CK_242X; - if (cpu_is_omap2430()) - cpu_mask |= CK_243X; + if ((*clkp)->flags & CLOCK_IN_OMAP242X && cpu_is_omap2420()) { + clk_register(*clkp); + continue; + } - for (c = omap24xx_clks; c < omap24xx_clks + ARRAY_SIZE(omap24xx_clks); c++) - if (c->cpu & cpu_mask) { - clkdev_add(&c->lk); - clk_register(c->lk.clk); + if ((*clkp)->flags & CLOCK_IN_OMAP243X && cpu_is_omap2430()) { + clk_register(*clkp); + continue; } + } /* Check the MPU rate set by bootloader */ - clkrate = omap2xxx_clk_get_core_rate(&dpll_ck); + clkrate = omap2_get_dpll_rate_24xx(&dpll_ck); for (prcm = rate_table; prcm->mpu_speed; prcm++) { if (!(prcm->flags & cpu_mask)) continue; diff --git a/trunk/arch/arm/mach-omap2/clock24xx.h b/trunk/arch/arm/mach-omap2/clock24xx.h index 33c3e5b14323..ad6d98d177c5 100644 --- a/trunk/arch/arm/mach-omap2/clock24xx.h +++ b/trunk/arch/arm/mach-omap2/clock24xx.h @@ -24,13 +24,17 @@ #include "cm-regbits-24xx.h" #include "sdrc.h" -static unsigned long omap2_table_mpu_recalc(struct clk *clk); +static void omap2_table_mpu_recalc(struct clk *clk); static int omap2_select_table_rate(struct clk *clk, unsigned long rate); static long omap2_round_to_table_rate(struct clk *clk, unsigned long rate); -static unsigned long omap2_sys_clk_recalc(struct clk *clk); -static unsigned long omap2_osc_clk_recalc(struct clk *clk); -static unsigned long omap2_sys_clk_recalc(struct clk *clk); -static unsigned long omap2_dpllcore_recalc(struct clk *clk); +static void omap2_sys_clk_recalc(struct clk *clk); +static void omap2_osc_clk_recalc(struct clk *clk); +static void omap2_sys_clk_recalc(struct clk *clk); +static void omap2_dpllcore_recalc(struct clk *clk); +static int omap2_clk_fixed_enable(struct clk *clk); +static void omap2_clk_fixed_disable(struct clk *clk); +static int omap2_enable_osc_ck(struct clk *clk); +static void omap2_disable_osc_ck(struct clk *clk); static int omap2_reprogram_dpllcore(struct clk *clk, unsigned long rate); /* Key dividers which make up a PRCM set. Ratio's for a PRCM are mandated. @@ -619,35 +623,41 @@ static struct prcm_config rate_table[] = { /* Base external input clocks */ static struct clk func_32k_ck = { .name = "func_32k_ck", - .ops = &clkops_null, .rate = 32000, - .flags = RATE_FIXED, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES, .clkdm_name = "wkup_clkdm", + .recalc = &propagate_rate, }; /* Typical 12/13MHz in standalone mode, will be 26Mhz in chassis mode */ static struct clk osc_ck = { /* (*12, *13, 19.2, *26, 38.4)MHz */ .name = "osc_ck", - .ops = &clkops_oscck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + RATE_PROPAGATES, .clkdm_name = "wkup_clkdm", + .enable = &omap2_enable_osc_ck, + .disable = &omap2_disable_osc_ck, .recalc = &omap2_osc_clk_recalc, }; /* Without modem likely 12MHz, with modem likely 13MHz */ static struct clk sys_ck = { /* (*12, *13, 19.2, 26, 38.4)MHz */ .name = "sys_ck", /* ~ ref_clk also */ - .ops = &clkops_null, .parent = &osc_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ALWAYS_ENABLED | RATE_PROPAGATES, .clkdm_name = "wkup_clkdm", .recalc = &omap2_sys_clk_recalc, }; static struct clk alt_ck = { /* Typical 54M or 48M, may not exist */ .name = "alt_ck", - .ops = &clkops_null, .rate = 54000000, - .flags = RATE_FIXED, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + RATE_FIXED | ALWAYS_ENABLED | RATE_PROPAGATES, .clkdm_name = "wkup_clkdm", + .recalc = &propagate_rate, }; /* @@ -663,12 +673,7 @@ static struct dpll_data dpll_dd = { .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), .mult_mask = OMAP24XX_DPLL_MULT_MASK, .div1_mask = OMAP24XX_DPLL_DIV_MASK, - .clk_bypass = &sys_ck, - .clk_ref = &sys_ck, - .control_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), - .enable_mask = OMAP24XX_EN_DPLL_MASK, .max_multiplier = 1024, - .min_divider = 1, .max_divider = 16, .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE }; @@ -679,9 +684,10 @@ static struct dpll_data dpll_dd = { */ static struct clk dpll_ck = { .name = "dpll_ck", - .ops = &clkops_null, .parent = &sys_ck, /* Can be func_32k also */ .dpll_data = &dpll_dd, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + RATE_PROPAGATES | ALWAYS_ENABLED, .clkdm_name = "wkup_clkdm", .recalc = &omap2_dpllcore_recalc, .set_rate = &omap2_reprogram_dpllcore, @@ -689,24 +695,30 @@ static struct clk dpll_ck = { static struct clk apll96_ck = { .name = "apll96_ck", - .ops = &clkops_fixed, .parent = &sys_ck, .rate = 96000000, - .flags = RATE_FIXED | ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT, .clkdm_name = "wkup_clkdm", .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP24XX_EN_96M_PLL_SHIFT, + .enable = &omap2_clk_fixed_enable, + .disable = &omap2_clk_fixed_disable, + .recalc = &propagate_rate, }; static struct clk apll54_ck = { .name = "apll54_ck", - .ops = &clkops_fixed, .parent = &sys_ck, .rate = 54000000, - .flags = RATE_FIXED | ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + RATE_FIXED | RATE_PROPAGATES | ENABLE_ON_INIT, .clkdm_name = "wkup_clkdm", .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP24XX_EN_54M_PLL_SHIFT, + .enable = &omap2_clk_fixed_enable, + .disable = &omap2_clk_fixed_disable, + .recalc = &propagate_rate, }; /* @@ -733,8 +745,9 @@ static const struct clksel func_54m_clksel[] = { static struct clk func_54m_ck = { .name = "func_54m_ck", - .ops = &clkops_null, .parent = &apll54_ck, /* can also be alt_clk */ + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, .clkdm_name = "wkup_clkdm", .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), @@ -745,8 +758,9 @@ static struct clk func_54m_ck = { static struct clk core_ck = { .name = "core_ck", - .ops = &clkops_null, .parent = &dpll_ck, /* can also be 32k */ + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ALWAYS_ENABLED | RATE_PROPAGATES, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -771,8 +785,9 @@ static const struct clksel func_96m_clksel[] = { /* The parent of this clock is not selectable on 2420. */ static struct clk func_96m_ck = { .name = "func_96m_ck", - .ops = &clkops_null, .parent = &apll96_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, .clkdm_name = "wkup_clkdm", .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), @@ -803,8 +818,9 @@ static const struct clksel func_48m_clksel[] = { static struct clk func_48m_ck = { .name = "func_48m_ck", - .ops = &clkops_null, .parent = &apll96_ck, /* 96M or Alt */ + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, .clkdm_name = "wkup_clkdm", .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), @@ -817,9 +833,10 @@ static struct clk func_48m_ck = { static struct clk func_12m_ck = { .name = "func_12m_ck", - .ops = &clkops_null, .parent = &func_48m_ck, .fixed_div = 4, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + RATE_PROPAGATES | PARENT_CONTROLS_CLOCK, .clkdm_name = "wkup_clkdm", .recalc = &omap2_fixed_divisor_recalc, }; @@ -827,8 +844,8 @@ static struct clk func_12m_ck = { /* Secure timer, only available in secure mode */ static struct clk wdt1_osc_ck = { .name = "ck_wdt1_osc", - .ops = &clkops_null, /* RMK: missing? */ .parent = &osc_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .recalc = &followparent_recalc, }; @@ -870,8 +887,9 @@ static const struct clksel common_clkout_src_clksel[] = { static struct clk sys_clkout_src = { .name = "sys_clkout_src", - .ops = &clkops_omap2_dflt, .parent = &func_54m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + RATE_PROPAGATES, .clkdm_name = "wkup_clkdm", .enable_reg = OMAP24XX_PRCM_CLKOUT_CTRL, .enable_bit = OMAP24XX_CLKOUT_EN_SHIFT, @@ -900,8 +918,9 @@ static const struct clksel sys_clkout_clksel[] = { static struct clk sys_clkout = { .name = "sys_clkout", - .ops = &clkops_null, .parent = &sys_clkout_src, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + PARENT_CONTROLS_CLOCK, .clkdm_name = "wkup_clkdm", .clksel_reg = OMAP24XX_PRCM_CLKOUT_CTRL, .clksel_mask = OMAP24XX_CLKOUT_DIV_MASK, @@ -914,8 +933,8 @@ static struct clk sys_clkout = { /* In 2430, new in 2420 ES2 */ static struct clk sys_clkout2_src = { .name = "sys_clkout2_src", - .ops = &clkops_omap2_dflt, .parent = &func_54m_ck, + .flags = CLOCK_IN_OMAP242X | RATE_PROPAGATES, .clkdm_name = "wkup_clkdm", .enable_reg = OMAP24XX_PRCM_CLKOUT_CTRL, .enable_bit = OMAP2420_CLKOUT2_EN_SHIFT, @@ -936,8 +955,8 @@ static const struct clksel sys_clkout2_clksel[] = { /* In 2430, new in 2420 ES2 */ static struct clk sys_clkout2 = { .name = "sys_clkout2", - .ops = &clkops_null, .parent = &sys_clkout2_src, + .flags = CLOCK_IN_OMAP242X | PARENT_CONTROLS_CLOCK, .clkdm_name = "wkup_clkdm", .clksel_reg = OMAP24XX_PRCM_CLKOUT_CTRL, .clksel_mask = OMAP2420_CLKOUT2_DIV_MASK, @@ -949,8 +968,8 @@ static struct clk sys_clkout2 = { static struct clk emul_ck = { .name = "emul_ck", - .ops = &clkops_omap2_dflt, .parent = &func_54m_ck, + .flags = CLOCK_IN_OMAP242X, .clkdm_name = "wkup_clkdm", .enable_reg = OMAP24XX_PRCM_CLKEMUL_CTRL, .enable_bit = OMAP24XX_EMULATION_EN_SHIFT, @@ -984,9 +1003,10 @@ static const struct clksel mpu_clksel[] = { static struct clk mpu_ck = { /* Control cpu */ .name = "mpu_ck", - .ops = &clkops_null, .parent = &core_ck, - .flags = DELAYED_APP | CONFIG_PARTICIPANT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ALWAYS_ENABLED | DELAYED_APP | + CONFIG_PARTICIPANT | RATE_PROPAGATES, .clkdm_name = "mpu_clkdm", .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, CM_CLKSEL), @@ -1026,9 +1046,9 @@ static const struct clksel dsp_fck_clksel[] = { static struct clk dsp_fck = { .name = "dsp_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &core_ck, - .flags = DELAYED_APP | CONFIG_PARTICIPANT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP | + CONFIG_PARTICIPANT | RATE_PROPAGATES, .clkdm_name = "dsp_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, @@ -1056,9 +1076,9 @@ static const struct clksel dsp_irate_ick_clksel[] = { /* This clock does not exist as such in the TRM. */ static struct clk dsp_irate_ick = { .name = "dsp_irate_ick", - .ops = &clkops_null, .parent = &dsp_fck, - .flags = DELAYED_APP | CONFIG_PARTICIPANT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | DELAYED_APP | + CONFIG_PARTICIPANT | PARENT_CONTROLS_CLOCK, .clksel_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_CLKSEL), .clksel_mask = OMAP24XX_CLKSEL_DSP_IF_MASK, .clksel = dsp_irate_ick_clksel, @@ -1070,9 +1090,8 @@ static struct clk dsp_irate_ick = { /* 2420 only */ static struct clk dsp_ick = { .name = "dsp_ick", /* apparently ipi and isp */ - .ops = &clkops_omap2_dflt_wait, .parent = &dsp_irate_ick, - .flags = DELAYED_APP | CONFIG_PARTICIPANT, + .flags = CLOCK_IN_OMAP242X | DELAYED_APP | CONFIG_PARTICIPANT, .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_ICLKEN), .enable_bit = OMAP2420_EN_DSP_IPI_SHIFT, /* for ipi */ }; @@ -1080,9 +1099,8 @@ static struct clk dsp_ick = { /* 2430 only - EN_DSP controls both dsp fclk and iclk on 2430 */ static struct clk iva2_1_ick = { .name = "iva2_1_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &dsp_irate_ick, - .flags = DELAYED_APP | CONFIG_PARTICIPANT, + .flags = CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT, .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_CM_FCLKEN_DSP_EN_DSP_SHIFT, }; @@ -1094,9 +1112,9 @@ static struct clk iva2_1_ick = { */ static struct clk iva1_ifck = { .name = "iva1_ifck", - .ops = &clkops_omap2_dflt_wait, .parent = &core_ck, - .flags = CONFIG_PARTICIPANT | DELAYED_APP, + .flags = CLOCK_IN_OMAP242X | CONFIG_PARTICIPANT | + RATE_PROPAGATES | DELAYED_APP, .clkdm_name = "iva1_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), .enable_bit = OMAP2420_EN_IVA_COP_SHIFT, @@ -1111,8 +1129,8 @@ static struct clk iva1_ifck = { /* IVA1 mpu/int/i/f clocks are /2 of parent */ static struct clk iva1_mpu_int_ifck = { .name = "iva1_mpu_int_ifck", - .ops = &clkops_omap2_dflt_wait, .parent = &iva1_ifck, + .flags = CLOCK_IN_OMAP242X, .clkdm_name = "iva1_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP24XX_DSP_MOD, CM_FCLKEN), .enable_bit = OMAP2420_EN_IVA_MPU_SHIFT, @@ -1157,9 +1175,10 @@ static const struct clksel core_l3_clksel[] = { static struct clk core_l3_ck = { /* Used for ick and fck, interconnect */ .name = "core_l3_ck", - .ops = &clkops_null, .parent = &core_ck, - .flags = DELAYED_APP | CONFIG_PARTICIPANT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ALWAYS_ENABLED | DELAYED_APP | + CONFIG_PARTICIPANT | RATE_PROPAGATES, .clkdm_name = "core_l3_clkdm", .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), .clksel_mask = OMAP24XX_CLKSEL_L3_MASK, @@ -1185,9 +1204,9 @@ static const struct clksel usb_l4_ick_clksel[] = { /* It is unclear from TRM whether usb_l4_ick is really in L3 or L4 clkdm */ static struct clk usb_l4_ick = { /* FS-USB interface clock */ .name = "usb_l4_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l3_ck, - .flags = DELAYED_APP | CONFIG_PARTICIPANT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + DELAYED_APP | CONFIG_PARTICIPANT, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP24XX_EN_USB_SHIFT, @@ -1219,9 +1238,9 @@ static const struct clksel l4_clksel[] = { static struct clk l4_ck = { /* used both as an ick and fck */ .name = "l4_ck", - .ops = &clkops_null, .parent = &core_l3_ck, - .flags = DELAYED_APP, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ALWAYS_ENABLED | DELAYED_APP | RATE_PROPAGATES, .clkdm_name = "core_l4_clkdm", .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL1), .clksel_mask = OMAP24XX_CLKSEL_L4_MASK, @@ -1257,9 +1276,9 @@ static const struct clksel ssi_ssr_sst_fck_clksel[] = { static struct clk ssi_ssr_sst_fck = { .name = "ssi_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &core_ck, - .flags = DELAYED_APP, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + DELAYED_APP, .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP24XX_EN_SSI_SHIFT, @@ -1271,20 +1290,6 @@ static struct clk ssi_ssr_sst_fck = { .set_rate = &omap2_clksel_set_rate }; -/* - * Presumably this is the same as SSI_ICLK. - * TRM contradicts itself on what clockdomain SSI_ICLK is in - */ -static struct clk ssi_l4_ick = { - .name = "ssi_l4_ick", - .ops = &clkops_omap2_dflt_wait, - .parent = &l4_ck, - .clkdm_name = "core_l4_clkdm", - .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), - .enable_bit = OMAP24XX_EN_SSI_SHIFT, - .recalc = &followparent_recalc, -}; - /* * GFX clock domain @@ -1307,8 +1312,8 @@ static const struct clksel gfx_fck_clksel[] = { static struct clk gfx_3d_fck = { .name = "gfx_3d_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l3_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "gfx_clkdm", .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_3D_SHIFT, @@ -1322,8 +1327,8 @@ static struct clk gfx_3d_fck = { static struct clk gfx_2d_fck = { .name = "gfx_2d_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l3_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "gfx_clkdm", .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_2D_SHIFT, @@ -1337,8 +1342,8 @@ static struct clk gfx_2d_fck = { static struct clk gfx_ick = { .name = "gfx_ick", /* From l3 */ - .ops = &clkops_omap2_dflt_wait, .parent = &core_l3_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "gfx_clkdm", .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), .enable_bit = OMAP_EN_GFX_SHIFT, @@ -1367,9 +1372,8 @@ static const struct clksel mdm_ick_clksel[] = { static struct clk mdm_ick = { /* used both as a ick and fck */ .name = "mdm_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_ck, - .flags = DELAYED_APP | CONFIG_PARTICIPANT, + .flags = CLOCK_IN_OMAP243X | DELAYED_APP | CONFIG_PARTICIPANT, .clkdm_name = "mdm_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_ICLKEN), .enable_bit = OMAP2430_CM_ICLKEN_MDM_EN_MDM_SHIFT, @@ -1383,8 +1387,8 @@ static struct clk mdm_ick = { /* used both as a ick and fck */ static struct clk mdm_osc_ck = { .name = "mdm_osc_ck", - .ops = &clkops_omap2_dflt_wait, .parent = &osc_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "mdm_clkdm", .enable_reg = OMAP_CM_REGADDR(OMAP2430_MDM_MOD, CM_FCLKEN), .enable_bit = OMAP2430_EN_OSC_SHIFT, @@ -1428,8 +1432,8 @@ static const struct clksel dss1_fck_clksel[] = { static struct clk dss_ick = { /* Enables both L3,L4 ICLK's */ .name = "dss_ick", - .ops = &clkops_omap2_dflt, .parent = &l4_ck, /* really both l3 and l4 */ + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "dss_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_DSS1_SHIFT, @@ -1438,9 +1442,9 @@ static struct clk dss_ick = { /* Enables both L3,L4 ICLK's */ static struct clk dss1_fck = { .name = "dss1_fck", - .ops = &clkops_omap2_dflt, .parent = &core_ck, /* Core or sys */ - .flags = DELAYED_APP, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + DELAYED_APP, .clkdm_name = "dss_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_DSS1_SHIFT, @@ -1471,9 +1475,9 @@ static const struct clksel dss2_fck_clksel[] = { static struct clk dss2_fck = { /* Alt clk used in power management */ .name = "dss2_fck", - .ops = &clkops_omap2_dflt, .parent = &sys_ck, /* fixed at sys_ck or 48MHz */ - .flags = DELAYED_APP, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + DELAYED_APP, .clkdm_name = "dss_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_DSS2_SHIFT, @@ -1486,8 +1490,8 @@ static struct clk dss2_fck = { /* Alt clk used in power management */ static struct clk dss_54m_fck = { /* Alt clk used in power management */ .name = "dss_54m_fck", /* 54m tv clk */ - .ops = &clkops_omap2_dflt_wait, .parent = &func_54m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "dss_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_TV_SHIFT, @@ -1514,8 +1518,8 @@ static const struct clksel omap24xx_gpt_clksel[] = { static struct clk gpt1_ick = { .name = "gpt1_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_GPT1_SHIFT, @@ -1524,8 +1528,8 @@ static struct clk gpt1_ick = { static struct clk gpt1_fck = { .name = "gpt1_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_GPT1_SHIFT, @@ -1540,8 +1544,8 @@ static struct clk gpt1_fck = { static struct clk gpt2_ick = { .name = "gpt2_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT2_SHIFT, @@ -1550,8 +1554,8 @@ static struct clk gpt2_ick = { static struct clk gpt2_fck = { .name = "gpt2_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT2_SHIFT, @@ -1564,8 +1568,8 @@ static struct clk gpt2_fck = { static struct clk gpt3_ick = { .name = "gpt3_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT3_SHIFT, @@ -1574,8 +1578,8 @@ static struct clk gpt3_ick = { static struct clk gpt3_fck = { .name = "gpt3_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT3_SHIFT, @@ -1588,8 +1592,8 @@ static struct clk gpt3_fck = { static struct clk gpt4_ick = { .name = "gpt4_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT4_SHIFT, @@ -1598,8 +1602,8 @@ static struct clk gpt4_ick = { static struct clk gpt4_fck = { .name = "gpt4_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT4_SHIFT, @@ -1612,8 +1616,8 @@ static struct clk gpt4_fck = { static struct clk gpt5_ick = { .name = "gpt5_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT5_SHIFT, @@ -1622,8 +1626,8 @@ static struct clk gpt5_ick = { static struct clk gpt5_fck = { .name = "gpt5_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT5_SHIFT, @@ -1636,8 +1640,8 @@ static struct clk gpt5_fck = { static struct clk gpt6_ick = { .name = "gpt6_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT6_SHIFT, @@ -1646,8 +1650,8 @@ static struct clk gpt6_ick = { static struct clk gpt6_fck = { .name = "gpt6_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT6_SHIFT, @@ -1660,8 +1664,8 @@ static struct clk gpt6_fck = { static struct clk gpt7_ick = { .name = "gpt7_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT7_SHIFT, .recalc = &followparent_recalc, @@ -1669,8 +1673,8 @@ static struct clk gpt7_ick = { static struct clk gpt7_fck = { .name = "gpt7_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT7_SHIFT, @@ -1683,8 +1687,8 @@ static struct clk gpt7_fck = { static struct clk gpt8_ick = { .name = "gpt8_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT8_SHIFT, @@ -1693,8 +1697,8 @@ static struct clk gpt8_ick = { static struct clk gpt8_fck = { .name = "gpt8_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT8_SHIFT, @@ -1707,8 +1711,8 @@ static struct clk gpt8_fck = { static struct clk gpt9_ick = { .name = "gpt9_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT9_SHIFT, @@ -1717,8 +1721,8 @@ static struct clk gpt9_ick = { static struct clk gpt9_fck = { .name = "gpt9_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT9_SHIFT, @@ -1731,8 +1735,8 @@ static struct clk gpt9_fck = { static struct clk gpt10_ick = { .name = "gpt10_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT10_SHIFT, @@ -1741,8 +1745,8 @@ static struct clk gpt10_ick = { static struct clk gpt10_fck = { .name = "gpt10_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT10_SHIFT, @@ -1755,8 +1759,8 @@ static struct clk gpt10_fck = { static struct clk gpt11_ick = { .name = "gpt11_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT11_SHIFT, @@ -1765,8 +1769,8 @@ static struct clk gpt11_ick = { static struct clk gpt11_fck = { .name = "gpt11_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT11_SHIFT, @@ -1779,8 +1783,8 @@ static struct clk gpt11_fck = { static struct clk gpt12_ick = { .name = "gpt12_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_GPT12_SHIFT, @@ -1789,8 +1793,8 @@ static struct clk gpt12_ick = { static struct clk gpt12_fck = { .name = "gpt12_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_GPT12_SHIFT, @@ -1803,9 +1807,9 @@ static struct clk gpt12_fck = { static struct clk mcbsp1_ick = { .name = "mcbsp_ick", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MCBSP1_SHIFT, @@ -1814,9 +1818,9 @@ static struct clk mcbsp1_ick = { static struct clk mcbsp1_fck = { .name = "mcbsp_fck", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MCBSP1_SHIFT, @@ -1825,9 +1829,9 @@ static struct clk mcbsp1_fck = { static struct clk mcbsp2_ick = { .name = "mcbsp_ick", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MCBSP2_SHIFT, @@ -1836,9 +1840,9 @@ static struct clk mcbsp2_ick = { static struct clk mcbsp2_fck = { .name = "mcbsp_fck", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MCBSP2_SHIFT, @@ -1847,9 +1851,9 @@ static struct clk mcbsp2_fck = { static struct clk mcbsp3_ick = { .name = "mcbsp_ick", - .ops = &clkops_omap2_dflt_wait, .id = 3, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MCBSP3_SHIFT, @@ -1858,9 +1862,9 @@ static struct clk mcbsp3_ick = { static struct clk mcbsp3_fck = { .name = "mcbsp_fck", - .ops = &clkops_omap2_dflt_wait, .id = 3, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MCBSP3_SHIFT, @@ -1869,9 +1873,9 @@ static struct clk mcbsp3_fck = { static struct clk mcbsp4_ick = { .name = "mcbsp_ick", - .ops = &clkops_omap2_dflt_wait, .id = 4, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MCBSP4_SHIFT, @@ -1880,9 +1884,9 @@ static struct clk mcbsp4_ick = { static struct clk mcbsp4_fck = { .name = "mcbsp_fck", - .ops = &clkops_omap2_dflt_wait, .id = 4, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MCBSP4_SHIFT, @@ -1891,9 +1895,9 @@ static struct clk mcbsp4_fck = { static struct clk mcbsp5_ick = { .name = "mcbsp_ick", - .ops = &clkops_omap2_dflt_wait, .id = 5, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MCBSP5_SHIFT, @@ -1902,9 +1906,9 @@ static struct clk mcbsp5_ick = { static struct clk mcbsp5_fck = { .name = "mcbsp_fck", - .ops = &clkops_omap2_dflt_wait, .id = 5, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MCBSP5_SHIFT, @@ -1913,10 +1917,10 @@ static struct clk mcbsp5_fck = { static struct clk mcspi1_ick = { .name = "mcspi_ick", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &l4_ck, .clkdm_name = "core_l4_clkdm", + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MCSPI1_SHIFT, .recalc = &followparent_recalc, @@ -1924,9 +1928,9 @@ static struct clk mcspi1_ick = { static struct clk mcspi1_fck = { .name = "mcspi_fck", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &func_48m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MCSPI1_SHIFT, @@ -1935,9 +1939,9 @@ static struct clk mcspi1_fck = { static struct clk mcspi2_ick = { .name = "mcspi_ick", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MCSPI2_SHIFT, @@ -1946,9 +1950,9 @@ static struct clk mcspi2_ick = { static struct clk mcspi2_fck = { .name = "mcspi_fck", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &func_48m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MCSPI2_SHIFT, @@ -1957,9 +1961,9 @@ static struct clk mcspi2_fck = { static struct clk mcspi3_ick = { .name = "mcspi_ick", - .ops = &clkops_omap2_dflt_wait, .id = 3, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MCSPI3_SHIFT, @@ -1968,9 +1972,9 @@ static struct clk mcspi3_ick = { static struct clk mcspi3_fck = { .name = "mcspi_fck", - .ops = &clkops_omap2_dflt_wait, .id = 3, .parent = &func_48m_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MCSPI3_SHIFT, @@ -1979,8 +1983,8 @@ static struct clk mcspi3_fck = { static struct clk uart1_ick = { .name = "uart1_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_UART1_SHIFT, @@ -1989,8 +1993,8 @@ static struct clk uart1_ick = { static struct clk uart1_fck = { .name = "uart1_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_48m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_UART1_SHIFT, @@ -1999,8 +2003,8 @@ static struct clk uart1_fck = { static struct clk uart2_ick = { .name = "uart2_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_UART2_SHIFT, @@ -2009,8 +2013,8 @@ static struct clk uart2_ick = { static struct clk uart2_fck = { .name = "uart2_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_48m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_UART2_SHIFT, @@ -2019,8 +2023,8 @@ static struct clk uart2_fck = { static struct clk uart3_ick = { .name = "uart3_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP24XX_EN_UART3_SHIFT, @@ -2029,8 +2033,8 @@ static struct clk uart3_ick = { static struct clk uart3_fck = { .name = "uart3_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_48m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP24XX_EN_UART3_SHIFT, @@ -2039,8 +2043,8 @@ static struct clk uart3_fck = { static struct clk gpios_ick = { .name = "gpios_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_GPIOS_SHIFT, @@ -2049,8 +2053,8 @@ static struct clk gpios_ick = { static struct clk gpios_fck = { .name = "gpios_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "wkup_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_GPIOS_SHIFT, @@ -2059,8 +2063,8 @@ static struct clk gpios_fck = { static struct clk mpu_wdt_ick = { .name = "mpu_wdt_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_MPU_WDT_SHIFT, @@ -2069,8 +2073,8 @@ static struct clk mpu_wdt_ick = { static struct clk mpu_wdt_fck = { .name = "mpu_wdt_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "wkup_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP24XX_EN_MPU_WDT_SHIFT, @@ -2079,9 +2083,9 @@ static struct clk mpu_wdt_fck = { static struct clk sync_32k_ick = { .name = "sync_32k_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, - .flags = ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ENABLE_ON_INIT, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_32KSYNC_SHIFT, @@ -2090,8 +2094,8 @@ static struct clk sync_32k_ick = { static struct clk wdt1_ick = { .name = "wdt1_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_WDT1_SHIFT, @@ -2100,9 +2104,9 @@ static struct clk wdt1_ick = { static struct clk omapctrl_ick = { .name = "omapctrl_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, - .flags = ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ENABLE_ON_INIT, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP24XX_EN_OMAPCTRL_SHIFT, @@ -2111,8 +2115,8 @@ static struct clk omapctrl_ick = { static struct clk icr_ick = { .name = "icr_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP2430_EN_ICR_SHIFT, @@ -2121,8 +2125,8 @@ static struct clk icr_ick = { static struct clk cam_ick = { .name = "cam_ick", - .ops = &clkops_omap2_dflt, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_CAM_SHIFT, @@ -2136,8 +2140,8 @@ static struct clk cam_ick = { */ static struct clk cam_fck = { .name = "cam_fck", - .ops = &clkops_omap2_dflt, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_CAM_SHIFT, @@ -2146,8 +2150,8 @@ static struct clk cam_fck = { static struct clk mailboxes_ick = { .name = "mailboxes_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MAILBOXES_SHIFT, @@ -2156,8 +2160,8 @@ static struct clk mailboxes_ick = { static struct clk wdt4_ick = { .name = "wdt4_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_WDT4_SHIFT, @@ -2166,8 +2170,8 @@ static struct clk wdt4_ick = { static struct clk wdt4_fck = { .name = "wdt4_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_WDT4_SHIFT, @@ -2176,8 +2180,8 @@ static struct clk wdt4_fck = { static struct clk wdt3_ick = { .name = "wdt3_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_WDT3_SHIFT, @@ -2186,8 +2190,8 @@ static struct clk wdt3_ick = { static struct clk wdt3_fck = { .name = "wdt3_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_WDT3_SHIFT, @@ -2196,8 +2200,8 @@ static struct clk wdt3_fck = { static struct clk mspro_ick = { .name = "mspro_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_MSPRO_SHIFT, @@ -2206,8 +2210,8 @@ static struct clk mspro_ick = { static struct clk mspro_fck = { .name = "mspro_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_MSPRO_SHIFT, @@ -2216,8 +2220,8 @@ static struct clk mspro_fck = { static struct clk mmc_ick = { .name = "mmc_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_MMC_SHIFT, @@ -2226,8 +2230,8 @@ static struct clk mmc_ick = { static struct clk mmc_fck = { .name = "mmc_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_MMC_SHIFT, @@ -2236,8 +2240,8 @@ static struct clk mmc_fck = { static struct clk fac_ick = { .name = "fac_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_FAC_SHIFT, @@ -2246,8 +2250,8 @@ static struct clk fac_ick = { static struct clk fac_fck = { .name = "fac_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_12m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_FAC_SHIFT, @@ -2256,8 +2260,8 @@ static struct clk fac_fck = { static struct clk eac_ick = { .name = "eac_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_EAC_SHIFT, @@ -2266,8 +2270,8 @@ static struct clk eac_ick = { static struct clk eac_fck = { .name = "eac_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_EAC_SHIFT, @@ -2276,8 +2280,8 @@ static struct clk eac_fck = { static struct clk hdq_ick = { .name = "hdq_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP24XX_EN_HDQ_SHIFT, @@ -2286,8 +2290,8 @@ static struct clk hdq_ick = { static struct clk hdq_fck = { .name = "hdq_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_12m_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP24XX_EN_HDQ_SHIFT, @@ -2296,9 +2300,9 @@ static struct clk hdq_fck = { static struct clk i2c2_ick = { .name = "i2c_ick", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_I2C2_SHIFT, @@ -2307,9 +2311,9 @@ static struct clk i2c2_ick = { static struct clk i2c2_fck = { .name = "i2c_fck", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &func_12m_ck, + .flags = CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_I2C2_SHIFT, @@ -2318,9 +2322,9 @@ static struct clk i2c2_fck = { static struct clk i2chs2_fck = { .name = "i2c_fck", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_I2CHS2_SHIFT, @@ -2329,9 +2333,9 @@ static struct clk i2chs2_fck = { static struct clk i2c1_ick = { .name = "i2c_ick", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_I2C1_SHIFT, @@ -2340,9 +2344,9 @@ static struct clk i2c1_ick = { static struct clk i2c1_fck = { .name = "i2c_fck", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &func_12m_ck, + .flags = CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_I2C1_SHIFT, @@ -2351,9 +2355,9 @@ static struct clk i2c1_fck = { static struct clk i2chs1_fck = { .name = "i2c_fck", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_I2CHS1_SHIFT, @@ -2362,33 +2366,33 @@ static struct clk i2chs1_fck = { static struct clk gpmc_fck = { .name = "gpmc_fck", - .ops = &clkops_null, /* RMK: missing? */ .parent = &core_l3_ck, - .flags = ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + ENABLE_ON_INIT, .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; static struct clk sdma_fck = { .name = "sdma_fck", - .ops = &clkops_null, /* RMK: missing? */ .parent = &core_l3_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; static struct clk sdma_ick = { .name = "sdma_ick", - .ops = &clkops_null, /* RMK: missing? */ .parent = &l4_ck, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X, .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; static struct clk vlynq_ick = { .name = "vlynq_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l3_ck, + .flags = CLOCK_IN_OMAP242X, .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP2420_EN_VLYNQ_SHIFT, @@ -2422,9 +2426,8 @@ static const struct clksel vlynq_fck_clksel[] = { static struct clk vlynq_fck = { .name = "vlynq_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_96m_ck, - .flags = DELAYED_APP, + .flags = CLOCK_IN_OMAP242X | DELAYED_APP, .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP2420_EN_VLYNQ_SHIFT, @@ -2439,9 +2442,8 @@ static struct clk vlynq_fck = { static struct clk sdrc_ick = { .name = "sdrc_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, - .flags = ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP243X | ENABLE_ON_INIT, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3), .enable_bit = OMAP2430_EN_SDRC_SHIFT, @@ -2450,8 +2452,8 @@ static struct clk sdrc_ick = { static struct clk des_ick = { .name = "des_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_DES_SHIFT, @@ -2460,8 +2462,8 @@ static struct clk des_ick = { static struct clk sha_ick = { .name = "sha_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_SHA_SHIFT, @@ -2470,8 +2472,8 @@ static struct clk sha_ick = { static struct clk rng_ick = { .name = "rng_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_RNG_SHIFT, @@ -2480,8 +2482,8 @@ static struct clk rng_ick = { static struct clk aes_ick = { .name = "aes_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_AES_SHIFT, @@ -2490,8 +2492,8 @@ static struct clk aes_ick = { static struct clk pka_ick = { .name = "pka_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_ICLKEN4), .enable_bit = OMAP24XX_EN_PKA_SHIFT, @@ -2500,8 +2502,8 @@ static struct clk pka_ick = { static struct clk usb_fck = { .name = "usb_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_48m_ck, + .flags = CLOCK_IN_OMAP243X | CLOCK_IN_OMAP242X, .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP24XX_EN_USB_SHIFT, @@ -2510,8 +2512,8 @@ static struct clk usb_fck = { static struct clk usbhs_ick = { .name = "usbhs_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l3_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_USBHS_SHIFT, @@ -2520,8 +2522,8 @@ static struct clk usbhs_ick = { static struct clk mmchs1_ick = { .name = "mmchs_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MMCHS1_SHIFT, @@ -2530,8 +2532,8 @@ static struct clk mmchs1_ick = { static struct clk mmchs1_fck = { .name = "mmchs_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l3_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MMCHS1_SHIFT, @@ -2540,9 +2542,9 @@ static struct clk mmchs1_fck = { static struct clk mmchs2_ick = { .name = "mmchs_ick", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MMCHS2_SHIFT, @@ -2551,9 +2553,9 @@ static struct clk mmchs2_ick = { static struct clk mmchs2_fck = { .name = "mmchs_fck", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &func_96m_ck, + .flags = CLOCK_IN_OMAP243X, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MMCHS2_SHIFT, .recalc = &followparent_recalc, @@ -2561,8 +2563,8 @@ static struct clk mmchs2_fck = { static struct clk gpio5_ick = { .name = "gpio5_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_GPIO5_SHIFT, @@ -2571,8 +2573,8 @@ static struct clk gpio5_ick = { static struct clk gpio5_fck = { .name = "gpio5_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_GPIO5_SHIFT, @@ -2581,8 +2583,8 @@ static struct clk gpio5_fck = { static struct clk mdm_intc_ick = { .name = "mdm_intc_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP2430_EN_MDM_INTC_SHIFT, @@ -2591,8 +2593,8 @@ static struct clk mdm_intc_ick = { static struct clk mmchsdb1_fck = { .name = "mmchsdb_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MMCHSDB1_SHIFT, @@ -2601,9 +2603,9 @@ static struct clk mmchsdb1_fck = { static struct clk mmchsdb2_fck = { .name = "mmchsdb_fck", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &func_32k_ck, + .flags = CLOCK_IN_OMAP243X, .clkdm_name = "core_l4_clkdm", .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP24XX_CM_FCLKEN2), .enable_bit = OMAP2430_EN_MMCHSDB2_SHIFT, @@ -2626,13 +2628,166 @@ static struct clk mmchsdb2_fck = { */ static struct clk virt_prcm_set = { .name = "virt_prcm_set", - .ops = &clkops_null, - .flags = DELAYED_APP, + .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | + VIRTUAL_CLOCK | ALWAYS_ENABLED | DELAYED_APP, .parent = &mpu_ck, /* Indexed by mpu speed, no parent */ .recalc = &omap2_table_mpu_recalc, /* sets are keyed on mpu rate */ .set_rate = &omap2_select_table_rate, .round_rate = &omap2_round_to_table_rate, }; +static struct clk *onchip_24xx_clks[] __initdata = { + /* external root sources */ + &func_32k_ck, + &osc_ck, + &sys_ck, + &alt_ck, + /* internal analog sources */ + &dpll_ck, + &apll96_ck, + &apll54_ck, + /* internal prcm root sources */ + &func_54m_ck, + &core_ck, + &func_96m_ck, + &func_48m_ck, + &func_12m_ck, + &wdt1_osc_ck, + &sys_clkout_src, + &sys_clkout, + &sys_clkout2_src, + &sys_clkout2, + &emul_ck, + /* mpu domain clocks */ + &mpu_ck, + /* dsp domain clocks */ + &dsp_fck, + &dsp_irate_ick, + &dsp_ick, /* 242x */ + &iva2_1_ick, /* 243x */ + &iva1_ifck, /* 242x */ + &iva1_mpu_int_ifck, /* 242x */ + /* GFX domain clocks */ + &gfx_3d_fck, + &gfx_2d_fck, + &gfx_ick, + /* Modem domain clocks */ + &mdm_ick, + &mdm_osc_ck, + /* DSS domain clocks */ + &dss_ick, + &dss1_fck, + &dss2_fck, + &dss_54m_fck, + /* L3 domain clocks */ + &core_l3_ck, + &ssi_ssr_sst_fck, + &usb_l4_ick, + /* L4 domain clocks */ + &l4_ck, /* used as both core_l4 and wu_l4 */ + /* virtual meta-group clock */ + &virt_prcm_set, + /* general l4 interface ck, multi-parent functional clk */ + &gpt1_ick, + &gpt1_fck, + &gpt2_ick, + &gpt2_fck, + &gpt3_ick, + &gpt3_fck, + &gpt4_ick, + &gpt4_fck, + &gpt5_ick, + &gpt5_fck, + &gpt6_ick, + &gpt6_fck, + &gpt7_ick, + &gpt7_fck, + &gpt8_ick, + &gpt8_fck, + &gpt9_ick, + &gpt9_fck, + &gpt10_ick, + &gpt10_fck, + &gpt11_ick, + &gpt11_fck, + &gpt12_ick, + &gpt12_fck, + &mcbsp1_ick, + &mcbsp1_fck, + &mcbsp2_ick, + &mcbsp2_fck, + &mcbsp3_ick, + &mcbsp3_fck, + &mcbsp4_ick, + &mcbsp4_fck, + &mcbsp5_ick, + &mcbsp5_fck, + &mcspi1_ick, + &mcspi1_fck, + &mcspi2_ick, + &mcspi2_fck, + &mcspi3_ick, + &mcspi3_fck, + &uart1_ick, + &uart1_fck, + &uart2_ick, + &uart2_fck, + &uart3_ick, + &uart3_fck, + &gpios_ick, + &gpios_fck, + &mpu_wdt_ick, + &mpu_wdt_fck, + &sync_32k_ick, + &wdt1_ick, + &omapctrl_ick, + &icr_ick, + &cam_fck, + &cam_ick, + &mailboxes_ick, + &wdt4_ick, + &wdt4_fck, + &wdt3_ick, + &wdt3_fck, + &mspro_ick, + &mspro_fck, + &mmc_ick, + &mmc_fck, + &fac_ick, + &fac_fck, + &eac_ick, + &eac_fck, + &hdq_ick, + &hdq_fck, + &i2c1_ick, + &i2c1_fck, + &i2chs1_fck, + &i2c2_ick, + &i2c2_fck, + &i2chs2_fck, + &gpmc_fck, + &sdma_fck, + &sdma_ick, + &vlynq_ick, + &vlynq_fck, + &sdrc_ick, + &des_ick, + &sha_ick, + &rng_ick, + &aes_ick, + &pka_ick, + &usb_fck, + &usbhs_ick, + &mmchs1_ick, + &mmchs1_fck, + &mmchs2_ick, + &mmchs2_fck, + &gpio5_ick, + &gpio5_fck, + &mdm_intc_ick, + &mmchsdb1_fck, + &mmchsdb2_fck, +}; + #endif diff --git a/trunk/arch/arm/mach-omap2/clock34xx.c b/trunk/arch/arm/mach-omap2/clock34xx.c index 0a14dca31e30..31bb7010bd48 100644 --- a/trunk/arch/arm/mach-omap2/clock34xx.c +++ b/trunk/arch/arm/mach-omap2/clock34xx.c @@ -30,251 +30,15 @@ #include #include #include -#include -#include +#include "memory.h" #include "clock.h" +#include "clock34xx.h" #include "prm.h" #include "prm-regbits-34xx.h" #include "cm.h" #include "cm-regbits-34xx.h" -static const struct clkops clkops_noncore_dpll_ops; - -#include "clock34xx.h" - -struct omap_clk { - u32 cpu; - struct clk_lookup lk; -}; - -#define CLK(dev, con, ck, cp) \ - { \ - .cpu = cp, \ - .lk = { \ - .dev_id = dev, \ - .con_id = con, \ - .clk = ck, \ - }, \ - } - -#define CK_343X (1 << 0) -#define CK_3430ES1 (1 << 1) -#define CK_3430ES2 (1 << 2) - -static struct omap_clk omap34xx_clks[] = { - CLK(NULL, "omap_32k_fck", &omap_32k_fck, CK_343X), - CLK(NULL, "virt_12m_ck", &virt_12m_ck, CK_343X), - CLK(NULL, "virt_13m_ck", &virt_13m_ck, CK_343X), - CLK(NULL, "virt_16_8m_ck", &virt_16_8m_ck, CK_3430ES2), - CLK(NULL, "virt_19_2m_ck", &virt_19_2m_ck, CK_343X), - CLK(NULL, "virt_26m_ck", &virt_26m_ck, CK_343X), - CLK(NULL, "virt_38_4m_ck", &virt_38_4m_ck, CK_343X), - CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_343X), - CLK(NULL, "sys_ck", &sys_ck, CK_343X), - CLK(NULL, "sys_altclk", &sys_altclk, CK_343X), - CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_343X), - CLK(NULL, "sys_clkout1", &sys_clkout1, CK_343X), - CLK(NULL, "dpll1_ck", &dpll1_ck, CK_343X), - CLK(NULL, "dpll1_x2_ck", &dpll1_x2_ck, CK_343X), - CLK(NULL, "dpll1_x2m2_ck", &dpll1_x2m2_ck, CK_343X), - CLK(NULL, "dpll2_ck", &dpll2_ck, CK_343X), - CLK(NULL, "dpll2_m2_ck", &dpll2_m2_ck, CK_343X), - CLK(NULL, "dpll3_ck", &dpll3_ck, CK_343X), - CLK(NULL, "core_ck", &core_ck, CK_343X), - CLK(NULL, "dpll3_x2_ck", &dpll3_x2_ck, CK_343X), - CLK(NULL, "dpll3_m2_ck", &dpll3_m2_ck, CK_343X), - CLK(NULL, "dpll3_m2x2_ck", &dpll3_m2x2_ck, CK_343X), - CLK(NULL, "dpll3_m3_ck", &dpll3_m3_ck, CK_343X), - CLK(NULL, "dpll3_m3x2_ck", &dpll3_m3x2_ck, CK_343X), - CLK(NULL, "emu_core_alwon_ck", &emu_core_alwon_ck, CK_343X), - CLK(NULL, "dpll4_ck", &dpll4_ck, CK_343X), - CLK(NULL, "dpll4_x2_ck", &dpll4_x2_ck, CK_343X), - CLK(NULL, "omap_96m_alwon_fck", &omap_96m_alwon_fck, CK_343X), - CLK(NULL, "omap_96m_fck", &omap_96m_fck, CK_343X), - CLK(NULL, "cm_96m_fck", &cm_96m_fck, CK_343X), - CLK(NULL, "omap_54m_fck", &omap_54m_fck, CK_343X), - CLK(NULL, "omap_48m_fck", &omap_48m_fck, CK_343X), - CLK(NULL, "omap_12m_fck", &omap_12m_fck, CK_343X), - CLK(NULL, "dpll4_m2_ck", &dpll4_m2_ck, CK_343X), - CLK(NULL, "dpll4_m2x2_ck", &dpll4_m2x2_ck, CK_343X), - CLK(NULL, "dpll4_m3_ck", &dpll4_m3_ck, CK_343X), - CLK(NULL, "dpll4_m3x2_ck", &dpll4_m3x2_ck, CK_343X), - CLK(NULL, "dpll4_m4_ck", &dpll4_m4_ck, CK_343X), - CLK(NULL, "dpll4_m4x2_ck", &dpll4_m4x2_ck, CK_343X), - CLK(NULL, "dpll4_m5_ck", &dpll4_m5_ck, CK_343X), - CLK(NULL, "dpll4_m5x2_ck", &dpll4_m5x2_ck, CK_343X), - CLK(NULL, "dpll4_m6_ck", &dpll4_m6_ck, CK_343X), - CLK(NULL, "dpll4_m6x2_ck", &dpll4_m6x2_ck, CK_343X), - CLK(NULL, "emu_per_alwon_ck", &emu_per_alwon_ck, CK_343X), - CLK(NULL, "dpll5_ck", &dpll5_ck, CK_3430ES2), - CLK(NULL, "dpll5_m2_ck", &dpll5_m2_ck, CK_3430ES2), - CLK(NULL, "clkout2_src_ck", &clkout2_src_ck, CK_343X), - CLK(NULL, "sys_clkout2", &sys_clkout2, CK_343X), - CLK(NULL, "corex2_fck", &corex2_fck, CK_343X), - CLK(NULL, "dpll1_fck", &dpll1_fck, CK_343X), - CLK(NULL, "mpu_ck", &mpu_ck, CK_343X), - CLK(NULL, "arm_fck", &arm_fck, CK_343X), - CLK(NULL, "emu_mpu_alwon_ck", &emu_mpu_alwon_ck, CK_343X), - CLK(NULL, "dpll2_fck", &dpll2_fck, CK_343X), - CLK(NULL, "iva2_ck", &iva2_ck, CK_343X), - CLK(NULL, "l3_ick", &l3_ick, CK_343X), - CLK(NULL, "l4_ick", &l4_ick, CK_343X), - CLK(NULL, "rm_ick", &rm_ick, CK_343X), - CLK(NULL, "gfx_l3_ck", &gfx_l3_ck, CK_3430ES1), - CLK(NULL, "gfx_l3_fck", &gfx_l3_fck, CK_3430ES1), - CLK(NULL, "gfx_l3_ick", &gfx_l3_ick, CK_3430ES1), - CLK(NULL, "gfx_cg1_ck", &gfx_cg1_ck, CK_3430ES1), - CLK(NULL, "gfx_cg2_ck", &gfx_cg2_ck, CK_3430ES1), - CLK(NULL, "sgx_fck", &sgx_fck, CK_3430ES2), - CLK(NULL, "sgx_ick", &sgx_ick, CK_3430ES2), - CLK(NULL, "d2d_26m_fck", &d2d_26m_fck, CK_3430ES1), - CLK(NULL, "gpt10_fck", &gpt10_fck, CK_343X), - CLK(NULL, "gpt11_fck", &gpt11_fck, CK_343X), - CLK(NULL, "cpefuse_fck", &cpefuse_fck, CK_3430ES2), - CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2), - CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2), - CLK(NULL, "core_96m_fck", &core_96m_fck, CK_343X), - CLK("mmci-omap-hs.2", "fck", &mmchs3_fck, CK_3430ES2), - CLK("mmci-omap-hs.1", "fck", &mmchs2_fck, CK_343X), - CLK(NULL, "mspro_fck", &mspro_fck, CK_343X), - CLK("mmci-omap-hs.0", "fck", &mmchs1_fck, CK_343X), - CLK("i2c_omap.3", "fck", &i2c3_fck, CK_343X), - CLK("i2c_omap.2", "fck", &i2c2_fck, CK_343X), - CLK("i2c_omap.1", "fck", &i2c1_fck, CK_343X), - CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_343X), - CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_343X), - CLK(NULL, "core_48m_fck", &core_48m_fck, CK_343X), - CLK("omap2_mcspi.4", "fck", &mcspi4_fck, CK_343X), - CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_343X), - CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_343X), - CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_343X), - CLK(NULL, "uart2_fck", &uart2_fck, CK_343X), - CLK(NULL, "uart1_fck", &uart1_fck, CK_343X), - CLK(NULL, "fshostusb_fck", &fshostusb_fck, CK_3430ES1), - CLK(NULL, "core_12m_fck", &core_12m_fck, CK_343X), - CLK("omap_hdq.0", "fck", &hdq_fck, CK_343X), - CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck, CK_343X), - CLK(NULL, "ssi_sst_fck", &ssi_sst_fck, CK_343X), - CLK(NULL, "core_l3_ick", &core_l3_ick, CK_343X), - CLK(NULL, "hsotgusb_ick", &hsotgusb_ick, CK_343X), - CLK(NULL, "sdrc_ick", &sdrc_ick, CK_343X), - CLK(NULL, "gpmc_fck", &gpmc_fck, CK_343X), - CLK(NULL, "security_l3_ick", &security_l3_ick, CK_343X), - CLK(NULL, "pka_ick", &pka_ick, CK_343X), - CLK(NULL, "core_l4_ick", &core_l4_ick, CK_343X), - CLK(NULL, "usbtll_ick", &usbtll_ick, CK_3430ES2), - CLK("mmci-omap-hs.2", "ick", &mmchs3_ick, CK_3430ES2), - CLK(NULL, "icr_ick", &icr_ick, CK_343X), - CLK(NULL, "aes2_ick", &aes2_ick, CK_343X), - CLK(NULL, "sha12_ick", &sha12_ick, CK_343X), - CLK(NULL, "des2_ick", &des2_ick, CK_343X), - CLK("mmci-omap-hs.1", "ick", &mmchs2_ick, CK_343X), - CLK("mmci-omap-hs.0", "ick", &mmchs1_ick, CK_343X), - CLK(NULL, "mspro_ick", &mspro_ick, CK_343X), - CLK("omap_hdq.0", "ick", &hdq_ick, CK_343X), - CLK("omap2_mcspi.4", "ick", &mcspi4_ick, CK_343X), - CLK("omap2_mcspi.3", "ick", &mcspi3_ick, CK_343X), - CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_343X), - CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_343X), - CLK("i2c_omap.3", "ick", &i2c3_ick, CK_343X), - CLK("i2c_omap.2", "ick", &i2c2_ick, CK_343X), - CLK("i2c_omap.1", "ick", &i2c1_ick, CK_343X), - CLK(NULL, "uart2_ick", &uart2_ick, CK_343X), - CLK(NULL, "uart1_ick", &uart1_ick, CK_343X), - CLK(NULL, "gpt11_ick", &gpt11_ick, CK_343X), - CLK(NULL, "gpt10_ick", &gpt10_ick, CK_343X), - CLK("omap-mcbsp.5", "ick", &mcbsp5_ick, CK_343X), - CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_343X), - CLK(NULL, "fac_ick", &fac_ick, CK_3430ES1), - CLK(NULL, "mailboxes_ick", &mailboxes_ick, CK_343X), - CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_343X), - CLK(NULL, "ssi_l4_ick", &ssi_l4_ick, CK_343X), - CLK(NULL, "ssi_ick", &ssi_ick, CK_343X), - CLK(NULL, "usb_l4_ick", &usb_l4_ick, CK_3430ES1), - CLK(NULL, "security_l4_ick2", &security_l4_ick2, CK_343X), - CLK(NULL, "aes1_ick", &aes1_ick, CK_343X), - CLK("omap_rng", "ick", &rng_ick, CK_343X), - CLK(NULL, "sha11_ick", &sha11_ick, CK_343X), - CLK(NULL, "des1_ick", &des1_ick, CK_343X), - CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck, CK_343X), - CLK(NULL, "dss_tv_fck", &dss_tv_fck, CK_343X), - CLK(NULL, "dss_96m_fck", &dss_96m_fck, CK_343X), - CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck, CK_343X), - CLK(NULL, "dss_ick", &dss_ick, CK_343X), - CLK(NULL, "cam_mclk", &cam_mclk, CK_343X), - CLK(NULL, "cam_ick", &cam_ick, CK_343X), - CLK(NULL, "csi2_96m_fck", &csi2_96m_fck, CK_343X), - CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck, CK_3430ES2), - CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck, CK_3430ES2), - CLK(NULL, "usbhost_ick", &usbhost_ick, CK_3430ES2), - CLK(NULL, "usim_fck", &usim_fck, CK_3430ES2), - CLK(NULL, "gpt1_fck", &gpt1_fck, CK_343X), - CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_343X), - CLK(NULL, "gpio1_dbck", &gpio1_dbck, CK_343X), - CLK("omap_wdt", "fck", &wdt2_fck, CK_343X), - CLK(NULL, "wkup_l4_ick", &wkup_l4_ick, CK_343X), - CLK(NULL, "usim_ick", &usim_ick, CK_3430ES2), - CLK("omap_wdt", "ick", &wdt2_ick, CK_343X), - CLK(NULL, "wdt1_ick", &wdt1_ick, CK_343X), - CLK(NULL, "gpio1_ick", &gpio1_ick, CK_343X), - CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_343X), - CLK(NULL, "gpt12_ick", &gpt12_ick, CK_343X), - CLK(NULL, "gpt1_ick", &gpt1_ick, CK_343X), - CLK(NULL, "per_96m_fck", &per_96m_fck, CK_343X), - CLK(NULL, "per_48m_fck", &per_48m_fck, CK_343X), - CLK(NULL, "uart3_fck", &uart3_fck, CK_343X), - CLK(NULL, "gpt2_fck", &gpt2_fck, CK_343X), - CLK(NULL, "gpt3_fck", &gpt3_fck, CK_343X), - CLK(NULL, "gpt4_fck", &gpt4_fck, CK_343X), - CLK(NULL, "gpt5_fck", &gpt5_fck, CK_343X), - CLK(NULL, "gpt6_fck", &gpt6_fck, CK_343X), - CLK(NULL, "gpt7_fck", &gpt7_fck, CK_343X), - CLK(NULL, "gpt8_fck", &gpt8_fck, CK_343X), - CLK(NULL, "gpt9_fck", &gpt9_fck, CK_343X), - CLK(NULL, "per_32k_alwon_fck", &per_32k_alwon_fck, CK_343X), - CLK(NULL, "gpio6_dbck", &gpio6_dbck, CK_343X), - CLK(NULL, "gpio5_dbck", &gpio5_dbck, CK_343X), - CLK(NULL, "gpio4_dbck", &gpio4_dbck, CK_343X), - CLK(NULL, "gpio3_dbck", &gpio3_dbck, CK_343X), - CLK(NULL, "gpio2_dbck", &gpio2_dbck, CK_343X), - CLK(NULL, "wdt3_fck", &wdt3_fck, CK_343X), - CLK(NULL, "per_l4_ick", &per_l4_ick, CK_343X), - CLK(NULL, "gpio6_ick", &gpio6_ick, CK_343X), - CLK(NULL, "gpio5_ick", &gpio5_ick, CK_343X), - CLK(NULL, "gpio4_ick", &gpio4_ick, CK_343X), - CLK(NULL, "gpio3_ick", &gpio3_ick, CK_343X), - CLK(NULL, "gpio2_ick", &gpio2_ick, CK_343X), - CLK(NULL, "wdt3_ick", &wdt3_ick, CK_343X), - CLK(NULL, "uart3_ick", &uart3_ick, CK_343X), - CLK(NULL, "gpt9_ick", &gpt9_ick, CK_343X), - CLK(NULL, "gpt8_ick", &gpt8_ick, CK_343X), - CLK(NULL, "gpt7_ick", &gpt7_ick, CK_343X), - CLK(NULL, "gpt6_ick", &gpt6_ick, CK_343X), - CLK(NULL, "gpt5_ick", &gpt5_ick, CK_343X), - CLK(NULL, "gpt4_ick", &gpt4_ick, CK_343X), - CLK(NULL, "gpt3_ick", &gpt3_ick, CK_343X), - CLK(NULL, "gpt2_ick", &gpt2_ick, CK_343X), - CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_343X), - CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_343X), - CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_343X), - CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_343X), - CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_343X), - CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_343X), - CLK(NULL, "emu_src_ck", &emu_src_ck, CK_343X), - CLK(NULL, "pclk_fck", &pclk_fck, CK_343X), - CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_343X), - CLK(NULL, "atclk_fck", &atclk_fck, CK_343X), - CLK(NULL, "traceclk_src_fck", &traceclk_src_fck, CK_343X), - CLK(NULL, "traceclk_fck", &traceclk_fck, CK_343X), - CLK(NULL, "sr1_fck", &sr1_fck, CK_343X), - CLK(NULL, "sr2_fck", &sr2_fck, CK_343X), - CLK(NULL, "sr_l4_ick", &sr_l4_ick, CK_343X), - CLK(NULL, "secure_32k_fck", &secure_32k_fck, CK_343X), - CLK(NULL, "gpt12_fck", &gpt12_fck, CK_343X), - CLK(NULL, "wdt1_fck", &wdt1_fck, CK_343X), -}; - /* CM_AUTOIDLE_PLL*.AUTO_* bit values */ #define DPLL_AUTOIDLE_DISABLE 0x0 #define DPLL_AUTOIDLE_LOW_POWER_STOP 0x1 @@ -287,9 +51,11 @@ static struct omap_clk omap34xx_clks[] = { * * Recalculate and propagate the DPLL rate. */ -static unsigned long omap3_dpll_recalc(struct clk *clk) +static void omap3_dpll_recalc(struct clk *clk) { - return omap2_get_dpll_rate(clk); + clk->rate = omap2_get_dpll_rate(clk); + + propagate_rate(clk); } /* _omap3_dpll_write_clken - write clken_bits arg to a DPLL's enable bits */ @@ -312,12 +78,14 @@ static int _omap3_wait_dpll_status(struct clk *clk, u8 state) const struct dpll_data *dd; int i = 0; int ret = -EINVAL; + u32 idlest_mask; dd = clk->dpll_data; - state <<= __ffs(dd->idlest_mask); + state <<= dd->idlest_bit; + idlest_mask = 1 << dd->idlest_bit; - while (((__raw_readl(dd->idlest_reg) & dd->idlest_mask) != state) && + while (((__raw_readl(dd->idlest_reg) & idlest_mask) != state) && i < MAX_DPLL_WAIT_TRIES) { i++; udelay(1); @@ -336,42 +104,6 @@ static int _omap3_wait_dpll_status(struct clk *clk, u8 state) return ret; } -/* From 3430 TRM ES2 4.7.6.2 */ -static u16 _omap3_dpll_compute_freqsel(struct clk *clk, u8 n) -{ - unsigned long fint; - u16 f = 0; - - fint = clk->dpll_data->clk_ref->rate / (n + 1); - - pr_debug("clock: fint is %lu\n", fint); - - if (fint >= 750000 && fint <= 1000000) - f = 0x3; - else if (fint > 1000000 && fint <= 1250000) - f = 0x4; - else if (fint > 1250000 && fint <= 1500000) - f = 0x5; - else if (fint > 1500000 && fint <= 1750000) - f = 0x6; - else if (fint > 1750000 && fint <= 2100000) - f = 0x7; - else if (fint > 7500000 && fint <= 10000000) - f = 0xB; - else if (fint > 10000000 && fint <= 12500000) - f = 0xC; - else if (fint > 12500000 && fint <= 15000000) - f = 0xD; - else if (fint > 15000000 && fint <= 17500000) - f = 0xE; - else if (fint > 17500000 && fint <= 21000000) - f = 0xF; - else - pr_debug("clock: unknown freqsel setting for %d\n", n); - - return f; -} - /* Non-CORE DPLL (e.g., DPLLs that do not control SDRC) clock functions */ /* @@ -396,20 +128,25 @@ static int _omap3_noncore_dpll_lock(struct clk *clk) ai = omap3_dpll_autoidle_read(clk); - omap3_dpll_deny_idle(clk); - _omap3_dpll_write_clken(clk, DPLL_LOCKED); - r = _omap3_wait_dpll_status(clk, 1); - - if (ai) + if (ai) { + /* + * If no downstream clocks are enabled, CM_IDLEST bit + * may never become active, so don't wait for DPLL to lock. + */ + r = 0; omap3_dpll_allow_idle(clk); + } else { + r = _omap3_wait_dpll_status(clk, 1); + omap3_dpll_deny_idle(clk); + }; return r; } /* - * _omap3_noncore_dpll_bypass - instruct a DPLL to bypass and wait for readiness + * omap3_noncore_dpll_bypass - instruct a DPLL to bypass and wait for readiness * @clk: pointer to a DPLL struct clk * * Instructs a non-CORE DPLL to enter low-power bypass mode. In @@ -499,25 +236,14 @@ static int _omap3_noncore_dpll_stop(struct clk *clk) static int omap3_noncore_dpll_enable(struct clk *clk) { int r; - struct dpll_data *dd; if (clk == &dpll3_ck) return -EINVAL; - dd = clk->dpll_data; - if (!dd) - return -EINVAL; - - if (clk->rate == dd->clk_bypass->rate) { - WARN_ON(clk->parent != dd->clk_bypass); + if (clk->parent->rate == clk_get_rate(clk)) r = _omap3_noncore_dpll_bypass(clk); - } else { - WARN_ON(clk->parent != dd->clk_ref); + else r = _omap3_noncore_dpll_lock(clk); - } - /* FIXME: this is dubious - if clk->rate has changed, what about propagating? */ - if (!r) - clk->rate = omap2_get_dpll_rate(clk); return r; } @@ -544,215 +270,6 @@ static void omap3_noncore_dpll_disable(struct clk *clk) _omap3_noncore_dpll_stop(clk); } - -/* Non-CORE DPLL rate set code */ - -/* - * omap3_noncore_dpll_program - set non-core DPLL M,N values directly - * @clk: struct clk * of DPLL to set - * @m: DPLL multiplier to set - * @n: DPLL divider to set - * @freqsel: FREQSEL value to set - * - * Program the DPLL with the supplied M, N values, and wait for the DPLL to - * lock.. Returns -EINVAL upon error, or 0 upon success. - */ -static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel) -{ - struct dpll_data *dd = clk->dpll_data; - u32 v; - - /* 3430 ES2 TRM: 4.7.6.9 DPLL Programming Sequence */ - _omap3_noncore_dpll_bypass(clk); - - /* Set jitter correction */ - v = __raw_readl(dd->control_reg); - v &= ~dd->freqsel_mask; - v |= freqsel << __ffs(dd->freqsel_mask); - __raw_writel(v, dd->control_reg); - - /* Set DPLL multiplier, divider */ - v = __raw_readl(dd->mult_div1_reg); - v &= ~(dd->mult_mask | dd->div1_mask); - v |= m << __ffs(dd->mult_mask); - v |= (n - 1) << __ffs(dd->div1_mask); - __raw_writel(v, dd->mult_div1_reg); - - /* We let the clock framework set the other output dividers later */ - - /* REVISIT: Set ramp-up delay? */ - - _omap3_noncore_dpll_lock(clk); - - return 0; -} - -/** - * omap3_noncore_dpll_set_rate - set non-core DPLL rate - * @clk: struct clk * of DPLL to set - * @rate: rounded target rate - * - * Set the DPLL CLKOUT to the target rate. If the DPLL can enter - * low-power bypass, and the target rate is the bypass source clock - * rate, then configure the DPLL for bypass. Otherwise, round the - * target rate if it hasn't been done already, then program and lock - * the DPLL. Returns -EINVAL upon error, or 0 upon success. - */ -static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate) -{ - struct clk *new_parent = NULL; - u16 freqsel; - struct dpll_data *dd; - int ret; - - if (!clk || !rate) - return -EINVAL; - - dd = clk->dpll_data; - if (!dd) - return -EINVAL; - - if (rate == omap2_get_dpll_rate(clk)) - return 0; - - /* - * Ensure both the bypass and ref clocks are enabled prior to - * doing anything; we need the bypass clock running to reprogram - * the DPLL. - */ - omap2_clk_enable(dd->clk_bypass); - omap2_clk_enable(dd->clk_ref); - - if (dd->clk_bypass->rate == rate && - (clk->dpll_data->modes & (1 << DPLL_LOW_POWER_BYPASS))) { - pr_debug("clock: %s: set rate: entering bypass.\n", clk->name); - - ret = _omap3_noncore_dpll_bypass(clk); - if (!ret) - new_parent = dd->clk_bypass; - } else { - if (dd->last_rounded_rate != rate) - omap2_dpll_round_rate(clk, rate); - - if (dd->last_rounded_rate == 0) - return -EINVAL; - - freqsel = _omap3_dpll_compute_freqsel(clk, dd->last_rounded_n); - if (!freqsel) - WARN_ON(1); - - pr_debug("clock: %s: set rate: locking rate to %lu.\n", - clk->name, rate); - - ret = omap3_noncore_dpll_program(clk, dd->last_rounded_m, - dd->last_rounded_n, freqsel); - if (!ret) - new_parent = dd->clk_ref; - } - if (!ret) { - /* - * Switch the parent clock in the heirarchy, and make sure - * that the new parent's usecount is correct. Note: we - * enable the new parent before disabling the old to avoid - * any unnecessary hardware disable->enable transitions. - */ - if (clk->usecount) { - omap2_clk_enable(new_parent); - omap2_clk_disable(clk->parent); - } - clk_reparent(clk, new_parent); - clk->rate = rate; - } - omap2_clk_disable(dd->clk_ref); - omap2_clk_disable(dd->clk_bypass); - - return 0; -} - -static int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate) -{ - /* - * According to the 12-5 CDP code from TI, "Limitation 2.5" - * on 3430ES1 prevents us from changing DPLL multipliers or dividers - * on DPLL4. - */ - if (omap_rev() == OMAP3430_REV_ES1_0) { - printk(KERN_ERR "clock: DPLL4 cannot change rate due to " - "silicon 'Limitation 2.5' on 3430ES1.\n"); - return -EINVAL; - } - return omap3_noncore_dpll_set_rate(clk, rate); -} - - -/* - * CORE DPLL (DPLL3) rate programming functions - * - * These call into SRAM code to do the actual CM writes, since the SDRAM - * is clocked from DPLL3. - */ - -/** - * omap3_core_dpll_m2_set_rate - set CORE DPLL M2 divider - * @clk: struct clk * of DPLL to set - * @rate: rounded target rate - * - * Program the DPLL M2 divider with the rounded target rate. Returns - * -EINVAL upon error, or 0 upon success. - */ -static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate) -{ - u32 new_div = 0; - unsigned long validrate, sdrcrate; - struct omap_sdrc_params *sp; - - if (!clk || !rate) - return -EINVAL; - - if (clk != &dpll3_m2_ck) - return -EINVAL; - - if (rate == clk->rate) - return 0; - - validrate = omap2_clksel_round_rate_div(clk, rate, &new_div); - if (validrate != rate) - return -EINVAL; - - sdrcrate = sdrc_ick.rate; - if (rate > clk->rate) - sdrcrate <<= ((rate / clk->rate) - 1); - else - sdrcrate >>= ((clk->rate / rate) - 1); - - sp = omap2_sdrc_get_params(sdrcrate); - if (!sp) - return -EINVAL; - - pr_info("clock: changing CORE DPLL rate from %lu to %lu\n", clk->rate, - validrate); - pr_info("clock: SDRC timing params used: %08x %08x %08x\n", - sp->rfr_ctrl, sp->actim_ctrla, sp->actim_ctrlb); - - /* REVISIT: SRAM code doesn't support other M2 divisors yet */ - WARN_ON(new_div != 1 && new_div != 2); - - /* REVISIT: Add SDRC_MR changing to this code also */ - omap3_configure_core_dpll(sp->rfr_ctrl, sp->actim_ctrla, - sp->actim_ctrlb, new_div); - - return 0; -} - - -static const struct clkops clkops_noncore_dpll_ops = { - .enable = &omap3_noncore_dpll_enable, - .disable = &omap3_noncore_dpll_disable, -}; - -/* DPLL autoidle read/set code */ - - /** * omap3_dpll_autoidle_read - read a DPLL's autoidle bits * @clk: struct clk * of the DPLL to read @@ -839,10 +356,9 @@ static void omap3_dpll_deny_idle(struct clk *clk) * Using parent clock DPLL data, look up DPLL state. If locked, set our * rate to the dpll_clk * 2; otherwise, just use dpll_clk. */ -static unsigned long omap3_clkoutx2_recalc(struct clk *clk) +static void omap3_clkoutx2_recalc(struct clk *clk) { const struct dpll_data *dd; - unsigned long rate; u32 v; struct clk *pclk; @@ -856,15 +372,17 @@ static unsigned long omap3_clkoutx2_recalc(struct clk *clk) dd = pclk->dpll_data; - WARN_ON(!dd->enable_mask); + WARN_ON(!dd->control_reg || !dd->enable_mask); v = __raw_readl(dd->control_reg) & dd->enable_mask; v >>= __ffs(dd->enable_mask); - if (v != OMAP3XXX_EN_DPLL_LOCKED) - rate = clk->parent->rate; + if (v != DPLL_LOCKED) + clk->rate = clk->parent->rate; else - rate = clk->parent->rate * 2; - return rate; + clk->rate = clk->parent->rate * 2; + + if (clk->flags & RATE_PROPAGATES) + propagate_rate(clk); } /* Common clock code */ @@ -914,7 +432,7 @@ static int __init omap2_clk_arch_init(void) /* REVISIT: not yet ready for 343x */ #if 0 - if (clk_set_rate(&virt_prcm_set, mpurate)) + if (omap2_select_table_rate(&virt_prcm_set, mpurate)) printk(KERN_ERR "Could not find matching MPU rate\n"); #endif @@ -932,13 +450,26 @@ arch_initcall(omap2_clk_arch_init); int __init omap2_clk_init(void) { /* struct prcm_config *prcm; */ - struct omap_clk *c; + struct clk **clkp; /* u32 clkrate; */ u32 cpu_clkflg; + /* REVISIT: Ultimately this will be used for multiboot */ +#if 0 + if (cpu_is_omap242x()) { + cpu_mask = RATE_IN_242X; + cpu_clkflg = CLOCK_IN_OMAP242X; + clkp = onchip_24xx_clks; + } else if (cpu_is_omap2430()) { + cpu_mask = RATE_IN_243X; + cpu_clkflg = CLOCK_IN_OMAP243X; + clkp = onchip_24xx_clks; + } +#endif if (cpu_is_omap34xx()) { cpu_mask = RATE_IN_343X; - cpu_clkflg = CK_343X; + cpu_clkflg = CLOCK_IN_OMAP343X; + clkp = onchip_34xx_clks; /* * Update this if there are further clock changes between ES2 @@ -946,24 +477,23 @@ int __init omap2_clk_init(void) */ if (omap_rev() == OMAP3430_REV_ES1_0) { /* No 3430ES1-only rates exist, so no RATE_IN_3430ES1 */ - cpu_clkflg |= CK_3430ES1; + cpu_clkflg |= CLOCK_IN_OMAP3430ES1; } else { cpu_mask |= RATE_IN_3430ES2; - cpu_clkflg |= CK_3430ES2; + cpu_clkflg |= CLOCK_IN_OMAP3430ES2; } } clk_init(&omap2_clk_functions); - for (c = omap34xx_clks; c < omap34xx_clks + ARRAY_SIZE(omap34xx_clks); c++) - clk_init_one(c->lk.clk); - - for (c = omap34xx_clks; c < omap34xx_clks + ARRAY_SIZE(omap34xx_clks); c++) - if (c->cpu & cpu_clkflg) { - clkdev_add(&c->lk); - clk_register(c->lk.clk); - omap2_init_clk_clkdm(c->lk.clk); + for (clkp = onchip_34xx_clks; + clkp < onchip_34xx_clks + ARRAY_SIZE(onchip_34xx_clks); + clkp++) { + if ((*clkp)->flags & cpu_clkflg) { + clk_register(*clkp); + omap2_init_clk_clkdm(*clkp); } + } /* REVISIT: Not yet ready for OMAP3 */ #if 0 diff --git a/trunk/arch/arm/mach-omap2/clock34xx.h b/trunk/arch/arm/mach-omap2/clock34xx.h index 70ec10deb654..a826094d89b5 100644 --- a/trunk/arch/arm/mach-omap2/clock34xx.h +++ b/trunk/arch/arm/mach-omap2/clock34xx.h @@ -27,14 +27,13 @@ #include "prm.h" #include "prm-regbits-34xx.h" -static unsigned long omap3_dpll_recalc(struct clk *clk); -static unsigned long omap3_clkoutx2_recalc(struct clk *clk); +static void omap3_dpll_recalc(struct clk *clk); +static void omap3_clkoutx2_recalc(struct clk *clk); static void omap3_dpll_allow_idle(struct clk *clk); static void omap3_dpll_deny_idle(struct clk *clk); static u32 omap3_dpll_autoidle_read(struct clk *clk); -static int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate); -static int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate); -static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate); +static int omap3_noncore_dpll_enable(struct clk *clk); +static void omap3_noncore_dpll_disable(struct clk *clk); /* Maximum DPLL multiplier, divider values for OMAP3 */ #define OMAP3_MAX_DPLL_MULT 2048 @@ -48,10 +47,6 @@ static int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate); * DPLL5 supplies other peripheral clocks (USBHOST, USIM). */ -/* Forward declarations for DPLL bypass clocks */ -static struct clk dpll1_fck; -static struct clk dpll2_fck; - /* CM_CLKEN_PLL*.EN* bit values - not all are available for every DPLL */ #define DPLL_LOW_POWER_STOP 0x1 #define DPLL_LOW_POWER_BYPASS 0x5 @@ -62,59 +57,67 @@ static struct clk dpll2_fck; /* According to timer32k.c, this is a 32768Hz clock, not a 32000Hz clock. */ static struct clk omap_32k_fck = { .name = "omap_32k_fck", - .ops = &clkops_null, .rate = 32768, - .flags = RATE_FIXED, + .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES | + ALWAYS_ENABLED, + .recalc = &propagate_rate, }; static struct clk secure_32k_fck = { .name = "secure_32k_fck", - .ops = &clkops_null, .rate = 32768, - .flags = RATE_FIXED, + .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES | + ALWAYS_ENABLED, + .recalc = &propagate_rate, }; /* Virtual source clocks for osc_sys_ck */ static struct clk virt_12m_ck = { .name = "virt_12m_ck", - .ops = &clkops_null, .rate = 12000000, - .flags = RATE_FIXED, + .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES | + ALWAYS_ENABLED, + .recalc = &propagate_rate, }; static struct clk virt_13m_ck = { .name = "virt_13m_ck", - .ops = &clkops_null, .rate = 13000000, - .flags = RATE_FIXED, + .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES | + ALWAYS_ENABLED, + .recalc = &propagate_rate, }; static struct clk virt_16_8m_ck = { .name = "virt_16_8m_ck", - .ops = &clkops_null, .rate = 16800000, - .flags = RATE_FIXED, + .flags = CLOCK_IN_OMAP3430ES2 | RATE_FIXED | RATE_PROPAGATES | + ALWAYS_ENABLED, + .recalc = &propagate_rate, }; static struct clk virt_19_2m_ck = { .name = "virt_19_2m_ck", - .ops = &clkops_null, .rate = 19200000, - .flags = RATE_FIXED, + .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES | + ALWAYS_ENABLED, + .recalc = &propagate_rate, }; static struct clk virt_26m_ck = { .name = "virt_26m_ck", - .ops = &clkops_null, .rate = 26000000, - .flags = RATE_FIXED, + .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES | + ALWAYS_ENABLED, + .recalc = &propagate_rate, }; static struct clk virt_38_4m_ck = { .name = "virt_38_4m_ck", - .ops = &clkops_null, .rate = 38400000, - .flags = RATE_FIXED, + .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES | + ALWAYS_ENABLED, + .recalc = &propagate_rate, }; static const struct clksel_rate osc_sys_12m_rates[] = { @@ -161,13 +164,13 @@ static const struct clksel osc_sys_clksel[] = { /* 12, 13, 16.8, 19.2, 26, or 38.4 MHz */ static struct clk osc_sys_ck = { .name = "osc_sys_ck", - .ops = &clkops_null, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP3430_PRM_CLKSEL, .clksel_mask = OMAP3430_SYS_CLKIN_SEL_MASK, .clksel = osc_sys_clksel, /* REVISIT: deal with autoextclkmode? */ - .flags = RATE_FIXED, + .flags = CLOCK_IN_OMAP343X | RATE_FIXED | RATE_PROPAGATES | + ALWAYS_ENABLED, .recalc = &omap2_clksel_recalc, }; @@ -186,34 +189,36 @@ static const struct clksel sys_clksel[] = { /* Feeds DPLLs - divided first by PRM_CLKSRC_CTRL.SYSCLKDIV? */ static struct clk sys_ck = { .name = "sys_ck", - .ops = &clkops_null, .parent = &osc_sys_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP3430_PRM_CLKSRC_CTRL, .clksel_mask = OMAP_SYSCLKDIV_MASK, .clksel = sys_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .recalc = &omap2_clksel_recalc, }; static struct clk sys_altclk = { .name = "sys_altclk", - .ops = &clkops_null, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .recalc = &propagate_rate, }; /* Optional external clock input for some McBSPs */ static struct clk mcbsp_clks = { .name = "mcbsp_clks", - .ops = &clkops_null, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, + .recalc = &propagate_rate, }; /* PRM EXTERNAL CLOCK OUTPUT */ static struct clk sys_clkout1 = { .name = "sys_clkout1", - .ops = &clkops_omap2_dflt, .parent = &osc_sys_ck, .enable_reg = OMAP3430_PRM_CLKOUT_CTRL, .enable_bit = OMAP3430_CLKOUT_EN_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -221,6 +226,16 @@ static struct clk sys_clkout1 = { /* CM CLOCKS */ +static const struct clksel_rate dpll_bypass_rates[] = { + { .div = 1, .val = 0, .flags = RATE_IN_343X | DEFAULT_RATE }, + { .div = 0 } +}; + +static const struct clksel_rate dpll_locked_rates[] = { + { .div = 1, .val = 1, .flags = RATE_IN_343X | DEFAULT_RATE }, + { .div = 0 } +}; + static const struct clksel_rate div16_dpll_rates[] = { { .div = 1, .val = 1, .flags = RATE_IN_343X | DEFAULT_RATE }, { .div = 2, .val = 2, .flags = RATE_IN_343X }, @@ -248,9 +263,6 @@ static struct dpll_data dpll1_dd = { .mult_div1_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL), .mult_mask = OMAP3430_MPU_DPLL_MULT_MASK, .div1_mask = OMAP3430_MPU_DPLL_DIV_MASK, - .clk_bypass = &dpll1_fck, - .clk_ref = &sys_ck, - .freqsel_mask = OMAP3430_MPU_DPLL_FREQSEL_MASK, .control_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKEN_PLL), .enable_mask = OMAP3430_EN_MPU_DPLL_MASK, .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), @@ -260,21 +272,18 @@ static struct dpll_data dpll1_dd = { .autoidle_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL), .autoidle_mask = OMAP3430_AUTO_MPU_DPLL_MASK, .idlest_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL), - .idlest_mask = OMAP3430_ST_MPU_CLK_MASK, + .idlest_bit = OMAP3430_ST_MPU_CLK_SHIFT, .max_multiplier = OMAP3_MAX_DPLL_MULT, - .min_divider = 1, .max_divider = OMAP3_MAX_DPLL_DIV, .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE }; static struct clk dpll1_ck = { .name = "dpll1_ck", - .ops = &clkops_null, .parent = &sys_ck, .dpll_data = &dpll1_dd, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .round_rate = &omap2_dpll_round_rate, - .set_rate = &omap3_noncore_dpll_set_rate, - .clkdm_name = "dpll1_clkdm", .recalc = &omap3_dpll_recalc, }; @@ -284,9 +293,9 @@ static struct clk dpll1_ck = { */ static struct clk dpll1_x2_ck = { .name = "dpll1_x2_ck", - .ops = &clkops_null, .parent = &dpll1_ck, - .clkdm_name = "dpll1_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap3_clkoutx2_recalc, }; @@ -302,13 +311,13 @@ static const struct clksel div16_dpll1_x2m2_clksel[] = { */ static struct clk dpll1_x2m2_ck = { .name = "dpll1_x2m2_ck", - .ops = &clkops_null, .parent = &dpll1_x2_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL), .clksel_mask = OMAP3430_MPU_DPLL_CLKOUT_DIV_MASK, .clksel = div16_dpll1_x2m2_clksel, - .clkdm_name = "dpll1_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; @@ -320,9 +329,6 @@ static struct dpll_data dpll2_dd = { .mult_div1_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL), .mult_mask = OMAP3430_IVA2_DPLL_MULT_MASK, .div1_mask = OMAP3430_IVA2_DPLL_DIV_MASK, - .clk_bypass = &dpll2_fck, - .clk_ref = &sys_ck, - .freqsel_mask = OMAP3430_IVA2_DPLL_FREQSEL_MASK, .control_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKEN_PLL), .enable_mask = OMAP3430_EN_IVA2_DPLL_MASK, .modes = (1 << DPLL_LOW_POWER_STOP) | (1 << DPLL_LOCKED) | @@ -333,21 +339,20 @@ static struct dpll_data dpll2_dd = { .autoidle_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_AUTOIDLE_PLL), .autoidle_mask = OMAP3430_AUTO_IVA2_DPLL_MASK, .idlest_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_IDLEST_PLL), - .idlest_mask = OMAP3430_ST_IVA2_CLK_MASK, + .idlest_bit = OMAP3430_ST_IVA2_CLK_SHIFT, .max_multiplier = OMAP3_MAX_DPLL_MULT, - .min_divider = 1, .max_divider = OMAP3_MAX_DPLL_DIV, .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE }; static struct clk dpll2_ck = { .name = "dpll2_ck", - .ops = &clkops_noncore_dpll_ops, .parent = &sys_ck, .dpll_data = &dpll2_dd, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, + .enable = &omap3_noncore_dpll_enable, + .disable = &omap3_noncore_dpll_disable, .round_rate = &omap2_dpll_round_rate, - .set_rate = &omap3_noncore_dpll_set_rate, - .clkdm_name = "dpll2_clkdm", .recalc = &omap3_dpll_recalc, }; @@ -362,14 +367,14 @@ static const struct clksel div16_dpll2_m2x2_clksel[] = { */ static struct clk dpll2_m2_ck = { .name = "dpll2_m2_ck", - .ops = &clkops_null, .parent = &dpll2_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL2_PLL), .clksel_mask = OMAP3430_IVA2_DPLL_CLKOUT_DIV_MASK, .clksel = div16_dpll2_m2x2_clksel, - .clkdm_name = "dpll2_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; @@ -382,9 +387,6 @@ static struct dpll_data dpll3_dd = { .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), .mult_mask = OMAP3430_CORE_DPLL_MULT_MASK, .div1_mask = OMAP3430_CORE_DPLL_DIV_MASK, - .clk_bypass = &sys_ck, - .clk_ref = &sys_ck, - .freqsel_mask = OMAP3430_CORE_DPLL_FREQSEL_MASK, .control_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_mask = OMAP3430_EN_CORE_DPLL_MASK, .auto_recal_bit = OMAP3430_EN_CORE_DPLL_DRIFTGUARD_SHIFT, @@ -392,21 +394,17 @@ static struct dpll_data dpll3_dd = { .recal_st_bit = OMAP3430_CORE_DPLL_ST_SHIFT, .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE), .autoidle_mask = OMAP3430_AUTO_CORE_DPLL_MASK, - .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), - .idlest_mask = OMAP3430_ST_CORE_CLK_MASK, .max_multiplier = OMAP3_MAX_DPLL_MULT, - .min_divider = 1, .max_divider = OMAP3_MAX_DPLL_DIV, .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE }; static struct clk dpll3_ck = { .name = "dpll3_ck", - .ops = &clkops_null, .parent = &sys_ck, .dpll_data = &dpll3_dd, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .round_rate = &omap2_dpll_round_rate, - .clkdm_name = "dpll3_clkdm", .recalc = &omap3_dpll_recalc, }; @@ -416,9 +414,9 @@ static struct clk dpll3_ck = { */ static struct clk dpll3_x2_ck = { .name = "dpll3_x2_ck", - .ops = &clkops_null, .parent = &dpll3_ck, - .clkdm_name = "dpll3_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap3_clkoutx2_recalc, }; @@ -462,34 +460,55 @@ static const struct clksel div31_dpll3m2_clksel[] = { { .parent = NULL } }; -/* DPLL3 output M2 - primary control point for CORE speed */ +/* + * DPLL3 output M2 + * REVISIT: This DPLL output divider must be changed in SRAM, so until + * that code is ready, this should remain a 'read-only' clksel clock. + */ static struct clk dpll3_m2_ck = { .name = "dpll3_m2_ck", - .ops = &clkops_null, .parent = &dpll3_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), .clksel_mask = OMAP3430_CORE_DPLL_CLKOUT_DIV_MASK, .clksel = div31_dpll3m2_clksel, - .clkdm_name = "dpll3_clkdm", - .round_rate = &omap2_clksel_round_rate, - .set_rate = &omap3_core_dpll_m2_set_rate, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; +static const struct clksel core_ck_clksel[] = { + { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &dpll3_m2_ck, .rates = dpll_locked_rates }, + { .parent = NULL } +}; + static struct clk core_ck = { .name = "core_ck", - .ops = &clkops_null, - .parent = &dpll3_m2_ck, - .recalc = &followparent_recalc, + .init = &omap2_init_clksel_parent, + .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), + .clksel_mask = OMAP3430_ST_CORE_CLK_MASK, + .clksel = core_ck_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, + .recalc = &omap2_clksel_recalc, +}; + +static const struct clksel dpll3_m2x2_ck_clksel[] = { + { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &dpll3_x2_ck, .rates = dpll_locked_rates }, + { .parent = NULL } }; static struct clk dpll3_m2x2_ck = { .name = "dpll3_m2x2_ck", - .ops = &clkops_null, - .parent = &dpll3_x2_ck, - .clkdm_name = "dpll3_clkdm", - .recalc = &followparent_recalc, + .init = &omap2_init_clksel_parent, + .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), + .clksel_mask = OMAP3430_ST_CORE_CLK_MASK, + .clksel = dpll3_m2x2_ck_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, + .recalc = &omap2_clksel_recalc, }; /* The PWRDN bit is apparently only available on 3430ES2 and above */ @@ -501,34 +520,42 @@ static const struct clksel div16_dpll3_clksel[] = { /* This virtual clock is the source for dpll3_m3x2_ck */ static struct clk dpll3_m3_ck = { .name = "dpll3_m3_ck", - .ops = &clkops_null, .parent = &dpll3_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), .clksel_mask = OMAP3430_DIV_DPLL3_MASK, .clksel = div16_dpll3_clksel, - .clkdm_name = "dpll3_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; /* The PWRDN bit is apparently only available on 3430ES2 and above */ static struct clk dpll3_m3x2_ck = { .name = "dpll3_m3x2_ck", - .ops = &clkops_omap2_dflt_wait, .parent = &dpll3_m3_ck, .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP3430_PWRDN_EMU_CORE_SHIFT, - .flags = INVERT_ENABLE, - .clkdm_name = "dpll3_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | INVERT_ENABLE, .recalc = &omap3_clkoutx2_recalc, }; +static const struct clksel emu_core_alwon_ck_clksel[] = { + { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &dpll3_m3x2_ck, .rates = dpll_locked_rates }, + { .parent = NULL } +}; + static struct clk emu_core_alwon_ck = { .name = "emu_core_alwon_ck", - .ops = &clkops_null, .parent = &dpll3_m3x2_ck, - .clkdm_name = "dpll3_clkdm", - .recalc = &followparent_recalc, + .init = &omap2_init_clksel_parent, + .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), + .clksel_mask = OMAP3430_ST_CORE_CLK_MASK, + .clksel = emu_core_alwon_ck_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, + .recalc = &omap2_clksel_recalc, }; /* DPLL4 */ @@ -538,9 +565,6 @@ static struct dpll_data dpll4_dd = { .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL2), .mult_mask = OMAP3430_PERIPH_DPLL_MULT_MASK, .div1_mask = OMAP3430_PERIPH_DPLL_DIV_MASK, - .clk_bypass = &sys_ck, - .clk_ref = &sys_ck, - .freqsel_mask = OMAP3430_PERIPH_DPLL_FREQSEL_MASK, .control_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_mask = OMAP3430_EN_PERIPH_DPLL_MASK, .modes = (1 << DPLL_LOW_POWER_STOP) | (1 << DPLL_LOCKED), @@ -550,21 +574,20 @@ static struct dpll_data dpll4_dd = { .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE), .autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK, .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), - .idlest_mask = OMAP3430_ST_PERIPH_CLK_MASK, + .idlest_bit = OMAP3430_ST_PERIPH_CLK_SHIFT, .max_multiplier = OMAP3_MAX_DPLL_MULT, - .min_divider = 1, .max_divider = OMAP3_MAX_DPLL_DIV, .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE }; static struct clk dpll4_ck = { .name = "dpll4_ck", - .ops = &clkops_noncore_dpll_ops, .parent = &sys_ck, .dpll_data = &dpll4_dd, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, + .enable = &omap3_noncore_dpll_enable, + .disable = &omap3_noncore_dpll_disable, .round_rate = &omap2_dpll_round_rate, - .set_rate = &omap3_dpll4_set_rate, - .clkdm_name = "dpll4_clkdm", .recalc = &omap3_dpll_recalc, }; @@ -575,9 +598,9 @@ static struct clk dpll4_ck = { */ static struct clk dpll4_x2_ck = { .name = "dpll4_x2_ck", - .ops = &clkops_null, .parent = &dpll4_ck, - .clkdm_name = "dpll4_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap3_clkoutx2_recalc, }; @@ -589,101 +612,112 @@ static const struct clksel div16_dpll4_clksel[] = { /* This virtual clock is the source for dpll4_m2x2_ck */ static struct clk dpll4_m2_ck = { .name = "dpll4_m2_ck", - .ops = &clkops_null, .parent = &dpll4_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430_CM_CLKSEL3), .clksel_mask = OMAP3430_DIV_96M_MASK, .clksel = div16_dpll4_clksel, - .clkdm_name = "dpll4_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; /* The PWRDN bit is apparently only available on 3430ES2 and above */ static struct clk dpll4_m2x2_ck = { .name = "dpll4_m2x2_ck", - .ops = &clkops_omap2_dflt_wait, .parent = &dpll4_m2_ck, .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP3430_PWRDN_96M_SHIFT, - .flags = INVERT_ENABLE, - .clkdm_name = "dpll4_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | INVERT_ENABLE, .recalc = &omap3_clkoutx2_recalc, }; -/* - * DPLL4 generates DPLL4_M2X2_CLK which is then routed into the PRM as - * PRM_96M_ALWON_(F)CLK. Two clocks then emerge from the PRM: - * 96M_ALWON_FCLK (called "omap_96m_alwon_fck" below) and - * CM_96K_(F)CLK. - */ +static const struct clksel omap_96m_alwon_fck_clksel[] = { + { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &dpll4_m2x2_ck, .rates = dpll_locked_rates }, + { .parent = NULL } +}; + static struct clk omap_96m_alwon_fck = { .name = "omap_96m_alwon_fck", - .ops = &clkops_null, .parent = &dpll4_m2x2_ck, - .recalc = &followparent_recalc, + .init = &omap2_init_clksel_parent, + .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), + .clksel_mask = OMAP3430_ST_PERIPH_CLK_MASK, + .clksel = omap_96m_alwon_fck_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, + .recalc = &omap2_clksel_recalc, }; -static struct clk cm_96m_fck = { - .name = "cm_96m_fck", - .ops = &clkops_null, +static struct clk omap_96m_fck = { + .name = "omap_96m_fck", .parent = &omap_96m_alwon_fck, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &followparent_recalc, }; -static const struct clksel_rate omap_96m_dpll_rates[] = { - { .div = 1, .val = 0, .flags = RATE_IN_343X | DEFAULT_RATE }, - { .div = 0 } -}; - -static const struct clksel_rate omap_96m_sys_rates[] = { - { .div = 1, .val = 1, .flags = RATE_IN_343X | DEFAULT_RATE }, - { .div = 0 } -}; - -static const struct clksel omap_96m_fck_clksel[] = { - { .parent = &cm_96m_fck, .rates = omap_96m_dpll_rates }, - { .parent = &sys_ck, .rates = omap_96m_sys_rates }, +static const struct clksel cm_96m_fck_clksel[] = { + { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &dpll4_m2x2_ck, .rates = dpll_locked_rates }, { .parent = NULL } }; -static struct clk omap_96m_fck = { - .name = "omap_96m_fck", - .ops = &clkops_null, - .parent = &sys_ck, +static struct clk cm_96m_fck = { + .name = "cm_96m_fck", + .parent = &dpll4_m2x2_ck, .init = &omap2_init_clksel_parent, - .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), - .clksel_mask = OMAP3430_SOURCE_96M_MASK, - .clksel = omap_96m_fck_clksel, + .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), + .clksel_mask = OMAP3430_ST_PERIPH_CLK_MASK, + .clksel = cm_96m_fck_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; /* This virtual clock is the source for dpll4_m3x2_ck */ static struct clk dpll4_m3_ck = { .name = "dpll4_m3_ck", - .ops = &clkops_null, .parent = &dpll4_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_TV_MASK, .clksel = div16_dpll4_clksel, - .clkdm_name = "dpll4_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; /* The PWRDN bit is apparently only available on 3430ES2 and above */ static struct clk dpll4_m3x2_ck = { .name = "dpll4_m3x2_ck", - .ops = &clkops_omap2_dflt_wait, .parent = &dpll4_m3_ck, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP3430_PWRDN_TV_SHIFT, - .flags = INVERT_ENABLE, - .clkdm_name = "dpll4_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | INVERT_ENABLE, .recalc = &omap3_clkoutx2_recalc, }; +static const struct clksel virt_omap_54m_fck_clksel[] = { + { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &dpll4_m3x2_ck, .rates = dpll_locked_rates }, + { .parent = NULL } +}; + +static struct clk virt_omap_54m_fck = { + .name = "virt_omap_54m_fck", + .parent = &dpll4_m3x2_ck, + .init = &omap2_init_clksel_parent, + .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), + .clksel_mask = OMAP3430_ST_PERIPH_CLK_MASK, + .clksel = virt_omap_54m_fck_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, + .recalc = &omap2_clksel_recalc, +}; + static const struct clksel_rate omap_54m_d4m3x2_rates[] = { { .div = 1, .val = 0, .flags = RATE_IN_343X | DEFAULT_RATE }, { .div = 0 } @@ -695,22 +729,23 @@ static const struct clksel_rate omap_54m_alt_rates[] = { }; static const struct clksel omap_54m_clksel[] = { - { .parent = &dpll4_m3x2_ck, .rates = omap_54m_d4m3x2_rates }, + { .parent = &virt_omap_54m_fck, .rates = omap_54m_d4m3x2_rates }, { .parent = &sys_altclk, .rates = omap_54m_alt_rates }, { .parent = NULL } }; static struct clk omap_54m_fck = { .name = "omap_54m_fck", - .ops = &clkops_null, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), - .clksel_mask = OMAP3430_SOURCE_54M_MASK, + .clksel_mask = OMAP3430_SOURCE_54M, .clksel = omap_54m_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; -static const struct clksel_rate omap_48m_cm96m_rates[] = { +static const struct clksel_rate omap_48m_96md2_rates[] = { { .div = 2, .val = 0, .flags = RATE_IN_343X | DEFAULT_RATE }, { .div = 0 } }; @@ -721,112 +756,106 @@ static const struct clksel_rate omap_48m_alt_rates[] = { }; static const struct clksel omap_48m_clksel[] = { - { .parent = &cm_96m_fck, .rates = omap_48m_cm96m_rates }, + { .parent = &cm_96m_fck, .rates = omap_48m_96md2_rates }, { .parent = &sys_altclk, .rates = omap_48m_alt_rates }, { .parent = NULL } }; static struct clk omap_48m_fck = { .name = "omap_48m_fck", - .ops = &clkops_null, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), - .clksel_mask = OMAP3430_SOURCE_48M_MASK, + .clksel_mask = OMAP3430_SOURCE_48M, .clksel = omap_48m_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; static struct clk omap_12m_fck = { .name = "omap_12m_fck", - .ops = &clkops_null, .parent = &omap_48m_fck, .fixed_div = 4, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_fixed_divisor_recalc, }; /* This virstual clock is the source for dpll4_m4x2_ck */ static struct clk dpll4_m4_ck = { .name = "dpll4_m4_ck", - .ops = &clkops_null, .parent = &dpll4_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_DSS1_MASK, .clksel = div16_dpll4_clksel, - .clkdm_name = "dpll4_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, - .set_rate = &omap2_clksel_set_rate, - .round_rate = &omap2_clksel_round_rate, }; /* The PWRDN bit is apparently only available on 3430ES2 and above */ static struct clk dpll4_m4x2_ck = { .name = "dpll4_m4x2_ck", - .ops = &clkops_omap2_dflt_wait, .parent = &dpll4_m4_ck, .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP3430_PWRDN_CAM_SHIFT, - .flags = INVERT_ENABLE, - .clkdm_name = "dpll4_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | INVERT_ENABLE, .recalc = &omap3_clkoutx2_recalc, }; /* This virtual clock is the source for dpll4_m5x2_ck */ static struct clk dpll4_m5_ck = { .name = "dpll4_m5_ck", - .ops = &clkops_null, .parent = &dpll4_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_CAM_MASK, .clksel = div16_dpll4_clksel, - .clkdm_name = "dpll4_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; /* The PWRDN bit is apparently only available on 3430ES2 and above */ static struct clk dpll4_m5x2_ck = { .name = "dpll4_m5x2_ck", - .ops = &clkops_omap2_dflt_wait, .parent = &dpll4_m5_ck, .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP3430_PWRDN_CAM_SHIFT, - .flags = INVERT_ENABLE, - .clkdm_name = "dpll4_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | INVERT_ENABLE, .recalc = &omap3_clkoutx2_recalc, }; /* This virtual clock is the source for dpll4_m6x2_ck */ static struct clk dpll4_m6_ck = { .name = "dpll4_m6_ck", - .ops = &clkops_null, .parent = &dpll4_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), .clksel_mask = OMAP3430_DIV_DPLL4_MASK, .clksel = div16_dpll4_clksel, - .clkdm_name = "dpll4_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; /* The PWRDN bit is apparently only available on 3430ES2 and above */ static struct clk dpll4_m6x2_ck = { .name = "dpll4_m6x2_ck", - .ops = &clkops_omap2_dflt_wait, .parent = &dpll4_m6_ck, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN), .enable_bit = OMAP3430_PWRDN_EMU_PERIPH_SHIFT, - .flags = INVERT_ENABLE, - .clkdm_name = "dpll4_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | INVERT_ENABLE, .recalc = &omap3_clkoutx2_recalc, }; static struct clk emu_per_alwon_ck = { .name = "emu_per_alwon_ck", - .ops = &clkops_null, .parent = &dpll4_m6x2_ck, - .clkdm_name = "dpll4_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &followparent_recalc, }; @@ -838,9 +867,6 @@ static struct dpll_data dpll5_dd = { .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL4), .mult_mask = OMAP3430ES2_PERIPH2_DPLL_MULT_MASK, .div1_mask = OMAP3430ES2_PERIPH2_DPLL_DIV_MASK, - .clk_bypass = &sys_ck, - .clk_ref = &sys_ck, - .freqsel_mask = OMAP3430ES2_PERIPH2_DPLL_FREQSEL_MASK, .control_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKEN2), .enable_mask = OMAP3430ES2_EN_PERIPH2_DPLL_MASK, .modes = (1 << DPLL_LOW_POWER_STOP) | (1 << DPLL_LOCKED), @@ -850,21 +876,20 @@ static struct dpll_data dpll5_dd = { .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_AUTOIDLE2_PLL), .autoidle_mask = OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK, .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2), - .idlest_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK, + .idlest_bit = OMAP3430ES2_ST_PERIPH2_CLK_SHIFT, .max_multiplier = OMAP3_MAX_DPLL_MULT, - .min_divider = 1, .max_divider = OMAP3_MAX_DPLL_DIV, .rate_tolerance = DEFAULT_DPLL_RATE_TOLERANCE }; static struct clk dpll5_ck = { .name = "dpll5_ck", - .ops = &clkops_noncore_dpll_ops, .parent = &sys_ck, .dpll_data = &dpll5_dd, + .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES, + .enable = &omap3_noncore_dpll_enable, + .disable = &omap3_noncore_dpll_disable, .round_rate = &omap2_dpll_round_rate, - .set_rate = &omap3_noncore_dpll_set_rate, - .clkdm_name = "dpll5_clkdm", .recalc = &omap3_dpll_recalc, }; @@ -875,13 +900,31 @@ static const struct clksel div16_dpll5_clksel[] = { static struct clk dpll5_m2_ck = { .name = "dpll5_m2_ck", - .ops = &clkops_null, .parent = &dpll5_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5), .clksel_mask = OMAP3430ES2_DIV_120M_MASK, .clksel = div16_dpll5_clksel, - .clkdm_name = "dpll5_clkdm", + .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, + .recalc = &omap2_clksel_recalc, +}; + +static const struct clksel omap_120m_fck_clksel[] = { + { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &dpll5_m2_ck, .rates = dpll_locked_rates }, + { .parent = NULL } +}; + +static struct clk omap_120m_fck = { + .name = "omap_120m_fck", + .parent = &dpll5_m2_ck, + .init = &omap2_init_clksel_parent, + .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2), + .clksel_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK, + .clksel = omap_120m_fck_clksel, + .flags = CLOCK_IN_OMAP3430ES2 | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; @@ -908,23 +951,22 @@ static const struct clksel_rate clkout2_src_54m_rates[] = { }; static const struct clksel clkout2_src_clksel[] = { - { .parent = &core_ck, .rates = clkout2_src_core_rates }, - { .parent = &sys_ck, .rates = clkout2_src_sys_rates }, - { .parent = &cm_96m_fck, .rates = clkout2_src_96m_rates }, - { .parent = &omap_54m_fck, .rates = clkout2_src_54m_rates }, + { .parent = &core_ck, .rates = clkout2_src_core_rates }, + { .parent = &sys_ck, .rates = clkout2_src_sys_rates }, + { .parent = &omap_96m_alwon_fck, .rates = clkout2_src_96m_rates }, + { .parent = &omap_54m_fck, .rates = clkout2_src_54m_rates }, { .parent = NULL } }; static struct clk clkout2_src_ck = { .name = "clkout2_src_ck", - .ops = &clkops_omap2_dflt, .init = &omap2_init_clksel_parent, .enable_reg = OMAP3430_CM_CLKOUT_CTRL, .enable_bit = OMAP3430_CLKOUT2_EN_SHIFT, .clksel_reg = OMAP3430_CM_CLKOUT_CTRL, .clksel_mask = OMAP3430_CLKOUT2SOURCE_MASK, .clksel = clkout2_src_clksel, - .clkdm_name = "core_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, .recalc = &omap2_clksel_recalc, }; @@ -944,11 +986,11 @@ static const struct clksel sys_clkout2_clksel[] = { static struct clk sys_clkout2 = { .name = "sys_clkout2", - .ops = &clkops_null, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP3430_CM_CLKOUT_CTRL, .clksel_mask = OMAP3430_CLKOUT2_DIV_MASK, .clksel = sys_clkout2_clksel, + .flags = CLOCK_IN_OMAP343X | PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; @@ -956,22 +998,16 @@ static struct clk sys_clkout2 = { static struct clk corex2_fck = { .name = "corex2_fck", - .ops = &clkops_null, .parent = &dpll3_m2x2_ck, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &followparent_recalc, }; /* DPLL power domain clock controls */ -static const struct clksel_rate div4_rates[] = { - { .div = 1, .val = 1, .flags = RATE_IN_343X | DEFAULT_RATE }, - { .div = 2, .val = 2, .flags = RATE_IN_343X }, - { .div = 4, .val = 4, .flags = RATE_IN_343X }, - { .div = 0 } -}; - -static const struct clksel div4_core_clksel[] = { - { .parent = &core_ck, .rates = div4_rates }, +static const struct clksel div2_core_clksel[] = { + { .parent = &core_ck, .rates = div2_rates }, { .parent = NULL } }; @@ -981,21 +1017,39 @@ static const struct clksel div4_core_clksel[] = { */ static struct clk dpll1_fck = { .name = "dpll1_fck", - .ops = &clkops_null, .parent = &core_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL), .clksel_mask = OMAP3430_MPU_CLK_SRC_MASK, - .clksel = div4_core_clksel, + .clksel = div2_core_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; +/* + * MPU clksel: + * If DPLL1 is locked, mpu_ck derives from DPLL1; otherwise, mpu_ck + * derives from the high-frequency bypass clock originating from DPLL3, + * called 'dpll1_fck' + */ +static const struct clksel mpu_clksel[] = { + { .parent = &dpll1_fck, .rates = dpll_bypass_rates }, + { .parent = &dpll1_x2m2_ck, .rates = dpll_locked_rates }, + { .parent = NULL } +}; + static struct clk mpu_ck = { .name = "mpu_ck", - .ops = &clkops_null, .parent = &dpll1_x2m2_ck, + .init = &omap2_init_clksel_parent, + .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL), + .clksel_mask = OMAP3430_ST_MPU_CLK_MASK, + .clksel = mpu_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "mpu_clkdm", - .recalc = &followparent_recalc, + .recalc = &omap2_clksel_recalc, }; /* arm_fck is divided by two when DPLL1 locked; otherwise, passthrough mpu_ck */ @@ -1012,12 +1066,13 @@ static const struct clksel arm_fck_clksel[] = { static struct clk arm_fck = { .name = "arm_fck", - .ops = &clkops_null, .parent = &mpu_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL), .clksel_mask = OMAP3430_ST_MPU_CLK_MASK, .clksel = arm_fck_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; @@ -1029,48 +1084,63 @@ static struct clk arm_fck = { */ static struct clk emu_mpu_alwon_ck = { .name = "emu_mpu_alwon_ck", - .ops = &clkops_null, .parent = &mpu_ck, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &followparent_recalc, }; static struct clk dpll2_fck = { .name = "dpll2_fck", - .ops = &clkops_null, .parent = &core_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL), .clksel_mask = OMAP3430_IVA2_CLK_SRC_MASK, - .clksel = div4_core_clksel, + .clksel = div2_core_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; +/* + * IVA2 clksel: + * If DPLL2 is locked, iva2_ck derives from DPLL2; otherwise, iva2_ck + * derives from the high-frequency bypass clock originating from DPLL3, + * called 'dpll2_fck' + */ + +static const struct clksel iva2_clksel[] = { + { .parent = &dpll2_fck, .rates = dpll_bypass_rates }, + { .parent = &dpll2_m2_ck, .rates = dpll_locked_rates }, + { .parent = NULL } +}; + static struct clk iva2_ck = { .name = "iva2_ck", - .ops = &clkops_omap2_dflt_wait, .parent = &dpll2_m2_ck, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN), .enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT, + .clksel_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, + OMAP3430_CM_IDLEST_PLL), + .clksel_mask = OMAP3430_ST_IVA2_CLK_MASK, + .clksel = iva2_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, .clkdm_name = "iva2_clkdm", - .recalc = &followparent_recalc, + .recalc = &omap2_clksel_recalc, }; /* Common interface clocks */ -static const struct clksel div2_core_clksel[] = { - { .parent = &core_ck, .rates = div2_rates }, - { .parent = NULL } -}; - static struct clk l3_ick = { .name = "l3_ick", - .ops = &clkops_null, .parent = &core_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_L3_MASK, .clksel = div2_core_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "core_l3_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1082,12 +1152,13 @@ static const struct clksel div2_l3_clksel[] = { static struct clk l4_ick = { .name = "l4_ick", - .ops = &clkops_null, .parent = &l3_ick, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_L4_MASK, .clksel = div2_l3_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, @@ -1100,12 +1171,12 @@ static const struct clksel div2_l4_clksel[] = { static struct clk rm_ick = { .name = "rm_ick", - .ops = &clkops_null, .parent = &l4_ick, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_RM_MASK, .clksel = div2_l4_clksel, + .flags = CLOCK_IN_OMAP343X | PARENT_CONTROLS_CLOCK, .recalc = &omap2_clksel_recalc, }; @@ -1121,52 +1192,53 @@ static const struct clksel gfx_l3_clksel[] = { /* Virtual parent clock for gfx_l3_ick and gfx_l3_fck */ static struct clk gfx_l3_ck = { .name = "gfx_l3_ck", - .ops = &clkops_omap2_dflt_wait, .parent = &l3_ick, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN), .enable_bit = OMAP_EN_GFX_SHIFT, + .flags = CLOCK_IN_OMAP3430ES1, .recalc = &followparent_recalc, }; static struct clk gfx_l3_fck = { .name = "gfx_l3_fck", - .ops = &clkops_null, .parent = &gfx_l3_ck, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL), .clksel_mask = OMAP_CLKSEL_GFX_MASK, .clksel = gfx_l3_clksel, + .flags = CLOCK_IN_OMAP3430ES1 | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "gfx_3430es1_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk gfx_l3_ick = { .name = "gfx_l3_ick", - .ops = &clkops_null, .parent = &gfx_l3_ck, + .flags = CLOCK_IN_OMAP3430ES1 | PARENT_CONTROLS_CLOCK, .clkdm_name = "gfx_3430es1_clkdm", .recalc = &followparent_recalc, }; static struct clk gfx_cg1_ck = { .name = "gfx_cg1_ck", - .ops = &clkops_omap2_dflt_wait, .parent = &gfx_l3_fck, /* REVISIT: correct? */ .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES1_EN_2D_SHIFT, + .flags = CLOCK_IN_OMAP3430ES1, .clkdm_name = "gfx_3430es1_clkdm", .recalc = &followparent_recalc, }; static struct clk gfx_cg2_ck = { .name = "gfx_cg2_ck", - .ops = &clkops_omap2_dflt_wait, .parent = &gfx_l3_fck, /* REVISIT: correct? */ .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES1_EN_3D_SHIFT, + .flags = CLOCK_IN_OMAP3430ES1, .clkdm_name = "gfx_3430es1_clkdm", .recalc = &followparent_recalc, }; @@ -1193,24 +1265,24 @@ static const struct clksel sgx_clksel[] = { static struct clk sgx_fck = { .name = "sgx_fck", - .ops = &clkops_omap2_dflt_wait, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_FCLKEN), - .enable_bit = OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT, + .enable_bit = OMAP3430ES2_EN_SGX_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_CLKSEL), .clksel_mask = OMAP3430ES2_CLKSEL_SGX_MASK, .clksel = sgx_clksel, + .flags = CLOCK_IN_OMAP3430ES2, .clkdm_name = "sgx_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk sgx_ick = { .name = "sgx_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l3_ick, .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN), - .enable_bit = OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT, + .enable_bit = OMAP3430ES2_EN_SGX_SHIFT, + .flags = CLOCK_IN_OMAP3430ES2, .clkdm_name = "sgx_clkdm", .recalc = &followparent_recalc, }; @@ -1219,11 +1291,11 @@ static struct clk sgx_ick = { static struct clk d2d_26m_fck = { .name = "d2d_26m_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &sys_ck, .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430ES1_EN_D2D_SHIFT, + .flags = CLOCK_IN_OMAP3430ES1, .clkdm_name = "d2d_clkdm", .recalc = &followparent_recalc, }; @@ -1236,7 +1308,6 @@ static const struct clksel omap343x_gpt_clksel[] = { static struct clk gpt10_fck = { .name = "gpt10_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &sys_ck, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), @@ -1244,13 +1315,13 @@ static struct clk gpt10_fck = { .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_GPT10_MASK, .clksel = omap343x_gpt_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk gpt11_fck = { .name = "gpt11_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &sys_ck, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), @@ -1258,34 +1329,35 @@ static struct clk gpt11_fck = { .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_GPT11_MASK, .clksel = omap343x_gpt_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk cpefuse_fck = { .name = "cpefuse_fck", - .ops = &clkops_omap2_dflt, .parent = &sys_ck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), .enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT, + .flags = CLOCK_IN_OMAP3430ES2, .recalc = &followparent_recalc, }; static struct clk ts_fck = { .name = "ts_fck", - .ops = &clkops_omap2_dflt, .parent = &omap_32k_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), .enable_bit = OMAP3430ES2_EN_TS_SHIFT, + .flags = CLOCK_IN_OMAP3430ES2, .recalc = &followparent_recalc, }; static struct clk usbtll_fck = { .name = "usbtll_fck", - .ops = &clkops_omap2_dflt, - .parent = &dpll5_m2_ck, + .parent = &omap_120m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3), .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, + .flags = CLOCK_IN_OMAP3430ES2, .recalc = &followparent_recalc, }; @@ -1293,83 +1365,84 @@ static struct clk usbtll_fck = { static struct clk core_96m_fck = { .name = "core_96m_fck", - .ops = &clkops_null, .parent = &omap_96m_fck, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mmchs3_fck = { .name = "mmchs_fck", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT, + .flags = CLOCK_IN_OMAP3430ES2, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mmchs2_fck = { .name = "mmchs_fck", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MMC2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mspro_fck = { .name = "mspro_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MSPRO_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mmchs1_fck = { .name = "mmchs_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MMC1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk i2c3_fck = { .name = "i2c_fck", - .ops = &clkops_omap2_dflt_wait, .id = 3, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_I2C3_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk i2c2_fck = { .name = "i2c_fck", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_I2C2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk i2c1_fck = { .name = "i2c_fck", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &core_96m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_I2C1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1396,7 +1469,6 @@ static const struct clksel mcbsp_15_clksel[] = { static struct clk mcbsp5_fck = { .name = "mcbsp_fck", - .ops = &clkops_omap2_dflt_wait, .id = 5, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), @@ -1404,13 +1476,13 @@ static struct clk mcbsp5_fck = { .clksel_reg = OMAP343X_CTRL_REGADDR(OMAP343X_CONTROL_DEVCONF1), .clksel_mask = OMAP2_MCBSP5_CLKS_MASK, .clksel = mcbsp_15_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk mcbsp1_fck = { .name = "mcbsp_fck", - .ops = &clkops_omap2_dflt_wait, .id = 1, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), @@ -1418,6 +1490,7 @@ static struct clk mcbsp1_fck = { .clksel_reg = OMAP343X_CTRL_REGADDR(OMAP2_CONTROL_DEVCONF0), .clksel_mask = OMAP2_MCBSP1_CLKS_MASK, .clksel = mcbsp_15_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -1426,76 +1499,77 @@ static struct clk mcbsp1_fck = { static struct clk core_48m_fck = { .name = "core_48m_fck", - .ops = &clkops_null, .parent = &omap_48m_fck, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mcspi4_fck = { .name = "mcspi_fck", - .ops = &clkops_omap2_dflt_wait, .id = 4, .parent = &core_48m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MCSPI4_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; static struct clk mcspi3_fck = { .name = "mcspi_fck", - .ops = &clkops_omap2_dflt_wait, .id = 3, .parent = &core_48m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MCSPI3_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; static struct clk mcspi2_fck = { .name = "mcspi_fck", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &core_48m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MCSPI2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; static struct clk mcspi1_fck = { .name = "mcspi_fck", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &core_48m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_MCSPI1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; static struct clk uart2_fck = { .name = "uart2_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &core_48m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_UART2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; static struct clk uart1_fck = { .name = "uart1_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &core_48m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_UART1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; static struct clk fshostusb_fck = { .name = "fshostusb_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &core_48m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430ES1_EN_FSHOSTUSB_SHIFT, + .flags = CLOCK_IN_OMAP3430ES1, .recalc = &followparent_recalc, }; @@ -1503,18 +1577,19 @@ static struct clk fshostusb_fck = { static struct clk core_12m_fck = { .name = "core_12m_fck", - .ops = &clkops_null, .parent = &omap_12m_fck, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk hdq_fck = { .name = "hdq_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &core_12m_fck, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_HDQ_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -1537,22 +1612,22 @@ static const struct clksel ssi_ssr_clksel[] = { static struct clk ssi_ssr_fck = { .name = "ssi_ssr_fck", - .ops = &clkops_omap2_dflt, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1), .enable_bit = OMAP3430_EN_SSI_SHIFT, .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_SSI_MASK, .clksel = ssi_ssr_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, .clkdm_name = "core_l4_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk ssi_sst_fck = { .name = "ssi_sst_fck", - .ops = &clkops_null, .parent = &ssi_ssr_fck, .fixed_div = 2, + .flags = CLOCK_IN_OMAP343X | PARENT_CONTROLS_CLOCK, .recalc = &omap2_fixed_divisor_recalc, }; @@ -1566,39 +1641,39 @@ static struct clk ssi_sst_fck = { */ static struct clk core_l3_ick = { .name = "core_l3_ick", - .ops = &clkops_null, .parent = &l3_ick, .init = &omap2_init_clk_clkdm, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; static struct clk hsotgusb_ick = { .name = "hsotgusb_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l3_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_HSOTGUSB_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; static struct clk sdrc_ick = { .name = "sdrc_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l3_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_SDRC_SHIFT, - .flags = ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP343X | ENABLE_ON_INIT, .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; static struct clk gpmc_fck = { .name = "gpmc_fck", - .ops = &clkops_null, .parent = &core_l3_ick, - .flags = ENABLE_ON_INIT, /* huh? */ + .flags = CLOCK_IN_OMAP343X | PARENT_CONTROLS_CLOCK | + ENABLE_ON_INIT, .clkdm_name = "core_l3_clkdm", .recalc = &followparent_recalc, }; @@ -1607,17 +1682,18 @@ static struct clk gpmc_fck = { static struct clk security_l3_ick = { .name = "security_l3_ick", - .ops = &clkops_null, .parent = &l3_ick, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &followparent_recalc, }; static struct clk pka_ick = { .name = "pka_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &security_l3_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP3430_EN_PKA_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; @@ -1625,30 +1701,31 @@ static struct clk pka_ick = { static struct clk core_l4_ick = { .name = "core_l4_ick", - .ops = &clkops_null, .parent = &l4_ick, .init = &omap2_init_clk_clkdm, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk usbtll_ick = { .name = "usbtll_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3), .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT, + .flags = CLOCK_IN_OMAP3430ES2, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mmchs3_ick = { .name = "mmchs_ick", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT, + .flags = CLOCK_IN_OMAP3430ES2, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1656,251 +1733,250 @@ static struct clk mmchs3_ick = { /* Intersystem Communication Registers - chassis mode only */ static struct clk icr_ick = { .name = "icr_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_ICR_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk aes2_ick = { .name = "aes2_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_AES2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk sha12_ick = { .name = "sha12_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_SHA12_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk des2_ick = { .name = "des2_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_DES2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mmchs2_ick = { .name = "mmchs_ick", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MMC2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mmchs1_ick = { .name = "mmchs_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MMC1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mspro_ick = { .name = "mspro_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MSPRO_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk hdq_ick = { .name = "hdq_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_HDQ_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mcspi4_ick = { .name = "mcspi_ick", - .ops = &clkops_omap2_dflt_wait, .id = 4, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCSPI4_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mcspi3_ick = { .name = "mcspi_ick", - .ops = &clkops_omap2_dflt_wait, .id = 3, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCSPI3_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mcspi2_ick = { .name = "mcspi_ick", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCSPI2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mcspi1_ick = { .name = "mcspi_ick", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCSPI1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk i2c3_ick = { .name = "i2c_ick", - .ops = &clkops_omap2_dflt_wait, .id = 3, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_I2C3_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk i2c2_ick = { .name = "i2c_ick", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_I2C2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk i2c1_ick = { .name = "i2c_ick", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_I2C1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk uart2_ick = { .name = "uart2_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_UART2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk uart1_ick = { .name = "uart1_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_UART1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk gpt11_ick = { .name = "gpt11_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_GPT11_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk gpt10_ick = { .name = "gpt10_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_GPT10_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mcbsp5_ick = { .name = "mcbsp_ick", - .ops = &clkops_omap2_dflt_wait, .id = 5, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCBSP5_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mcbsp1_ick = { .name = "mcbsp_ick", - .ops = &clkops_omap2_dflt_wait, .id = 1, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MCBSP1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk fac_ick = { .name = "fac_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430ES1_EN_FAC_SHIFT, + .flags = CLOCK_IN_OMAP3430ES1, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk mailboxes_ick = { .name = "mailboxes_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_MAILBOXES_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk omapctrl_ick = { .name = "omapctrl_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &core_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_OMAPCTRL_SHIFT, - .flags = ENABLE_ON_INIT, + .flags = CLOCK_IN_OMAP343X | ENABLE_ON_INIT, .recalc = &followparent_recalc, }; @@ -1908,18 +1984,19 @@ static struct clk omapctrl_ick = { static struct clk ssi_l4_ick = { .name = "ssi_l4_ick", - .ops = &clkops_null, .parent = &l4_ick, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; static struct clk ssi_ick = { .name = "ssi_ick", - .ops = &clkops_omap2_dflt, .parent = &ssi_l4_ick, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), .enable_bit = OMAP3430_EN_SSI_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -1934,7 +2011,6 @@ static const struct clksel usb_l4_clksel[] = { static struct clk usb_l4_ick = { .name = "usb_l4_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ick, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1), @@ -1942,6 +2018,7 @@ static struct clk usb_l4_ick = { .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL), .clksel_mask = OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK, .clksel = usb_l4_clksel, + .flags = CLOCK_IN_OMAP3430ES1, .recalc = &omap2_clksel_recalc, }; @@ -1951,87 +2028,98 @@ static struct clk usb_l4_ick = { static struct clk security_l4_ick2 = { .name = "security_l4_ick2", - .ops = &clkops_null, .parent = &l4_ick, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .recalc = &followparent_recalc, }; static struct clk aes1_ick = { .name = "aes1_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &security_l4_ick2, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP3430_EN_AES1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; static struct clk rng_ick = { .name = "rng_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &security_l4_ick2, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP3430_EN_RNG_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; static struct clk sha11_ick = { .name = "sha11_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &security_l4_ick2, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP3430_EN_SHA11_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; static struct clk des1_ick = { .name = "des1_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &security_l4_ick2, .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2), .enable_bit = OMAP3430_EN_DES1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .recalc = &followparent_recalc, }; /* DSS */ +static const struct clksel dss1_alwon_fck_clksel[] = { + { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &dpll4_m4x2_ck, .rates = dpll_locked_rates }, + { .parent = NULL } +}; + static struct clk dss1_alwon_fck = { .name = "dss1_alwon_fck", - .ops = &clkops_omap2_dflt, .parent = &dpll4_m4x2_ck, + .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_DSS1_SHIFT, + .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), + .clksel_mask = OMAP3430_ST_PERIPH_CLK_MASK, + .clksel = dss1_alwon_fck_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "dss_clkdm", - .recalc = &followparent_recalc, + .recalc = &omap2_clksel_recalc, }; static struct clk dss_tv_fck = { .name = "dss_tv_fck", - .ops = &clkops_omap2_dflt, .parent = &omap_54m_fck, .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_TV_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "dss_clkdm", .recalc = &followparent_recalc, }; static struct clk dss_96m_fck = { .name = "dss_96m_fck", - .ops = &clkops_omap2_dflt, .parent = &omap_96m_fck, .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_TV_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "dss_clkdm", .recalc = &followparent_recalc, }; static struct clk dss2_alwon_fck = { .name = "dss2_alwon_fck", - .ops = &clkops_omap2_dflt, .parent = &sys_ck, .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_DSS2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "dss_clkdm", .recalc = &followparent_recalc, }; @@ -2039,46 +2127,45 @@ static struct clk dss2_alwon_fck = { static struct clk dss_ick = { /* Handles both L3 and L4 clocks */ .name = "dss_ick", - .ops = &clkops_omap2_dflt, .parent = &l4_ick, .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN), .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "dss_clkdm", .recalc = &followparent_recalc, }; /* CAM */ +static const struct clksel cam_mclk_clksel[] = { + { .parent = &sys_ck, .rates = dpll_bypass_rates }, + { .parent = &dpll4_m5x2_ck, .rates = dpll_locked_rates }, + { .parent = NULL } +}; + static struct clk cam_mclk = { .name = "cam_mclk", - .ops = &clkops_omap2_dflt_wait, .parent = &dpll4_m5x2_ck, + .init = &omap2_init_clksel_parent, + .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST), + .clksel_mask = OMAP3430_ST_PERIPH_CLK_MASK, + .clksel = cam_mclk_clksel, .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_CAM_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "cam_clkdm", - .recalc = &followparent_recalc, + .recalc = &omap2_clksel_recalc, }; static struct clk cam_ick = { /* Handles both L3 and L4 clocks */ .name = "cam_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ick, .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_CAM_SHIFT, - .clkdm_name = "cam_clkdm", - .recalc = &followparent_recalc, -}; - -static struct clk csi2_96m_fck = { - .name = "csi2_96m_fck", - .ops = &clkops_omap2_dflt_wait, - .parent = &core_96m_fck, - .init = &omap2_init_clk_clkdm, - .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN), - .enable_bit = OMAP3430_EN_CSI2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "cam_clkdm", .recalc = &followparent_recalc, }; @@ -2087,22 +2174,22 @@ static struct clk csi2_96m_fck = { static struct clk usbhost_120m_fck = { .name = "usbhost_120m_fck", - .ops = &clkops_omap2_dflt_wait, - .parent = &dpll5_m2_ck, + .parent = &omap_120m_fck, .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES2_EN_USBHOST2_SHIFT, + .flags = CLOCK_IN_OMAP3430ES2, .clkdm_name = "usbhost_clkdm", .recalc = &followparent_recalc, }; static struct clk usbhost_48m_fck = { .name = "usbhost_48m_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &omap_48m_fck, .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES2_EN_USBHOST1_SHIFT, + .flags = CLOCK_IN_OMAP3430ES2, .clkdm_name = "usbhost_clkdm", .recalc = &followparent_recalc, }; @@ -2110,11 +2197,22 @@ static struct clk usbhost_48m_fck = { static struct clk usbhost_ick = { /* Handles both L3 and L4 clocks */ .name = "usbhost_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &l4_ick, .init = &omap2_init_clk_clkdm, .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN), .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT, + .flags = CLOCK_IN_OMAP3430ES2, + .clkdm_name = "usbhost_clkdm", + .recalc = &followparent_recalc, +}; + +static struct clk usbhost_sar_fck = { + .name = "usbhost_sar_fck", + .parent = &osc_sys_ck, + .init = &omap2_init_clk_clkdm, + .enable_reg = OMAP_PRM_REGADDR(OMAP3430ES2_USBHOST_MOD, PM_PWSTCTRL), + .enable_bit = OMAP3430ES2_SAVEANDRESTORE_SHIFT, + .flags = CLOCK_IN_OMAP3430ES2, .clkdm_name = "usbhost_clkdm", .recalc = &followparent_recalc, }; @@ -2139,7 +2237,7 @@ static const struct clksel_rate usim_120m_rates[] = { static const struct clksel usim_clksel[] = { { .parent = &omap_96m_fck, .rates = usim_96m_rates }, - { .parent = &dpll5_m2_ck, .rates = usim_120m_rates }, + { .parent = &omap_120m_fck, .rates = usim_120m_rates }, { .parent = &sys_ck, .rates = div2_rates }, { .parent = NULL }, }; @@ -2147,63 +2245,63 @@ static const struct clksel usim_clksel[] = { /* 3430ES2 only */ static struct clk usim_fck = { .name = "usim_fck", - .ops = &clkops_omap2_dflt_wait, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP3430ES2_EN_USIMOCP_SHIFT, .clksel_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_CLKSEL), .clksel_mask = OMAP3430ES2_CLKSEL_USIMOCP_MASK, .clksel = usim_clksel, + .flags = CLOCK_IN_OMAP3430ES2, .recalc = &omap2_clksel_recalc, }; /* XXX should gpt1's clksel have wkup_32k_fck as the 32k opt? */ static struct clk gpt1_fck = { .name = "gpt1_fck", - .ops = &clkops_omap2_dflt_wait, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPT1_SHIFT, .clksel_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_GPT1_MASK, .clksel = omap343x_gpt_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "wkup_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk wkup_32k_fck = { .name = "wkup_32k_fck", - .ops = &clkops_null, .init = &omap2_init_clk_clkdm, .parent = &omap_32k_fck, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; static struct clk gpio1_dbck = { .name = "gpio1_dbck", - .ops = &clkops_omap2_dflt_wait, .parent = &wkup_32k_fck, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; static struct clk wdt2_fck = { .name = "wdt2_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &wkup_32k_fck, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_WDT2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; static struct clk wkup_l4_ick = { .name = "wkup_l4_ick", - .ops = &clkops_null, .parent = &sys_ck, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2212,50 +2310,50 @@ static struct clk wkup_l4_ick = { /* Never specifically named in the TRM, so we have to infer a likely name */ static struct clk usim_ick = { .name = "usim_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &wkup_l4_ick, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430ES2_EN_USIMOCP_SHIFT, + .flags = CLOCK_IN_OMAP3430ES2, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; static struct clk wdt2_ick = { .name = "wdt2_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &wkup_l4_ick, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_WDT2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; static struct clk wdt1_ick = { .name = "wdt1_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &wkup_l4_ick, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_WDT1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; static struct clk gpio1_ick = { .name = "gpio1_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &wkup_l4_ick, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; static struct clk omap_32ksync_ick = { .name = "omap_32ksync_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &wkup_l4_ick, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_32KSYNC_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2263,20 +2361,20 @@ static struct clk omap_32ksync_ick = { /* XXX This clock no longer exists in 3430 TRM rev F */ static struct clk gpt12_ick = { .name = "gpt12_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &wkup_l4_ick, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT12_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; static struct clk gpt1_ick = { .name = "gpt1_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &wkup_l4_ick, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT1_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "wkup_clkdm", .recalc = &followparent_recalc, }; @@ -2287,404 +2385,406 @@ static struct clk gpt1_ick = { static struct clk per_96m_fck = { .name = "per_96m_fck", - .ops = &clkops_null, .parent = &omap_96m_alwon_fck, .init = &omap2_init_clk_clkdm, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk per_48m_fck = { .name = "per_48m_fck", - .ops = &clkops_null, .parent = &omap_48m_fck, .init = &omap2_init_clk_clkdm, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk uart3_fck = { .name = "uart3_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &per_48m_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_UART3_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpt2_fck = { .name = "gpt2_fck", - .ops = &clkops_omap2_dflt_wait, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPT2_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_GPT2_MASK, .clksel = omap343x_gpt_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk gpt3_fck = { .name = "gpt3_fck", - .ops = &clkops_omap2_dflt_wait, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPT3_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_GPT3_MASK, .clksel = omap343x_gpt_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk gpt4_fck = { .name = "gpt4_fck", - .ops = &clkops_omap2_dflt_wait, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPT4_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_GPT4_MASK, .clksel = omap343x_gpt_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk gpt5_fck = { .name = "gpt5_fck", - .ops = &clkops_omap2_dflt_wait, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPT5_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_GPT5_MASK, .clksel = omap343x_gpt_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk gpt6_fck = { .name = "gpt6_fck", - .ops = &clkops_omap2_dflt_wait, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPT6_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_GPT6_MASK, .clksel = omap343x_gpt_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk gpt7_fck = { .name = "gpt7_fck", - .ops = &clkops_omap2_dflt_wait, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPT7_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_GPT7_MASK, .clksel = omap343x_gpt_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk gpt8_fck = { .name = "gpt8_fck", - .ops = &clkops_omap2_dflt_wait, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPT8_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_GPT8_MASK, .clksel = omap343x_gpt_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk gpt9_fck = { .name = "gpt9_fck", - .ops = &clkops_omap2_dflt_wait, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPT9_SHIFT, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL), .clksel_mask = OMAP3430_CLKSEL_GPT9_MASK, .clksel = omap343x_gpt_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk per_32k_alwon_fck = { .name = "per_32k_alwon_fck", - .ops = &clkops_null, .parent = &omap_32k_fck, .clkdm_name = "per_clkdm", + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .recalc = &followparent_recalc, }; static struct clk gpio6_dbck = { .name = "gpio6_dbck", - .ops = &clkops_omap2_dflt_wait, .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO6_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpio5_dbck = { .name = "gpio5_dbck", - .ops = &clkops_omap2_dflt_wait, .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO5_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpio4_dbck = { .name = "gpio4_dbck", - .ops = &clkops_omap2_dflt_wait, .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO4_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpio3_dbck = { .name = "gpio3_dbck", - .ops = &clkops_omap2_dflt_wait, .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO3_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpio2_dbck = { .name = "gpio2_dbck", - .ops = &clkops_omap2_dflt_wait, .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_GPIO2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk wdt3_fck = { .name = "wdt3_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &per_32k_alwon_fck, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_WDT3_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk per_l4_ick = { .name = "per_l4_ick", - .ops = &clkops_null, .parent = &l4_ick, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | + PARENT_CONTROLS_CLOCK, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpio6_ick = { .name = "gpio6_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO6_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpio5_ick = { .name = "gpio5_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO5_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpio4_ick = { .name = "gpio4_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO4_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpio3_ick = { .name = "gpio3_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO3_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpio2_ick = { .name = "gpio2_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPIO2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk wdt3_ick = { .name = "wdt3_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_WDT3_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk uart3_ick = { .name = "uart3_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_UART3_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpt9_ick = { .name = "gpt9_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT9_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpt8_ick = { .name = "gpt8_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT8_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpt7_ick = { .name = "gpt7_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT7_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpt6_ick = { .name = "gpt6_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT6_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpt5_ick = { .name = "gpt5_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT5_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpt4_ick = { .name = "gpt4_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT4_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpt3_ick = { .name = "gpt3_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT3_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk gpt2_ick = { .name = "gpt2_ick", - .ops = &clkops_omap2_dflt_wait, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_GPT2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk mcbsp2_ick = { .name = "mcbsp_ick", - .ops = &clkops_omap2_dflt_wait, .id = 2, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_MCBSP2_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk mcbsp3_ick = { .name = "mcbsp_ick", - .ops = &clkops_omap2_dflt_wait, .id = 3, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_MCBSP3_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static struct clk mcbsp4_ick = { .name = "mcbsp_ick", - .ops = &clkops_omap2_dflt_wait, .id = 4, .parent = &per_l4_ick, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN), .enable_bit = OMAP3430_EN_MCBSP4_SHIFT, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &followparent_recalc, }; static const struct clksel mcbsp_234_clksel[] = { - { .parent = &core_96m_fck, .rates = common_mcbsp_96m_rates }, - { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, + { .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates }, + { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates }, { .parent = NULL } }; static struct clk mcbsp2_fck = { .name = "mcbsp_fck", - .ops = &clkops_omap2_dflt_wait, .id = 2, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), @@ -2692,13 +2792,13 @@ static struct clk mcbsp2_fck = { .clksel_reg = OMAP343X_CTRL_REGADDR(OMAP2_CONTROL_DEVCONF0), .clksel_mask = OMAP2_MCBSP2_CLKS_MASK, .clksel = mcbsp_234_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk mcbsp3_fck = { .name = "mcbsp_fck", - .ops = &clkops_omap2_dflt_wait, .id = 3, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), @@ -2706,13 +2806,13 @@ static struct clk mcbsp3_fck = { .clksel_reg = OMAP343X_CTRL_REGADDR(OMAP343X_CONTROL_DEVCONF1), .clksel_mask = OMAP2_MCBSP3_CLKS_MASK, .clksel = mcbsp_234_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk mcbsp4_fck = { .name = "mcbsp_fck", - .ops = &clkops_omap2_dflt_wait, .id = 4, .init = &omap2_init_clksel_parent, .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN), @@ -2720,6 +2820,7 @@ static struct clk mcbsp4_fck = { .clksel_reg = OMAP343X_CTRL_REGADDR(OMAP343X_CONTROL_DEVCONF1), .clksel_mask = OMAP2_MCBSP4_CLKS_MASK, .clksel = mcbsp_234_clksel, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "per_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2763,11 +2864,11 @@ static const struct clksel emu_src_clksel[] = { */ static struct clk emu_src_ck = { .name = "emu_src_ck", - .ops = &clkops_null, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), .clksel_mask = OMAP3430_MUX_CTRL_MASK, .clksel = emu_src_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2787,11 +2888,11 @@ static const struct clksel pclk_emu_clksel[] = { static struct clk pclk_fck = { .name = "pclk_fck", - .ops = &clkops_null, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), .clksel_mask = OMAP3430_CLKSEL_PCLK_MASK, .clksel = pclk_emu_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2810,11 +2911,11 @@ static const struct clksel pclkx2_emu_clksel[] = { static struct clk pclkx2_fck = { .name = "pclkx2_fck", - .ops = &clkops_null, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), .clksel_mask = OMAP3430_CLKSEL_PCLKX2_MASK, .clksel = pclkx2_emu_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2826,22 +2927,22 @@ static const struct clksel atclk_emu_clksel[] = { static struct clk atclk_fck = { .name = "atclk_fck", - .ops = &clkops_null, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), .clksel_mask = OMAP3430_CLKSEL_ATCLK_MASK, .clksel = atclk_emu_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; static struct clk traceclk_src_fck = { .name = "traceclk_src_fck", - .ops = &clkops_null, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), .clksel_mask = OMAP3430_TRACE_MUX_CTRL_MASK, .clksel = emu_src_clksel, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES | ALWAYS_ENABLED, .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2860,11 +2961,11 @@ static const struct clksel traceclk_clksel[] = { static struct clk traceclk_fck = { .name = "traceclk_fck", - .ops = &clkops_null, .init = &omap2_init_clksel_parent, .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1), .clksel_mask = OMAP3430_CLKSEL_TRACECLK_MASK, .clksel = traceclk_clksel, + .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED, .clkdm_name = "emu_clkdm", .recalc = &omap2_clksel_recalc, }; @@ -2874,27 +2975,27 @@ static struct clk traceclk_fck = { /* SmartReflex fclk (VDD1) */ static struct clk sr1_fck = { .name = "sr1_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &sys_ck, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_SR1_SHIFT, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, .recalc = &followparent_recalc, }; /* SmartReflex fclk (VDD2) */ static struct clk sr2_fck = { .name = "sr2_fck", - .ops = &clkops_omap2_dflt_wait, .parent = &sys_ck, .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN), .enable_bit = OMAP3430_EN_SR2_SHIFT, + .flags = CLOCK_IN_OMAP343X | RATE_PROPAGATES, .recalc = &followparent_recalc, }; static struct clk sr_l4_ick = { .name = "sr_l4_ick", - .ops = &clkops_null, /* RMK: missing? */ .parent = &l4_ick, + .flags = CLOCK_IN_OMAP343X, .clkdm_name = "core_l4_clkdm", .recalc = &followparent_recalc, }; @@ -2904,16 +3005,231 @@ static struct clk sr_l4_ick = { /* XXX This clock no longer exists in 3430 TRM rev F */ static struct clk gpt12_fck = { .name = "gpt12_fck", - .ops = &clkops_null, .parent = &secure_32k_fck, + .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED, .recalc = &followparent_recalc, }; static struct clk wdt1_fck = { .name = "wdt1_fck", - .ops = &clkops_null, .parent = &secure_32k_fck, - .recalc = &followparent_recalc, + .flags = CLOCK_IN_OMAP343X | ALWAYS_ENABLED, + .recalc = &followparent_recalc, +}; + +static struct clk *onchip_34xx_clks[] __initdata = { + &omap_32k_fck, + &virt_12m_ck, + &virt_13m_ck, + &virt_16_8m_ck, + &virt_19_2m_ck, + &virt_26m_ck, + &virt_38_4m_ck, + &osc_sys_ck, + &sys_ck, + &sys_altclk, + &mcbsp_clks, + &sys_clkout1, + &dpll1_ck, + &dpll1_x2_ck, + &dpll1_x2m2_ck, + &dpll2_ck, + &dpll2_m2_ck, + &dpll3_ck, + &core_ck, + &dpll3_x2_ck, + &dpll3_m2_ck, + &dpll3_m2x2_ck, + &dpll3_m3_ck, + &dpll3_m3x2_ck, + &emu_core_alwon_ck, + &dpll4_ck, + &dpll4_x2_ck, + &omap_96m_alwon_fck, + &omap_96m_fck, + &cm_96m_fck, + &virt_omap_54m_fck, + &omap_54m_fck, + &omap_48m_fck, + &omap_12m_fck, + &dpll4_m2_ck, + &dpll4_m2x2_ck, + &dpll4_m3_ck, + &dpll4_m3x2_ck, + &dpll4_m4_ck, + &dpll4_m4x2_ck, + &dpll4_m5_ck, + &dpll4_m5x2_ck, + &dpll4_m6_ck, + &dpll4_m6x2_ck, + &emu_per_alwon_ck, + &dpll5_ck, + &dpll5_m2_ck, + &omap_120m_fck, + &clkout2_src_ck, + &sys_clkout2, + &corex2_fck, + &dpll1_fck, + &mpu_ck, + &arm_fck, + &emu_mpu_alwon_ck, + &dpll2_fck, + &iva2_ck, + &l3_ick, + &l4_ick, + &rm_ick, + &gfx_l3_ck, + &gfx_l3_fck, + &gfx_l3_ick, + &gfx_cg1_ck, + &gfx_cg2_ck, + &sgx_fck, + &sgx_ick, + &d2d_26m_fck, + &gpt10_fck, + &gpt11_fck, + &cpefuse_fck, + &ts_fck, + &usbtll_fck, + &core_96m_fck, + &mmchs3_fck, + &mmchs2_fck, + &mspro_fck, + &mmchs1_fck, + &i2c3_fck, + &i2c2_fck, + &i2c1_fck, + &mcbsp5_fck, + &mcbsp1_fck, + &core_48m_fck, + &mcspi4_fck, + &mcspi3_fck, + &mcspi2_fck, + &mcspi1_fck, + &uart2_fck, + &uart1_fck, + &fshostusb_fck, + &core_12m_fck, + &hdq_fck, + &ssi_ssr_fck, + &ssi_sst_fck, + &core_l3_ick, + &hsotgusb_ick, + &sdrc_ick, + &gpmc_fck, + &security_l3_ick, + &pka_ick, + &core_l4_ick, + &usbtll_ick, + &mmchs3_ick, + &icr_ick, + &aes2_ick, + &sha12_ick, + &des2_ick, + &mmchs2_ick, + &mmchs1_ick, + &mspro_ick, + &hdq_ick, + &mcspi4_ick, + &mcspi3_ick, + &mcspi2_ick, + &mcspi1_ick, + &i2c3_ick, + &i2c2_ick, + &i2c1_ick, + &uart2_ick, + &uart1_ick, + &gpt11_ick, + &gpt10_ick, + &mcbsp5_ick, + &mcbsp1_ick, + &fac_ick, + &mailboxes_ick, + &omapctrl_ick, + &ssi_l4_ick, + &ssi_ick, + &usb_l4_ick, + &security_l4_ick2, + &aes1_ick, + &rng_ick, + &sha11_ick, + &des1_ick, + &dss1_alwon_fck, + &dss_tv_fck, + &dss_96m_fck, + &dss2_alwon_fck, + &dss_ick, + &cam_mclk, + &cam_ick, + &usbhost_120m_fck, + &usbhost_48m_fck, + &usbhost_ick, + &usbhost_sar_fck, + &usim_fck, + &gpt1_fck, + &wkup_32k_fck, + &gpio1_dbck, + &wdt2_fck, + &wkup_l4_ick, + &usim_ick, + &wdt2_ick, + &wdt1_ick, + &gpio1_ick, + &omap_32ksync_ick, + &gpt12_ick, + &gpt1_ick, + &per_96m_fck, + &per_48m_fck, + &uart3_fck, + &gpt2_fck, + &gpt3_fck, + &gpt4_fck, + &gpt5_fck, + &gpt6_fck, + &gpt7_fck, + &gpt8_fck, + &gpt9_fck, + &per_32k_alwon_fck, + &gpio6_dbck, + &gpio5_dbck, + &gpio4_dbck, + &gpio3_dbck, + &gpio2_dbck, + &wdt3_fck, + &per_l4_ick, + &gpio6_ick, + &gpio5_ick, + &gpio4_ick, + &gpio3_ick, + &gpio2_ick, + &wdt3_ick, + &uart3_ick, + &gpt9_ick, + &gpt8_ick, + &gpt7_ick, + &gpt6_ick, + &gpt5_ick, + &gpt4_ick, + &gpt3_ick, + &gpt2_ick, + &mcbsp2_ick, + &mcbsp3_ick, + &mcbsp4_ick, + &mcbsp2_fck, + &mcbsp3_fck, + &mcbsp4_fck, + &emu_src_ck, + &pclk_fck, + &pclkx2_fck, + &atclk_fck, + &traceclk_src_fck, + &traceclk_fck, + &sr1_fck, + &sr2_fck, + &sr_l4_ick, + &secure_32k_fck, + &gpt12_fck, + &wdt1_fck, }; #endif diff --git a/trunk/arch/arm/mach-omap2/clockdomain.c b/trunk/arch/arm/mach-omap2/clockdomain.c index 0e7d501865b6..4c3ce9cfd948 100644 --- a/trunk/arch/arm/mach-omap2/clockdomain.c +++ b/trunk/arch/arm/mach-omap2/clockdomain.c @@ -22,7 +22,6 @@ #include #include #include -#include #include @@ -72,13 +71,16 @@ static void _autodep_lookup(struct clkdm_pwrdm_autodep *autodep) if (!omap_chip_is(autodep->omap_chip)) return; - pwrdm = pwrdm_lookup(autodep->pwrdm.name); + pwrdm = pwrdm_lookup(autodep->pwrdm_name); if (!pwrdm) { - pr_err("clockdomain: autodeps: powerdomain %s does not exist\n", - autodep->pwrdm.name); - pwrdm = ERR_PTR(-ENOENT); + pr_debug("clockdomain: _autodep_lookup: powerdomain %s " + "does not exist\n", autodep->pwrdm_name); + WARN_ON(1); + return; } - autodep->pwrdm.ptr = pwrdm; + autodep->pwrdm = pwrdm; + + return; } /* @@ -93,19 +95,16 @@ static void _clkdm_add_autodeps(struct clockdomain *clkdm) { struct clkdm_pwrdm_autodep *autodep; - for (autodep = autodeps; autodep->pwrdm.ptr; autodep++) { - if (IS_ERR(autodep->pwrdm.ptr)) - continue; - - if (!omap_chip_is(autodep->omap_chip)) + for (autodep = autodeps; autodep->pwrdm_name; autodep++) { + if (!autodep->pwrdm) continue; pr_debug("clockdomain: adding %s sleepdep/wkdep for " - "pwrdm %s\n", autodep->pwrdm.ptr->name, - clkdm->pwrdm.ptr->name); + "pwrdm %s\n", autodep->pwrdm_name, + clkdm->pwrdm->name); - pwrdm_add_sleepdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr); - pwrdm_add_wkdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr); + pwrdm_add_sleepdep(clkdm->pwrdm, autodep->pwrdm); + pwrdm_add_wkdep(clkdm->pwrdm, autodep->pwrdm); } } @@ -121,19 +120,16 @@ static void _clkdm_del_autodeps(struct clockdomain *clkdm) { struct clkdm_pwrdm_autodep *autodep; - for (autodep = autodeps; autodep->pwrdm.ptr; autodep++) { - if (IS_ERR(autodep->pwrdm.ptr)) - continue; - - if (!omap_chip_is(autodep->omap_chip)) + for (autodep = autodeps; autodep->pwrdm_name; autodep++) { + if (!autodep->pwrdm) continue; pr_debug("clockdomain: removing %s sleepdep/wkdep for " - "pwrdm %s\n", autodep->pwrdm.ptr->name, - clkdm->pwrdm.ptr->name); + "pwrdm %s\n", autodep->pwrdm_name, + clkdm->pwrdm->name); - pwrdm_del_sleepdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr); - pwrdm_del_wkdep(clkdm->pwrdm.ptr, autodep->pwrdm.ptr); + pwrdm_del_sleepdep(clkdm->pwrdm, autodep->pwrdm); + pwrdm_del_wkdep(clkdm->pwrdm, autodep->pwrdm); } } @@ -183,7 +179,7 @@ void clkdm_init(struct clockdomain **clkdms, autodeps = init_autodeps; if (autodeps) - for (autodep = autodeps; autodep->pwrdm.ptr; autodep++) + for (autodep = autodeps; autodep->pwrdm_name; autodep++) _autodep_lookup(autodep); } @@ -206,20 +202,20 @@ int clkdm_register(struct clockdomain *clkdm) if (!omap_chip_is(clkdm->omap_chip)) return -EINVAL; - pwrdm = pwrdm_lookup(clkdm->pwrdm.name); + pwrdm = pwrdm_lookup(clkdm->pwrdm_name); if (!pwrdm) { - pr_err("clockdomain: %s: powerdomain %s does not exist\n", - clkdm->name, clkdm->pwrdm.name); + pr_debug("clockdomain: clkdm_register %s: powerdomain %s " + "does not exist\n", clkdm->name, clkdm->pwrdm_name); return -EINVAL; } - clkdm->pwrdm.ptr = pwrdm; + clkdm->pwrdm = pwrdm; mutex_lock(&clkdm_mutex); /* Verify that the clockdomain is not already registered */ if (_clkdm_lookup(clkdm->name)) { ret = -EEXIST; goto cr_unlock; - } + }; list_add(&clkdm->node, &clkdm_list); @@ -246,7 +242,7 @@ int clkdm_unregister(struct clockdomain *clkdm) if (!clkdm) return -EINVAL; - pwrdm_del_clkdm(clkdm->pwrdm.ptr, clkdm); + pwrdm_del_clkdm(clkdm->pwrdm, clkdm); mutex_lock(&clkdm_mutex); list_del(&clkdm->node); @@ -331,7 +327,7 @@ struct powerdomain *clkdm_get_pwrdm(struct clockdomain *clkdm) if (!clkdm) return NULL; - return clkdm->pwrdm.ptr; + return clkdm->pwrdm; } @@ -352,7 +348,7 @@ static int omap2_clkdm_clktrctrl_read(struct clockdomain *clkdm) if (!clkdm) return -EINVAL; - v = cm_read_mod_reg(clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); + v = cm_read_mod_reg(clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); v &= clkdm->clktrctrl_mask; v >>= __ffs(clkdm->clktrctrl_mask); @@ -384,7 +380,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm) if (cpu_is_omap24xx()) { cm_set_mod_reg_bits(OMAP24XX_FORCESTATE, - clkdm->pwrdm.ptr->prcm_offs, PM_PWSTCTRL); + clkdm->pwrdm->prcm_offs, PM_PWSTCTRL); } else if (cpu_is_omap34xx()) { @@ -392,7 +388,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm) __ffs(clkdm->clktrctrl_mask)); cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, - clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); + clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); } else { BUG(); @@ -426,7 +422,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm) if (cpu_is_omap24xx()) { cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE, - clkdm->pwrdm.ptr->prcm_offs, PM_PWSTCTRL); + clkdm->pwrdm->prcm_offs, PM_PWSTCTRL); } else if (cpu_is_omap34xx()) { @@ -434,7 +430,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm) __ffs(clkdm->clktrctrl_mask)); cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v, - clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); + clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); } else { BUG(); @@ -482,7 +478,7 @@ void omap2_clkdm_allow_idle(struct clockdomain *clkdm) cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v << __ffs(clkdm->clktrctrl_mask), - clkdm->pwrdm.ptr->prcm_offs, + clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); } @@ -520,7 +516,7 @@ void omap2_clkdm_deny_idle(struct clockdomain *clkdm) cm_rmw_mod_reg_bits(clkdm->clktrctrl_mask, v << __ffs(clkdm->clktrctrl_mask), - clkdm->pwrdm.ptr->prcm_offs, CM_CLKSTCTRL); + clkdm->pwrdm->prcm_offs, CM_CLKSTCTRL); if (atomic_read(&clkdm->usecount) > 0) _clkdm_del_autodeps(clkdm); @@ -571,8 +567,6 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) else omap2_clkdm_wakeup(clkdm); - pwrdm_wait_transition(clkdm->pwrdm.ptr); - return 0; } diff --git a/trunk/arch/arm/mach-omap2/clockdomains.h b/trunk/arch/arm/mach-omap2/clockdomains.h index 281d5da19188..cd86dcc7b424 100644 --- a/trunk/arch/arm/mach-omap2/clockdomains.h +++ b/trunk/arch/arm/mach-omap2/clockdomains.h @@ -14,29 +14,12 @@ /* * OMAP2/3-common clockdomains - * - * Even though the 2420 has a single PRCM module from the - * interconnect's perspective, internally it does appear to have - * separate PRM and CM clockdomains. The usual test case is - * sys_clkout/sys_clkout2. */ /* This is an implicit clockdomain - it is never defined as such in TRM */ static struct clockdomain wkup_clkdm = { .name = "wkup_clkdm", - .pwrdm = { .name = "wkup_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), -}; - -static struct clockdomain prm_clkdm = { - .name = "prm_clkdm", - .pwrdm = { .name = "wkup_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), -}; - -static struct clockdomain cm_clkdm = { - .name = "cm_clkdm", - .pwrdm = { .name = "core_pwrdm" }, + .pwrdm_name = "wkup_pwrdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), }; @@ -48,7 +31,7 @@ static struct clockdomain cm_clkdm = { static struct clockdomain mpu_2420_clkdm = { .name = "mpu_clkdm", - .pwrdm = { .name = "mpu_pwrdm" }, + .pwrdm_name = "mpu_pwrdm", .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), @@ -56,7 +39,7 @@ static struct clockdomain mpu_2420_clkdm = { static struct clockdomain iva1_2420_clkdm = { .name = "iva1_clkdm", - .pwrdm = { .name = "dsp_pwrdm" }, + .pwrdm_name = "dsp_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP2420_AUTOSTATE_IVA_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), @@ -73,7 +56,7 @@ static struct clockdomain iva1_2420_clkdm = { static struct clockdomain mpu_2430_clkdm = { .name = "mpu_clkdm", - .pwrdm = { .name = "mpu_pwrdm" }, + .pwrdm_name = "mpu_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_MPU_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), @@ -81,7 +64,7 @@ static struct clockdomain mpu_2430_clkdm = { static struct clockdomain mdm_clkdm = { .name = "mdm_clkdm", - .pwrdm = { .name = "mdm_pwrdm" }, + .pwrdm_name = "mdm_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP2430_AUTOSTATE_MDM_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), @@ -98,7 +81,7 @@ static struct clockdomain mdm_clkdm = { static struct clockdomain dsp_clkdm = { .name = "dsp_clkdm", - .pwrdm = { .name = "dsp_pwrdm" }, + .pwrdm_name = "dsp_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSP_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), @@ -106,7 +89,7 @@ static struct clockdomain dsp_clkdm = { static struct clockdomain gfx_24xx_clkdm = { .name = "gfx_clkdm", - .pwrdm = { .name = "gfx_pwrdm" }, + .pwrdm_name = "gfx_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_GFX_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), @@ -114,7 +97,7 @@ static struct clockdomain gfx_24xx_clkdm = { static struct clockdomain core_l3_24xx_clkdm = { .name = "core_l3_clkdm", - .pwrdm = { .name = "core_pwrdm" }, + .pwrdm_name = "core_pwrdm", .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_L3_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), @@ -122,7 +105,7 @@ static struct clockdomain core_l3_24xx_clkdm = { static struct clockdomain core_l4_24xx_clkdm = { .name = "core_l4_clkdm", - .pwrdm = { .name = "core_pwrdm" }, + .pwrdm_name = "core_pwrdm", .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_L4_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), @@ -130,7 +113,7 @@ static struct clockdomain core_l4_24xx_clkdm = { static struct clockdomain dss_24xx_clkdm = { .name = "dss_clkdm", - .pwrdm = { .name = "core_pwrdm" }, + .pwrdm_name = "core_pwrdm", .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP24XX_AUTOSTATE_DSS_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX), @@ -147,7 +130,7 @@ static struct clockdomain dss_24xx_clkdm = { static struct clockdomain mpu_34xx_clkdm = { .name = "mpu_clkdm", - .pwrdm = { .name = "mpu_pwrdm" }, + .pwrdm_name = "mpu_pwrdm", .flags = CLKDM_CAN_HWSUP | CLKDM_CAN_FORCE_WAKEUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_MPU_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -155,7 +138,7 @@ static struct clockdomain mpu_34xx_clkdm = { static struct clockdomain neon_clkdm = { .name = "neon_clkdm", - .pwrdm = { .name = "neon_pwrdm" }, + .pwrdm_name = "neon_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_NEON_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -163,7 +146,7 @@ static struct clockdomain neon_clkdm = { static struct clockdomain iva2_clkdm = { .name = "iva2_clkdm", - .pwrdm = { .name = "iva2_pwrdm" }, + .pwrdm_name = "iva2_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_IVA2_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -171,7 +154,7 @@ static struct clockdomain iva2_clkdm = { static struct clockdomain gfx_3430es1_clkdm = { .name = "gfx_clkdm", - .pwrdm = { .name = "gfx_pwrdm" }, + .pwrdm_name = "gfx_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_GFX_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1), @@ -179,10 +162,10 @@ static struct clockdomain gfx_3430es1_clkdm = { static struct clockdomain sgx_clkdm = { .name = "sgx_clkdm", - .pwrdm = { .name = "sgx_pwrdm" }, + .pwrdm_name = "sgx_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_SGX_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), }; /* @@ -194,7 +177,7 @@ static struct clockdomain sgx_clkdm = { */ static struct clockdomain d2d_clkdm = { .name = "d2d_clkdm", - .pwrdm = { .name = "core_pwrdm" }, + .pwrdm_name = "core_pwrdm", .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP3430ES1_CLKTRCTRL_D2D_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -202,7 +185,7 @@ static struct clockdomain d2d_clkdm = { static struct clockdomain core_l3_34xx_clkdm = { .name = "core_l3_clkdm", - .pwrdm = { .name = "core_pwrdm" }, + .pwrdm_name = "core_pwrdm", .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_L3_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -210,7 +193,7 @@ static struct clockdomain core_l3_34xx_clkdm = { static struct clockdomain core_l4_34xx_clkdm = { .name = "core_l4_clkdm", - .pwrdm = { .name = "core_pwrdm" }, + .pwrdm_name = "core_pwrdm", .flags = CLKDM_CAN_HWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_L4_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -218,7 +201,7 @@ static struct clockdomain core_l4_34xx_clkdm = { static struct clockdomain dss_34xx_clkdm = { .name = "dss_clkdm", - .pwrdm = { .name = "dss_pwrdm" }, + .pwrdm_name = "dss_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_DSS_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -226,7 +209,7 @@ static struct clockdomain dss_34xx_clkdm = { static struct clockdomain cam_clkdm = { .name = "cam_clkdm", - .pwrdm = { .name = "cam_pwrdm" }, + .pwrdm_name = "cam_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_CAM_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), @@ -234,62 +217,28 @@ static struct clockdomain cam_clkdm = { static struct clockdomain usbhost_clkdm = { .name = "usbhost_clkdm", - .pwrdm = { .name = "usbhost_pwrdm" }, + .pwrdm_name = "usbhost_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430ES2_CLKTRCTRL_USBHOST_MASK, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), }; static struct clockdomain per_clkdm = { .name = "per_clkdm", - .pwrdm = { .name = "per_pwrdm" }, + .pwrdm_name = "per_pwrdm", .flags = CLKDM_CAN_HWSUP_SWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_PER_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; -/* - * Disable hw supervised mode for emu_clkdm, because emu_pwrdm is - * switched of even if sdti is in use - */ static struct clockdomain emu_clkdm = { .name = "emu_clkdm", - .pwrdm = { .name = "emu_pwrdm" }, - .flags = /* CLKDM_CAN_ENABLE_AUTO | */CLKDM_CAN_SWSUP, + .pwrdm_name = "emu_pwrdm", + .flags = CLKDM_CAN_ENABLE_AUTO | CLKDM_CAN_SWSUP, .clktrctrl_mask = OMAP3430_CLKTRCTRL_EMU_MASK, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), }; -static struct clockdomain dpll1_clkdm = { - .name = "dpll1_clkdm", - .pwrdm = { .name = "dpll1_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain dpll2_clkdm = { - .name = "dpll2_clkdm", - .pwrdm = { .name = "dpll2_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain dpll3_clkdm = { - .name = "dpll3_clkdm", - .pwrdm = { .name = "dpll3_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain dpll4_clkdm = { - .name = "dpll4_clkdm", - .pwrdm = { .name = "dpll4_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct clockdomain dpll5_clkdm = { - .name = "dpll5_clkdm", - .pwrdm = { .name = "dpll5_pwrdm" }, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), -}; - #endif /* CONFIG_ARCH_OMAP34XX */ /* @@ -298,16 +247,14 @@ static struct clockdomain dpll5_clkdm = { static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = { { - .pwrdm = { .name = "mpu_pwrdm" }, + .pwrdm_name = "mpu_pwrdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }, { - .pwrdm = { .name = "iva2_pwrdm" }, + .pwrdm_name = "iva2_pwrdm", .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) }, - { - .pwrdm = { .name = NULL }, - } + { NULL } }; /* @@ -317,8 +264,6 @@ static struct clkdm_pwrdm_autodep clkdm_pwrdm_autodeps[] = { static struct clockdomain *clockdomains_omap[] = { &wkup_clkdm, - &cm_clkdm, - &prm_clkdm, #ifdef CONFIG_ARCH_OMAP2420 &mpu_2420_clkdm, @@ -352,11 +297,6 @@ static struct clockdomain *clockdomains_omap[] = { &usbhost_clkdm, &per_clkdm, &emu_clkdm, - &dpll1_clkdm, - &dpll2_clkdm, - &dpll3_clkdm, - &dpll4_clkdm, - &dpll5_clkdm, #endif NULL, diff --git a/trunk/arch/arm/mach-omap2/cm-regbits-24xx.h b/trunk/arch/arm/mach-omap2/cm-regbits-24xx.h index 297a2fe634ea..1098ecfab861 100644 --- a/trunk/arch/arm/mach-omap2/cm-regbits-24xx.h +++ b/trunk/arch/arm/mach-omap2/cm-regbits-24xx.h @@ -110,56 +110,35 @@ #define OMAP24XX_EN_DES (1 << 0) /* CM_IDLEST1_CORE specific bits */ -#define OMAP24XX_ST_MAILBOXES_SHIFT 30 -#define OMAP24XX_ST_MAILBOXES_MASK (1 << 30) -#define OMAP24XX_ST_WDT4_SHIFT 29 -#define OMAP24XX_ST_WDT4_MASK (1 << 29) -#define OMAP2420_ST_WDT3_SHIFT 28 -#define OMAP2420_ST_WDT3_MASK (1 << 28) -#define OMAP24XX_ST_MSPRO_SHIFT 27 -#define OMAP24XX_ST_MSPRO_MASK (1 << 27) -#define OMAP24XX_ST_FAC_SHIFT 25 -#define OMAP24XX_ST_FAC_MASK (1 << 25) -#define OMAP2420_ST_EAC_SHIFT 24 -#define OMAP2420_ST_EAC_MASK (1 << 24) -#define OMAP24XX_ST_HDQ_SHIFT 23 -#define OMAP24XX_ST_HDQ_MASK (1 << 23) -#define OMAP2420_ST_I2C2_SHIFT 20 -#define OMAP2420_ST_I2C2_MASK (1 << 20) -#define OMAP2420_ST_I2C1_SHIFT 19 -#define OMAP2420_ST_I2C1_MASK (1 << 19) -#define OMAP24XX_ST_MCBSP2_SHIFT 16 -#define OMAP24XX_ST_MCBSP2_MASK (1 << 16) -#define OMAP24XX_ST_MCBSP1_SHIFT 15 -#define OMAP24XX_ST_MCBSP1_MASK (1 << 15) -#define OMAP24XX_ST_DSS_SHIFT 0 -#define OMAP24XX_ST_DSS_MASK (1 << 0) +#define OMAP24XX_ST_MAILBOXES (1 << 30) +#define OMAP24XX_ST_WDT4 (1 << 29) +#define OMAP2420_ST_WDT3 (1 << 28) +#define OMAP24XX_ST_MSPRO (1 << 27) +#define OMAP24XX_ST_FAC (1 << 25) +#define OMAP2420_ST_EAC (1 << 24) +#define OMAP24XX_ST_HDQ (1 << 23) +#define OMAP24XX_ST_I2C2 (1 << 20) +#define OMAP24XX_ST_I2C1 (1 << 19) +#define OMAP24XX_ST_MCBSP2 (1 << 16) +#define OMAP24XX_ST_MCBSP1 (1 << 15) +#define OMAP24XX_ST_DSS (1 << 0) /* CM_IDLEST2_CORE */ -#define OMAP2430_ST_MCBSP5_SHIFT 5 -#define OMAP2430_ST_MCBSP5_MASK (1 << 5) -#define OMAP2430_ST_MCBSP4_SHIFT 4 -#define OMAP2430_ST_MCBSP4_MASK (1 << 4) -#define OMAP2430_ST_MCBSP3_SHIFT 3 -#define OMAP2430_ST_MCBSP3_MASK (1 << 3) -#define OMAP24XX_ST_SSI_SHIFT 1 -#define OMAP24XX_ST_SSI_MASK (1 << 1) +#define OMAP2430_ST_MCBSP5 (1 << 5) +#define OMAP2430_ST_MCBSP4 (1 << 4) +#define OMAP2430_ST_MCBSP3 (1 << 3) +#define OMAP24XX_ST_SSI (1 << 1) /* CM_IDLEST3_CORE */ /* 2430 only */ -#define OMAP2430_ST_SDRC_MASK (1 << 2) +#define OMAP2430_ST_SDRC (1 << 2) /* CM_IDLEST4_CORE */ -#define OMAP24XX_ST_PKA_SHIFT 4 -#define OMAP24XX_ST_PKA_MASK (1 << 4) -#define OMAP24XX_ST_AES_SHIFT 3 -#define OMAP24XX_ST_AES_MASK (1 << 3) -#define OMAP24XX_ST_RNG_SHIFT 2 -#define OMAP24XX_ST_RNG_MASK (1 << 2) -#define OMAP24XX_ST_SHA_SHIFT 1 -#define OMAP24XX_ST_SHA_MASK (1 << 1) -#define OMAP24XX_ST_DES_SHIFT 0 -#define OMAP24XX_ST_DES_MASK (1 << 0) +#define OMAP24XX_ST_PKA (1 << 4) +#define OMAP24XX_ST_AES (1 << 3) +#define OMAP24XX_ST_RNG (1 << 2) +#define OMAP24XX_ST_SHA (1 << 1) +#define OMAP24XX_ST_DES (1 << 0) /* CM_AUTOIDLE1_CORE */ #define OMAP24XX_AUTO_CAM (1 << 31) @@ -296,16 +275,11 @@ #define OMAP24XX_EN_32KSYNC (1 << 1) /* CM_IDLEST_WKUP specific bits */ -#define OMAP2430_ST_ICR_SHIFT 6 -#define OMAP2430_ST_ICR_MASK (1 << 6) -#define OMAP24XX_ST_OMAPCTRL_SHIFT 5 -#define OMAP24XX_ST_OMAPCTRL_MASK (1 << 5) -#define OMAP24XX_ST_WDT1_SHIFT 4 -#define OMAP24XX_ST_WDT1_MASK (1 << 4) -#define OMAP24XX_ST_MPU_WDT_SHIFT 3 -#define OMAP24XX_ST_MPU_WDT_MASK (1 << 3) -#define OMAP24XX_ST_32KSYNC_SHIFT 1 -#define OMAP24XX_ST_32KSYNC_MASK (1 << 1) +#define OMAP2430_ST_ICR (1 << 6) +#define OMAP24XX_ST_OMAPCTRL (1 << 5) +#define OMAP24XX_ST_WDT1 (1 << 4) +#define OMAP24XX_ST_MPU_WDT (1 << 3) +#define OMAP24XX_ST_32KSYNC (1 << 1) /* CM_AUTOIDLE_WKUP */ #define OMAP24XX_AUTO_OMAPCTRL (1 << 5) diff --git a/trunk/arch/arm/mach-omap2/cm-regbits-34xx.h b/trunk/arch/arm/mach-omap2/cm-regbits-34xx.h index 6f3f5a36aae6..219f5c8d9659 100644 --- a/trunk/arch/arm/mach-omap2/cm-regbits-34xx.h +++ b/trunk/arch/arm/mach-omap2/cm-regbits-34xx.h @@ -183,58 +183,31 @@ #define OMAP3430ES2_EN_CPEFUSE_MASK (1 << 0) /* CM_IDLEST1_CORE specific bits */ -#define OMAP3430ES2_ST_MMC3_SHIFT 30 -#define OMAP3430ES2_ST_MMC3_MASK (1 << 30) -#define OMAP3430_ST_ICR_SHIFT 29 -#define OMAP3430_ST_ICR_MASK (1 << 29) -#define OMAP3430_ST_AES2_SHIFT 28 -#define OMAP3430_ST_AES2_MASK (1 << 28) -#define OMAP3430_ST_SHA12_SHIFT 27 -#define OMAP3430_ST_SHA12_MASK (1 << 27) -#define OMAP3430_ST_DES2_SHIFT 26 -#define OMAP3430_ST_DES2_MASK (1 << 26) -#define OMAP3430_ST_MSPRO_SHIFT 23 -#define OMAP3430_ST_MSPRO_MASK (1 << 23) -#define OMAP3430_ST_HDQ_SHIFT 22 -#define OMAP3430_ST_HDQ_MASK (1 << 22) -#define OMAP3430ES1_ST_FAC_SHIFT 8 -#define OMAP3430ES1_ST_FAC_MASK (1 << 8) -#define OMAP3430ES2_ST_SSI_IDLE_SHIFT 8 -#define OMAP3430ES2_ST_SSI_IDLE_MASK (1 << 8) -#define OMAP3430_ST_MAILBOXES_SHIFT 7 -#define OMAP3430_ST_MAILBOXES_MASK (1 << 7) -#define OMAP3430_ST_OMAPCTRL_SHIFT 6 -#define OMAP3430_ST_OMAPCTRL_MASK (1 << 6) -#define OMAP3430_ST_SDMA_SHIFT 2 -#define OMAP3430_ST_SDMA_MASK (1 << 2) -#define OMAP3430_ST_SDRC_SHIFT 1 -#define OMAP3430_ST_SDRC_MASK (1 << 1) -#define OMAP3430_ST_SSI_STDBY_SHIFT 0 -#define OMAP3430_ST_SSI_STDBY_MASK (1 << 0) +#define OMAP3430_ST_ICR (1 << 29) +#define OMAP3430_ST_AES2 (1 << 28) +#define OMAP3430_ST_SHA12 (1 << 27) +#define OMAP3430_ST_DES2 (1 << 26) +#define OMAP3430_ST_MSPRO (1 << 23) +#define OMAP3430_ST_HDQ (1 << 22) +#define OMAP3430ES1_ST_FAC (1 << 8) +#define OMAP3430ES1_ST_MAILBOXES (1 << 7) +#define OMAP3430_ST_OMAPCTRL (1 << 6) +#define OMAP3430_ST_SDMA (1 << 2) +#define OMAP3430_ST_SDRC (1 << 1) +#define OMAP3430_ST_SSI (1 << 0) /* CM_IDLEST2_CORE */ -#define OMAP3430_ST_PKA_SHIFT 4 -#define OMAP3430_ST_PKA_MASK (1 << 4) -#define OMAP3430_ST_AES1_SHIFT 3 -#define OMAP3430_ST_AES1_MASK (1 << 3) -#define OMAP3430_ST_RNG_SHIFT 2 -#define OMAP3430_ST_RNG_MASK (1 << 2) -#define OMAP3430_ST_SHA11_SHIFT 1 -#define OMAP3430_ST_SHA11_MASK (1 << 1) -#define OMAP3430_ST_DES1_SHIFT 0 -#define OMAP3430_ST_DES1_MASK (1 << 0) +#define OMAP3430_ST_PKA (1 << 4) +#define OMAP3430_ST_AES1 (1 << 3) +#define OMAP3430_ST_RNG (1 << 2) +#define OMAP3430_ST_SHA11 (1 << 1) +#define OMAP3430_ST_DES1 (1 << 0) /* CM_IDLEST3_CORE */ #define OMAP3430ES2_ST_USBTLL_SHIFT 2 #define OMAP3430ES2_ST_USBTLL_MASK (1 << 2) -#define OMAP3430ES2_ST_CPEFUSE_SHIFT 0 -#define OMAP3430ES2_ST_CPEFUSE_MASK (1 << 0) /* CM_AUTOIDLE1_CORE */ -#define OMAP3430ES2_AUTO_MMC3 (1 << 30) -#define OMAP3430ES2_AUTO_MMC3_SHIFT 30 -#define OMAP3430ES2_AUTO_ICR (1 << 29) -#define OMAP3430ES2_AUTO_ICR_SHIFT 29 #define OMAP3430_AUTO_AES2 (1 << 28) #define OMAP3430_AUTO_AES2_SHIFT 28 #define OMAP3430_AUTO_SHA12 (1 << 27) @@ -303,9 +276,6 @@ #define OMAP3430_AUTO_DES1_SHIFT 0 /* CM_AUTOIDLE3_CORE */ -#define OMAP3430ES2_AUTO_USBHOST (1 << 0) -#define OMAP3430ES2_AUTO_USBHOST_SHIFT 0 -#define OMAP3430ES2_AUTO_USBTLL (1 << 2) #define OMAP3430ES2_AUTO_USBTLL_SHIFT 2 #define OMAP3430ES2_AUTO_USBTLL_MASK (1 << 2) @@ -362,12 +332,8 @@ #define OMAP3430ES1_CLKACTIVITY_GFX_MASK (1 << 0) /* CM_FCLKEN_SGX */ -#define OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT 1 -#define OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_MASK (1 << 1) - -/* CM_ICLKEN_SGX */ -#define OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT 0 -#define OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_MASK (1 << 0) +#define OMAP3430ES2_EN_SGX_SHIFT 1 +#define OMAP3430ES2_EN_SGX_MASK (1 << 1) /* CM_CLKSEL_SGX */ #define OMAP3430ES2_CLKSEL_SGX_SHIFT 0 @@ -383,7 +349,6 @@ /* CM_FCLKEN_WKUP specific bits */ #define OMAP3430ES2_EN_USIMOCP_SHIFT 9 -#define OMAP3430ES2_EN_USIMOCP_MASK (1 << 9) /* CM_ICLKEN_WKUP specific bits */ #define OMAP3430_EN_WDT1 (1 << 4) @@ -392,18 +357,11 @@ #define OMAP3430_EN_32KSYNC_SHIFT 2 /* CM_IDLEST_WKUP specific bits */ -#define OMAP3430ES2_ST_USIMOCP_SHIFT 9 -#define OMAP3430ES2_ST_USIMOCP_MASK (1 << 9) -#define OMAP3430_ST_WDT2_SHIFT 5 -#define OMAP3430_ST_WDT2_MASK (1 << 5) -#define OMAP3430_ST_WDT1_SHIFT 4 -#define OMAP3430_ST_WDT1_MASK (1 << 4) -#define OMAP3430_ST_32KSYNC_SHIFT 2 -#define OMAP3430_ST_32KSYNC_MASK (1 << 2) +#define OMAP3430_ST_WDT2 (1 << 5) +#define OMAP3430_ST_WDT1 (1 << 4) +#define OMAP3430_ST_32KSYNC (1 << 2) /* CM_AUTOIDLE_WKUP */ -#define OMAP3430ES2_AUTO_USIMOCP (1 << 9) -#define OMAP3430ES2_AUTO_USIMOCP_SHIFT 9 #define OMAP3430_AUTO_WDT2 (1 << 5) #define OMAP3430_AUTO_WDT2_SHIFT 5 #define OMAP3430_AUTO_WDT1 (1 << 4) @@ -468,8 +426,6 @@ #define OMAP3430_ST_CORE_CLK_MASK (1 << 0) /* CM_IDLEST2_CKGEN */ -#define OMAP3430ES2_ST_USIM_CLK_SHIFT 2 -#define OMAP3430ES2_ST_USIM_CLK_MASK (1 << 2) #define OMAP3430ES2_ST_120M_CLK_SHIFT 1 #define OMAP3430ES2_ST_120M_CLK_MASK (1 << 1) #define OMAP3430ES2_ST_PERIPH2_CLK_SHIFT 0 @@ -493,12 +449,8 @@ #define OMAP3430_CORE_DPLL_MULT_MASK (0x7ff << 16) #define OMAP3430_CORE_DPLL_DIV_SHIFT 8 #define OMAP3430_CORE_DPLL_DIV_MASK (0x7f << 8) -#define OMAP3430_SOURCE_96M_SHIFT 6 -#define OMAP3430_SOURCE_96M_MASK (1 << 6) -#define OMAP3430_SOURCE_54M_SHIFT 5 -#define OMAP3430_SOURCE_54M_MASK (1 << 5) -#define OMAP3430_SOURCE_48M_SHIFT 3 -#define OMAP3430_SOURCE_48M_MASK (1 << 3) +#define OMAP3430_SOURCE_54M (1 << 5) +#define OMAP3430_SOURCE_48M (1 << 3) /* CM_CLKSEL2_PLL */ #define OMAP3430_PERIPH_DPLL_MULT_SHIFT 8 @@ -541,12 +493,7 @@ #define OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT 0 /* CM_IDLEST_DSS */ -#define OMAP3430ES2_ST_DSS_IDLE_SHIFT 1 -#define OMAP3430ES2_ST_DSS_IDLE_MASK (1 << 1) -#define OMAP3430ES2_ST_DSS_STDBY_SHIFT 0 -#define OMAP3430ES2_ST_DSS_STDBY_MASK (1 << 0) -#define OMAP3430ES1_ST_DSS_SHIFT 0 -#define OMAP3430ES1_ST_DSS_MASK (1 << 0) +#define OMAP3430_ST_DSS (1 << 0) /* CM_AUTOIDLE_DSS */ #define OMAP3430_AUTO_DSS (1 << 0) @@ -569,8 +516,6 @@ #define OMAP3430_CLKACTIVITY_DSS_MASK (1 << 0) /* CM_FCLKEN_CAM specific bits */ -#define OMAP3430_EN_CSI2 (1 << 1) -#define OMAP3430_EN_CSI2_SHIFT 1 /* CM_ICLKEN_CAM specific bits */ @@ -600,14 +545,10 @@ /* CM_ICLKEN_PER specific bits */ /* CM_IDLEST_PER */ -#define OMAP3430_ST_WDT3_SHIFT 12 -#define OMAP3430_ST_WDT3_MASK (1 << 12) -#define OMAP3430_ST_MCBSP4_SHIFT 2 -#define OMAP3430_ST_MCBSP4_MASK (1 << 2) -#define OMAP3430_ST_MCBSP3_SHIFT 1 -#define OMAP3430_ST_MCBSP3_MASK (1 << 1) -#define OMAP3430_ST_MCBSP2_SHIFT 0 -#define OMAP3430_ST_MCBSP2_MASK (1 << 0) +#define OMAP3430_ST_WDT3 (1 << 12) +#define OMAP3430_ST_MCBSP4 (1 << 2) +#define OMAP3430_ST_MCBSP3 (1 << 1) +#define OMAP3430_ST_MCBSP2 (1 << 0) /* CM_AUTOIDLE_PER */ #define OMAP3430_AUTO_GPIO6 (1 << 17) @@ -735,10 +676,6 @@ #define OMAP3430ES2_EN_USBHOST_MASK (1 << 0) /* CM_IDLEST_USBHOST */ -#define OMAP3430ES2_ST_USBHOST_IDLE_SHIFT 1 -#define OMAP3430ES2_ST_USBHOST_IDLE_MASK (1 << 1) -#define OMAP3430ES2_ST_USBHOST_STDBY_SHIFT 0 -#define OMAP3430ES2_ST_USBHOST_STDBY_MASK (1 << 0) /* CM_AUTOIDLE_USBHOST */ #define OMAP3430ES2_AUTO_USBHOST_SHIFT 0 diff --git a/trunk/arch/arm/mach-omap2/devices.c b/trunk/arch/arm/mach-omap2/devices.c index 8075f5868c38..9d7216ff6c9f 100644 --- a/trunk/arch/arm/mach-omap2/devices.c +++ b/trunk/arch/arm/mach-omap2/devices.c @@ -348,12 +348,11 @@ static void __init omap_hsmmc_reset(void) } dummy_pdev.id = i; - dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i); - iclk = clk_get(dev, "ick"); + iclk = clk_get(dev, "mmchs_ick"); if (iclk && clk_enable(iclk)) iclk = NULL; - fclk = clk_get(dev, "fck"); + fclk = clk_get(dev, "mmchs_fck"); if (fclk && clk_enable(fclk)) fclk = NULL; @@ -422,7 +421,6 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, int nr_controllers) { int i; - char *name; for (i = 0; i < nr_controllers; i++) { unsigned long base, size; @@ -452,14 +450,12 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data, continue; } - if (cpu_is_omap2420()) { + if (cpu_is_omap2420()) size = OMAP2420_MMC_SIZE; - name = "mmci-omap"; - } else { + else size = HSMMC_SIZE; - name = "mmci-omap-hs"; - } - omap_mmc_add(name, i, base, size, irq, mmc_data[i]); + + omap_mmc_add(i, base, size, irq, mmc_data[i]); }; } diff --git a/trunk/arch/arm/mach-omap2/id.c b/trunk/arch/arm/mach-omap2/id.c index 34b5914e0f8b..b0f8e7d62798 100644 --- a/trunk/arch/arm/mach-omap2/id.c +++ b/trunk/arch/arm/mach-omap2/id.c @@ -172,13 +172,9 @@ void __init omap34xx_check_revision(void) omap_revision = OMAP3430_REV_ES3_0; rev_name = "ES3.0"; break; - case 4: - omap_revision = OMAP3430_REV_ES3_1; - rev_name = "ES3.1"; - break; default: /* Use the latest known revision as default */ - omap_revision = OMAP3430_REV_ES3_1; + omap_revision = OMAP3430_REV_ES3_0; rev_name = "Unknown revision\n"; } } @@ -217,13 +213,8 @@ void __init omap2_check_revision(void) omap_chip.oc = CHIP_IS_OMAP3430; if (omap_rev() == OMAP3430_REV_ES1_0) omap_chip.oc |= CHIP_IS_OMAP3430ES1; - else if (omap_rev() >= OMAP3430_REV_ES2_0 && - omap_rev() <= OMAP3430_REV_ES2_1) + else if (omap_rev() > OMAP3430_REV_ES1_0) omap_chip.oc |= CHIP_IS_OMAP3430ES2; - else if (omap_rev() == OMAP3430_REV_ES3_0) - omap_chip.oc |= CHIP_IS_OMAP3430ES3_0; - else if (omap_rev() == OMAP3430_REV_ES3_1) - omap_chip.oc |= CHIP_IS_OMAP3430ES3_1; } else { pr_err("Uninitialized omap_chip, please fix!\n"); } diff --git a/trunk/arch/arm/mach-omap2/io.c b/trunk/arch/arm/mach-omap2/io.c index 916fcd3a2328..5ea64f926ed5 100644 --- a/trunk/arch/arm/mach-omap2/io.c +++ b/trunk/arch/arm/mach-omap2/io.c @@ -27,8 +27,8 @@ #include #include #include -#include -#include + +#include "memory.h" #include "clock.h" @@ -195,12 +195,12 @@ void __init omap2_map_common_io(void) omapfb_reserve_sdram(); } -void __init omap2_init_common_hw(struct omap_sdrc_params *sp) +void __init omap2_init_common_hw(void) { omap2_mux_init(); pwrdm_init(powerdomains_omap); clkdm_init(clockdomains_omap, clkdm_pwrdm_autodeps); omap2_clk_init(); - omap2_sdrc_init(sp); + omap2_init_memory(); gpmc_init(); } diff --git a/trunk/arch/arm/mach-omap2/irq.c b/trunk/arch/arm/mach-omap2/irq.c index 9ba20d985dda..636e2821af7d 100644 --- a/trunk/arch/arm/mach-omap2/irq.c +++ b/trunk/arch/arm/mach-omap2/irq.c @@ -134,7 +134,6 @@ static struct irq_chip omap_irq_chip = { .ack = omap_mask_ack_irq, .mask = omap_mask_irq, .unmask = omap_unmask_irq, - .disable = omap_mask_irq, }; static void __init omap_irq_bank_init_one(struct omap_irq_bank *bank) diff --git a/trunk/arch/arm/mach-omap2/mcbsp.c b/trunk/arch/arm/mach-omap2/mcbsp.c index a5c0f0435cd6..acdc709901cd 100644 --- a/trunk/arch/arm/mach-omap2/mcbsp.c +++ b/trunk/arch/arm/mach-omap2/mcbsp.c @@ -17,13 +17,113 @@ #include #include -#include #include #include #include #include #include +struct mcbsp_internal_clk { + struct clk clk; + struct clk **childs; + int n_childs; +}; + +#if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) +static void omap_mcbsp_clk_init(struct mcbsp_internal_clk *mclk) +{ + const char *clk_names[] = { "mcbsp_ick", "mcbsp_fck" }; + int i; + + mclk->n_childs = ARRAY_SIZE(clk_names); + mclk->childs = kzalloc(mclk->n_childs * sizeof(struct clk *), + GFP_KERNEL); + + for (i = 0; i < mclk->n_childs; i++) { + /* We fake a platform device to get correct device id */ + struct platform_device pdev; + + pdev.dev.bus = &platform_bus_type; + pdev.id = mclk->clk.id; + mclk->childs[i] = clk_get(&pdev.dev, clk_names[i]); + if (IS_ERR(mclk->childs[i])) + printk(KERN_ERR "Could not get clock %s (%d).\n", + clk_names[i], mclk->clk.id); + } +} + +static int omap_mcbsp_clk_enable(struct clk *clk) +{ + struct mcbsp_internal_clk *mclk = container_of(clk, + struct mcbsp_internal_clk, clk); + int i; + + for (i = 0; i < mclk->n_childs; i++) + clk_enable(mclk->childs[i]); + return 0; +} + +static void omap_mcbsp_clk_disable(struct clk *clk) +{ + struct mcbsp_internal_clk *mclk = container_of(clk, + struct mcbsp_internal_clk, clk); + int i; + + for (i = 0; i < mclk->n_childs; i++) + clk_disable(mclk->childs[i]); +} + +static struct mcbsp_internal_clk omap_mcbsp_clks[] = { + { + .clk = { + .name = "mcbsp_clk", + .id = 1, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, + { + .clk = { + .name = "mcbsp_clk", + .id = 2, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, + { + .clk = { + .name = "mcbsp_clk", + .id = 3, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, + { + .clk = { + .name = "mcbsp_clk", + .id = 4, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, + { + .clk = { + .name = "mcbsp_clk", + .id = 5, + .enable = omap_mcbsp_clk_enable, + .disable = omap_mcbsp_clk_disable, + }, + }, +}; + +#define omap_mcbsp_clks_size ARRAY_SIZE(omap_mcbsp_clks) +#else +#define omap_mcbsp_clks_size 0 +static struct mcbsp_internal_clk __initdata *omap_mcbsp_clks; +static inline void omap_mcbsp_clk_init(struct clk *clk) +{ } +#endif + static void omap2_mcbsp2_mux_setup(void) { omap_cfg_reg(Y15_24XX_MCBSP2_CLKX); @@ -55,6 +155,7 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP1_IRQ_RX, .tx_irq = INT_24XX_MCBSP1_IRQ_TX, .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", }, { .phys_base = OMAP24XX_MCBSP2_BASE, @@ -63,6 +164,7 @@ static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP2_IRQ_RX, .tx_irq = INT_24XX_MCBSP2_IRQ_TX, .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", }, }; #define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) @@ -80,6 +182,7 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP1_IRQ_RX, .tx_irq = INT_24XX_MCBSP1_IRQ_TX, .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", }, { .phys_base = OMAP24XX_MCBSP2_BASE, @@ -88,6 +191,7 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP2_IRQ_RX, .tx_irq = INT_24XX_MCBSP2_IRQ_TX, .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", }, { .phys_base = OMAP2430_MCBSP3_BASE, @@ -96,6 +200,7 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP3_IRQ_RX, .tx_irq = INT_24XX_MCBSP3_IRQ_TX, .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", }, { .phys_base = OMAP2430_MCBSP4_BASE, @@ -104,6 +209,7 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP4_IRQ_RX, .tx_irq = INT_24XX_MCBSP4_IRQ_TX, .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", }, { .phys_base = OMAP2430_MCBSP5_BASE, @@ -112,6 +218,7 @@ static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP5_IRQ_RX, .tx_irq = INT_24XX_MCBSP5_IRQ_TX, .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", }, }; #define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) @@ -129,6 +236,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP1_IRQ_RX, .tx_irq = INT_24XX_MCBSP1_IRQ_TX, .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", }, { .phys_base = OMAP34XX_MCBSP2_BASE, @@ -137,6 +245,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP2_IRQ_RX, .tx_irq = INT_24XX_MCBSP2_IRQ_TX, .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", }, { .phys_base = OMAP34XX_MCBSP3_BASE, @@ -145,6 +254,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP3_IRQ_RX, .tx_irq = INT_24XX_MCBSP3_IRQ_TX, .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", }, { .phys_base = OMAP34XX_MCBSP4_BASE, @@ -153,6 +263,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP4_IRQ_RX, .tx_irq = INT_24XX_MCBSP4_IRQ_TX, .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", }, { .phys_base = OMAP34XX_MCBSP5_BASE, @@ -161,6 +272,7 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { .rx_irq = INT_24XX_MCBSP5_IRQ_RX, .tx_irq = INT_24XX_MCBSP5_IRQ_TX, .ops = &omap2_mcbsp_ops, + .clk_name = "mcbsp_clk", }, }; #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) @@ -171,6 +283,14 @@ static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { static int __init omap2_mcbsp_init(void) { + int i; + + for (i = 0; i < omap_mcbsp_clks_size; i++) { + /* Once we call clk_get inside init, we do not register it */ + omap_mcbsp_clk_init(&omap_mcbsp_clks[i]); + clk_register(&omap_mcbsp_clks[i].clk); + } + if (cpu_is_omap2420()) omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; if (cpu_is_omap2430()) diff --git a/trunk/arch/arm/mach-omap2/sdrc2xxx.c b/trunk/arch/arm/mach-omap2/memory.c similarity index 67% rename from trunk/arch/arm/mach-omap2/sdrc2xxx.c rename to trunk/arch/arm/mach-omap2/memory.c index 0afdad5ae9fb..882c70224292 100644 --- a/trunk/arch/arm/mach-omap2/sdrc2xxx.c +++ b/trunk/arch/arm/mach-omap2/memory.c @@ -1,14 +1,13 @@ /* - * linux/arch/arm/mach-omap2/sdrc2xxx.c + * linux/arch/arm/mach-omap2/memory.c * - * SDRAM timing related functions for OMAP2xxx + * Memory timing related functions for OMAP24XX * - * Copyright (C) 2005, 2008 Texas Instruments Inc. - * Copyright (C) 2005, 2008 Nokia Corporation + * Copyright (C) 2005 Texas Instruments Inc. + * Richard Woodruff * + * Copyright (C) 2005 Nokia Corporation * Tony Lindgren - * Paul Walmsley - * Richard Woodruff * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -29,31 +28,27 @@ #include #include "prm.h" -#include "clock.h" -#include -#include "sdrc.h" -/* Memory timing, DLL mode flags */ -#define M_DDR 1 -#define M_LOCK_CTRL (1 << 2) -#define M_UNLOCK 0 -#define M_LOCK 1 +#include "memory.h" +#include "sdrc.h" +void __iomem *omap2_sdrc_base; +void __iomem *omap2_sms_base; static struct memory_timings mem_timings; static u32 curr_perf_level = CORE_CLK_SRC_DPLL_X2; -static u32 omap2xxx_sdrc_get_slow_dll_ctrl(void) +u32 omap2_memory_get_slow_dll_ctrl(void) { return mem_timings.slow_dll_ctrl; } -static u32 omap2xxx_sdrc_get_fast_dll_ctrl(void) +u32 omap2_memory_get_fast_dll_ctrl(void) { return mem_timings.fast_dll_ctrl; } -static u32 omap2xxx_sdrc_get_type(void) +u32 omap2_memory_get_type(void) { return mem_timings.m_type; } @@ -62,7 +57,7 @@ static u32 omap2xxx_sdrc_get_type(void) * Check the DLL lock state, and return tue if running in unlock mode. * This is needed to compensate for the shifted DLL value in unlock mode. */ -u32 omap2xxx_sdrc_dll_is_unlocked(void) +u32 omap2_dll_force_needed(void) { /* dlla and dllb are a set */ u32 dll_state = sdrc_read_reg(SDRC_DLLA_CTRL); @@ -77,10 +72,8 @@ u32 omap2xxx_sdrc_dll_is_unlocked(void) * 'level' is the value to store to CM_CLKSEL2_PLL.CORE_CLK_SRC. * Practical values are CORE_CLK_SRC_DPLL (for CORE_CLK = DPLL_CLK) or * CORE_CLK_SRC_DPLL_X2 (for CORE_CLK = * DPLL_CLK * 2) - * - * Used by the clock framework during CORE DPLL changes */ -u32 omap2xxx_sdrc_reprogram(u32 level, u32 force) +u32 omap2_reprogram_sdrc(u32 level, u32 force) { u32 dll_ctrl, m_type; u32 prev = curr_perf_level; @@ -89,14 +82,15 @@ u32 omap2xxx_sdrc_reprogram(u32 level, u32 force) if ((curr_perf_level == level) && !force) return prev; - if (level == CORE_CLK_SRC_DPLL) - dll_ctrl = omap2xxx_sdrc_get_slow_dll_ctrl(); - else if (level == CORE_CLK_SRC_DPLL_X2) - dll_ctrl = omap2xxx_sdrc_get_fast_dll_ctrl(); - else + if (level == CORE_CLK_SRC_DPLL) { + dll_ctrl = omap2_memory_get_slow_dll_ctrl(); + } else if (level == CORE_CLK_SRC_DPLL_X2) { + dll_ctrl = omap2_memory_get_fast_dll_ctrl(); + } else { return prev; + } - m_type = omap2xxx_sdrc_get_type(); + m_type = omap2_memory_get_type(); local_irq_save(flags); __raw_writel(0xffff, OMAP24XX_PRCM_VOLTSETUP); @@ -107,14 +101,23 @@ u32 omap2xxx_sdrc_reprogram(u32 level, u32 force) return prev; } -/* Used by the clock framework during CORE DPLL changes */ -void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode) +#if !defined(CONFIG_ARCH_OMAP2) +void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, + u32 base_cs, u32 force_unlock) +{ +} +void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, + u32 mem_type) +{ +} +#endif + +void omap2_init_memory_params(u32 force_lock_to_unlock_mode) { unsigned long dll_cnt; u32 fast_dll = 0; - /* DDR = 1, SDR = 0 */ - mem_timings.m_type = !((sdrc_read_reg(SDRC_MR_0) & 0x3) == 0x1); + mem_timings.m_type = !((sdrc_read_reg(SDRC_MR_0) & 0x3) == 0x1); /* DDR = 1, SDR = 0 */ /* 2422 es2.05 and beyond has a single SIP DDR instead of 2 like others. * In the case of 2422, its ok to use CS1 instead of CS0. @@ -161,3 +164,28 @@ void omap2xxx_sdrc_init_params(u32 force_lock_to_unlock_mode) /* 90 degree phase for anything below 133Mhz + disable DLL filter */ mem_timings.slow_dll_ctrl |= ((1 << 1) | (3 << 8)); } + +void __init omap2_set_globals_memory(struct omap_globals *omap2_globals) +{ + omap2_sdrc_base = omap2_globals->sdrc; + omap2_sms_base = omap2_globals->sms; +} + +/* turn on smart idle modes for SDRAM scheduler and controller */ +void __init omap2_init_memory(void) +{ + u32 l; + + if (!cpu_is_omap2420()) + return; + + l = sms_read_reg(SMS_SYSCONFIG); + l &= ~(0x3 << 3); + l |= (0x2 << 3); + sms_write_reg(l, SMS_SYSCONFIG); + + l = sdrc_read_reg(SDRC_SYSCONFIG); + l &= ~(0x3 << 3); + l |= (0x2 << 3); + sdrc_write_reg(l, SDRC_SYSCONFIG); +} diff --git a/trunk/arch/arm/mach-omap2/memory.h b/trunk/arch/arm/mach-omap2/memory.h new file mode 100644 index 000000000000..bb3db80a7c46 --- /dev/null +++ b/trunk/arch/arm/mach-omap2/memory.h @@ -0,0 +1,43 @@ +/* + * linux/arch/arm/mach-omap2/memory.h + * + * Interface for memory timing related functions for OMAP24XX + * + * Copyright (C) 2005 Texas Instruments Inc. + * Richard Woodruff + * + * Copyright (C) 2005 Nokia Corporation + * Tony Lindgren + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef ARCH_ARM_MACH_OMAP2_MEMORY_H +#define ARCH_ARM_MACH_OMAP2_MEMORY_H + +/* Memory timings */ +#define M_DDR 1 +#define M_LOCK_CTRL (1 << 2) +#define M_UNLOCK 0 +#define M_LOCK 1 + +struct memory_timings { + u32 m_type; /* ddr = 1, sdr = 0 */ + u32 dll_mode; /* use lock mode = 1, unlock mode = 0 */ + u32 slow_dll_ctrl; /* unlock mode, dll value for slow speed */ + u32 fast_dll_ctrl; /* unlock mode, dll value for fast speed */ + u32 base_cs; /* base chip select to use for calculations */ +}; + +extern void omap2_init_memory_params(u32 force_lock_to_unlock_mode); +extern u32 omap2_memory_get_slow_dll_ctrl(void); +extern u32 omap2_memory_get_fast_dll_ctrl(void); +extern u32 omap2_memory_get_type(void); +u32 omap2_dll_force_needed(void); +u32 omap2_reprogram_sdrc(u32 level, u32 force); +void __init omap2_init_memory(void); +void __init gpmc_init(void); + +#endif diff --git a/trunk/arch/arm/mach-omap2/pm.c b/trunk/arch/arm/mach-omap2/pm.c index ea8ceaed09cb..55361c16c9d9 100644 --- a/trunk/arch/arm/mach-omap2/pm.c +++ b/trunk/arch/arm/mach-omap2/pm.c @@ -103,7 +103,7 @@ static struct platform_suspend_ops omap_pm_ops = { .valid = suspend_valid_only_mem, }; -static int __init omap2_pm_init(void) +int __init omap2_pm_init(void) { return 0; } diff --git a/trunk/arch/arm/mach-omap2/powerdomains.h b/trunk/arch/arm/mach-omap2/powerdomains.h index 691470ea4c6a..1e151faebbd3 100644 --- a/trunk/arch/arm/mach-omap2/powerdomains.h +++ b/trunk/arch/arm/mach-omap2/powerdomains.h @@ -171,19 +171,13 @@ static struct powerdomain *powerdomains_omap[] __initdata = { &iva2_pwrdm, &mpu_34xx_pwrdm, &neon_pwrdm, - &core_34xx_pre_es3_1_pwrdm, - &core_34xx_es3_1_pwrdm, + &core_34xx_pwrdm, &cam_pwrdm, &dss_pwrdm, &per_pwrdm, &emu_pwrdm, &sgx_pwrdm, &usbhost_pwrdm, - &dpll1_pwrdm, - &dpll2_pwrdm, - &dpll3_pwrdm, - &dpll4_pwrdm, - &dpll5_pwrdm, #endif NULL diff --git a/trunk/arch/arm/mach-omap2/powerdomains34xx.h b/trunk/arch/arm/mach-omap2/powerdomains34xx.h index 4dcf94b800ab..f573f7108398 100644 --- a/trunk/arch/arm/mach-omap2/powerdomains34xx.h +++ b/trunk/arch/arm/mach-omap2/powerdomains34xx.h @@ -200,33 +200,12 @@ static struct powerdomain mpu_34xx_pwrdm = { }; /* No wkdeps or sleepdeps for 34xx core apparently */ -static struct powerdomain core_34xx_pre_es3_1_pwrdm = { +static struct powerdomain core_34xx_pwrdm = { .name = "core_pwrdm", .prcm_offs = CORE_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1 | - CHIP_IS_OMAP3430ES2 | - CHIP_IS_OMAP3430ES3_0), - .pwrsts = PWRSTS_OFF_RET_ON, - .dep_bit = OMAP3430_EN_CORE_SHIFT, - .banks = 2, - .pwrsts_mem_ret = { - [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */ - [1] = PWRSTS_OFF_RET, /* MEM2RETSTATE */ - }, - .pwrsts_mem_on = { - [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ - [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ - }, -}; - -/* No wkdeps or sleepdeps for 34xx core apparently */ -static struct powerdomain core_34xx_es3_1_pwrdm = { - .name = "core_pwrdm", - .prcm_offs = CORE_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES3_1), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), .pwrsts = PWRSTS_OFF_RET_ON, .dep_bit = OMAP3430_EN_CORE_SHIFT, - .flags = PWRDM_HAS_HDWR_SAR, /* for USBTLL only */ .banks = 2, .pwrsts_mem_ret = { [0] = PWRSTS_OFF_RET, /* MEM1RETSTATE */ @@ -257,19 +236,14 @@ static struct powerdomain dss_pwrdm = { }, }; -/* - * Although the 34XX TRM Rev K Table 4-371 notes that retention is a - * possible SGX powerstate, the SGX device itself does not support - * retention. - */ static struct powerdomain sgx_pwrdm = { .name = "sgx_pwrdm", .prcm_offs = OMAP3430ES2_SGX_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), .wkdep_srcs = gfx_sgx_wkdeps, .sleepdep_srcs = cam_gfx_sleepdeps, /* XXX This is accurate for 3430 SGX, but what about GFX? */ - .pwrsts = PWRSTS_OFF_ON, + .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRDM_POWER_RET, .banks = 1, .pwrsts_mem_ret = { @@ -333,12 +307,11 @@ static struct powerdomain neon_pwrdm = { static struct powerdomain usbhost_pwrdm = { .name = "usbhost_pwrdm", .prcm_offs = OMAP3430ES2_USBHOST_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2), .wkdep_srcs = per_usbhost_wkdeps, .sleepdep_srcs = dss_per_usbhost_sleepdeps, .pwrsts = PWRSTS_OFF_RET_ON, .pwrsts_logic_ret = PWRDM_POWER_RET, - .flags = PWRDM_HAS_HDWR_SAR, /* for USBHOST ctrlr only */ .banks = 1, .pwrsts_mem_ret = { [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ @@ -348,37 +321,6 @@ static struct powerdomain usbhost_pwrdm = { }, }; -static struct powerdomain dpll1_pwrdm = { - .name = "dpll1_pwrdm", - .prcm_offs = MPU_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct powerdomain dpll2_pwrdm = { - .name = "dpll2_pwrdm", - .prcm_offs = OMAP3430_IVA2_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct powerdomain dpll3_pwrdm = { - .name = "dpll3_pwrdm", - .prcm_offs = PLL_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct powerdomain dpll4_pwrdm = { - .name = "dpll4_pwrdm", - .prcm_offs = PLL_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), -}; - -static struct powerdomain dpll5_pwrdm = { - .name = "dpll5_pwrdm", - .prcm_offs = PLL_MOD, - .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), -}; - - #endif /* CONFIG_ARCH_OMAP34XX */ diff --git a/trunk/arch/arm/mach-omap2/prcm-common.h b/trunk/arch/arm/mach-omap2/prcm-common.h index 812d50ee495d..4a32822ff3fc 100644 --- a/trunk/arch/arm/mach-omap2/prcm-common.h +++ b/trunk/arch/arm/mach-omap2/prcm-common.h @@ -113,58 +113,33 @@ #define OMAP2430_EN_USBHS (1 << 6) /* CM_IDLEST1_CORE, PM_WKST1_CORE shared bits */ -#define OMAP2420_ST_MMC_SHIFT 26 -#define OMAP2420_ST_MMC_MASK (1 << 26) -#define OMAP24XX_ST_UART2_SHIFT 22 -#define OMAP24XX_ST_UART2_MASK (1 << 22) -#define OMAP24XX_ST_UART1_SHIFT 21 -#define OMAP24XX_ST_UART1_MASK (1 << 21) -#define OMAP24XX_ST_MCSPI2_SHIFT 18 -#define OMAP24XX_ST_MCSPI2_MASK (1 << 18) -#define OMAP24XX_ST_MCSPI1_SHIFT 17 -#define OMAP24XX_ST_MCSPI1_MASK (1 << 17) -#define OMAP24XX_ST_GPT12_SHIFT 14 -#define OMAP24XX_ST_GPT12_MASK (1 << 14) -#define OMAP24XX_ST_GPT11_SHIFT 13 -#define OMAP24XX_ST_GPT11_MASK (1 << 13) -#define OMAP24XX_ST_GPT10_SHIFT 12 -#define OMAP24XX_ST_GPT10_MASK (1 << 12) -#define OMAP24XX_ST_GPT9_SHIFT 11 -#define OMAP24XX_ST_GPT9_MASK (1 << 11) -#define OMAP24XX_ST_GPT8_SHIFT 10 -#define OMAP24XX_ST_GPT8_MASK (1 << 10) -#define OMAP24XX_ST_GPT7_SHIFT 9 -#define OMAP24XX_ST_GPT7_MASK (1 << 9) -#define OMAP24XX_ST_GPT6_SHIFT 8 -#define OMAP24XX_ST_GPT6_MASK (1 << 8) -#define OMAP24XX_ST_GPT5_SHIFT 7 -#define OMAP24XX_ST_GPT5_MASK (1 << 7) -#define OMAP24XX_ST_GPT4_SHIFT 6 -#define OMAP24XX_ST_GPT4_MASK (1 << 6) -#define OMAP24XX_ST_GPT3_SHIFT 5 -#define OMAP24XX_ST_GPT3_MASK (1 << 5) -#define OMAP24XX_ST_GPT2_SHIFT 4 -#define OMAP24XX_ST_GPT2_MASK (1 << 4) -#define OMAP2420_ST_VLYNQ_SHIFT 3 -#define OMAP2420_ST_VLYNQ_MASK (1 << 3) +#define OMAP2420_ST_MMC (1 << 26) +#define OMAP24XX_ST_UART2 (1 << 22) +#define OMAP24XX_ST_UART1 (1 << 21) +#define OMAP24XX_ST_MCSPI2 (1 << 18) +#define OMAP24XX_ST_MCSPI1 (1 << 17) +#define OMAP24XX_ST_GPT12 (1 << 14) +#define OMAP24XX_ST_GPT11 (1 << 13) +#define OMAP24XX_ST_GPT10 (1 << 12) +#define OMAP24XX_ST_GPT9 (1 << 11) +#define OMAP24XX_ST_GPT8 (1 << 10) +#define OMAP24XX_ST_GPT7 (1 << 9) +#define OMAP24XX_ST_GPT6 (1 << 8) +#define OMAP24XX_ST_GPT5 (1 << 7) +#define OMAP24XX_ST_GPT4 (1 << 6) +#define OMAP24XX_ST_GPT3 (1 << 5) +#define OMAP24XX_ST_GPT2 (1 << 4) +#define OMAP2420_ST_VLYNQ (1 << 3) /* CM_IDLEST2_CORE, PM_WKST2_CORE shared bits */ -#define OMAP2430_ST_MDM_INTC_SHIFT 11 -#define OMAP2430_ST_MDM_INTC_MASK (1 << 11) -#define OMAP2430_ST_GPIO5_SHIFT 10 -#define OMAP2430_ST_GPIO5_MASK (1 << 10) -#define OMAP2430_ST_MCSPI3_SHIFT 9 -#define OMAP2430_ST_MCSPI3_MASK (1 << 9) -#define OMAP2430_ST_MMCHS2_SHIFT 8 -#define OMAP2430_ST_MMCHS2_MASK (1 << 8) -#define OMAP2430_ST_MMCHS1_SHIFT 7 -#define OMAP2430_ST_MMCHS1_MASK (1 << 7) -#define OMAP2430_ST_USBHS_SHIFT 6 -#define OMAP2430_ST_USBHS_MASK (1 << 6) -#define OMAP24XX_ST_UART3_SHIFT 2 -#define OMAP24XX_ST_UART3_MASK (1 << 2) -#define OMAP24XX_ST_USB_SHIFT 0 -#define OMAP24XX_ST_USB_MASK (1 << 0) +#define OMAP2430_ST_MDM_INTC (1 << 11) +#define OMAP2430_ST_GPIO5 (1 << 10) +#define OMAP2430_ST_MCSPI3 (1 << 9) +#define OMAP2430_ST_MMCHS2 (1 << 8) +#define OMAP2430_ST_MMCHS1 (1 << 7) +#define OMAP2430_ST_USBHS (1 << 6) +#define OMAP24XX_ST_UART3 (1 << 2) +#define OMAP24XX_ST_USB (1 << 0) /* CM_FCLKEN_WKUP, CM_ICLKEN_WKUP, PM_WKEN_WKUP shared bits */ #define OMAP24XX_EN_GPIOS_SHIFT 2 @@ -173,13 +148,11 @@ #define OMAP24XX_EN_GPT1 (1 << 0) /* PM_WKST_WKUP, CM_IDLEST_WKUP shared bits */ -#define OMAP24XX_ST_GPIOS_SHIFT (1 << 2) -#define OMAP24XX_ST_GPIOS_MASK 2 -#define OMAP24XX_ST_GPT1_SHIFT (1 << 0) -#define OMAP24XX_ST_GPT1_MASK 0 +#define OMAP24XX_ST_GPIOS (1 << 2) +#define OMAP24XX_ST_GPT1 (1 << 0) /* CM_IDLEST_MDM and PM_WKST_MDM shared bits */ -#define OMAP2430_ST_MDM_SHIFT (1 << 0) +#define OMAP2430_ST_MDM (1 << 0) /* 3430 register bits shared between CM & PRM registers */ @@ -232,46 +205,24 @@ #define OMAP3430_EN_HSOTGUSB_SHIFT 4 /* PM_WKST1_CORE, CM_IDLEST1_CORE shared bits */ -#define OMAP3430_ST_MMC2_SHIFT 25 -#define OMAP3430_ST_MMC2_MASK (1 << 25) -#define OMAP3430_ST_MMC1_SHIFT 24 -#define OMAP3430_ST_MMC1_MASK (1 << 24) -#define OMAP3430_ST_MCSPI4_SHIFT 21 -#define OMAP3430_ST_MCSPI4_MASK (1 << 21) -#define OMAP3430_ST_MCSPI3_SHIFT 20 -#define OMAP3430_ST_MCSPI3_MASK (1 << 20) -#define OMAP3430_ST_MCSPI2_SHIFT 19 -#define OMAP3430_ST_MCSPI2_MASK (1 << 19) -#define OMAP3430_ST_MCSPI1_SHIFT 18 -#define OMAP3430_ST_MCSPI1_MASK (1 << 18) -#define OMAP3430_ST_I2C3_SHIFT 17 -#define OMAP3430_ST_I2C3_MASK (1 << 17) -#define OMAP3430_ST_I2C2_SHIFT 16 -#define OMAP3430_ST_I2C2_MASK (1 << 16) -#define OMAP3430_ST_I2C1_SHIFT 15 -#define OMAP3430_ST_I2C1_MASK (1 << 15) -#define OMAP3430_ST_UART2_SHIFT 14 -#define OMAP3430_ST_UART2_MASK (1 << 14) -#define OMAP3430_ST_UART1_SHIFT 13 -#define OMAP3430_ST_UART1_MASK (1 << 13) -#define OMAP3430_ST_GPT11_SHIFT 12 -#define OMAP3430_ST_GPT11_MASK (1 << 12) -#define OMAP3430_ST_GPT10_SHIFT 11 -#define OMAP3430_ST_GPT10_MASK (1 << 11) -#define OMAP3430_ST_MCBSP5_SHIFT 10 -#define OMAP3430_ST_MCBSP5_MASK (1 << 10) -#define OMAP3430_ST_MCBSP1_SHIFT 9 -#define OMAP3430_ST_MCBSP1_MASK (1 << 9) -#define OMAP3430ES1_ST_FSHOSTUSB_SHIFT 5 -#define OMAP3430ES1_ST_FSHOSTUSB_MASK (1 << 5) -#define OMAP3430ES1_ST_HSOTGUSB_SHIFT 4 -#define OMAP3430ES1_ST_HSOTGUSB_MASK (1 << 4) -#define OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT 5 -#define OMAP3430ES2_ST_HSOTGUSB_IDLE_MASK (1 << 5) -#define OMAP3430ES2_ST_HSOTGUSB_STDBY_SHIFT 4 -#define OMAP3430ES2_ST_HSOTGUSB_STDBY_MASK (1 << 4) -#define OMAP3430_ST_D2D_SHIFT 3 -#define OMAP3430_ST_D2D_MASK (1 << 3) +#define OMAP3430_ST_MMC2 (1 << 25) +#define OMAP3430_ST_MMC1 (1 << 24) +#define OMAP3430_ST_MCSPI4 (1 << 21) +#define OMAP3430_ST_MCSPI3 (1 << 20) +#define OMAP3430_ST_MCSPI2 (1 << 19) +#define OMAP3430_ST_MCSPI1 (1 << 18) +#define OMAP3430_ST_I2C3 (1 << 17) +#define OMAP3430_ST_I2C2 (1 << 16) +#define OMAP3430_ST_I2C1 (1 << 15) +#define OMAP3430_ST_UART2 (1 << 14) +#define OMAP3430_ST_UART1 (1 << 13) +#define OMAP3430_ST_GPT11 (1 << 12) +#define OMAP3430_ST_GPT10 (1 << 11) +#define OMAP3430_ST_MCBSP5 (1 << 10) +#define OMAP3430_ST_MCBSP1 (1 << 9) +#define OMAP3430_ST_FSHOSTUSB (1 << 5) +#define OMAP3430_ST_HSOTGUSB (1 << 4) +#define OMAP3430_ST_D2D (1 << 3) /* CM_FCLKEN_WKUP, CM_ICLKEN_WKUP, PM_WKEN_WKUP shared bits */ #define OMAP3430_EN_GPIO1 (1 << 3) @@ -290,16 +241,11 @@ #define OMAP3430_EN_GPT12_SHIFT 1 /* CM_IDLEST_WKUP, PM_WKST_WKUP shared bits */ -#define OMAP3430_ST_SR2_SHIFT 7 -#define OMAP3430_ST_SR2_MASK (1 << 7) -#define OMAP3430_ST_SR1_SHIFT 6 -#define OMAP3430_ST_SR1_MASK (1 << 6) -#define OMAP3430_ST_GPIO1_SHIFT 3 -#define OMAP3430_ST_GPIO1_MASK (1 << 3) -#define OMAP3430_ST_GPT12_SHIFT 1 -#define OMAP3430_ST_GPT12_MASK (1 << 1) -#define OMAP3430_ST_GPT1_SHIFT 0 -#define OMAP3430_ST_GPT1_MASK (1 << 0) +#define OMAP3430_ST_SR2 (1 << 7) +#define OMAP3430_ST_SR1 (1 << 6) +#define OMAP3430_ST_GPIO1 (1 << 3) +#define OMAP3430_ST_GPT12 (1 << 1) +#define OMAP3430_ST_GPT1 (1 << 0) /* * CM_SLEEPDEP_GFX, CM_SLEEPDEP_DSS, CM_SLEEPDEP_CAM, @@ -350,34 +296,20 @@ #define OMAP3430_EN_MCBSP2_SHIFT 0 /* CM_IDLEST_PER, PM_WKST_PER shared bits */ -#define OMAP3430_ST_GPIO6_SHIFT 17 -#define OMAP3430_ST_GPIO6_MASK (1 << 17) -#define OMAP3430_ST_GPIO5_SHIFT 16 -#define OMAP3430_ST_GPIO5_MASK (1 << 16) -#define OMAP3430_ST_GPIO4_SHIFT 15 -#define OMAP3430_ST_GPIO4_MASK (1 << 15) -#define OMAP3430_ST_GPIO3_SHIFT 14 -#define OMAP3430_ST_GPIO3_MASK (1 << 14) -#define OMAP3430_ST_GPIO2_SHIFT 13 -#define OMAP3430_ST_GPIO2_MASK (1 << 13) -#define OMAP3430_ST_UART3_SHIFT 11 -#define OMAP3430_ST_UART3_MASK (1 << 11) -#define OMAP3430_ST_GPT9_SHIFT 10 -#define OMAP3430_ST_GPT9_MASK (1 << 10) -#define OMAP3430_ST_GPT8_SHIFT 9 -#define OMAP3430_ST_GPT8_MASK (1 << 9) -#define OMAP3430_ST_GPT7_SHIFT 8 -#define OMAP3430_ST_GPT7_MASK (1 << 8) -#define OMAP3430_ST_GPT6_SHIFT 7 -#define OMAP3430_ST_GPT6_MASK (1 << 7) -#define OMAP3430_ST_GPT5_SHIFT 6 -#define OMAP3430_ST_GPT5_MASK (1 << 6) -#define OMAP3430_ST_GPT4_SHIFT 5 -#define OMAP3430_ST_GPT4_MASK (1 << 5) -#define OMAP3430_ST_GPT3_SHIFT 4 -#define OMAP3430_ST_GPT3_MASK (1 << 4) -#define OMAP3430_ST_GPT2_SHIFT 3 -#define OMAP3430_ST_GPT2_MASK (1 << 3) +#define OMAP3430_ST_GPIO6 (1 << 17) +#define OMAP3430_ST_GPIO5 (1 << 16) +#define OMAP3430_ST_GPIO4 (1 << 15) +#define OMAP3430_ST_GPIO3 (1 << 14) +#define OMAP3430_ST_GPIO2 (1 << 13) +#define OMAP3430_ST_UART3 (1 << 11) +#define OMAP3430_ST_GPT9 (1 << 10) +#define OMAP3430_ST_GPT8 (1 << 9) +#define OMAP3430_ST_GPT7 (1 << 8) +#define OMAP3430_ST_GPT6 (1 << 7) +#define OMAP3430_ST_GPT5 (1 << 6) +#define OMAP3430_ST_GPT4 (1 << 5) +#define OMAP3430_ST_GPT3 (1 << 4) +#define OMAP3430_ST_GPT2 (1 << 3) /* CM_SLEEPDEP_PER, PM_WKDEP_IVA2, PM_WKDEP_MPU, PM_WKDEP_PER shared bits */ #define OMAP3430_EN_CORE_SHIFT 0 diff --git a/trunk/arch/arm/mach-omap2/prm-regbits-34xx.h b/trunk/arch/arm/mach-omap2/prm-regbits-34xx.h index c6a7940f4287..5b5ecfe6c999 100644 --- a/trunk/arch/arm/mach-omap2/prm-regbits-34xx.h +++ b/trunk/arch/arm/mach-omap2/prm-regbits-34xx.h @@ -366,7 +366,6 @@ /* PM_WKEN_WKUP specific bits */ #define OMAP3430_EN_IO (1 << 8) -#define OMAP3430_EN_GPIO1 (1 << 3) /* PM_MPUGRPSEL_WKUP specific bits */ @@ -453,14 +452,6 @@ #define OMAP3430_CMDRA0_MASK (0xff << 0) /* PRM_VC_CMD_VAL_0 specific bits */ -#define OMAP3430_VC_CMD_ON_SHIFT 24 -#define OMAP3430_VC_CMD_ON_MASK (0xFF << 24) -#define OMAP3430_VC_CMD_ONLP_SHIFT 16 -#define OMAP3430_VC_CMD_ONLP_MASK (0xFF << 16) -#define OMAP3430_VC_CMD_RET_SHIFT 8 -#define OMAP3430_VC_CMD_RET_MASK (0xFF << 8) -#define OMAP3430_VC_CMD_OFF_SHIFT 0 -#define OMAP3430_VC_CMD_OFF_MASK (0xFF << 0) /* PRM_VC_CMD_VAL_1 specific bits */ diff --git a/trunk/arch/arm/mach-omap2/prm.h b/trunk/arch/arm/mach-omap2/prm.h index 826d326b8062..e4dc4b17881d 100644 --- a/trunk/arch/arm/mach-omap2/prm.h +++ b/trunk/arch/arm/mach-omap2/prm.h @@ -141,19 +141,6 @@ #define PM_PWSTCTRL 0x00e0 #define PM_PWSTST 0x00e4 -/* Omap2 specific registers */ -#define OMAP24XX_PM_WKEN2 0x00a4 -#define OMAP24XX_PM_WKST2 0x00b4 - -#define OMAP24XX_PRCM_IRQSTATUS_DSP 0x00f0 /* IVA mod */ -#define OMAP24XX_PRCM_IRQENABLE_DSP 0x00f4 /* IVA mod */ -#define OMAP24XX_PRCM_IRQSTATUS_IVA 0x00f8 -#define OMAP24XX_PRCM_IRQENABLE_IVA 0x00fc - -/* Omap3 specific registers */ -#define OMAP3430ES2_PM_WKEN3 0x00f0 -#define OMAP3430ES2_PM_WKST3 0x00b8 - #define OMAP3430_PM_MPUGRPSEL 0x00a4 #define OMAP3430_PM_MPUGRPSEL1 OMAP3430_PM_MPUGRPSEL @@ -166,6 +153,16 @@ #define OMAP3430_PRM_IRQENABLE_IVA2 0x00fc +/* Architecture-specific registers */ + +#define OMAP24XX_PM_WKEN2 0x00a4 +#define OMAP24XX_PM_WKST2 0x00b4 + +#define OMAP24XX_PRCM_IRQSTATUS_DSP 0x00f0 /* IVA mod */ +#define OMAP24XX_PRCM_IRQENABLE_DSP 0x00f4 /* IVA mod */ +#define OMAP24XX_PRCM_IRQSTATUS_IVA 0x00f8 +#define OMAP24XX_PRCM_IRQENABLE_IVA 0x00fc + #ifndef __ASSEMBLER__ /* Power/reset management domain register get/set */ @@ -231,6 +228,7 @@ static inline u32 prm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) #define OMAP_RSTTIME1_SHIFT 0 #define OMAP_RSTTIME1_MASK (0xff << 0) + /* PRM_RSTCTRL */ /* Named RM_RSTCTRL_WKUP on the 24xx */ /* 2420 calls RST_DPLL3 'RST_DPLL' */ diff --git a/trunk/arch/arm/mach-omap2/sdrc.c b/trunk/arch/arm/mach-omap2/sdrc.c deleted file mode 100644 index 2a30060cb4b7..000000000000 --- a/trunk/arch/arm/mach-omap2/sdrc.c +++ /dev/null @@ -1,93 +0,0 @@ -/* - * SMS/SDRC (SDRAM controller) common code for OMAP2/3 - * - * Copyright (C) 2005, 2008 Texas Instruments Inc. - * Copyright (C) 2005, 2008 Nokia Corporation - * - * Tony Lindgren - * Paul Walmsley - * Richard Woodruff - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#undef DEBUG - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "prm.h" - -#include -#include "sdrc.h" - -static struct omap_sdrc_params *sdrc_init_params; - -void __iomem *omap2_sdrc_base; -void __iomem *omap2_sms_base; - - -/** - * omap2_sdrc_get_params - return SDRC register values for a given clock rate - * @r: SDRC clock rate (in Hz) - * - * Return pre-calculated values for the SDRC_ACTIM_CTRLA, - * SDRC_ACTIM_CTRLB, SDRC_RFR_CTRL, and SDRC_MR registers, for a given - * SDRC clock rate 'r'. These parameters control various timing - * delays in the SDRAM controller that are expressed in terms of the - * number of SDRC clock cycles to wait; hence the clock rate - * dependency. Note that sdrc_init_params must be sorted rate - * descending. Also assumes that both chip-selects use the same - * timing parameters. Returns a struct omap_sdrc_params * upon - * success, or NULL upon failure. - */ -struct omap_sdrc_params *omap2_sdrc_get_params(unsigned long r) -{ - struct omap_sdrc_params *sp; - - sp = sdrc_init_params; - - while (sp->rate != r) - sp++; - - if (!sp->rate) - return NULL; - - return sp; -} - - -void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals) -{ - omap2_sdrc_base = omap2_globals->sdrc; - omap2_sms_base = omap2_globals->sms; -} - -/* turn on smart idle modes for SDRAM scheduler and controller */ -void __init omap2_sdrc_init(struct omap_sdrc_params *sp) -{ - u32 l; - - l = sms_read_reg(SMS_SYSCONFIG); - l &= ~(0x3 << 3); - l |= (0x2 << 3); - sms_write_reg(l, SMS_SYSCONFIG); - - l = sdrc_read_reg(SDRC_SYSCONFIG); - l &= ~(0x3 << 3); - l |= (0x2 << 3); - sdrc_write_reg(l, SDRC_SYSCONFIG); - - sdrc_init_params = sp; -} diff --git a/trunk/arch/arm/mach-omap2/sleep24xx.S b/trunk/arch/arm/mach-omap2/sleep24xx.S index bf9e96105e11..43336b93b21c 100644 --- a/trunk/arch/arm/mach-omap2/sleep24xx.S +++ b/trunk/arch/arm/mach-omap2/sleep24xx.S @@ -93,8 +93,9 @@ ENTRY(omap24xx_cpu_suspend) orr r4, r4, #0x40 @ enable self refresh on idle req mov r5, #0x2000 @ set delay (DPLL relock + DLL relock) str r4, [r2] @ make it so + mov r2, #0 nop - mcr p15, 0, r3, c7, c0, 4 @ wait for interrupt + mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt nop loop: subs r5, r5, #0x1 @ awake, wait just a bit diff --git a/trunk/arch/arm/mach-omap2/timer-gp.c b/trunk/arch/arm/mach-omap2/timer-gp.c index 9fc13a2cc3f4..ae6036300f60 100644 --- a/trunk/arch/arm/mach-omap2/timer-gp.c +++ b/trunk/arch/arm/mach-omap2/timer-gp.c @@ -118,8 +118,7 @@ static void __init omap2_gp_clockevent_init(void) clockevent_gpt.max_delta_ns = clockevent_delta2ns(0xffffffff, &clockevent_gpt); clockevent_gpt.min_delta_ns = - clockevent_delta2ns(3, &clockevent_gpt); - /* Timer internal resynch latency. */ + clockevent_delta2ns(1, &clockevent_gpt); clockevent_gpt.cpumask = cpumask_of(0); clockevents_register_device(&clockevent_gpt); diff --git a/trunk/arch/arm/mach-orion5x/Kconfig b/trunk/arch/arm/mach-orion5x/Kconfig index 2c7035d8dcbf..f59a8d0e0824 100644 --- a/trunk/arch/arm/mach-orion5x/Kconfig +++ b/trunk/arch/arm/mach-orion5x/Kconfig @@ -71,7 +71,6 @@ config MACH_WRT350N_V2 config MACH_TS78XX bool "Technologic Systems TS-78xx" - select PM help Say 'Y' here if you want your kernel to support the Technologic Systems TS-78xx platform. diff --git a/trunk/arch/arm/mach-orion5x/common.c b/trunk/arch/arm/mach-orion5x/common.c index 8a0e49d84256..0a623379789f 100644 --- a/trunk/arch/arm/mach-orion5x/common.c +++ b/trunk/arch/arm/mach-orion5x/common.c @@ -431,10 +431,6 @@ void __init orion5x_uart1_init(void) /***************************************************************************** * XOR engine ****************************************************************************/ -struct mv_xor_platform_shared_data orion5x_xor_shared_data = { - .dram = &orion5x_mbus_dram_info, -}; - static struct resource orion5x_xor_shared_resources[] = { { .name = "xor low", @@ -452,9 +448,6 @@ static struct resource orion5x_xor_shared_resources[] = { static struct platform_device orion5x_xor_shared = { .name = MV_XOR_SHARED_NAME, .id = 0, - .dev = { - .platform_data = &orion5x_xor_shared_data, - }, .num_resources = ARRAY_SIZE(orion5x_xor_shared_resources), .resource = orion5x_xor_shared_resources, }; diff --git a/trunk/arch/arm/mach-orion5x/dns323-setup.c b/trunk/arch/arm/mach-orion5x/dns323-setup.c index b31ca4cef365..0722d6510df1 100644 --- a/trunk/arch/arm/mach-orion5x/dns323-setup.c +++ b/trunk/arch/arm/mach-orion5x/dns323-setup.c @@ -76,7 +76,7 @@ static int __init dns323_dev_id(void) static int __init dns323_pci_init(void) { - /* The 5182 doesn't really use its PCI bus, and initialising PCI + /* The 5182 doesn't really use it's PCI bus, and initialising PCI * gets in the way of initialising the SATA controller. */ if (machine_is_dns323() && dns323_dev_id() != MV88F5182_DEV_ID) @@ -418,7 +418,7 @@ static void __init dns323_init(void) orion5x_i2c_init(); orion5x_uart0_init(); - /* The 5182 has its SATA controller on-chip, and needs its own little + /* The 5182 has it's SATA controller on-chip, and needs it's own little * init routine. */ if (dns323_dev_id() == MV88F5182_DEV_ID) diff --git a/trunk/arch/arm/mach-orion5x/include/mach/system.h b/trunk/arch/arm/mach-orion5x/include/mach/system.h index 9b8db1dcfa83..08e430757890 100644 --- a/trunk/arch/arm/mach-orion5x/include/mach/system.h +++ b/trunk/arch/arm/mach-orion5x/include/mach/system.h @@ -19,7 +19,7 @@ static inline void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { /* * Enable and issue soft reset diff --git a/trunk/arch/arm/mach-orion5x/irq.c b/trunk/arch/arm/mach-orion5x/irq.c index e03f7b45cb0d..0caae43301e5 100644 --- a/trunk/arch/arm/mach-orion5x/irq.c +++ b/trunk/arch/arm/mach-orion5x/irq.c @@ -44,7 +44,7 @@ void __init orion5x_init_irq(void) * User can use set_type() if he wants to use edge types handlers. */ for (i = IRQ_ORION5X_GPIO_START; i < NR_IRQS; i++) { - set_irq_chip(i, &orion_gpio_irq_chip); + set_irq_chip(i, &orion_gpio_irq_level_chip); set_irq_handler(i, handle_level_irq); irq_desc[i].status |= IRQ_LEVEL; set_irq_flags(i, IRQF_VALID); diff --git a/trunk/arch/arm/mach-orion5x/lsmini-setup.c b/trunk/arch/arm/mach-orion5x/lsmini-setup.c index c9bf6b81a80d..e0c43b8beb72 100644 --- a/trunk/arch/arm/mach-orion5x/lsmini-setup.c +++ b/trunk/arch/arm/mach-orion5x/lsmini-setup.c @@ -186,7 +186,7 @@ static struct mv_sata_platform_data lsmini_sata_data = { static void lsmini_power_off(void) { - arch_reset(0, NULL); + arch_reset(0); } diff --git a/trunk/arch/arm/mach-orion5x/ts78xx-fpga.h b/trunk/arch/arm/mach-orion5x/ts78xx-fpga.h deleted file mode 100644 index 0a314ddef658..000000000000 --- a/trunk/arch/arm/mach-orion5x/ts78xx-fpga.h +++ /dev/null @@ -1,29 +0,0 @@ -#define FPGAID(_magic, _rev) ((_magic << 8) + _rev) - -/* - * get yer id's from http://ts78xx.digriz.org.uk/ - * do *not* make up your own or 'borrow' any! - */ -enum fpga_ids { - /* Technologic Systems */ - TS7800_REV_B2 = FPGAID(0x00b480, 0x02), - TS7800_REV_B3 = FPGAID(0x00b480, 0x03), -}; - -struct fpga_device { - unsigned present:1; - unsigned init:1; -}; - -struct fpga_devices { - /* Technologic Systems */ - struct fpga_device ts_rtc; - struct fpga_device ts_nand; -}; - -struct ts78xx_fpga_data { - unsigned int id; - int state; - - struct fpga_devices supports; -}; diff --git a/trunk/arch/arm/mach-orion5x/ts78xx-setup.c b/trunk/arch/arm/mach-orion5x/ts78xx-setup.c index f5191ddea085..1368e9fd1a06 100644 --- a/trunk/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/trunk/arch/arm/mach-orion5x/ts78xx-setup.c @@ -10,20 +10,17 @@ #include #include -#include #include +#include #include #include #include -#include -#include #include #include #include #include #include "common.h" #include "mpp.h" -#include "ts78xx-fpga.h" /***************************************************************************** * TS-78xx Info @@ -36,11 +33,18 @@ #define TS78XX_FPGA_REGS_VIRT_BASE 0xff900000 #define TS78XX_FPGA_REGS_SIZE SZ_1M -static struct ts78xx_fpga_data ts78xx_fpga = { - .id = 0, - .state = 1, -/* .supports = ... - populated by ts78xx_fpga_supports() */ -}; +#define TS78XX_FPGA_REGS_SYSCON_ID (TS78XX_FPGA_REGS_VIRT_BASE | 0x000) +#define TS78XX_FPGA_REGS_SYSCON_LCDI (TS78XX_FPGA_REGS_VIRT_BASE | 0x004) +#define TS78XX_FPGA_REGS_SYSCON_LCDO (TS78XX_FPGA_REGS_VIRT_BASE | 0x008) + +#define TS78XX_FPGA_REGS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x808) +#define TS78XX_FPGA_REGS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE | 0x80c) + +/* + * 512kB NOR flash Device + */ +#define TS78XX_NOR_BOOT_BASE 0xff800000 +#define TS78XX_NOR_BOOT_SIZE SZ_512K /***************************************************************************** * I/O Address Mapping @@ -61,47 +65,73 @@ void __init ts78xx_map_io(void) } /***************************************************************************** - * Ethernet + * 512kB NOR Boot Flash - the chip is a M25P40 ****************************************************************************/ -static struct mv643xx_eth_platform_data ts78xx_eth_data = { - .phy_addr = MV643XX_ETH_PHY_ADDR(0), +static struct mtd_partition ts78xx_nor_boot_flash_resources[] = { + { + .name = "ts-bootrom", + .offset = 0, + /* only the first 256kB is used */ + .size = SZ_256K, + .mask_flags = MTD_WRITEABLE, + }, +}; + +static struct physmap_flash_data ts78xx_nor_boot_flash_data = { + .width = 1, + .parts = ts78xx_nor_boot_flash_resources, + .nr_parts = ARRAY_SIZE(ts78xx_nor_boot_flash_resources), +}; + +static struct resource ts78xx_nor_boot_flash_resource = { + .flags = IORESOURCE_MEM, + .start = TS78XX_NOR_BOOT_BASE, + .end = TS78XX_NOR_BOOT_BASE + TS78XX_NOR_BOOT_SIZE - 1, +}; + +static struct platform_device ts78xx_nor_boot_flash = { + .name = "physmap-flash", + .id = -1, + .dev = { + .platform_data = &ts78xx_nor_boot_flash_data, + }, + .num_resources = 1, + .resource = &ts78xx_nor_boot_flash_resource, }; /***************************************************************************** - * SATA + * Ethernet ****************************************************************************/ -static struct mv_sata_platform_data ts78xx_sata_data = { - .n_ports = 2, +static struct mv643xx_eth_platform_data ts78xx_eth_data = { + .phy_addr = MV643XX_ETH_PHY_ADDR(0), }; /***************************************************************************** * RTC M48T86 - nicked^Wborrowed from arch/arm/mach-ep93xx/ts72xx.c ****************************************************************************/ -#define TS_RTC_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x808) -#define TS_RTC_DATA (TS78XX_FPGA_REGS_VIRT_BASE | 0x80c) - -static unsigned char ts78xx_ts_rtc_readbyte(unsigned long addr) +#ifdef CONFIG_RTC_DRV_M48T86 +static unsigned char ts78xx_rtc_readbyte(unsigned long addr) { - writeb(addr, TS_RTC_CTRL); - return readb(TS_RTC_DATA); + writeb(addr, TS78XX_FPGA_REGS_RTC_CTRL); + return readb(TS78XX_FPGA_REGS_RTC_DATA); } -static void ts78xx_ts_rtc_writebyte(unsigned char value, unsigned long addr) +static void ts78xx_rtc_writebyte(unsigned char value, unsigned long addr) { - writeb(addr, TS_RTC_CTRL); - writeb(value, TS_RTC_DATA); + writeb(addr, TS78XX_FPGA_REGS_RTC_CTRL); + writeb(value, TS78XX_FPGA_REGS_RTC_DATA); } -static struct m48t86_ops ts78xx_ts_rtc_ops = { - .readbyte = ts78xx_ts_rtc_readbyte, - .writebyte = ts78xx_ts_rtc_writebyte, +static struct m48t86_ops ts78xx_rtc_ops = { + .readbyte = ts78xx_rtc_readbyte, + .writebyte = ts78xx_rtc_writebyte, }; -static struct platform_device ts78xx_ts_rtc_device = { +static struct platform_device ts78xx_rtc_device = { .name = "rtc-m48t86", .id = -1, .dev = { - .platform_data = &ts78xx_ts_rtc_ops, + .platform_data = &ts78xx_rtc_ops, }, .num_resources = 0, }; @@ -116,311 +146,59 @@ static struct platform_device ts78xx_ts_rtc_device = { * TODO: track down a guinea pig without an RTC to see if we can work out a * better RTC detection routine */ -static int ts78xx_ts_rtc_load(void) +static int __init ts78xx_rtc_init(void) { - int rc; unsigned char tmp_rtc0, tmp_rtc1; - tmp_rtc0 = ts78xx_ts_rtc_readbyte(126); - tmp_rtc1 = ts78xx_ts_rtc_readbyte(127); - - ts78xx_ts_rtc_writebyte(0x00, 126); - ts78xx_ts_rtc_writebyte(0x55, 127); - if (ts78xx_ts_rtc_readbyte(127) == 0x55) { - ts78xx_ts_rtc_writebyte(0xaa, 127); - if (ts78xx_ts_rtc_readbyte(127) == 0xaa - && ts78xx_ts_rtc_readbyte(126) == 0x00) { - ts78xx_ts_rtc_writebyte(tmp_rtc0, 126); - ts78xx_ts_rtc_writebyte(tmp_rtc1, 127); - - if (ts78xx_fpga.supports.ts_rtc.init == 0) { - rc = platform_device_register(&ts78xx_ts_rtc_device); - if (!rc) - ts78xx_fpga.supports.ts_rtc.init = 1; - } else - rc = platform_device_add(&ts78xx_ts_rtc_device); - - return rc; + tmp_rtc0 = ts78xx_rtc_readbyte(126); + tmp_rtc1 = ts78xx_rtc_readbyte(127); + + ts78xx_rtc_writebyte(0x00, 126); + ts78xx_rtc_writebyte(0x55, 127); + if (ts78xx_rtc_readbyte(127) == 0x55) { + ts78xx_rtc_writebyte(0xaa, 127); + if (ts78xx_rtc_readbyte(127) == 0xaa + && ts78xx_rtc_readbyte(126) == 0x00) { + ts78xx_rtc_writebyte(tmp_rtc0, 126); + ts78xx_rtc_writebyte(tmp_rtc1, 127); + platform_device_register(&ts78xx_rtc_device); + return 1; } } - return -ENODEV; + return 0; }; - -static void ts78xx_ts_rtc_unload(void) +#else +static int __init ts78xx_rtc_init(void) { - platform_device_del(&ts78xx_ts_rtc_device); + return 0; } +#endif /***************************************************************************** - * NAND Flash + * SATA ****************************************************************************/ -#define TS_NAND_CTRL (TS78XX_FPGA_REGS_VIRT_BASE | 0x800) /* VIRT */ -#define TS_NAND_DATA (TS78XX_FPGA_REGS_PHYS_BASE | 0x804) /* PHYS */ - -/* - * hardware specific access to control-lines - * - * ctrl: - * NAND_NCE: bit 0 -> bit 2 - * NAND_CLE: bit 1 -> bit 1 - * NAND_ALE: bit 2 -> bit 0 - */ -static void ts78xx_ts_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, - unsigned int ctrl) -{ - struct nand_chip *this = mtd->priv; - - if (ctrl & NAND_CTRL_CHANGE) { - unsigned char bits; - - bits = (ctrl & NAND_NCE) << 2; - bits |= ctrl & NAND_CLE; - bits |= (ctrl & NAND_ALE) >> 2; - - writeb((readb(TS_NAND_CTRL) & ~0x7) | bits, TS_NAND_CTRL); - } - - if (cmd != NAND_CMD_NONE) - writeb(cmd, this->IO_ADDR_W); -} - -static int ts78xx_ts_nand_dev_ready(struct mtd_info *mtd) -{ - return readb(TS_NAND_CTRL) & 0x20; -} - -const char *ts_nand_part_probes[] = { "cmdlinepart", NULL }; - -static struct mtd_partition ts78xx_ts_nand_parts[] = { - { - .name = "mbr", - .offset = 0, - .size = SZ_128K, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = MTDPART_OFS_APPEND, - .size = SZ_4M, - }, { - .name = "initrd", - .offset = MTDPART_OFS_APPEND, - .size = SZ_4M, - }, { - .name = "rootfs", - .offset = MTDPART_OFS_APPEND, - .size = MTDPART_SIZ_FULL, - } -}; - -static struct platform_nand_data ts78xx_ts_nand_data = { - .chip = { - .part_probe_types = ts_nand_part_probes, - .partitions = ts78xx_ts_nand_parts, - .nr_partitions = ARRAY_SIZE(ts78xx_ts_nand_parts), - .chip_delay = 15, - .options = NAND_USE_FLASH_BBT, - }, - .ctrl = { - /* - * The HW ECC offloading functions, used to give about a 9% - * performance increase for 'dd if=/dev/mtdblockX' and 5% for - * nanddump. This all however was changed by git commit - * e6cf5df1838c28bb060ac45b5585e48e71bbc740 so now there is - * no performance advantage to be had so we no longer bother - */ - .cmd_ctrl = ts78xx_ts_nand_cmd_ctrl, - .dev_ready = ts78xx_ts_nand_dev_ready, - }, -}; - -static struct resource ts78xx_ts_nand_resources = { - .start = TS_NAND_DATA, - .end = TS_NAND_DATA + 4, - .flags = IORESOURCE_IO, -}; - -static struct platform_device ts78xx_ts_nand_device = { - .name = "gen_nand", - .id = -1, - .dev = { - .platform_data = &ts78xx_ts_nand_data, - }, - .resource = &ts78xx_ts_nand_resources, - .num_resources = 1, -}; - -static int ts78xx_ts_nand_load(void) -{ - int rc; - - if (ts78xx_fpga.supports.ts_nand.init == 0) { - rc = platform_device_register(&ts78xx_ts_nand_device); - if (!rc) - ts78xx_fpga.supports.ts_nand.init = 1; - } else - rc = platform_device_add(&ts78xx_ts_nand_device); - - return rc; +static struct mv_sata_platform_data ts78xx_sata_data = { + .n_ports = 2, }; -static void ts78xx_ts_nand_unload(void) -{ - platform_device_del(&ts78xx_ts_nand_device); -} - /***************************************************************************** - * FPGA 'hotplug' support code + * print some information regarding the board ****************************************************************************/ -static void ts78xx_fpga_devices_zero_init(void) +static void __init ts78xx_print_board_id(void) { - ts78xx_fpga.supports.ts_rtc.init = 0; - ts78xx_fpga.supports.ts_nand.init = 0; -} - -static void ts78xx_fpga_supports(void) -{ - /* TODO: put this 'table' into ts78xx-fpga.h */ - switch (ts78xx_fpga.id) { - case TS7800_REV_B2: - case TS7800_REV_B3: - ts78xx_fpga.supports.ts_rtc.present = 1; - ts78xx_fpga.supports.ts_nand.present = 1; - break; - default: - ts78xx_fpga.supports.ts_rtc.present = 0; - ts78xx_fpga.supports.ts_nand.present = 0; - } -} - -static int ts78xx_fpga_load_devices(void) -{ - int tmp, ret = 0; - - if (ts78xx_fpga.supports.ts_rtc.present == 1) { - tmp = ts78xx_ts_rtc_load(); - if (tmp) { - printk(KERN_INFO "TS-78xx: RTC not registered\n"); - ts78xx_fpga.supports.ts_rtc.present = 0; - } - ret |= tmp; - } - if (ts78xx_fpga.supports.ts_nand.present == 1) { - tmp = ts78xx_ts_nand_load(); - if (tmp) { - printk(KERN_INFO "TS-78xx: NAND not registered\n"); - ts78xx_fpga.supports.ts_nand.present = 0; - } - ret |= tmp; - } - - return ret; -} - -static int ts78xx_fpga_unload_devices(void) -{ - int ret = 0; - - if (ts78xx_fpga.supports.ts_rtc.present == 1) - ts78xx_ts_rtc_unload(); - if (ts78xx_fpga.supports.ts_nand.present == 1) - ts78xx_ts_nand_unload(); - - return ret; -} - -static int ts78xx_fpga_load(void) -{ - ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE); - - printk(KERN_INFO "TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n", - (ts78xx_fpga.id >> 8) & 0xffffff, - ts78xx_fpga.id & 0xff); - - ts78xx_fpga_supports(); - - if (ts78xx_fpga_load_devices()) { - ts78xx_fpga.state = -1; - return -EBUSY; - } - - return 0; + unsigned int board_info; + + board_info = readl(TS78XX_FPGA_REGS_SYSCON_ID); + printk(KERN_INFO "TS-78xx Info: FPGA rev=%.2x, Board Magic=%.6x, ", + board_info & 0xff, + (board_info >> 8) & 0xffffff); + board_info = readl(TS78XX_FPGA_REGS_SYSCON_LCDI); + printk("JP1=%d, JP2=%d\n", + (board_info >> 30) & 0x1, + (board_info >> 31) & 0x1); }; -static int ts78xx_fpga_unload(void) -{ - unsigned int fpga_id; - - fpga_id = readl(TS78XX_FPGA_REGS_VIRT_BASE); - - /* - * There does not seem to be a feasible way to block access to the GPIO - * pins from userspace (/dev/mem). This if clause should hopefully warn - * those foolish enough not to follow 'policy' :) - * - * UrJTAG SVN since r1381 can be used to reprogram the FPGA - */ - if (ts78xx_fpga.id != fpga_id) { - printk(KERN_ERR "TS-78xx FPGA: magic/rev mismatch\n" - "TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n", - (ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff, - (fpga_id >> 8) & 0xffffff, fpga_id & 0xff); - ts78xx_fpga.state = -1; - return -EBUSY; - } - - if (ts78xx_fpga_unload_devices()) { - ts78xx_fpga.state = -1; - return -EBUSY; - } - - return 0; -}; - -static ssize_t ts78xx_fpga_show(struct kobject *kobj, - struct kobj_attribute *attr, char *buf) -{ - if (ts78xx_fpga.state < 0) - return sprintf(buf, "borked\n"); - - return sprintf(buf, "%s\n", (ts78xx_fpga.state) ? "online" : "offline"); -} - -static ssize_t ts78xx_fpga_store(struct kobject *kobj, - struct kobj_attribute *attr, const char *buf, size_t n) -{ - int value, ret; - - if (ts78xx_fpga.state < 0) { - printk(KERN_ERR "TS-78xx FPGA: borked, you must powercycle asap\n"); - return -EBUSY; - } - - if (strncmp(buf, "online", sizeof("online") - 1) == 0) - value = 1; - else if (strncmp(buf, "offline", sizeof("offline") - 1) == 0) - value = 0; - else { - printk(KERN_ERR "ts78xx_fpga_store: Invalid value\n"); - return -EINVAL; - } - - if (ts78xx_fpga.state == value) - return n; - - ret = (ts78xx_fpga.state == 0) - ? ts78xx_fpga_load() - : ts78xx_fpga_unload(); - - if (!(ret < 0)) - ts78xx_fpga.state = value; - - return n; -} - -static struct kobj_attribute ts78xx_fpga_attr = - __ATTR(ts78xx_fpga, 0644, ts78xx_fpga_show, ts78xx_fpga_store); - /***************************************************************************** * General Setup ****************************************************************************/ @@ -445,28 +223,29 @@ static struct orion5x_mpp_mode ts78xx_mpp_modes[] __initdata = { { 17, MPP_UART }, { 18, MPP_UART }, { 19, MPP_UART }, - /* - * MPP[20] PCI Clock Out 1 - * MPP[21] PCI Clock Out 0 - * MPP[22] Unused - * MPP[23] Unused - * MPP[24] Unused - * MPP[25] Unused - */ { -1 }, }; static void __init ts78xx_init(void) { - int ret; - /* * Setup basic Orion functions. Need to be called early. */ orion5x_init(); + ts78xx_print_board_id(); + orion5x_mpp_conf(ts78xx_mpp_modes); + /* + * MPP[20] PCI Clock Out 1 + * MPP[21] PCI Clock Out 0 + * MPP[22] Unused + * MPP[23] Unused + * MPP[24] Unused + * MPP[25] Unused + */ + /* * Configure peripherals. */ @@ -478,12 +257,12 @@ static void __init ts78xx_init(void) orion5x_uart1_init(); orion5x_xor_init(); - /* FPGA init */ - ts78xx_fpga_devices_zero_init(); - ret = ts78xx_fpga_load(); - ret = sysfs_create_file(power_kobj, &ts78xx_fpga_attr.attr); - if (ret) - printk(KERN_ERR "sysfs_create_file failed: %d\n", ret); + orion5x_setup_dev_boot_win(TS78XX_NOR_BOOT_BASE, + TS78XX_NOR_BOOT_SIZE); + platform_device_register(&ts78xx_nor_boot_flash); + + if (!ts78xx_rtc_init()) + printk(KERN_INFO "TS-78xx RTC not detected or enabled\n"); } MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC") diff --git a/trunk/arch/arm/mach-pnx4008/include/mach/system.h b/trunk/arch/arm/mach-pnx4008/include/mach/system.h index 5dda2bb55f8d..e12e7abfcbcf 100644 --- a/trunk/arch/arm/mach-pnx4008/include/mach/system.h +++ b/trunk/arch/arm/mach-pnx4008/include/mach/system.h @@ -30,7 +30,7 @@ static void arch_idle(void) cpu_do_idle(); } -static inline void arch_reset(char mode, const char *cmd) +static inline void arch_reset(char mode) { cpu_reset(0); } diff --git a/trunk/arch/arm/mach-pxa/Kconfig b/trunk/arch/arm/mach-pxa/Kconfig index d13282d773aa..8eea7306f29b 100644 --- a/trunk/arch/arm/mach-pxa/Kconfig +++ b/trunk/arch/arm/mach-pxa/Kconfig @@ -40,9 +40,6 @@ choice config GUMSTIX_AM200EPD bool "Enable AM200EPD board support" -config GUMSTIX_AM300EPD - bool "Enable AM300EPD board support" - endchoice config MACH_INTELMOTE2 @@ -257,10 +254,6 @@ config MACH_EM_X270 bool "CompuLab EM-x270 platform" select PXA27x -config MACH_EXEDA - bool "CompuLab eXeda platform" - select PXA27x - config MACH_COLIBRI bool "Toradex Colibri PX27x" select PXA27x @@ -302,15 +295,8 @@ config MACH_MAGICIAN bool "Enable HTC Magician Support" select PXA27x select IWMMXT - select PXA_SSP - select HAVE_PWM select PXA_HAVE_BOARD_IRQS -config MACH_HIMALAYA - bool "HTC Himalaya Support" - select CPU_PXA26x - select FB_W100 - config MACH_MIOA701 bool "Mitac Mio A701 Support" select PXA27x @@ -333,16 +319,6 @@ config ARCH_PXA_PALM bool "PXA based Palm PDAs" select HAVE_PWM -config MACH_PALMT5 - bool "Palm Tungsten|T5" - default y - depends on ARCH_PXA_PALM - select PXA27x - select IWMMXT - help - Say Y here if you intend to run this kernel on a Palm Tungsten|T5 - handheld computer. - config MACH_PALMTX bool "Palm T|X" default y @@ -363,16 +339,6 @@ config MACH_PALMZ72 Say Y here if you intend to run this kernel on Palm Zire 72 handheld computer. -config MACH_PALMLD - bool "Palm LifeDrive" - default y - depends on ARCH_PXA_PALM - select PXA27x - select IWMMXT - help - Say Y here if you intend to run this kernel on a Palm LifeDrive - handheld computer. - config MACH_PCM990_BASEBOARD bool "PHYTEC PCM-990 development board" select HAVE_PWM @@ -393,18 +359,6 @@ config PCM990_DISPLAY_NONE endchoice -config MACH_CSB726 - bool "Enable Cogent CSB726 System On a Module" - select PXA27x - select IWMMXT - help - Say Y here if you intend to run this kernel on a Cogent - CSB726 System On Module. - -config CSB726_CSB701 - bool "Enable supprot for CSB701 baseboard" - depends on MACH_CSB726 - config PXA_EZX bool "Motorola EZX Platform" select PXA27x diff --git a/trunk/arch/arm/mach-pxa/Makefile b/trunk/arch/arm/mach-pxa/Makefile index 8da8e63d048b..7b28bb561d63 100644 --- a/trunk/arch/arm/mach-pxa/Makefile +++ b/trunk/arch/arm/mach-pxa/Makefile @@ -28,7 +28,6 @@ obj-$(CONFIG_CPU_PXA930) += pxa930.o # Specific board support obj-$(CONFIG_ARCH_GUMSTIX) += gumstix.o obj-$(CONFIG_GUMSTIX_AM200EPD) += am200epd.o -obj-$(CONFIG_GUMSTIX_AM300EPD) += am300epd.o obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o @@ -46,7 +45,6 @@ obj-$(CONFIG_MACH_PCM990_BASEBOARD) += pcm990-baseboard.o obj-$(CONFIG_MACH_TOSA) += tosa.o obj-$(CONFIG_MACH_EM_X270) += em-x270.o obj-$(CONFIG_MACH_MAGICIAN) += magician.o -obj-$(CONFIG_MACH_HIMALAYA) += himalaya.o obj-$(CONFIG_MACH_MIOA701) += mioa701.o mioa701_bootresume.o obj-$(CONFIG_ARCH_PXA_ESERIES) += eseries.o obj-$(CONFIG_MACH_E330) += e330.o @@ -55,9 +53,7 @@ obj-$(CONFIG_MACH_E740) += e740.o obj-$(CONFIG_MACH_E750) += e750.o obj-$(CONFIG_MACH_E400) += e400.o obj-$(CONFIG_MACH_E800) += e800.o -obj-$(CONFIG_MACH_PALMT5) += palmt5.o obj-$(CONFIG_MACH_PALMTX) += palmtx.o -obj-$(CONFIG_MACH_PALMLD) += palmld.o obj-$(CONFIG_MACH_PALMZ72) += palmz72.o obj-$(CONFIG_ARCH_VIPER) += viper.o @@ -75,8 +71,6 @@ obj-$(CONFIG_MACH_CM_X300) += cm-x300.o obj-$(CONFIG_PXA_EZX) += ezx.o obj-$(CONFIG_MACH_INTELMOTE2) += imote2.o -obj-$(CONFIG_MACH_CSB726) += csb726.o -obj-$(CONFIG_CSB726_CSB701) += csb701.o # Support for blinky lights led-y := leds.o diff --git a/trunk/arch/arm/mach-pxa/am200epd.c b/trunk/arch/arm/mach-pxa/am200epd.c index 3499fada73ae..77ee80e5e47b 100644 --- a/trunk/arch/arm/mach-pxa/am200epd.c +++ b/trunk/arch/arm/mach-pxa/am200epd.c @@ -30,8 +30,8 @@ #include #include -#include #include +#include #include #include "generic.h" diff --git a/trunk/arch/arm/mach-pxa/am300epd.c b/trunk/arch/arm/mach-pxa/am300epd.c deleted file mode 100644 index 4bd10a17332e..000000000000 --- a/trunk/arch/arm/mach-pxa/am300epd.c +++ /dev/null @@ -1,295 +0,0 @@ -/* - * am300epd.c -- Platform device for AM300 EPD kit - * - * Copyright (C) 2008, Jaya Kumar - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file COPYING in the main directory of this archive for - * more details. - * - * This work was made possible by help and equipment support from E-Ink - * Corporation. http://support.eink.com/community - * - * This driver is written to be used with the Broadsheet display controller. - * on the AM300 EPD prototype kit/development kit with an E-Ink 800x600 - * Vizplex EPD on a Gumstix board using the Broadsheet interface board. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "generic.h" - -#include