From 01c9fa207b2e0d7f63d363bde0e99c9fa907c002 Mon Sep 17 00:00:00 2001
From: Yaniv Rosner <yanivr@broadcom.com>
Date: Mon, 14 Jun 2010 23:25:19 -0700
Subject: [PATCH] --- yaml --- r: 202920 b: refs/heads/master c:
 1ab6c163dee279559e3a62d774af7e4c4c9b4c67 h: refs/heads/master v: v3

---
 [refs]                         | 2 +-
 trunk/drivers/net/bnx2x_link.c | 8 +++++---
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/[refs] b/[refs]
index 96c1a0562ee2..3269a62bf89f 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: d6cc1d642de9284cb26488ea390d915b50ee2504
+refs/heads/master: 1ab6c163dee279559e3a62d774af7e4c4c9b4c67
diff --git a/trunk/drivers/net/bnx2x_link.c b/trunk/drivers/net/bnx2x_link.c
index ff70be898765..0383e3066313 100644
--- a/trunk/drivers/net/bnx2x_link.c
+++ b/trunk/drivers/net/bnx2x_link.c
@@ -4266,14 +4266,16 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
 					       MDIO_PMA_REG_10G_CTRL2, 0x0008);
 			}
 
-			/* Set 2-wire transfer rate to 400Khz since 100Khz
-			is not operational */
+			/* Set 2-wire transfer rate of SFP+ module EEPROM
+			 * to 100Khz since some DACs(direct attached cables) do
+			 * not work at 400Khz.
+			 */
 			bnx2x_cl45_write(bp, params->port,
 				       ext_phy_type,
 				       ext_phy_addr,
 				       MDIO_PMA_DEVAD,
 				       MDIO_PMA_REG_8727_TWO_WIRE_SLAVE_ADDR,
-				       0xa101);
+				       0xa001);
 
 			/* Set TX PreEmphasis if needed */
 			if ((params->feature_config_flags &