From 0226605b8d493377c61689740ea213037f488f11 Mon Sep 17 00:00:00 2001 From: Paul Mundt Date: Fri, 17 Apr 2009 14:09:09 +0900 Subject: [PATCH] --- yaml --- r: 146643 b: refs/heads/master c: 0bbc9bc3189f24de946777af43c9033c8c4871e4 h: refs/heads/master i: 146641: 7fd8d2627a0db1cc82b1bf82582c4aa6e623d3d9 146639: 4659d4a256e0b41b49b2667d3318131426091e9a v: v3 --- [refs] | 2 +- trunk/arch/sh/drivers/pci/fixups-sdk7780.c | 4 ---- trunk/arch/sh/drivers/pci/pci-sh7780.c | 7 +++---- 3 files changed, 4 insertions(+), 9 deletions(-) diff --git a/[refs] b/[refs] index 53abecc32d9a..250c7280562f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 7e4ba0d77c96d328ba968ddff4a464d4d2fa7abc +refs/heads/master: 0bbc9bc3189f24de946777af43c9033c8c4871e4 diff --git a/trunk/arch/sh/drivers/pci/fixups-sdk7780.c b/trunk/arch/sh/drivers/pci/fixups-sdk7780.c index c2957312b30b..004efd486ee3 100644 --- a/trunk/arch/sh/drivers/pci/fixups-sdk7780.c +++ b/trunk/arch/sh/drivers/pci/fixups-sdk7780.c @@ -16,8 +16,6 @@ int pci_fixup_pcic(struct pci_channel *chan) { - ctrl_outl(0x00000001, SH7780_PCI_VCR2); - /* Enable all interrupts, so we know what to fix */ pci_write_reg(chan, 0x0000C3FF, SH7780_PCIIMR); pci_write_reg(chan, 0x0000380F, SH7780_PCIAINTM); @@ -26,8 +24,6 @@ int pci_fixup_pcic(struct pci_channel *chan) pci_write_reg(chan, 0xFB00, SH7780_PCISTATUS); pci_write_reg(chan, 0x0047, SH7780_PCICMD); pci_write_reg(chan, 0x00, SH7780_PCIPIF); - pci_write_reg(chan, 0x00, SH7780_PCISUB); - pci_write_reg(chan, 0x06, SH7780_PCIBCC); pci_write_reg(chan, 0x1912, SH7780_PCISVID); pci_write_reg(chan, 0x0001, SH7780_PCISID); diff --git a/trunk/arch/sh/drivers/pci/pci-sh7780.c b/trunk/arch/sh/drivers/pci/pci-sh7780.c index 45fa423f2e53..7f4f59037544 100644 --- a/trunk/arch/sh/drivers/pci/pci-sh7780.c +++ b/trunk/arch/sh/drivers/pci/pci-sh7780.c @@ -72,16 +72,15 @@ int __init sh7780_pcic_init(struct pci_channel *chan, { u32 word; + pci_write_reg(chan, PCI_CLASS_BRIDGE_HOST >> 8, SH7780_PCIBCC); + pci_write_reg(chan, PCI_CLASS_BRIDGE_HOST & 0xff, SH7780_PCISUB); + /* set the command/status bits to: * Wait Cycle Control + Parity Enable + Bus Master + * Mem space enable */ pci_write_reg(chan, 0x00000046, SH7780_PCICMD); - /* define this host as the host bridge */ - word = PCI_BASE_CLASS_BRIDGE << 24; - pci_write_reg(chan, word, SH7780_PCIRID); - /* Set IO and Mem windows to local address * Make PCI and local address the same for easy 1 to 1 mapping */