From 0237c995f1df4958d071afe273f1f65db44ec5e8 Mon Sep 17 00:00:00 2001 From: Manjunath Hadli Date: Thu, 15 Dec 2011 17:41:51 +0530 Subject: [PATCH] --- yaml --- r: 295607 b: refs/heads/master c: 719f56f2e45c3ab2a7873d45f1c115db568b1a29 h: refs/heads/master i: 295605: 95f539c0fe34cc99336ef155bac5fe488ba5bf9c 295603: c8f122a2cbd95f7e54263fb4aef17eceb7b0df45 295599: e1d9512a8b0b73f14101b61210c1d6726b789e96 v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-davinci/dm365.c | 16 ++++++++++++++++ trunk/arch/arm/mach-davinci/include/mach/dm365.h | 16 ---------------- 3 files changed, 17 insertions(+), 17 deletions(-) diff --git a/[refs] b/[refs] index c59210cbd533..f38b92a0af90 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 887b8a9345ae3f23527ca830a326f0b339119c25 +refs/heads/master: 719f56f2e45c3ab2a7873d45f1c115db568b1a29 diff --git a/trunk/arch/arm/mach-davinci/dm365.c b/trunk/arch/arm/mach-davinci/dm365.c index f15b435cc655..5b40a20ce960 100644 --- a/trunk/arch/arm/mach-davinci/dm365.c +++ b/trunk/arch/arm/mach-davinci/dm365.c @@ -40,6 +40,22 @@ #define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */ +/* Base of key scan register bank */ +#define DM365_KEYSCAN_BASE 0x01c69400 + +#define DM365_RTC_BASE 0x01c69000 + +#define DAVINCI_DM365_VC_BASE 0x01d0c000 +#define DAVINCI_DMA_VC_TX 2 +#define DAVINCI_DMA_VC_RX 3 + +#define DM365_EMAC_BASE 0x01d07000 +#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000) +#define DM365_EMAC_CNTRL_OFFSET 0x0000 +#define DM365_EMAC_CNTRL_MOD_OFFSET 0x3000 +#define DM365_EMAC_CNTRL_RAM_OFFSET 0x1000 +#define DM365_EMAC_CNTRL_RAM_SIZE 0x2000 + static struct pll_data pll1_data = { .num = 1, .phys_base = DAVINCI_PLL1_BASE, diff --git a/trunk/arch/arm/mach-davinci/include/mach/dm365.h b/trunk/arch/arm/mach-davinci/include/mach/dm365.h index 2563bf4e93a1..51924de847b2 100644 --- a/trunk/arch/arm/mach-davinci/include/mach/dm365.h +++ b/trunk/arch/arm/mach-davinci/include/mach/dm365.h @@ -20,22 +20,6 @@ #include #include -#define DM365_EMAC_BASE (0x01D07000) -#define DM365_EMAC_MDIO_BASE (DM365_EMAC_BASE + 0x4000) -#define DM365_EMAC_CNTRL_OFFSET (0x0000) -#define DM365_EMAC_CNTRL_MOD_OFFSET (0x3000) -#define DM365_EMAC_CNTRL_RAM_OFFSET (0x1000) -#define DM365_EMAC_CNTRL_RAM_SIZE (0x2000) - -/* Base of key scan register bank */ -#define DM365_KEYSCAN_BASE (0x01C69400) - -#define DM365_RTC_BASE (0x01C69000) - -#define DAVINCI_DM365_VC_BASE (0x01D0C000) -#define DAVINCI_DMA_VC_TX 2 -#define DAVINCI_DMA_VC_RX 3 - #define DM365_ASYNC_EMIF_CONTROL_BASE 0x01D10000 #define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 #define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000