From 027a514e7374b280496899303fa06eefbcf323a7 Mon Sep 17 00:00:00 2001 From: Andrew Lewis Date: Thu, 26 Jun 2008 19:29:05 +1000 Subject: [PATCH] --- yaml --- r: 101738 b: refs/heads/master c: 03d70617b8a789c3721afaafde06fcbba7c7ebf1 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/powerpc/lib/dma-noncoherent.c | 11 +++++++++-- 2 files changed, 10 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 4dda7911f1e3..f4564dab4b75 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 9d4ae9fc92f347b93b42c9c0ccde7138c1202e36 +refs/heads/master: 03d70617b8a789c3721afaafde06fcbba7c7ebf1 diff --git a/trunk/arch/powerpc/lib/dma-noncoherent.c b/trunk/arch/powerpc/lib/dma-noncoherent.c index 6656d47841d0..5d83907f6591 100644 --- a/trunk/arch/powerpc/lib/dma-noncoherent.c +++ b/trunk/arch/powerpc/lib/dma-noncoherent.c @@ -348,8 +348,15 @@ void __dma_sync(void *vaddr, size_t size, int direction) switch (direction) { case DMA_NONE: BUG(); - case DMA_FROM_DEVICE: /* invalidate only */ - invalidate_dcache_range(start, end); + case DMA_FROM_DEVICE: + /* + * invalidate only when cache-line aligned otherwise there is + * the potential for discarding uncommitted data from the cache + */ + if ((start & (L1_CACHE_BYTES - 1)) || (size & (L1_CACHE_BYTES - 1))) + flush_dcache_range(start, end); + else + invalidate_dcache_range(start, end); break; case DMA_TO_DEVICE: /* writeback only */ clean_dcache_range(start, end);