From 044f5ba256a32638fd81d726a748600f1d065ad3 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Tue, 9 Aug 2011 11:29:19 +0100 Subject: [PATCH] --- yaml --- r: 272882 b: refs/heads/master c: 2f41c36b07af71bb308ff8f1739481b022476080 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/Kconfig | 25 +++ trunk/arch/arm/Kconfig.debug | 206 ++++-------------- trunk/arch/arm/common/gic.c | 17 +- trunk/arch/arm/include/asm/cputype.h | 6 + trunk/arch/arm/include/asm/exception.h | 19 ++ trunk/arch/arm/include/asm/localtimer.h | 4 + trunk/arch/arm/include/asm/smp.h | 11 + trunk/arch/arm/include/asm/system.h | 7 - trunk/arch/arm/include/asm/topology.h | 33 +++ trunk/arch/arm/kernel/Makefile | 1 + trunk/arch/arm/kernel/irq.c | 2 +- trunk/arch/arm/kernel/smp.c | 32 ++- trunk/arch/arm/kernel/smp_scu.c | 2 +- trunk/arch/arm/kernel/topology.c | 148 +++++++++++++ trunk/arch/arm/kernel/traps.c | 1 + trunk/arch/arm/mach-exynos4/hotplug.c | 2 +- trunk/arch/arm/mach-exynos4/platsmp.c | 2 +- .../arm/mach-mxs/include/mach/debug-macro.S | 12 +- trunk/arch/arm/mach-pxa/irq.c | 2 + .../mach-realview/include/mach/debug-macro.S | 17 +- trunk/arch/arm/mm/fault.c | 1 + .../arm/plat-mxc/include/mach/debug-macro.S | 38 +++- trunk/arch/arm/plat-samsung/Kconfig | 7 - 24 files changed, 400 insertions(+), 197 deletions(-) create mode 100644 trunk/arch/arm/include/asm/exception.h create mode 100644 trunk/arch/arm/kernel/topology.c diff --git a/[refs] b/[refs] index 68c901705ab4..6bd0917615c6 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: f350b86121c7a004a5f866333fa1d23fe30263a6 +refs/heads/master: 2f41c36b07af71bb308ff8f1739481b022476080 diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 3269576dbfa8..c208fd97c180 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -1393,6 +1393,31 @@ config SMP_ON_UP If you don't know what to do here, say Y. +config ARM_CPU_TOPOLOGY + bool "Support cpu topology definition" + depends on SMP && CPU_V7 + default y + help + Support ARM cpu topology definition. The MPIDR register defines + affinity between processors which is then used to describe the cpu + topology of an ARM System. + +config SCHED_MC + bool "Multi-core scheduler support" + depends on ARM_CPU_TOPOLOGY + help + Multi-core scheduler support improves the CPU scheduler's decision + making when dealing with multi-core CPU chips at a cost of slightly + increased overhead in some places. If unsure say N here. + +config SCHED_SMT + bool "SMT scheduler support" + depends on ARM_CPU_TOPOLOGY + help + Improves the CPU scheduler's decision making when dealing with + MultiThreading at a cost of slightly increased overhead in some + places. If unsure say N here. + config HAVE_ARM_SCU bool help diff --git a/trunk/arch/arm/Kconfig.debug b/trunk/arch/arm/Kconfig.debug index 5bc7814d9a3d..81cbe40c159c 100644 --- a/trunk/arch/arm/Kconfig.debug +++ b/trunk/arch/arm/Kconfig.debug @@ -65,176 +65,13 @@ config DEBUG_USER # These options are only for real kernel hackers who want to get their hands dirty. config DEBUG_LL - bool "Kernel low-level debugging functions (read help!)" + bool "Kernel low-level debugging functions" depends on DEBUG_KERNEL help Say Y here to include definitions of printascii, printch, printhex in the kernel. This is helpful if you are debugging code that executes before the console is initialized. - Note that selecting this option will limit the kernel to a single - UART definition, as specified below. Attempting to boot the kernel - image on a different platform *will not work*, so this option should - not be enabled for kernels that are intended to be portable. - -choice - prompt "Kernel low-level debugging port" - depends on DEBUG_LL - - config DEBUG_LL_UART_NONE - bool "No low-level debugging UART" - help - Say Y here if your platform doesn't provide a UART option - below. This relies on your platform choosing the right UART - definition internally in order for low-level debugging to - work. - - config DEBUG_ICEDCC - bool "Kernel low-level debugging via EmbeddedICE DCC channel" - help - Say Y here if you want the debug print routines to direct - their output to the EmbeddedICE macrocell's DCC channel using - co-processor 14. This is known to work on the ARM9 style ICE - channel and on the XScale with the PEEDI. - - Note that the system will appear to hang during boot if there - is nothing connected to read from the DCC. - - config DEBUG_FOOTBRIDGE_COM1 - bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1" - depends on FOOTBRIDGE - help - Say Y here if you want the debug print routines to direct - their output to the 8250 at PCI COM1. - - config DEBUG_DC21285_PORT - bool "Kernel low-level debugging messages via footbridge serial port" - depends on FOOTBRIDGE - help - Say Y here if you want the debug print routines to direct - their output to the serial port in the DC21285 (Footbridge). - - config DEBUG_CLPS711X_UART1 - bool "Kernel low-level debugging messages via UART1" - depends on ARCH_CLPS711X - help - Say Y here if you want the debug print routines to direct - their output to the first serial port on these devices. - - config DEBUG_CLPS711X_UART2 - bool "Kernel low-level debugging messages via UART2" - depends on ARCH_CLPS711X - help - Say Y here if you want the debug print routines to direct - their output to the second serial port on these devices. - - config DEBUG_IMX1_UART - bool "i.MX1 Debug UART" - depends on SOC_IMX1 - help - Say Y here if you want kernel low-level debugging support - on i.MX1. - - config DEBUG_IMX23_UART - bool "i.MX23 Debug UART" - depends on SOC_IMX23 - help - Say Y here if you want kernel low-level debugging support - on i.MX23. - - config DEBUG_IMX25_UART - bool "i.MX25 Debug UART" - depends on SOC_IMX25 - help - Say Y here if you want kernel low-level debugging support - on i.MX25. - - config DEBUG_IMX21_IMX27_UART - bool "i.MX21 and i.MX27 Debug UART" - depends on SOC_IMX21 || SOC_IMX27 - help - Say Y here if you want kernel low-level debugging support - on i.MX21 or i.MX27. - - config DEBUG_IMX28_UART - bool "i.MX28 Debug UART" - depends on SOC_IMX28 - help - Say Y here if you want kernel low-level debugging support - on i.MX28. - - config DEBUG_IMX31_IMX35_UART - bool "i.MX31 and i.MX35 Debug UART" - depends on SOC_IMX31 || SOC_IMX35 - help - Say Y here if you want kernel low-level debugging support - on i.MX31 or i.MX35. - - config DEBUG_IMX51_UART - bool "i.MX51 Debug UART" - depends on SOC_IMX51 - help - Say Y here if you want kernel low-level debugging support - on i.MX51. - - config DEBUG_IMX50_IMX53_UART - bool "i.MX50 and i.MX53 Debug UART" - depends on SOC_IMX50 || SOC_IMX53 - help - Say Y here if you want kernel low-level debugging support - on i.MX50 or i.MX53. - - config DEBUG_S3C_UART0 - depends on PLAT_SAMSUNG - bool "Use S3C UART 0 for low-level debug" - help - Say Y here if you want the debug print routines to direct - their output to UART 0. The port must have been initialised - by the boot-loader before use. - - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. - - config DEBUG_S3C_UART1 - depends on PLAT_SAMSUNG - bool "Use S3C UART 1 for low-level debug" - help - Say Y here if you want the debug print routines to direct - their output to UART 1. The port must have been initialised - by the boot-loader before use. - - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. - - config DEBUG_S3C_UART2 - depends on PLAT_SAMSUNG - bool "Use S3C UART 2 for low-level debug" - help - Say Y here if you want the debug print routines to direct - their output to UART 2. The port must have been initialised - by the boot-loader before use. - - The uncompressor code port configuration is now handled - by CONFIG_S3C_LOWLEVEL_UART_PORT. - - config DEBUG_REALVIEW_STD_PORT - bool "RealView Default UART" - depends on ARCH_REALVIEW - help - Say Y here if you want the debug print routines to direct - their output to the serial port on RealView EB, PB11MP, PBA8 - and PBX platforms. - - config DEBUG_REALVIEW_PB1176_PORT - bool "RealView PB1176 UART" - depends on MACH_REALVIEW_PB1176 - help - Say Y here if you want the debug print routines to direct - their output to the standard serial port on the RealView - PB1176 platform. - -endchoice - config EARLY_PRINTK bool "Early printk" depends on DEBUG_LL @@ -243,6 +80,18 @@ config EARLY_PRINTK kernel low-level debugging functions. Add earlyprintk to your kernel parameters to enable this console. +config DEBUG_ICEDCC + bool "Kernel low-level debugging via EmbeddedICE DCC channel" + depends on DEBUG_LL + help + Say Y here if you want the debug print routines to direct their + output to the EmbeddedICE macrocell's DCC channel using + co-processor 14. This is known to work on the ARM9 style ICE + channel and on the XScale with the PEEDI. + + It does include a timeout to ensure that the system does not + totally freeze when there is nothing connected to read. + config OC_ETM bool "On-chip ETM and ETB" select ARM_AMBA @@ -251,4 +100,33 @@ config OC_ETM buffer driver that will allow you to collect traces of the kernel code. +config DEBUG_DC21285_PORT + bool "Kernel low-level debugging messages via footbridge serial port" + depends on DEBUG_LL && FOOTBRIDGE + help + Say Y here if you want the debug print routines to direct their + output to the serial port in the DC21285 (Footbridge). Saying N + will cause the debug messages to appear on the first 16550 + serial port. + +config DEBUG_CLPS711X_UART2 + bool "Kernel low-level debugging messages via UART2" + depends on DEBUG_LL && ARCH_CLPS711X + help + Say Y here if you want the debug print routines to direct their + output to the second serial port on these devices. Saying N will + cause the debug messages to appear on the first serial port. + +config DEBUG_S3C_UART + depends on PLAT_SAMSUNG + int "S3C UART to use for low-level debug" + default "0" + help + Choice for UART for kernel low-level using S3C UARTS, + should be between zero and two. The port must have been + initialised by the boot-loader before use. + + The uncompressor code port configuration is now handled + by CONFIG_S3C_LOWLEVEL_UART_PORT. + endmenu diff --git a/trunk/arch/arm/common/gic.c b/trunk/arch/arm/common/gic.c index 3227ca952a12..666b278e56d7 100644 --- a/trunk/arch/arm/common/gic.c +++ b/trunk/arch/arm/common/gic.c @@ -180,7 +180,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, return -EINVAL; mask = 0xff << shift; - bit = 1 << (cpu + shift); + bit = 1 << (cpu_logical_map(cpu) + shift); spin_lock(&irq_controller_lock); val = readl_relaxed(reg) & ~mask; @@ -259,9 +259,15 @@ static void __init gic_dist_init(struct gic_chip_data *gic, unsigned int irq_start) { unsigned int gic_irqs, irq_limit, i; + u32 cpumask; void __iomem *base = gic->dist_base; - u32 cpumask = 1 << smp_processor_id(); + u32 cpu = 0; +#ifdef CONFIG_SMP + cpu = cpu_logical_map(smp_processor_id()); +#endif + + cpumask = 1 << cpu; cpumask |= cpumask << 8; cpumask |= cpumask << 16; @@ -382,7 +388,12 @@ void __cpuinit gic_enable_ppi(unsigned int irq) #ifdef CONFIG_SMP void gic_raise_softirq(const struct cpumask *mask, unsigned int irq) { - unsigned long map = *cpus_addr(*mask); + int cpu; + unsigned long map = 0; + + /* Convert our logical CPU mask into a physical one. */ + for_each_cpu(cpu, mask) + map |= 1 << cpu_logical_map(cpu); /* * Ensure that stores to Normal memory are visible to the diff --git a/trunk/arch/arm/include/asm/cputype.h b/trunk/arch/arm/include/asm/cputype.h index cd4458f64171..cb47d28cbe1f 100644 --- a/trunk/arch/arm/include/asm/cputype.h +++ b/trunk/arch/arm/include/asm/cputype.h @@ -8,6 +8,7 @@ #define CPUID_CACHETYPE 1 #define CPUID_TCM 2 #define CPUID_TLBTYPE 3 +#define CPUID_MPIDR 5 #define CPUID_EXT_PFR0 "c1, 0" #define CPUID_EXT_PFR1 "c1, 1" @@ -70,6 +71,11 @@ static inline unsigned int __attribute_const__ read_cpuid_tcmstatus(void) return read_cpuid(CPUID_TCM); } +static inline unsigned int __attribute_const__ read_cpuid_mpidr(void) +{ + return read_cpuid(CPUID_MPIDR); +} + /* * Intel's XScale3 core supports some v6 features (supersections, L2) * but advertises itself as v5 as it does not support the v6 ISA. For diff --git a/trunk/arch/arm/include/asm/exception.h b/trunk/arch/arm/include/asm/exception.h new file mode 100644 index 000000000000..5abaf5bbd985 --- /dev/null +++ b/trunk/arch/arm/include/asm/exception.h @@ -0,0 +1,19 @@ +/* + * Annotations for marking C functions as exception handlers. + * + * These should only be used for C functions that are called from the low + * level exception entry code and not any intervening C code. + */ +#ifndef __ASM_ARM_EXCEPTION_H +#define __ASM_ARM_EXCEPTION_H + +#include + +#define __exception __attribute__((section(".exception.text"))) +#ifdef CONFIG_FUNCTION_GRAPH_TRACER +#define __exception_irq_entry __irq_entry +#else +#define __exception_irq_entry __exception +#endif + +#endif /* __ASM_ARM_EXCEPTION_H */ diff --git a/trunk/arch/arm/include/asm/localtimer.h b/trunk/arch/arm/include/asm/localtimer.h index 080d74f8128d..3306f281333c 100644 --- a/trunk/arch/arm/include/asm/localtimer.h +++ b/trunk/arch/arm/include/asm/localtimer.h @@ -22,6 +22,10 @@ void percpu_timer_setup(void); */ asmlinkage void do_local_timer(struct pt_regs *); +/* + * Called from C code + */ +void handle_local_timer(struct pt_regs *); #ifdef CONFIG_LOCAL_TIMERS diff --git a/trunk/arch/arm/include/asm/smp.h b/trunk/arch/arm/include/asm/smp.h index e42d96a45d3e..0a17b62538c2 100644 --- a/trunk/arch/arm/include/asm/smp.h +++ b/trunk/arch/arm/include/asm/smp.h @@ -32,6 +32,11 @@ extern void show_ipi_list(struct seq_file *, int); */ asmlinkage void do_IPI(int ipinr, struct pt_regs *regs); +/* + * Called from C code, this handles an IPI. + */ +void handle_IPI(int ipinr, struct pt_regs *regs); + /* * Setup the set of possible CPUs (via set_cpu_possible) */ @@ -65,6 +70,12 @@ extern void platform_secondary_init(unsigned int cpu); */ extern void platform_smp_prepare_cpus(unsigned int); +/* + * Logical CPU mapping. + */ +extern int __cpu_logical_map[NR_CPUS]; +#define cpu_logical_map(cpu) __cpu_logical_map[cpu] + /* * Initial data for bringing up a secondary CPU. */ diff --git a/trunk/arch/arm/include/asm/system.h b/trunk/arch/arm/include/asm/system.h index 832888d0c20c..ed6b0499a106 100644 --- a/trunk/arch/arm/include/asm/system.h +++ b/trunk/arch/arm/include/asm/system.h @@ -62,13 +62,6 @@ #include -#define __exception __attribute__((section(".exception.text"))) -#ifdef CONFIG_FUNCTION_GRAPH_TRACER -#define __exception_irq_entry __irq_entry -#else -#define __exception_irq_entry __exception -#endif - struct thread_info; struct task_struct; diff --git a/trunk/arch/arm/include/asm/topology.h b/trunk/arch/arm/include/asm/topology.h index accbd7cad9b5..a7e457ed27c3 100644 --- a/trunk/arch/arm/include/asm/topology.h +++ b/trunk/arch/arm/include/asm/topology.h @@ -1,6 +1,39 @@ #ifndef _ASM_ARM_TOPOLOGY_H #define _ASM_ARM_TOPOLOGY_H +#ifdef CONFIG_ARM_CPU_TOPOLOGY + +#include + +struct cputopo_arm { + int thread_id; + int core_id; + int socket_id; + cpumask_t thread_sibling; + cpumask_t core_sibling; +}; + +extern struct cputopo_arm cpu_topology[NR_CPUS]; + +#define topology_physical_package_id(cpu) (cpu_topology[cpu].socket_id) +#define topology_core_id(cpu) (cpu_topology[cpu].core_id) +#define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_sibling) +#define topology_thread_cpumask(cpu) (&cpu_topology[cpu].thread_sibling) + +#define mc_capable() (cpu_topology[0].socket_id != -1) +#define smt_capable() (cpu_topology[0].thread_id != -1) + +void init_cpu_topology(void); +void store_cpu_topology(unsigned int cpuid); +const struct cpumask *cpu_coregroup_mask(unsigned int cpu); + +#else + +static inline void init_cpu_topology(void) { } +static inline void store_cpu_topology(unsigned int cpuid) { } + +#endif + #include #endif /* _ASM_ARM_TOPOLOGY_H */ diff --git a/trunk/arch/arm/kernel/Makefile b/trunk/arch/arm/kernel/Makefile index f7887dc53c1f..c687bceba7da 100644 --- a/trunk/arch/arm/kernel/Makefile +++ b/trunk/arch/arm/kernel/Makefile @@ -66,6 +66,7 @@ obj-$(CONFIG_IWMMXT) += iwmmxt.o obj-$(CONFIG_CPU_HAS_PMU) += pmu.o obj-$(CONFIG_HW_PERF_EVENTS) += perf_event.o AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt +obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o ifneq ($(CONFIG_ARCH_EBSA110),y) obj-y += io.o diff --git a/trunk/arch/arm/kernel/irq.c b/trunk/arch/arm/kernel/irq.c index de3dcab8610b..53919b230e8b 100644 --- a/trunk/arch/arm/kernel/irq.c +++ b/trunk/arch/arm/kernel/irq.c @@ -35,8 +35,8 @@ #include #include #include -#include +#include #include #include #include diff --git a/trunk/arch/arm/kernel/smp.c b/trunk/arch/arm/kernel/smp.c index d88ff0230e82..35417d0fb8ab 100644 --- a/trunk/arch/arm/kernel/smp.c +++ b/trunk/arch/arm/kernel/smp.c @@ -16,7 +16,6 @@ #include #include #include -#include #include #include #include @@ -31,6 +30,8 @@ #include #include #include +#include +#include #include #include #include @@ -39,6 +40,7 @@ #include #include #include +#include /* * as from 2.5, kernels no longer have an init_tasks structure @@ -259,6 +261,20 @@ void __ref cpu_die(void) } #endif /* CONFIG_HOTPLUG_CPU */ +int __cpu_logical_map[NR_CPUS]; + +void __init smp_setup_processor_id(void) +{ + int i; + u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0; + + cpu_logical_map(0) = cpu; + for (i = 1; i < NR_CPUS; ++i) + cpu_logical_map(i) = i == cpu ? 0 : i; + + printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu); +} + /* * Called by both boot and secondaries to move global data into * per-processor storage. @@ -268,6 +284,8 @@ static void __cpuinit smp_store_cpu_info(unsigned int cpuid) struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid); cpu_info->loops_per_jiffy = loops_per_jiffy; + + store_cpu_topology(cpuid); } /* @@ -358,6 +376,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus) { unsigned int ncores = num_possible_cpus(); + init_cpu_topology(); + smp_store_cpu_info(smp_processor_id()); /* @@ -459,6 +479,11 @@ static void ipi_timer(void) #ifdef CONFIG_LOCAL_TIMERS asmlinkage void __exception_irq_entry do_local_timer(struct pt_regs *regs) +{ + handle_local_timer(regs); +} + +void handle_local_timer(struct pt_regs *regs) { struct pt_regs *old_regs = set_irq_regs(regs); int cpu = smp_processor_id(); @@ -566,6 +591,11 @@ static void ipi_cpu_stop(unsigned int cpu) * Main handler for inter-processor interrupts */ asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs) +{ + handle_IPI(ipinr, regs); +} + +void handle_IPI(int ipinr, struct pt_regs *regs) { unsigned int cpu = smp_processor_id(); struct pt_regs *old_regs = set_irq_regs(regs); diff --git a/trunk/arch/arm/kernel/smp_scu.c b/trunk/arch/arm/kernel/smp_scu.c index 79ed5e7f204a..5b6d536cbfe3 100644 --- a/trunk/arch/arm/kernel/smp_scu.c +++ b/trunk/arch/arm/kernel/smp_scu.c @@ -33,7 +33,7 @@ unsigned int __init scu_get_core_count(void __iomem *scu_base) /* * Enable the SCU */ -void __init scu_enable(void __iomem *scu_base) +void scu_enable(void __iomem *scu_base) { u32 scu_ctrl; diff --git a/trunk/arch/arm/kernel/topology.c b/trunk/arch/arm/kernel/topology.c new file mode 100644 index 000000000000..1040c00405d0 --- /dev/null +++ b/trunk/arch/arm/kernel/topology.c @@ -0,0 +1,148 @@ +/* + * arch/arm/kernel/topology.c + * + * Copyright (C) 2011 Linaro Limited. + * Written by: Vincent Guittot + * + * based on arch/sh/kernel/topology.c + * + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#define MPIDR_SMP_BITMASK (0x3 << 30) +#define MPIDR_SMP_VALUE (0x2 << 30) + +#define MPIDR_MT_BITMASK (0x1 << 24) + +/* + * These masks reflect the current use of the affinity levels. + * The affinity level can be up to 16 bits according to ARM ARM + */ + +#define MPIDR_LEVEL0_MASK 0x3 +#define MPIDR_LEVEL0_SHIFT 0 + +#define MPIDR_LEVEL1_MASK 0xF +#define MPIDR_LEVEL1_SHIFT 8 + +#define MPIDR_LEVEL2_MASK 0xFF +#define MPIDR_LEVEL2_SHIFT 16 + +struct cputopo_arm cpu_topology[NR_CPUS]; + +const struct cpumask *cpu_coregroup_mask(unsigned int cpu) +{ + return &cpu_topology[cpu].core_sibling; +} + +/* + * store_cpu_topology is called at boot when only one cpu is running + * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, + * which prevents simultaneous write access to cpu_topology array + */ +void store_cpu_topology(unsigned int cpuid) +{ + struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; + unsigned int mpidr; + unsigned int cpu; + + /* If the cpu topology has been already set, just return */ + if (cpuid_topo->core_id != -1) + return; + + mpidr = read_cpuid_mpidr(); + + /* create cpu topology mapping */ + if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) { + /* + * This is a multiprocessor system + * multiprocessor format & multiprocessor mode field are set + */ + + if (mpidr & MPIDR_MT_BITMASK) { + /* core performance interdependency */ + cpuid_topo->thread_id = (mpidr >> MPIDR_LEVEL0_SHIFT) + & MPIDR_LEVEL0_MASK; + cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL1_SHIFT) + & MPIDR_LEVEL1_MASK; + cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL2_SHIFT) + & MPIDR_LEVEL2_MASK; + } else { + /* largely independent cores */ + cpuid_topo->thread_id = -1; + cpuid_topo->core_id = (mpidr >> MPIDR_LEVEL0_SHIFT) + & MPIDR_LEVEL0_MASK; + cpuid_topo->socket_id = (mpidr >> MPIDR_LEVEL1_SHIFT) + & MPIDR_LEVEL1_MASK; + } + } else { + /* + * This is an uniprocessor system + * we are in multiprocessor format but uniprocessor system + * or in the old uniprocessor format + */ + cpuid_topo->thread_id = -1; + cpuid_topo->core_id = 0; + cpuid_topo->socket_id = -1; + } + + /* update core and thread sibling masks */ + for_each_possible_cpu(cpu) { + struct cputopo_arm *cpu_topo = &cpu_topology[cpu]; + + if (cpuid_topo->socket_id == cpu_topo->socket_id) { + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->core_sibling); + + if (cpuid_topo->core_id == cpu_topo->core_id) { + cpumask_set_cpu(cpuid, + &cpu_topo->thread_sibling); + if (cpu != cpuid) + cpumask_set_cpu(cpu, + &cpuid_topo->thread_sibling); + } + } + } + smp_wmb(); + + printk(KERN_INFO "CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", + cpuid, cpu_topology[cpuid].thread_id, + cpu_topology[cpuid].core_id, + cpu_topology[cpuid].socket_id, mpidr); +} + +/* + * init_cpu_topology is called at boot when only one cpu is running + * which prevent simultaneous write access to cpu_topology array + */ +void init_cpu_topology(void) +{ + unsigned int cpu; + + /* init core mask */ + for_each_possible_cpu(cpu) { + struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]); + + cpu_topo->thread_id = -1; + cpu_topo->core_id = -1; + cpu_topo->socket_id = -1; + cpumask_clear(&cpu_topo->core_sibling); + cpumask_clear(&cpu_topo->thread_sibling); + } + smp_wmb(); +} diff --git a/trunk/arch/arm/kernel/traps.c b/trunk/arch/arm/kernel/traps.c index bc9f9da782cb..210382555af1 100644 --- a/trunk/arch/arm/kernel/traps.c +++ b/trunk/arch/arm/kernel/traps.c @@ -27,6 +27,7 @@ #include #include +#include #include #include #include diff --git a/trunk/arch/arm/mach-exynos4/hotplug.c b/trunk/arch/arm/mach-exynos4/hotplug.c index 7490789784c9..da70e7e39937 100644 --- a/trunk/arch/arm/mach-exynos4/hotplug.c +++ b/trunk/arch/arm/mach-exynos4/hotplug.c @@ -75,7 +75,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious) : : "memory", "cc"); - if (pen_release == cpu) { + if (pen_release == cpu_logical_map(cpu)) { /* * OK, proper wakeup, we're done */ diff --git a/trunk/arch/arm/mach-exynos4/platsmp.c b/trunk/arch/arm/mach-exynos4/platsmp.c index 7c2282c6ba81..073381469c9d 100644 --- a/trunk/arch/arm/mach-exynos4/platsmp.c +++ b/trunk/arch/arm/mach-exynos4/platsmp.c @@ -126,7 +126,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle) * Note that "pen_release" is the hardware CPU ID, whereas * "cpu" is Linux's internal ID. */ - write_pen_release(cpu); + write_pen_release(cpu_logical_map(cpu)); if (!(__raw_readl(S5P_ARM_CORE1_STATUS) & S5P_CORE_LOCAL_PWR_EN)) { __raw_writel(S5P_CORE_LOCAL_PWR_EN, diff --git a/trunk/arch/arm/mach-mxs/include/mach/debug-macro.S b/trunk/arch/arm/mach-mxs/include/mach/debug-macro.S index 6d9870448c3d..79650a1ad78d 100644 --- a/trunk/arch/arm/mach-mxs/include/mach/debug-macro.S +++ b/trunk/arch/arm/mach-mxs/include/mach/debug-macro.S @@ -14,9 +14,17 @@ #include #include -#ifdef CONFIG_DEBUG_IMX23_UART +#ifdef CONFIG_SOC_IMX23 +#ifdef UART_PADDR +#error "CONFIG_DEBUG_LL is incompatible with multiple archs" +#endif #define UART_PADDR MX23_DUART_BASE_ADDR -#elif defined (CONFIG_DEBUG_IMX28_UART) +#endif + +#ifdef CONFIG_SOC_IMX28 +#ifdef UART_PADDR +#error "CONFIG_DEBUG_LL is incompatible with multiple archs" +#endif #define UART_PADDR MX28_DUART_BASE_ADDR #endif diff --git a/trunk/arch/arm/mach-pxa/irq.c b/trunk/arch/arm/mach-pxa/irq.c index b09e848eb6c6..ca6075717824 100644 --- a/trunk/arch/arm/mach-pxa/irq.c +++ b/trunk/arch/arm/mach-pxa/irq.c @@ -19,6 +19,8 @@ #include #include +#include + #include #include #include diff --git a/trunk/arch/arm/mach-realview/include/mach/debug-macro.S b/trunk/arch/arm/mach-realview/include/mach/debug-macro.S index 0f387220a502..90b687cbe04e 100644 --- a/trunk/arch/arm/mach-realview/include/mach/debug-macro.S +++ b/trunk/arch/arm/mach-realview/include/mach/debug-macro.S @@ -10,10 +10,23 @@ * published by the Free Software Foundation. */ -#ifdef CONFIG_DEBUG_REALVIEW_STD_PORT +#if defined(CONFIG_MACH_REALVIEW_EB) || \ + defined(CONFIG_MACH_REALVIEW_PB11MP) || \ + defined(CONFIG_MACH_REALVIEW_PBA8) || \ + defined(CONFIG_MACH_REALVIEW_PBX) +#ifndef DEBUG_LL_UART_OFFSET #define DEBUG_LL_UART_OFFSET 0x00009000 -#elif defined(CONFIG_DEBUG_REALVIEW_PB1176_PORT) +#elif DEBUG_LL_UART_OFFSET != 0x00009000 +#warning "DEBUG_LL_UART_OFFSET already defined to a different value" +#endif +#endif + +#ifdef CONFIG_MACH_REALVIEW_PB1176 +#ifndef DEBUG_LL_UART_OFFSET #define DEBUG_LL_UART_OFFSET 0x0010c000 +#elif DEBUG_LL_UART_OFFSET != 0x0010c000 +#warning "DEBUG_LL_UART_OFFSET already defined to a different value" +#endif #endif #ifndef DEBUG_LL_UART_OFFSET diff --git a/trunk/arch/arm/mm/fault.c b/trunk/arch/arm/mm/fault.c index 3b5ea68acbb8..aa33949fef60 100644 --- a/trunk/arch/arm/mm/fault.c +++ b/trunk/arch/arm/mm/fault.c @@ -20,6 +20,7 @@ #include #include +#include #include #include #include diff --git a/trunk/arch/arm/plat-mxc/include/mach/debug-macro.S b/trunk/arch/arm/plat-mxc/include/mach/debug-macro.S index 07cfdbe8f068..e4dde91f0231 100644 --- a/trunk/arch/arm/plat-mxc/include/mach/debug-macro.S +++ b/trunk/arch/arm/plat-mxc/include/mach/debug-macro.S @@ -12,17 +12,43 @@ */ #include -#ifdef CONFIG_DEBUG_IMX1_UART +#ifdef CONFIG_SOC_IMX1 #define UART_PADDR MX1_UART1_BASE_ADDR -#elif defined (CONFIG_DEBUG_IMX25_UART) +#endif + +#ifdef CONFIG_SOC_IMX25 +#ifdef UART_PADDR +#error "CONFIG_DEBUG_LL is incompatible with multiple archs" +#endif #define UART_PADDR MX25_UART1_BASE_ADDR -#elif defined (CONFIG_DEBUG_IMX21_IMX27_UART) +#endif + +#if defined(CONFIG_SOC_IMX21) || defined (CONFIG_SOC_IMX27) +#ifdef UART_PADDR +#error "CONFIG_DEBUG_LL is incompatible with multiple archs" +#endif #define UART_PADDR MX2x_UART1_BASE_ADDR -#elif defined (CONFIG_DEBUG_IMX31_IMX35_UART) +#endif + +#if defined(CONFIG_SOC_IMX31) || defined(CONFIG_SOC_IMX35) +#ifdef UART_PADDR +#error "CONFIG_DEBUG_LL is incompatible with multiple archs" +#endif #define UART_PADDR MX3x_UART1_BASE_ADDR -#elif defined (CONFIG_DEBUG_IMX51_UART) +#endif + +#ifdef CONFIG_SOC_IMX51 +#ifdef UART_PADDR +#error "CONFIG_DEBUG_LL is incompatible with multiple archs" +#endif #define UART_PADDR MX51_UART1_BASE_ADDR -#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART) +#endif + +/* iMX50/53 have same addresses, but not iMX51 */ +#if defined(CONFIG_SOC_IMX50) || defined(CONFIG_SOC_IMX53) +#ifdef UART_PADDR +#error "CONFIG_DEBUG_LL is incompatible with multiple archs" +#endif #define UART_PADDR MX53_UART1_BASE_ADDR #endif diff --git a/trunk/arch/arm/plat-samsung/Kconfig b/trunk/arch/arm/plat-samsung/Kconfig index 49b14b1a7abe..b3e10659e4b8 100644 --- a/trunk/arch/arm/plat-samsung/Kconfig +++ b/trunk/arch/arm/plat-samsung/Kconfig @@ -367,11 +367,4 @@ config SAMSUNG_PD help Say Y here if you want to control Power Domain by Runtime PM. -config DEBUG_S3C_UART - depends on PLAT_SAMSUNG - int - default "0" if DEBUG_S3C_UART0 - default "1" if DEBUG_S3C_UART1 - default "2" if DEBUG_S3C_UART2 - endif