From 0472dec522cd689f3949ac1a93c497a7f534c894 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Sat, 4 Feb 2006 03:11:50 -0800 Subject: [PATCH] --- yaml --- r: 21371 b: refs/heads/master c: d398ee230f94a8ba386d8abb63f4fea129e4eaba h: refs/heads/master i: 21369: e7eca0d9ede217cc2aa14261b8060a7db2935769 21367: 307ccd31664b015c1d3b11977fd6e7415bf5781e v: v3 --- [refs] | 2 +- trunk/include/asm-sparc64/asi.h | 9 +++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 3002a03b988b..12f7430c7e85 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 398d10830843bda7798f71052b54a5341a8ddd53 +refs/heads/master: d398ee230f94a8ba386d8abb63f4fea129e4eaba diff --git a/trunk/include/asm-sparc64/asi.h b/trunk/include/asm-sparc64/asi.h index 4b36f5f4c8b3..662a21107ae6 100644 --- a/trunk/include/asm-sparc64/asi.h +++ b/trunk/include/asm-sparc64/asi.h @@ -30,13 +30,22 @@ */ #define ASI_PHYS_USE_EC 0x14 /* PADDR, E-cachable */ #define ASI_PHYS_BYPASS_EC_E 0x15 /* PADDR, E-bit */ +#define ASI_BLK_AIUP_4V 0x16 /* (4V) Prim, user, block ld/st */ +#define ASI_BLK_AIUS_4V 0x17 /* (4V) Sec, user, block ld/st */ #define ASI_PHYS_USE_EC_L 0x1c /* PADDR, E-cachable, little endian*/ #define ASI_PHYS_BYPASS_EC_E_L 0x1d /* PADDR, E-bit, little endian */ +#define ASI_BLK_AIUP_L_4V 0x1e /* (4V) Prim, user, block, l-endian*/ +#define ASI_BLK_AIUS_L_4V 0x1f /* (4V) Sec, user, block, l-endian */ +#define ASI_SCRATCHPAD 0x20 /* (4V) Scratch Pad Registers */ +#define ASI_MMU 0x21 /* (4V) MMU Context Registers */ #define ASI_BLK_INIT_QUAD_LDD_AIUS 0x23 /* (NG) init-store, twin load, * secondary, user */ #define ASI_NUCLEUS_QUAD_LDD 0x24 /* Cachable, qword load */ +#define ASI_QUEUE 0x25 /* (4V) Interrupt Queue Registers */ +#define ASI_QUAD_LDD_PHYS_4V 0x26 /* (4V) Physical, qword load */ #define ASI_NUCLEUS_QUAD_LDD_L 0x2c /* Cachable, qword load, l-endian */ +#define ASI_QUAD_LDD_PHYS_L_4V 0x2e /* (4V) Phys, qword load, l-endian */ #define ASI_PCACHE_DATA_STATUS 0x30 /* (III) PCache data stat RAM diag */ #define ASI_PCACHE_DATA 0x31 /* (III) PCache data RAM diag */ #define ASI_PCACHE_TAG 0x32 /* (III) PCache tag RAM diag */