From 059f9d4ec2d85219e01459615a64066d5f79d987 Mon Sep 17 00:00:00 2001
From: Timo Teras <timo.teras@solidboot.com>
Date: Mon, 26 Jun 2006 16:16:13 -0700
Subject: [PATCH] --- yaml --- r: 31680 b: refs/heads/master c:
 e32f7ec2e8bf00756c74a5e6a80bc59e949dd81d h: refs/heads/master v: v3

---
 [refs]                               | 2 +-
 trunk/arch/arm/mach-omap2/clock.c    | 2 +-
 trunk/arch/arm/mach-omap2/timer-gp.c | 2 +-
 trunk/arch/arm/plat-omap/dmtimer.c   | 9 +++++----
 4 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/[refs] b/[refs]
index bd34ab6cef08..dcc8776e6cd9 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 77900a2fc3bfb1eb6eaa6d43eef4591e1f7c600d
+refs/heads/master: e32f7ec2e8bf00756c74a5e6a80bc59e949dd81d
diff --git a/trunk/arch/arm/mach-omap2/clock.c b/trunk/arch/arm/mach-omap2/clock.c
index 242d8f925e9e..6789dd4029a1 100644
--- a/trunk/arch/arm/mach-omap2/clock.c
+++ b/trunk/arch/arm/mach-omap2/clock.c
@@ -753,7 +753,7 @@ static u32 omap2_get_src_field(u32 *type_to_addr, u32 reg_offset,
 			val = 0x2;
 		break;
 	case CM_WKUP_SEL1:
-		src_reg_addr = (u32)&CM_CLKSEL2_CORE;
+		src_reg_addr = (u32)&CM_CLKSEL_WKUP;
 		mask = 0x3;
 		if (src_clk == &func_32k_ck)
 			val = 0x0;
diff --git a/trunk/arch/arm/mach-omap2/timer-gp.c b/trunk/arch/arm/mach-omap2/timer-gp.c
index 3358c0d47b1a..cf78e6c5a277 100644
--- a/trunk/arch/arm/mach-omap2/timer-gp.c
+++ b/trunk/arch/arm/mach-omap2/timer-gp.c
@@ -61,7 +61,7 @@ static void __init omap2_gp_timer_init(void)
 	u32 tick_period;
 
 	omap_dm_timer_init();
-	gptimer = omap_dm_timer_request_specific(2);
+	gptimer = omap_dm_timer_request_specific(1);
 	BUG_ON(gptimer == NULL);
 
 	omap_dm_timer_set_source(gptimer, OMAP_TIMER_SRC_SYS_CLK);
diff --git a/trunk/arch/arm/plat-omap/dmtimer.c b/trunk/arch/arm/plat-omap/dmtimer.c
index c25a1a6d2b03..bfccebc77515 100644
--- a/trunk/arch/arm/plat-omap/dmtimer.c
+++ b/trunk/arch/arm/plat-omap/dmtimer.c
@@ -147,9 +147,10 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer)
 {
 	u32 l;
 
-	omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
-	omap_dm_timer_wait_for_reset(timer);
-
+	if (timer != &dm_timers[0]) {
+		omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
+		omap_dm_timer_wait_for_reset(timer);
+	}
 	omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_SYS_CLK);
 
 	/* Set to smart-idle mode */
@@ -335,7 +336,7 @@ void omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
 
 	/* When the functional clock disappears, too quick writes seem to
 	 * cause an abort. */
-	udelay(50);
+	__delay(15000);
 }
 
 #endif