From 06588b099b2d94f9cd496660a8cda0dc73675348 Mon Sep 17 00:00:00 2001 From: Valentine Barshak Date: Sat, 22 Sep 2007 00:50:09 +1000 Subject: [PATCH] --- yaml --- r: 67447 b: refs/heads/master c: 340ffd267c85fc28da7cfd681b177c816af800cf h: refs/heads/master i: 67445: 454f427c730af328563e30f2a24122d77f6fa22f 67443: 43971e389dd70f3ccb57981781ec0435bdb8eb97 67439: 8c08d7d29c4145341e8e3956796dd2acebdb8541 v: v3 --- [refs] | 2 +- trunk/arch/powerpc/kernel/cpu_setup_44x.S | 25 ++++++++++++++++++++++- trunk/arch/powerpc/kernel/cputable.c | 3 +++ 3 files changed, 28 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 3eeda342eab3..1283c91f5e66 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 8112753bb2c0045398c89d0647792b39805f6d40 +refs/heads/master: 340ffd267c85fc28da7cfd681b177c816af800cf diff --git a/trunk/arch/powerpc/kernel/cpu_setup_44x.S b/trunk/arch/powerpc/kernel/cpu_setup_44x.S index c790634d946b..8e1812e2f3ee 100644 --- a/trunk/arch/powerpc/kernel/cpu_setup_44x.S +++ b/trunk/arch/powerpc/kernel/cpu_setup_44x.S @@ -20,7 +20,14 @@ _GLOBAL(__setup_cpu_440ep) b __init_fpu_44x _GLOBAL(__setup_cpu_440epx) - b __init_fpu_44x + mflr r4 + bl __init_fpu_44x + bl __plb_disable_wrp + mtlr r4 + blr +_GLOBAL(__setup_cpu_440grx) + b __plb_disable_wrp + /* enable APU between CPU and FPU */ _GLOBAL(__init_fpu_44x) @@ -31,3 +38,19 @@ _GLOBAL(__init_fpu_44x) isync blr +/* + * Workaround for the incorrect write to DDR SDRAM errata. + * The write address can be corrupted during writes to + * DDR SDRAM when write pipelining is enabled on PLB0. + * Disable write pipelining here. + */ +#define DCRN_PLB4A0_ACR 0x81 + +_GLOBAL(__plb_disable_wrp) + mfdcr r3,DCRN_PLB4A0_ACR + /* clear WRP bit in PLB4A0_ACR */ + rlwinm r3,r3,0,8,6 + mtdcr DCRN_PLB4A0_ACR,r3 + isync + blr + diff --git a/trunk/arch/powerpc/kernel/cputable.c b/trunk/arch/powerpc/kernel/cputable.c index 94d98190e19a..b03a442b7888 100644 --- a/trunk/arch/powerpc/kernel/cputable.c +++ b/trunk/arch/powerpc/kernel/cputable.c @@ -33,6 +33,7 @@ EXPORT_SYMBOL(cur_cpu_spec); #ifdef CONFIG_PPC32 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); +extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); @@ -1146,6 +1147,8 @@ static struct cpu_spec cpu_specs[] = { .cpu_user_features = COMMON_USER_BOOKE, .icache_bsize = 32, .dcache_bsize = 32, + .cpu_setup = __setup_cpu_440grx, + .platform = "ppc440", }, { /* 440GP Rev. B */ .pvr_mask = 0xf0000fff,