From 06e1c5aca573dccb3476fae723deaf89d1aee062 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Wed, 28 Sep 2011 16:23:51 -0700 Subject: [PATCH] --- yaml --- r: 269791 b: refs/heads/master c: 97af61f57e03a39afa309d1c8a0d8fb9331e2f89 h: refs/heads/master i: 269789: 3bcfaaf45cf43401e652f9828b5da5fb89199d12 269787: d59683950fcebf4858a92177135c4b93cd0cd492 269783: 773c405eeea6b40b3c51b1f82bc955bab82c8048 269775: 3f52518f322240bc14c607a9a4caca2bbe95423e 269759: 74988329f472a635d63b2016880b1d48c2eeafa2 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_dp.c | 29 ++++++++++++++------------- 2 files changed, 16 insertions(+), 15 deletions(-) diff --git a/[refs] b/[refs] index 38593983b1f5..1454bcc80e83 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 1c0ae80a5e2893a3a3ed9582e46249ff559d2739 +refs/heads/master: 97af61f57e03a39afa309d1c8a0d8fb9331e2f89 diff --git a/trunk/drivers/gpu/drm/i915/intel_dp.c b/trunk/drivers/gpu/drm/i915/intel_dp.c index 9c2158c9c137..f80ff327d873 100644 --- a/trunk/drivers/gpu/drm/i915/intel_dp.c +++ b/trunk/drivers/gpu/drm/i915/intel_dp.c @@ -832,6 +832,8 @@ static void ironlake_edp_panel_vdd_on(struct intel_dp *intel_dp) struct drm_i915_private *dev_priv = dev->dev_private; u32 pp; + if (!is_edp(intel_dp)) + return; /* * If the panel wasn't on, make sure there's not a currently * active PP sequence before enabling AUX VDD. @@ -853,6 +855,8 @@ static void ironlake_edp_panel_vdd_off(struct intel_dp *intel_dp) struct drm_i915_private *dev_priv = dev->dev_private; u32 pp; + if (!is_edp(intel_dp)) + return; pp = I915_READ(PCH_PP_CONTROL); pp &= ~PANEL_UNLOCK_MASK; pp |= PANEL_UNLOCK_REGS; @@ -871,6 +875,8 @@ static bool ironlake_edp_panel_on (struct intel_dp *intel_dp) struct drm_i915_private *dev_priv = dev->dev_private; u32 pp, idle_on_mask = PP_ON | PP_SEQUENCE_STATE_ON_IDLE; + if (!is_edp(intel_dp)) + return; if (I915_READ(PCH_PP_STATUS) & PP_ON) return true; @@ -905,6 +911,8 @@ static void ironlake_edp_panel_off (struct drm_device *dev) u32 pp, idle_off_mask = PP_ON | PP_SEQUENCE_MASK | PP_CYCLE_DELAY_ACTIVE | PP_SEQUENCE_STATE_MASK; + if (!is_edp(intel_dp)) + return; pp = I915_READ(PCH_PP_CONTROL); pp &= ~PANEL_UNLOCK_MASK; pp |= PANEL_UNLOCK_REGS; @@ -1041,15 +1049,12 @@ static void intel_dp_commit(struct drm_encoder *encoder) struct intel_dp *intel_dp = enc_to_intel_dp(encoder); struct drm_device *dev = encoder->dev; - if (is_edp(intel_dp)) - ironlake_edp_panel_vdd_on(intel_dp); + ironlake_edp_panel_vdd_on(intel_dp); intel_dp_start_link_train(intel_dp); - if (is_edp(intel_dp)) { - ironlake_edp_panel_on(intel_dp); - ironlake_edp_panel_vdd_off(intel_dp); - } + ironlake_edp_panel_on(intel_dp); + ironlake_edp_panel_vdd_off(intel_dp); intel_dp_complete_link_train(intel_dp); @@ -1072,20 +1077,16 @@ intel_dp_dpms(struct drm_encoder *encoder, int mode) ironlake_edp_backlight_off(dev); intel_dp_sink_dpms(intel_dp, mode); intel_dp_link_down(intel_dp); - if (is_edp(intel_dp)) - ironlake_edp_panel_off(dev); + ironlake_edp_panel_off(dev); if (is_edp(intel_dp) && !is_pch_edp(intel_dp)) ironlake_edp_pll_off(encoder); } else { - if (is_edp(intel_dp)) - ironlake_edp_panel_vdd_on(intel_dp); + ironlake_edp_panel_vdd_on(intel_dp); intel_dp_sink_dpms(intel_dp, mode); if (!(dp_reg & DP_PORT_EN)) { intel_dp_start_link_train(intel_dp); - if (is_edp(intel_dp)) { - ironlake_edp_panel_on(intel_dp); - ironlake_edp_panel_vdd_off(intel_dp); - } + ironlake_edp_panel_on(intel_dp); + ironlake_edp_panel_vdd_off(intel_dp); intel_dp_complete_link_train(intel_dp); } if (is_edp(intel_dp))