From 06eda1cd3071bcac741aabf5d08f6c0bc9beedba Mon Sep 17 00:00:00 2001 From: Alberto Panizzo Date: Tue, 23 Mar 2010 19:51:45 +0100 Subject: [PATCH] --- yaml --- r: 189816 b: refs/heads/master c: ae7a3f13ab59784d9d5041d8ecb08477a049e2c6 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-mx3/mach-mx31_3ds.c | 45 +++++++++++++++++++++++++ 2 files changed, 46 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 1e51c1308289..1e0c8425191f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a1ac442443342f778d5230b16efadc4c32d96298 +refs/heads/master: ae7a3f13ab59784d9d5041d8ecb08477a049e2c6 diff --git a/trunk/arch/arm/mach-mx3/mach-mx31_3ds.c b/trunk/arch/arm/mach-mx3/mach-mx31_3ds.c index 80179cf9e2f5..f54af1e29ca4 100644 --- a/trunk/arch/arm/mach-mx3/mach-mx31_3ds.c +++ b/trunk/arch/arm/mach-mx3/mach-mx31_3ds.c @@ -23,6 +23,9 @@ #include #include #include +#include +#include +#include #include #include @@ -60,6 +63,33 @@ static int mx31_3ds_pins[] = { MX31_PIN_CSPI2_SPI_RDY__SPI_RDY, MX31_PIN_CSPI2_SS0__SS0, MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */ + /* MC13783 IRQ */ + IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO), +}; + +/* Regulators */ +static struct regulator_init_data pwgtx_init = { + .constraints = { + .boot_on = 1, + .always_on = 1, + }, +}; + +static struct mc13783_regulator_init_data mx31_3ds_regulators[] = { + { + .id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */ + .init_data = &pwgtx_init, + }, { + .id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */ + .init_data = &pwgtx_init, + }, +}; + +/* MC13783 */ +static struct mc13783_platform_data mc13783_pdata __initdata = { + .regulators = mx31_3ds_regulators, + .num_regulators = ARRAY_SIZE(mx31_3ds_regulators), + .flags = MC13783_USE_REGULATOR, }; /* SPI */ @@ -73,6 +103,18 @@ static struct spi_imx_master spi1_pdata = { .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect), }; +static struct spi_board_info mx31_3ds_spi_devs[] __initdata = { + { + .modalias = "mc13783", + .max_speed_hz = 1000000, + .bus_num = 1, + .chip_select = 1, /* SS2 */ + .platform_data = &mc13783_pdata, + .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3), + .mode = SPI_CS_HIGH, + }, +}; + /* * NAND Flash */ @@ -268,7 +310,10 @@ static void __init mxc_board_init(void) mxc_register_device(&mxc_uart_device0, &uart_pdata); mxc_register_device(&mxc_nand_device, &imx31_3ds_nand_flash_pdata); + mxc_register_device(&mxc_spi_device1, &spi1_pdata); + spi_register_board_info(mx31_3ds_spi_devs, + ARRAY_SIZE(mx31_3ds_spi_devs)); if (!mx31_3ds_init_expio()) platform_device_register(&smsc911x_device);