diff --git a/[refs] b/[refs]
index 202c7bf67efe..c2a7cbb5c6f7 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 4e653e04cc1c3553af539ffc81fb56d83d83c733
+refs/heads/master: c8e674125e03c5f36ccfd61d83b933e6956074b0
diff --git a/trunk/arch/blackfin/include/asm/delay.h b/trunk/arch/blackfin/include/asm/delay.h
index 47f98c5067b5..c31f91cc1d5d 100644
--- a/trunk/arch/blackfin/include/asm/delay.h
+++ b/trunk/arch/blackfin/include/asm/delay.h
@@ -13,29 +13,7 @@
 
 static inline void __delay(unsigned long loops)
 {
-	if (ANOMALY_05000312) {
-		/* Interrupted loads to loop registers -> bad */
-		unsigned long tmp;
-		__asm__ __volatile__(
-			"[--SP] = LC0;"
-			"[--SP] = LT0;"
-			"[--SP] = LB0;"
-			"LSETUP (1f,1f) LC0 = %1;"
-			"1: NOP;"
-			/* We take advantage of the fact that LC0 is 0 at
-			 * the end of the loop.  Otherwise we'd need some
-			 * NOPs after the CLI here.
-			 */
-			"CLI %0;"
-			"LB0 = [SP++];"
-			"LT0 = [SP++];"
-			"LC0 = [SP++];"
-			"STI %0;"
-			: "=d" (tmp)
-			: "a" (loops)
-		);
-	} else
-		__asm__ __volatile__ (
+__asm__ __volatile__ (
 			"LSETUP(1f, 1f) LC0 = %0;"
 			"1: NOP;"
 			: