From 0880e95d35b3372478a9a60bcb4f2ce36295b59b Mon Sep 17 00:00:00 2001 From: "joe@perches.com" Date: Tue, 18 Dec 2007 06:30:15 +1100 Subject: [PATCH] --- yaml --- r: 81105 b: refs/heads/master c: f3d711aa02791ca5efa33112994063c9aeaf39ee h: refs/heads/master i: 81103: 4cd37c6996434e55b44e1fb16da25e7789a2fae3 v: v3 --- [refs] | 2 +- trunk/include/asm-ppc/8xx_immap.h | 2 +- trunk/include/asm-ppc/commproc.h | 2 +- trunk/include/asm-ppc/reg_booke.h | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 42308c0bb8d4..42c62d4c1193 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c90e10962516c36edf5d9ea756cf11c7853084c5 +refs/heads/master: f3d711aa02791ca5efa33112994063c9aeaf39ee diff --git a/trunk/include/asm-ppc/8xx_immap.h b/trunk/include/asm-ppc/8xx_immap.h index 1311cefdfd30..4b0e15206006 100644 --- a/trunk/include/asm-ppc/8xx_immap.h +++ b/trunk/include/asm-ppc/8xx_immap.h @@ -123,7 +123,7 @@ typedef struct mem_ctlr { #define OR_G5LA 0x00000400 /* Output #GPL5 on #GPL_A5 */ #define OR_G5LS 0x00000200 /* Drive #GPL high on falling edge of...*/ #define OR_BI 0x00000100 /* Burst inhibit */ -#define OR_SCY_MSK 0x000000f0 /* Cycle Lenght in Clocks */ +#define OR_SCY_MSK 0x000000f0 /* Cycle Length in Clocks */ #define OR_SCY_0_CLK 0x00000000 /* 0 clock cycles wait states */ #define OR_SCY_1_CLK 0x00000010 /* 1 clock cycles wait states */ #define OR_SCY_2_CLK 0x00000020 /* 2 clock cycles wait states */ diff --git a/trunk/include/asm-ppc/commproc.h b/trunk/include/asm-ppc/commproc.h index 397248705e0e..462abb185f07 100644 --- a/trunk/include/asm-ppc/commproc.h +++ b/trunk/include/asm-ppc/commproc.h @@ -681,7 +681,7 @@ typedef struct risc_timer_pram { #define CICR_SCC_SCC3 ((uint)0x00200000) /* SCC3 @ SCCc */ #define CICR_SCB_SCC2 ((uint)0x00040000) /* SCC2 @ SCCb */ #define CICR_SCA_SCC1 ((uint)0x00000000) /* SCC1 @ SCCa */ -#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrrupt */ +#define CICR_IRL_MASK ((uint)0x0000e000) /* Core interrupt */ #define CICR_HP_MASK ((uint)0x00001f00) /* Hi-pri int. */ #define CICR_IEN ((uint)0x00000080) /* Int. enable */ #define CICR_SPS ((uint)0x00000001) /* SCC Spread */ diff --git a/trunk/include/asm-ppc/reg_booke.h b/trunk/include/asm-ppc/reg_booke.h index 82948ed2744a..4cad45a055dd 100644 --- a/trunk/include/asm-ppc/reg_booke.h +++ b/trunk/include/asm-ppc/reg_booke.h @@ -283,7 +283,7 @@ #define ESR_IMCB 0x20000000 /* Instr. Machine Check - Bus error */ #define ESR_IMCT 0x10000000 /* Instr. Machine Check - Timeout */ #define ESR_PIL 0x08000000 /* Program Exception - Illegal */ -#define ESR_PPR 0x04000000 /* Program Exception - Priveleged */ +#define ESR_PPR 0x04000000 /* Program Exception - Privileged */ #define ESR_PTR 0x02000000 /* Program Exception - Trap */ #define ESR_FP 0x01000000 /* Floating Point Operation */ #define ESR_DST 0x00800000 /* Storage Exception - Data miss */