diff --git a/[refs] b/[refs] index 6ae266c51136..4ea19a97519b 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0a43cd3b1cc1b7e1dfc461cf55b414610d038769 +refs/heads/master: 70384d3f12ae0981195a3d8d3e3f033887e6603c diff --git a/trunk/Documentation/devicetree/bindings/gpio/gpio.txt b/trunk/Documentation/devicetree/bindings/gpio/gpio.txt index a33628759d36..d933af370697 100644 --- a/trunk/Documentation/devicetree/bindings/gpio/gpio.txt +++ b/trunk/Documentation/devicetree/bindings/gpio/gpio.txt @@ -98,7 +98,7 @@ announce the pinrange to the pin ctrl subsystem. For example, compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank"; reg = <0x1460 0x18>; gpio-controller; - gpio-ranges = <&pinctrl1 20 10>, <&pinctrl2 50 20>; + gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>; } @@ -107,8 +107,8 @@ where, Next values specify the base pin and number of pins for the range handled by 'qe_pio_e' gpio. In the given example from base pin 20 to - pin 29 under pinctrl1 and pin 50 to pin 69 under pinctrl2 is handled - by this gpio controller. + pin 29 under pinctrl1 with gpio offset 0 and pin 50 to pin 69 under + pinctrl2 with gpio offset 10 is handled by this gpio controller. The pinctrl node must have "#gpio-range-cells" property to show number of arguments to pass with phandle from gpio controllers node. diff --git a/trunk/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt b/trunk/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt index 2c81e45f1374..fa1746b639b9 100644 --- a/trunk/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt +++ b/trunk/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt @@ -1,7 +1,9 @@ One-register-per-pin type device tree based pinctrl driver Required properties: -- compatible : "pinctrl-single" +- compatible : "pinctrl-single" or "pinconf-single". + "pinctrl-single" means that pinconf isn't supported. + "pinconf-single" means that generic pinconf is supported. - reg : offset and length of the register set for the mux registers @@ -14,9 +16,61 @@ Optional properties: - pinctrl-single,function-off : function off mode for disabled state if available and same for all registers; if not specified, disabling of pin functions is ignored + - pinctrl-single,bit-per-mux : boolean to indicate that one register controls more than one pin +- pinctrl-single,drive-strength : array of value that are used to configure + drive strength in the pinmux register. They're value of drive strength + current and drive strength mask. + + /* drive strength current, mask */ + pinctrl-single,power-source = <0x30 0xf0>; + +- pinctrl-single,bias-pullup : array of value that are used to configure the + input bias pullup in the pinmux register. + + /* input, enabled pullup bits, disabled pullup bits, mask */ + pinctrl-single,bias-pullup = <0 1 0 1>; + +- pinctrl-single,bias-pulldown : array of value that are used to configure the + input bias pulldown in the pinmux register. + + /* input, enabled pulldown bits, disabled pulldown bits, mask */ + pinctrl-single,bias-pulldown = <2 2 0 2>; + + * Two bits to control input bias pullup and pulldown: User should use + pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. One bit means + pullup, and the other one bit means pulldown. + * Three bits to control input bias enable, pullup and pulldown. User should + use pinctrl-single,bias-pullup & pinctrl-single,bias-pulldown. Input bias + enable bit should be included in pullup or pulldown bits. + * Although driver could set PIN_CONFIG_BIAS_DISABLE, there's no property as + pinctrl-single,bias-disable. Because pinctrl single driver could implement + it by calling pulldown, pullup disabled. + +- pinctrl-single,input-schmitt : array of value that are used to configure + input schmitt in the pinmux register. In some silicons, there're two input + schmitt value (rising-edge & falling-edge) in the pinmux register. + + /* input schmitt value, mask */ + pinctrl-single,input-schmitt = <0x30 0x70>; + +- pinctrl-single,input-schmitt-enable : array of value that are used to + configure input schmitt enable or disable in the pinmux register. + + /* input, enable bits, disable bits, mask */ + pinctrl-single,input-schmitt-enable = <0x30 0x40 0 0x70>; + +- pinctrl-single,gpio-range : list of value that are used to configure a GPIO + range. They're value of subnode phandle, pin base in pinctrl device, pin + number in this range, GPIO function value of this GPIO range. + The number of parameters is depend on #pinctrl-single,gpio-range-cells + property. + + /* pin base, nr pins & gpio function */ + pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1>; + This driver assumes that there is only one register for each pin (unless the pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as specified in the pinctrl-bindings.txt document in this directory. @@ -42,6 +96,20 @@ Where 0xdc is the offset from the pinctrl register base address for the device pinctrl register, 0x18 is the desired value, and 0xff is the sub mask to be used when applying this change to the register. + +Optional sub-node: In case some pins could be configured as GPIO in the pinmux +register, those pins could be defined as a GPIO range. This sub-node is required +by pinctrl-single,gpio-range property. + +Required properties in sub-node: +- #pinctrl-single,gpio-range-cells : the number of parameters after phandle in + pinctrl-single,gpio-range property. + + range: gpio-range { + #pinctrl-single,gpio-range-cells = <3>; + }; + + Example: /* SoC common file */ @@ -76,6 +144,29 @@ control_devconf0: pinmux@48002274 { pinctrl-single,function-mask = <0x5F>; }; +/* third controller instance for pins in gpio domain */ +pmx_gpio: pinmux@d401e000 { + compatible = "pinconf-single"; + reg = <0xd401e000 0x0330>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <7>; + + /* sparse GPIO range could be supported */ + pinctrl-single,gpio-range = <&range 0 3 0 &range 3 9 1 + &range 12 1 0 &range 13 29 1 + &range 43 1 0 &range 44 49 1 + &range 94 1 1 &range 96 2 1>; + + range: gpio-range { + #pinctrl-single,gpio-range-cells = <3>; + }; +}; + + /* board specific .dts file */ &pmx_core { @@ -96,6 +187,15 @@ control_devconf0: pinmux@48002274 { >; }; + uart0_pins: pinmux_uart0_pins { + pinctrl-single,pins = < + 0x208 0 /* UART0_RXD (IOCFG138) */ + 0x20c 0 /* UART0_TXD (IOCFG139) */ + >; + pinctrl-single,bias-pulldown = <0 2 2>; + pinctrl-single,bias-pullup = <0 1 1>; + }; + /* map uart2 pins */ uart2_pins: pinmux_uart2_pins { pinctrl-single,pins = < @@ -122,6 +222,11 @@ control_devconf0: pinmux@48002274 { }; +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; +}; + &uart2 { pinctrl-names = "default"; pinctrl-0 = <&uart2_pins>; diff --git a/trunk/arch/arm/boot/dts/Makefile b/trunk/arch/arm/boot/dts/Makefile index 9c6255884cbb..ee9fbe4d9912 100644 --- a/trunk/arch/arm/boot/dts/Makefile +++ b/trunk/arch/arm/boot/dts/Makefile @@ -136,7 +136,9 @@ dtb-$(CONFIG_ARCH_U8500) += snowball.dtb \ ccu9540.dtb dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ r8a7740-armadillo800eva.dtb \ + r8a7779-marzen-reference.dtb \ sh73a0-kzm9g.dtb \ + sh73a0-kzm9g-reference.dtb \ sh7372-mackerel.dtb dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \ socfpga_vt.dtb diff --git a/trunk/arch/arm/boot/dts/r8a7779-marzen-reference.dts b/trunk/arch/arm/boot/dts/r8a7779-marzen-reference.dts new file mode 100644 index 000000000000..72be4c87cfb5 --- /dev/null +++ b/trunk/arch/arm/boot/dts/r8a7779-marzen-reference.dts @@ -0,0 +1,47 @@ +/* + * Reference Device Tree Source for the Marzen board + * + * Copyright (C) 2013 Renesas Solutions Corp. + * Copyright (C) 2013 Simon Horman + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +/include/ "r8a7779.dtsi" + +/ { + model = "marzen"; + compatible = "renesas,marzen-reference", "renesas,r8a7779"; + + chosen { + bootargs = "console=ttySC2,115200 earlyprintk=sh-sci.2,115200 ignore_loglevel root=/dev/nfs ip=on"; + }; + + memory { + device_type = "memory"; + reg = <0x60000000 0x40000000>; + }; + + fixedregulator3v3: fixedregulator@0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + lan0@18000000 { + compatible = "smsc,lan9220", "smsc,lan9115"; + reg = <0x18000000 0x100>; + phy-mode = "mii"; + interrupt-parent = <&gic>; + interrupts = <0 28 0x4>; + reg-io-width = <4>; + vddvario-supply = <&fixedregulator3v3>; + vdd33a-supply = <&fixedregulator3v3>; + }; +}; diff --git a/trunk/arch/arm/boot/dts/r8a7779.dtsi b/trunk/arch/arm/boot/dts/r8a7779.dtsi new file mode 100644 index 000000000000..fe5c6f213271 --- /dev/null +++ b/trunk/arch/arm/boot/dts/r8a7779.dtsi @@ -0,0 +1,98 @@ +/* + * Device Tree Source for Renesas r8a7779 + * + * Copyright (C) 2013 Renesas Solutions Corp. + * Copyright (C) 2013 Simon Horman + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/include/ "skeleton.dtsi" + +/ { + compatible = "renesas,r8a7779"; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <1>; + }; + cpu@2 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <2>; + }; + cpu@3 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <3>; + }; + }; + + gic: interrupt-controller@f0001000 { + compatible = "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0xf0001000 0x1000>, + <0xf0000100 0x100>; + }; + + i2c0: i2c@0xffc70000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,rmobile-iic"; + reg = <0xffc70000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 79 0x4>; + }; + + i2c1: i2c@0xffc71000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,rmobile-iic"; + reg = <0xffc71000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 82 0x4>; + }; + + i2c2: i2c@0xffc72000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,rmobile-iic"; + reg = <0xffc72000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 80 0x4>; + }; + + i2c3: i2c@0xffc73000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,rmobile-iic"; + reg = <0xffc73000 0x1000>; + interrupt-parent = <&gic>; + interrupts = <0 81 0x4>; + }; + + thermal@ffc48000 { + compatible = "renesas,rcar-thermal"; + reg = <0xffc48000 0x38>; + }; + + sata: sata@fc600000 { + compatible = "renesas,rcar-sata"; + reg = <0xfc600000 0x2000>; + interrupt-parent = <&gic>; + interrupts = <0 100 0x4>; + }; +}; diff --git a/trunk/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/trunk/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts new file mode 100644 index 000000000000..f33b5ccb7446 --- /dev/null +++ b/trunk/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts @@ -0,0 +1,66 @@ +/* + * Device Tree Source for the KZM-A9-GT board + * + * Copyright (C) 2012 Horms Solutions Ltd. + * + * Based on sh73a0-kzm9g.dts + * Copyright (C) 2012 Renesas Solutions Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +/dts-v1/; +/include/ "sh73a0.dtsi" + +/ { + model = "KZM-A9-GT"; + compatible = "renesas,kzm9g-reference", "renesas,sh73a0"; + + chosen { + bootargs = "console=tty0 console=ttySC4,115200 root=/dev/nfs ip=dhcp ignore_loglevel earlyprintk=sh-sci.4,115200"; + }; + + memory { + device_type = "memory"; + reg = <0x41000000 0x1e800000>; + }; + + reg_1p8v: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + reg_3p3v: regulator@1 { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&mmcif { + bus-width = <8>; + vmmc-supply = <®_1p8v>; + status = "okay"; +}; + +&sdhi0 { + vmmc-supply = <®_3p3v>; + bus-width = <4>; + status = "okay"; +}; + +&sdhi2 { + vmmc-supply = <®_3p3v>; + bus-width = <4>; + broken-cd; + status = "okay"; +}; diff --git a/trunk/arch/arm/boot/dts/sh73a0-reference.dtsi b/trunk/arch/arm/boot/dts/sh73a0-reference.dtsi deleted file mode 100644 index d4bb0125b2b2..000000000000 --- a/trunk/arch/arm/boot/dts/sh73a0-reference.dtsi +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Device Tree Source for the SH73A0 SoC - * - * Copyright (C) 2012 Renesas Solutions Corp. - * - * This file is licensed under the terms of the GNU General Public License - * version 2. This program is licensed "as is" without any warranty of any - * kind, whether express or implied. - */ - -/include/ "sh73a0.dtsi" - -/ { - compatible = "renesas,sh73a0"; - - mmcif: mmcif@0x10010000 { - compatible = "renesas,sh-mmcif"; - reg = <0xe6bd0000 0x100>; - interrupt-parent = <&gic>; - interrupts = <0 140 0x4 - 0 141 0x4>; - reg-io-width = <4>; - }; -}; diff --git a/trunk/arch/arm/boot/dts/sh73a0.dtsi b/trunk/arch/arm/boot/dts/sh73a0.dtsi index 8a59465d0231..3e4d383ac6d9 100644 --- a/trunk/arch/arm/boot/dts/sh73a0.dtsi +++ b/trunk/arch/arm/boot/dts/sh73a0.dtsi @@ -97,4 +97,48 @@ 0 189 0x4 0 190 0x4>; }; + + mmcif: mmcif@0x10010000 { + compatible = "renesas,sh-mmcif"; + reg = <0xe6bd0000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 140 0x4 + 0 141 0x4>; + reg-io-width = <4>; + status = "disabled"; + }; + + sdhi0: sdhi@0xee100000 { + compatible = "renesas,r8a7740-sdhi"; + reg = <0xee100000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 83 4 + 0 84 4 + 0 85 4>; + cap-sd-highspeed; + status = "disabled"; + }; + + /* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */ + sdhi1: sdhi@0xee120000 { + compatible = "renesas,r8a7740-sdhi"; + reg = <0xee120000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 88 4 + 0 89 4>; + toshiba,mmc-wrprotect-disable; + cap-sd-highspeed; + status = "disabled"; + }; + + sdhi2: sdhi@0xee140000 { + compatible = "renesas,r8a7740-sdhi"; + reg = <0xee140000 0x100>; + interrupt-parent = <&gic>; + interrupts = <0 104 4 + 0 105 4>; + toshiba,mmc-wrprotect-disable; + cap-sd-highspeed; + status = "disabled"; + }; }; diff --git a/trunk/arch/arm/boot/dts/spear1310.dtsi b/trunk/arch/arm/boot/dts/spear1310.dtsi index 1513c1927cc8..122ae94076c8 100644 --- a/trunk/arch/arm/boot/dts/spear1310.dtsi +++ b/trunk/arch/arm/boot/dts/spear1310.dtsi @@ -89,7 +89,7 @@ pinmux: pinmux@e0700000 { compatible = "st,spear1310-pinmux"; reg = <0xe0700000 0x1000>; - #gpio-range-cells = <2>; + #gpio-range-cells = <3>; }; apb { @@ -212,7 +212,7 @@ interrupt-controller; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinmux 0 246>; + gpio-ranges = <&pinmux 0 0 246>; status = "disabled"; st-plgpio,ngpio = <246>; diff --git a/trunk/arch/arm/boot/dts/spear1340.dtsi b/trunk/arch/arm/boot/dts/spear1340.dtsi index 34da11aa6795..c511c4772efd 100644 --- a/trunk/arch/arm/boot/dts/spear1340.dtsi +++ b/trunk/arch/arm/boot/dts/spear1340.dtsi @@ -63,7 +63,7 @@ pinmux: pinmux@e0700000 { compatible = "st,spear1340-pinmux"; reg = <0xe0700000 0x1000>; - #gpio-range-cells = <2>; + #gpio-range-cells = <3>; }; pwm: pwm@e0180000 { @@ -127,7 +127,7 @@ interrupt-controller; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinmux 0 252>; + gpio-ranges = <&pinmux 0 0 252>; status = "disabled"; st-plgpio,ngpio = <250>; diff --git a/trunk/arch/arm/boot/dts/spear310.dtsi b/trunk/arch/arm/boot/dts/spear310.dtsi index ab45b8c81982..95372080eea6 100644 --- a/trunk/arch/arm/boot/dts/spear310.dtsi +++ b/trunk/arch/arm/boot/dts/spear310.dtsi @@ -25,7 +25,7 @@ pinmux: pinmux@b4000000 { compatible = "st,spear310-pinmux"; reg = <0xb4000000 0x1000>; - #gpio-range-cells = <2>; + #gpio-range-cells = <3>; }; fsmc: flash@44000000 { @@ -102,7 +102,7 @@ interrupt-controller; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinmux 0 102>; + gpio-ranges = <&pinmux 0 0 102>; status = "disabled"; st-plgpio,ngpio = <102>; diff --git a/trunk/arch/arm/boot/dts/spear320.dtsi b/trunk/arch/arm/boot/dts/spear320.dtsi index caa5520b1fd4..ffea342aeec9 100644 --- a/trunk/arch/arm/boot/dts/spear320.dtsi +++ b/trunk/arch/arm/boot/dts/spear320.dtsi @@ -24,7 +24,7 @@ pinmux: pinmux@b3000000 { compatible = "st,spear320-pinmux"; reg = <0xb3000000 0x1000>; - #gpio-range-cells = <2>; + #gpio-range-cells = <3>; }; clcd@90000000 { @@ -130,7 +130,7 @@ interrupt-controller; gpio-controller; #gpio-cells = <2>; - gpio-ranges = <&pinmux 0 102>; + gpio-ranges = <&pinmux 0 0 102>; status = "disabled"; st-plgpio,ngpio = <102>; diff --git a/trunk/arch/arm/configs/da8xx_omapl_defconfig b/trunk/arch/arm/configs/da8xx_omapl_defconfig index 9aaad36a1728..7c868139bdb0 100644 --- a/trunk/arch/arm/configs/da8xx_omapl_defconfig +++ b/trunk/arch/arm/configs/da8xx_omapl_defconfig @@ -5,6 +5,7 @@ CONFIG_POSIX_MQUEUE=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 +CONFIG_CGROUPS=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y CONFIG_MODULES=y diff --git a/trunk/arch/arm/configs/davinci_all_defconfig b/trunk/arch/arm/configs/davinci_all_defconfig index 3edc78a40b66..c86fd75e181a 100644 --- a/trunk/arch/arm/configs/davinci_all_defconfig +++ b/trunk/arch/arm/configs/davinci_all_defconfig @@ -5,6 +5,7 @@ CONFIG_POSIX_MQUEUE=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=14 +CONFIG_CGROUPS=y CONFIG_BLK_DEV_INITRD=y CONFIG_EXPERT=y CONFIG_MODULES=y diff --git a/trunk/arch/arm/configs/omap2plus_defconfig b/trunk/arch/arm/configs/omap2plus_defconfig index bd07864f14a0..33903ca0d879 100644 --- a/trunk/arch/arm/configs/omap2plus_defconfig +++ b/trunk/arch/arm/configs/omap2plus_defconfig @@ -93,6 +93,7 @@ CONFIG_BLK_DEV_RAM_SIZE=16384 CONFIG_SENSORS_LIS3LV02D=m CONFIG_SENSORS_TSL2550=m CONFIG_SENSORS_LIS3_I2C=m +CONFIG_BMP085_I2C=m CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y CONFIG_SCSI_MULTI_LUN=y diff --git a/trunk/arch/arm/mach-davinci/board-da830-evm.c b/trunk/arch/arm/mach-davinci/board-da830-evm.c index 6da25eebf911..b348e44978b0 100644 --- a/trunk/arch/arm/mach-davinci/board-da830-evm.c +++ b/trunk/arch/arm/mach-davinci/board-da830-evm.c @@ -298,11 +298,7 @@ static const short da830_evm_emif25_pins[] = { -1 }; -#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) -#define HAS_MMC 1 -#else -#define HAS_MMC 0 -#endif +#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI) #ifdef CONFIG_DA830_UI_NAND static struct mtd_partition da830_evm_nand_partitions[] = { diff --git a/trunk/arch/arm/mach-davinci/board-da850-evm.c b/trunk/arch/arm/mach-davinci/board-da850-evm.c index c2dfe06563df..a74dec756647 100644 --- a/trunk/arch/arm/mach-davinci/board-da850-evm.c +++ b/trunk/arch/arm/mach-davinci/board-da850-evm.c @@ -335,12 +335,7 @@ static const short da850_evm_nor_pins[] = { -1 }; -#if defined(CONFIG_MMC_DAVINCI) || \ - defined(CONFIG_MMC_DAVINCI_MODULE) -#define HAS_MMC 1 -#else -#define HAS_MMC 0 -#endif +#define HAS_MMC IS_ENABLED(CONFIG_MMC_DAVINCI) static inline void da850_evm_setup_nor_nand(void) { diff --git a/trunk/arch/arm/mach-davinci/board-dm644x-evm.c b/trunk/arch/arm/mach-davinci/board-dm644x-evm.c index 71735e7797cc..a042f27fb6bc 100644 --- a/trunk/arch/arm/mach-davinci/board-dm644x-evm.c +++ b/trunk/arch/arm/mach-davinci/board-dm644x-evm.c @@ -750,26 +750,11 @@ static int davinci_phy_fixup(struct phy_device *phydev) return 0; } -#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ - defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) -#define HAS_ATA 1 -#else -#define HAS_ATA 0 -#endif - -#if defined(CONFIG_MTD_PHYSMAP) || \ - defined(CONFIG_MTD_PHYSMAP_MODULE) -#define HAS_NOR 1 -#else -#define HAS_NOR 0 -#endif - -#if defined(CONFIG_MTD_NAND_DAVINCI) || \ - defined(CONFIG_MTD_NAND_DAVINCI_MODULE) -#define HAS_NAND 1 -#else -#define HAS_NAND 0 -#endif +#define HAS_ATA IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) + +#define HAS_NOR IS_ENABLED(CONFIG_MTD_PHYSMAP) + +#define HAS_NAND IS_ENABLED(CONFIG_MTD_NAND_DAVINCI) static __init void davinci_evm_init(void) { diff --git a/trunk/arch/arm/mach-davinci/board-dm646x-evm.c b/trunk/arch/arm/mach-davinci/board-dm646x-evm.c index de7adff324dc..03785e0e9429 100644 --- a/trunk/arch/arm/mach-davinci/board-dm646x-evm.c +++ b/trunk/arch/arm/mach-davinci/board-dm646x-evm.c @@ -117,12 +117,7 @@ static struct platform_device davinci_nand_device = { }, }; -#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ - defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) -#define HAS_ATA 1 -#else -#define HAS_ATA 0 -#endif +#define HAS_ATA IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) /* CPLD Register 0 bits to control ATA */ #define DM646X_EVM_ATA_RST BIT(0) diff --git a/trunk/arch/arm/mach-davinci/board-neuros-osd2.c b/trunk/arch/arm/mach-davinci/board-neuros-osd2.c index 1c98107527fa..ea6728be53ba 100644 --- a/trunk/arch/arm/mach-davinci/board-neuros-osd2.c +++ b/trunk/arch/arm/mach-davinci/board-neuros-osd2.c @@ -167,20 +167,9 @@ static struct davinci_mmc_config davinci_ntosd2_mmc_config = { .version = MMC_CTLR_VERSION_1 }; +#define HAS_ATA IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) -#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \ - defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE) -#define HAS_ATA 1 -#else -#define HAS_ATA 0 -#endif - -#if defined(CONFIG_MTD_NAND_DAVINCI) || \ - defined(CONFIG_MTD_NAND_DAVINCI_MODULE) -#define HAS_NAND 1 -#else -#define HAS_NAND 0 -#endif +#define HAS_NAND IS_ENABLED(CONFIG_MTD_NAND_DAVINCI) static __init void davinci_ntosd2_init(void) { diff --git a/trunk/arch/arm/mach-davinci/devices.c b/trunk/arch/arm/mach-davinci/devices.c index 4c48a36ee567..df135deed08a 100644 --- a/trunk/arch/arm/mach-davinci/devices.c +++ b/trunk/arch/arm/mach-davinci/devices.c @@ -119,7 +119,7 @@ void __init davinci_init_ide(void) platform_device_register(&ide_device); } -#if defined(CONFIG_MMC_DAVINCI) || defined(CONFIG_MMC_DAVINCI_MODULE) +#if IS_ENABLED(CONFIG_MMC_DAVINCI) static u64 mmcsd0_dma_mask = DMA_BIT_MASK(32); diff --git a/trunk/arch/arm/mach-davinci/usb.c b/trunk/arch/arm/mach-davinci/usb.c index 34509ffba221..5764d65ca25d 100644 --- a/trunk/arch/arm/mach-davinci/usb.c +++ b/trunk/arch/arm/mach-davinci/usb.c @@ -17,7 +17,7 @@ #define DA8XX_USB0_BASE 0x01e00000 #define DA8XX_USB1_BASE 0x01e25000 -#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE) +#if IS_ENABLED(CONFIG_USB_MUSB_HDRC) static struct musb_hdrc_eps_bits musb_eps[] = { { "ep1_tx", 8, }, { "ep1_rx", 8, }, diff --git a/trunk/arch/arm/mach-omap1/include/mach/usb.h b/trunk/arch/arm/mach-omap1/include/mach/usb.h index 753cd5ce6949..45e5ac707cbb 100644 --- a/trunk/arch/arm/mach-omap1/include/mach/usb.h +++ b/trunk/arch/arm/mach-omap1/include/mach/usb.h @@ -2,7 +2,7 @@ * FIXME correct answer depends on hmc_mode, * as does (on omap1) any nonzero value for config->otg port number */ -#ifdef CONFIG_USB_GADGET_OMAP +#if IS_ENABLED(CONFIG_USB_OMAP) #define is_usb0_device(config) 1 #else #define is_usb0_device(config) 0 diff --git a/trunk/arch/arm/mach-omap1/usb.c b/trunk/arch/arm/mach-omap1/usb.c index 1a1db5971cd9..4118db50d5e8 100644 --- a/trunk/arch/arm/mach-omap1/usb.c +++ b/trunk/arch/arm/mach-omap1/usb.c @@ -123,7 +123,7 @@ omap_otg_init(struct omap_usb_config *config) syscon = omap_readl(OTG_SYSCON_1); syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN; -#ifdef CONFIG_USB_GADGET_OMAP +#if IS_ENABLED(CONFIG_USB_OMAP) if (config->otg || config->register_dev) { struct platform_device *udc_device = config->udc_device; int status; @@ -169,7 +169,7 @@ omap_otg_init(struct omap_usb_config *config) void omap_otg_init(struct omap_usb_config *config) {} #endif -#ifdef CONFIG_USB_GADGET_OMAP +#if IS_ENABLED(CONFIG_USB_OMAP) static struct resource udc_resources[] = { /* order is significant! */ @@ -600,7 +600,7 @@ static void __init omap_1510_usb_init(struct omap_usb_config *config) while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK)) cpu_relax(); -#ifdef CONFIG_USB_GADGET_OMAP +#if IS_ENABLED(CONFIG_USB_OMAP) if (config->register_dev) { int status; diff --git a/trunk/arch/arm/mach-omap2/Makefile b/trunk/arch/arm/mach-omap2/Makefile index b068b7fe99ef..62bb352c2d37 100644 --- a/trunk/arch/arm/mach-omap2/Makefile +++ b/trunk/arch/arm/mach-omap2/Makefile @@ -229,7 +229,6 @@ obj-$(CONFIG_MACH_DEVKIT8000) += board-devkit8000.o obj-$(CONFIG_MACH_OMAP_LDP) += board-ldp.o obj-$(CONFIG_MACH_OMAP3530_LV_SOM) += board-omap3logic.o obj-$(CONFIG_MACH_OMAP3_TORPEDO) += board-omap3logic.o -obj-$(CONFIG_MACH_ENCORE) += board-omap3encore.o obj-$(CONFIG_MACH_OVERO) += board-overo.o obj-$(CONFIG_MACH_OMAP3EVM) += board-omap3evm.o obj-$(CONFIG_MACH_OMAP3_PANDORA) += board-omap3pandora.o @@ -255,8 +254,6 @@ obj-$(CONFIG_MACH_TOUCHBOOK) += board-omap3touchbook.o obj-$(CONFIG_MACH_OMAP_4430SDP) += board-4430sdp.o obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o -obj-$(CONFIG_MACH_PCM049) += board-omap4pcm049.o - obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o diff --git a/trunk/arch/arm/mach-omap2/board-4430sdp.c b/trunk/arch/arm/mach-omap2/board-4430sdp.c index 35f3ad0cb7c7..00d72902ef4f 100644 --- a/trunk/arch/arm/mach-omap2/board-4430sdp.c +++ b/trunk/arch/arm/mach-omap2/board-4430sdp.c @@ -291,6 +291,10 @@ static struct platform_device sdp4430_leds_pwm = { }, }; +/* Dummy regulator for pwm-backlight driver */ +static struct regulator_consumer_supply backlight_supply = + REGULATOR_SUPPLY("enable", "pwm-backlight"); + static struct platform_pwm_backlight_data sdp4430_backlight_data = { .max_brightness = 127, .dft_brightness = 127, @@ -718,6 +722,8 @@ static void __init omap_4430sdp_init(void) omap4_i2c_init(); omap_sfh7741prox_init(); + regulator_register_always_on(0, "backlight-enable", + &backlight_supply, 1, 0); platform_add_devices(sdp4430_devices, ARRAY_SIZE(sdp4430_devices)); omap_serial_init(); omap_sdrc_init(NULL, NULL); diff --git a/trunk/arch/arm/mach-omap2/board-rx51-peripherals.c b/trunk/arch/arm/mach-omap2/board-rx51-peripherals.c index 3a077df6b8df..1a884670a6c4 100644 --- a/trunk/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/trunk/arch/arm/mach-omap2/board-rx51-peripherals.c @@ -547,12 +547,16 @@ static struct regulator_consumer_supply rx51_vio_supplies[] = { REGULATOR_SUPPLY("DVDD", "2-0019"), /* Si4713 IO supply */ REGULATOR_SUPPLY("vio", "2-0063"), + /* lis3lv02d */ + REGULATOR_SUPPLY("Vdd_IO", "3-001d"), }; static struct regulator_consumer_supply rx51_vaux1_consumers[] = { REGULATOR_SUPPLY("vdds_sdi", "omapdss"), /* Si4713 supply */ REGULATOR_SUPPLY("vdd", "2-0063"), + /* lis3lv02d */ + REGULATOR_SUPPLY("Vdd", "3-001d"), }; static struct regulator_init_data rx51_vaux1 = { diff --git a/trunk/arch/arm/mach-omap2/board-zoom-display.c b/trunk/arch/arm/mach-omap2/board-zoom-display.c index 8cef477d6b00..9a7174faac51 100644 --- a/trunk/arch/arm/mach-omap2/board-zoom-display.c +++ b/trunk/arch/arm/mach-omap2/board-zoom-display.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include