From 0956fa372efb97342a2725b27fb8185c5e5e6372 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Thu, 5 Feb 2009 22:04:47 +0300 Subject: [PATCH] --- yaml --- r: 138419 b: refs/heads/master c: 34bcda616e5308a0633d5bfabcc090d7aa09b494 h: refs/heads/master i: 138417: 95ddec6b26bf50fd560c00ee9347a99966ba1677 138415: efd74936224dbb5e9ad12bbb98874fb358f6894d v: v3 --- [refs] | 2 +- .../powerpc/dts-bindings/fsl/esdhc.txt | 24 +++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletion(-) create mode 100644 trunk/Documentation/powerpc/dts-bindings/fsl/esdhc.txt diff --git a/[refs] b/[refs] index 99533f242527..515006fe181c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 960d82aa5ba971aa9da86a41881cb8dc8f96e397 +refs/heads/master: 34bcda616e5308a0633d5bfabcc090d7aa09b494 diff --git a/trunk/Documentation/powerpc/dts-bindings/fsl/esdhc.txt b/trunk/Documentation/powerpc/dts-bindings/fsl/esdhc.txt new file mode 100644 index 000000000000..600846557763 --- /dev/null +++ b/trunk/Documentation/powerpc/dts-bindings/fsl/esdhc.txt @@ -0,0 +1,24 @@ +* Freescale Enhanced Secure Digital Host Controller (eSDHC) + +The Enhanced Secure Digital Host Controller provides an interface +for MMC, SD, and SDIO types of memory cards. + +Required properties: + - compatible : should be + "fsl,-esdhc", "fsl,mpc8379-esdhc" for MPC83xx processors. + "fsl,-esdhc", "fsl,mpc8536-esdhc" for MPC85xx processors. + - reg : should contain eSDHC registers location and length. + - interrupts : should contain eSDHC interrupt. + - interrupt-parent : interrupt source phandle. + - clock-frequency : specifies eSDHC base clock frequency. + +Example: + +sdhci@2e000 { + compatible = "fsl,mpc8378-esdhc", "fsl,mpc8379-esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; + /* Filled in by U-Boot */ + clock-frequency = <0>; +};