From 09d439c35c5c9e8a6dc0cb0f178e42be26223738 Mon Sep 17 00:00:00 2001
From: saeed bishara <saeed@marvell.com>
Date: Mon, 16 May 2011 15:41:15 +0100
Subject: [PATCH] --- yaml --- r: 249960 b: refs/heads/master c:
 8373dc38ca8d4918210710807256a313cd111f0b h: refs/heads/master v: v3

---
 [refs]                    | 2 +-
 trunk/arch/arm/mm/flush.c | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/[refs] b/[refs]
index af2b95495f55..91e3cacb7674 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 60ba5369135e05f040ea1f6b8130c7b082ed53c8
+refs/heads/master: 8373dc38ca8d4918210710807256a313cd111f0b
diff --git a/trunk/arch/arm/mm/flush.c b/trunk/arch/arm/mm/flush.c
index 2b269c955524..f1b799802858 100644
--- a/trunk/arch/arm/mm/flush.c
+++ b/trunk/arch/arm/mm/flush.c
@@ -253,8 +253,8 @@ void __sync_icache_dcache(pte_t pteval)
 
 	if (!test_and_set_bit(PG_dcache_clean, &page->flags))
 		__flush_dcache_page(mapping, page);
-	/* pte_exec() already checked above for non-aliasing VIPT cache */
-	if (cache_is_vipt_nonaliasing() || pte_exec(pteval))
+
+	if (pte_exec(pteval))
 		__flush_icache_all();
 }
 #endif