From 09d700780b05bf22033cb5afdb418fcd7b2cf703 Mon Sep 17 00:00:00 2001 From: Ido Reis Date: Sun, 22 Apr 2012 20:45:52 +0300 Subject: [PATCH] --- yaml --- r: 314158 b: refs/heads/master c: 73395a79df00c3e0101bd7a0229dbbcc065b606a h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/wireless/ti/wl18xx/main.c | 12 +++++++++++- trunk/drivers/net/wireless/ti/wl18xx/reg.h | 1 + 3 files changed, 13 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 03f2b0718d05..598f0c229490 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4085f641e704b1ff1a60f62756f49281a181f707 +refs/heads/master: 73395a79df00c3e0101bd7a0229dbbcc065b606a diff --git a/trunk/drivers/net/wireless/ti/wl18xx/main.c b/trunk/drivers/net/wireless/ti/wl18xx/main.c index e030b1297a2b..57b4a1089d0d 100644 --- a/trunk/drivers/net/wireless/ti/wl18xx/main.c +++ b/trunk/drivers/net/wireless/ti/wl18xx/main.c @@ -588,6 +588,17 @@ static int wl18xx_identify_chip(struct wl1271 *wl) int ret = 0; switch (wl->chip.id) { + case CHIP_ID_185x_PG20: + wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG20)", + wl->chip.id); + wl->sr_fw_name = WL18XX_FW_NAME; + /* wl18xx uses the same firmware for PLT */ + wl->plt_fw_name = WL18XX_FW_NAME; + wl->quirks |= WLCORE_QUIRK_NO_ELP | + WLCORE_QUIRK_FWLOG_NOT_IMPLEMENTED | + WLCORE_QUIRK_RX_BLOCKSIZE_ALIGN; + + break; case CHIP_ID_185x_PG10: wl1271_debug(DEBUG_BOOT, "chip id 0x%x (185x PG10)", wl->chip.id); @@ -602,7 +613,6 @@ static int wl18xx_identify_chip(struct wl1271 *wl) /* PG 1.0 has some problems with MCS_13, so disable it */ wl->ht_cap[IEEE80211_BAND_2GHZ].mcs.rx_mask[1] &= ~BIT(5); - /* TODO: need to blocksize alignment for RX/TX separately? */ break; default: wl1271_warning("unsupported chip id: 0x%x", wl->chip.id); diff --git a/trunk/drivers/net/wireless/ti/wl18xx/reg.h b/trunk/drivers/net/wireless/ti/wl18xx/reg.h index 43863d35feb2..e81f60913e88 100644 --- a/trunk/drivers/net/wireless/ti/wl18xx/reg.h +++ b/trunk/drivers/net/wireless/ti/wl18xx/reg.h @@ -140,6 +140,7 @@ #define WL18XX_FW_STATUS_ADDR 0x50F8 #define CHIP_ID_185x_PG10 (0x06030101) +#define CHIP_ID_185x_PG20 (0x06030111) /* * Host Command Interrupt. Setting this bit masks