diff --git a/[refs] b/[refs] index 7f0357896ef1..6ec6400b3ca9 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 1d19fdba149f4db055902c30b27adfb7d1ead058 +refs/heads/master: b2a6cf3b1e099a724504ba16a4c9aea1eb0122a6 diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/gpio.h b/trunk/arch/arm/mach-s3c2410/include/mach/gpio.h index e0349af8a483..3b52b86498a6 100644 --- a/trunk/arch/arm/mach-s3c2410/include/mach/gpio.h +++ b/trunk/arch/arm/mach-s3c2410/include/mach/gpio.h @@ -15,10 +15,4 @@ #define gpio_set_value __gpio_set_value #define gpio_cansleep __gpio_cansleep -/* some boards require extra gpio capacity to support external - * devices that need GPIO. - */ - -#define ARCH_NR_GPIOS (256 + CONFIG_S3C24XX_GPIO_EXTRA) - #include diff --git a/trunk/arch/arm/mach-s3c2410/include/mach/spi.h b/trunk/arch/arm/mach-s3c2410/include/mach/spi.h index 46d46f5b99f2..774f3adfe8ad 100644 --- a/trunk/arch/arm/mach-s3c2410/include/mach/spi.h +++ b/trunk/arch/arm/mach-s3c2410/include/mach/spi.h @@ -22,5 +22,12 @@ struct s3c2410_spi_info { void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); }; +/* Standard setup / suspend routines for SPI GPIO pins. */ + +extern void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, + int enable); + +extern void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, + int enable); #endif /* __ASM_ARCH_SPI_H */ diff --git a/trunk/arch/arm/mach-s3c2412/mach-jive.c b/trunk/arch/arm/mach-s3c2412/mach-jive.c index 5e758cf8bf82..25ff1ec9f8ad 100644 --- a/trunk/arch/arm/mach-s3c2412/mach-jive.c +++ b/trunk/arch/arm/mach-s3c2412/mach-jive.c @@ -398,12 +398,11 @@ static struct s3c2410_spigpio_info jive_lcd_spi = { .bus_num = 1, .pin_clk = S3C2410_GPG8, .pin_mosi = S3C2410_GPB8, - .num_chipselect = 1, .chip_select = jive_lcd_spi_chipselect, }; static struct platform_device jive_device_lcdspi = { - .name = "spi_s3c24xx_gpio", + .name = "s3c24xx-spi-gpio", .id = 1, .num_resources = 0, .dev.platform_data = &jive_lcd_spi, @@ -420,12 +419,11 @@ static struct s3c2410_spigpio_info jive_wm8750_spi = { .bus_num = 2, .pin_clk = S3C2410_GPB4, .pin_mosi = S3C2410_GPB9, - .num_chipselect = 1, .chip_select = jive_wm8750_chipselect, }; static struct platform_device jive_device_wm8750 = { - .name = "spi_s3c24xx_gpio", + .name = "s3c24xx-spi-gpio", .id = 2, .num_resources = 0, .dev.platform_data = &jive_wm8750_spi, diff --git a/trunk/arch/arm/mach-s3c2440/Kconfig b/trunk/arch/arm/mach-s3c2440/Kconfig index 402213dc5d85..0429d255b0d8 100644 --- a/trunk/arch/arm/mach-s3c2440/Kconfig +++ b/trunk/arch/arm/mach-s3c2440/Kconfig @@ -31,7 +31,6 @@ config MACH_ANUBIS select CPU_S3C2440 select PM_SIMTEC if PM select HAVE_PATA_PLATFORM - select S3C24XX_GPIO_EXTRA64 help Say Y here if you are using the Simtec Electronics ANUBIS development system @@ -40,7 +39,6 @@ config MACH_OSIRIS bool "Simtec IM2440D20 (OSIRIS) module" select CPU_S3C2440 select PM_SIMTEC if PM - select S3C24XX_GPIO_EXTRA128 help Say Y here if you are using the Simtec IM2440D20 module, also known as the Osiris. diff --git a/trunk/arch/arm/mach-s3c2440/mach-anubis.c b/trunk/arch/arm/mach-s3c2440/mach-anubis.c index f151f8939929..334379bdfc6e 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-anubis.c +++ b/trunk/arch/arm/mach-s3c2440/mach-anubis.c @@ -366,8 +366,6 @@ static struct sm501_initdata anubis_sm501_initdata = { .mask = 0, }, - .devices = SM501_USE_GPIO, - /* set the SDRAM and bus clocks */ .mclk = 72 * MHZ, .m1xclk = 144 * MHZ, @@ -375,12 +373,10 @@ static struct sm501_initdata anubis_sm501_initdata = { static struct sm501_platdata_gpio_i2c anubis_sm501_gpio_i2c[] = { [0] = { - .bus_num = 1, .pin_scl = 44, .pin_sda = 45, }, [1] = { - .bus_num = 2, .pin_scl = 40, .pin_sda = 41, }, @@ -388,7 +384,6 @@ static struct sm501_platdata_gpio_i2c anubis_sm501_gpio_i2c[] = { static struct sm501_platdata anubis_sm501_platdata = { .init = &anubis_sm501_initdata, - .gpio_base = -1, .gpio_i2c = anubis_sm501_gpio_i2c, .gpio_i2c_nr = ARRAY_SIZE(anubis_sm501_gpio_i2c), }; diff --git a/trunk/arch/arm/mach-s3c2440/mach-at2440evb.c b/trunk/arch/arm/mach-s3c2440/mach-at2440evb.c index 4539b1d95877..07b42a0207d1 100644 --- a/trunk/arch/arm/mach-s3c2440/mach-at2440evb.c +++ b/trunk/arch/arm/mach-s3c2440/mach-at2440evb.c @@ -28,7 +28,6 @@ #include #include -#include #include #include @@ -46,7 +45,6 @@ #include #include #include -#include static struct map_desc at2440evb_iodesc[] __initdata = { /* Nothing here */ @@ -164,43 +162,6 @@ static struct platform_device at2440evb_device_eth = { }, }; -static struct s3c24xx_mci_pdata at2440evb_mci_pdata = { - .gpio_detect = S3C2410_GPG10, -}; - -/* 7" LCD panel */ - -static struct s3c2410fb_display at2440evb_lcd_cfg __initdata = { - - .lcdcon5 = S3C2410_LCDCON5_FRM565 | - S3C2410_LCDCON5_INVVLINE | - S3C2410_LCDCON5_INVVFRAME | - S3C2410_LCDCON5_PWREN | - S3C2410_LCDCON5_HWSWP, - - .type = S3C2410_LCDCON1_TFT, - - .width = 800, - .height = 480, - - .pixclock = 33333, /* HCLK 60 MHz, divisor 2 */ - .xres = 800, - .yres = 480, - .bpp = 16, - .left_margin = 88, - .right_margin = 40, - .hsync_len = 128, - .upper_margin = 32, - .lower_margin = 11, - .vsync_len = 2, -}; - -static struct s3c2410fb_mach_info at2440evb_fb_info __initdata = { - .displays = &at2440evb_lcd_cfg, - .num_displays = 1, - .default_display = 0, -}; - static struct platform_device *at2440evb_devices[] __initdata = { &s3c_device_usb, &s3c_device_wdt, @@ -208,16 +169,12 @@ static struct platform_device *at2440evb_devices[] __initdata = { &s3c_device_i2c, &s3c_device_rtc, &s3c_device_nand, - &s3c_device_sdi, - &s3c_device_lcd, &at2440evb_device_eth, }; static void __init at2440evb_map_io(void) { s3c_device_nand.dev.platform_data = &at2440evb_nand_info; - s3c_device_sdi.name = "s3c2440-sdi"; - s3c_device_sdi.dev.platform_data = &at2440evb_mci_pdata; s3c24xx_init_io(at2440evb_iodesc, ARRAY_SIZE(at2440evb_iodesc)); s3c24xx_init_clocks(16934400); @@ -226,7 +183,6 @@ static void __init at2440evb_map_io(void) static void __init at2440evb_init(void) { - s3c24xx_fb_set_platdata(&at2440evb_fb_info); platform_add_devices(at2440evb_devices, ARRAY_SIZE(at2440evb_devices)); } diff --git a/trunk/arch/arm/plat-s3c24xx/Kconfig b/trunk/arch/arm/plat-s3c24xx/Kconfig index 7fe28aaa08ca..48ebf355a45c 100644 --- a/trunk/arch/arm/plat-s3c24xx/Kconfig +++ b/trunk/arch/arm/plat-s3c24xx/Kconfig @@ -28,27 +28,6 @@ config S3C24XX_PWM Support for exporting the PWM timer blocks via the pwm device system. - -# gpio configurations - -config S3C24XX_GPIO_EXTRA - int - default 128 if S3C24XX_GPIO_EXTRA128 - default 64 if S3C24XX_GPIO_EXTRA64 - default 0 - -config S3C24XX_GPIO_EXTRA64 - bool - help - Add an extra 64 gpio numbers to the available GPIO pool. This is - available for boards that need extra gpios for external devices. - -config S3C24XX_GPIO_EXTRA128 - bool - help - Add an extra 128 gpio numbers to the available GPIO pool. This is - available for boards that need extra gpios for external devices. - config PM_SIMTEC bool help @@ -70,6 +49,22 @@ config S3C2410_DMA_DEBUG Enable debugging output for the DMA code. This option sends info to the kernel log, at priority KERN_DEBUG. +# SPI default pin configuration code + +config S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13 + bool + help + SPI GPIO configuration code for BUS0 when connected to + GPE11, GPE12 and GPE13. + +config S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7 + bool + help + SPI GPIO configuration code for BUS 1 when connected to + GPG5, GPG6 and GPG7. + +# common code for s3c24xx based machines, such as the SMDKs. + config MACH_SMDK bool help diff --git a/trunk/arch/arm/plat-s3c24xx/Makefile b/trunk/arch/arm/plat-s3c24xx/Makefile index d82767b2b833..6b574016dc44 100644 --- a/trunk/arch/arm/plat-s3c24xx/Makefile +++ b/trunk/arch/arm/plat-s3c24xx/Makefile @@ -31,4 +31,12 @@ obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_PM) += sleep.o obj-$(CONFIG_HAVE_PWM) += pwm.o obj-$(CONFIG_S3C2410_DMA) += dma.o + +# SPI gpio central GPIO functions + +obj-$(CONFIG_S3C24XX_SPI_BUS0_GPE11_GPE12_GPE13) += spi-bus0-gpe11_12_13.o +obj-$(CONFIG_S3C24XX_SPI_BUS1_GPG5_GPG6_GPG7) += spi-bus1-gpg5_6_7.o + +# machine common support + obj-$(CONFIG_MACH_SMDK) += common-smdk.o diff --git a/trunk/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c b/trunk/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c new file mode 100644 index 000000000000..8b403cbb53d2 --- /dev/null +++ b/trunk/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c @@ -0,0 +1,37 @@ +/* linux/arch/arm/plat-s3c24xx/spi-bus0-gpe11_12_13.c + * + * Copyright (c) 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * S3C24XX SPI - gpio configuration for bus 0 on gpe11,12,13 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. +*/ + +#include + +#include + +#include +#include + +void s3c24xx_spi_gpiocfg_bus0_gpe11_12_13(struct s3c2410_spi_info *spi, + int enable) +{ + if (enable) { + s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPE13_SPICLK0); + s3c2410_gpio_cfgpin(S3C2410_GPE12, S3C2410_GPE12_SPIMOSI0); + s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPE11_SPIMISO0); + s3c2410_gpio_pullup(S3C2410_GPE11, 0); + s3c2410_gpio_pullup(S3C2410_GPE13, 0); + } else { + s3c2410_gpio_cfgpin(S3C2410_GPE13, S3C2410_GPIO_INPUT); + s3c2410_gpio_cfgpin(S3C2410_GPE11, S3C2410_GPIO_INPUT); + s3c2410_gpio_pullup(S3C2410_GPE11, 1); + s3c2410_gpio_pullup(S3C2410_GPE12, 1); + s3c2410_gpio_pullup(S3C2410_GPE13, 1); + } +} diff --git a/trunk/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c b/trunk/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c new file mode 100644 index 000000000000..8fccd4e549f0 --- /dev/null +++ b/trunk/arch/arm/plat-s3c24xx/spi-bus1-gpg5_6_7.c @@ -0,0 +1,37 @@ +/* linux/arch/arm/plat-s3c24xx/spi-bus0-gpg5_6_7.c + * + * Copyright (c) 2008 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks + * + * S3C24XX SPI - gpio configuration for bus 1 on gpg5,6,7 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. +*/ + +#include + +#include + +#include +#include + +void s3c24xx_spi_gpiocfg_bus1_gpg5_6_7(struct s3c2410_spi_info *spi, + int enable) +{ + if (enable) { + s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPG7_SPICLK1); + s3c2410_gpio_cfgpin(S3C2410_GPG6, S3C2410_GPG6_SPIMOSI1); + s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPG5_SPIMISO1); + s3c2410_gpio_pullup(S3C2410_GPG5, 0); + s3c2410_gpio_pullup(S3C2410_GPG6, 0); + } else { + s3c2410_gpio_cfgpin(S3C2410_GPG7, S3C2410_GPIO_INPUT); + s3c2410_gpio_cfgpin(S3C2410_GPG5, S3C2410_GPIO_INPUT); + s3c2410_gpio_pullup(S3C2410_GPG5, 1); + s3c2410_gpio_pullup(S3C2410_GPG6, 1); + s3c2410_gpio_pullup(S3C2410_GPG7, 1); + } +}