From 0a4f3171087cce6dd97d6c6d26d950bffdfcfaeb Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Fri, 6 May 2011 12:14:06 +0300 Subject: [PATCH] --- yaml --- r: 255233 b: refs/heads/master c: 5934df2f10a48d048fafe0d3c8b242a7c9106e69 h: refs/heads/master i: 255231: 76aa8642412f93091f11f9cda7c46e02afc2b287 v: v3 --- [refs] | 2 +- trunk/drivers/mmc/host/omap_hsmmc.c | 59 ++++++++++++++--------------- 2 files changed, 29 insertions(+), 32 deletions(-) diff --git a/[refs] b/[refs] index 793e64ec286b..1766f90d1146 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: e0c7f99b863b485ad0cde371ea1f62ec8ff70c5d +refs/heads/master: 5934df2f10a48d048fafe0d3c8b242a7c9106e69 diff --git a/trunk/drivers/mmc/host/omap_hsmmc.c b/trunk/drivers/mmc/host/omap_hsmmc.c index 2645bdc94dae..bda284ba1303 100644 --- a/trunk/drivers/mmc/host/omap_hsmmc.c +++ b/trunk/drivers/mmc/host/omap_hsmmc.c @@ -612,6 +612,32 @@ static u16 calc_divisor(struct mmc_ios *ios) return dsor; } +static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host) +{ + struct mmc_ios *ios = &host->mmc->ios; + unsigned long regval; + unsigned long timeout; + + dev_dbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock); + + omap_hsmmc_stop_clock(host); + + regval = OMAP_HSMMC_READ(host->base, SYSCTL); + regval = regval & ~(CLKD_MASK | DTO_MASK); + regval = regval | (calc_divisor(ios) << 6) | (DTO << 16); + OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); + OMAP_HSMMC_WRITE(host->base, SYSCTL, + OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); + + /* Wait till the ICS bit is set */ + timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); + while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS + && time_before(jiffies, timeout)) + cpu_relax(); + + omap_hsmmc_start_clock(host); +} + #ifdef CONFIG_PM /* @@ -702,19 +728,7 @@ static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) break; } - omap_hsmmc_stop_clock(host); - - OMAP_HSMMC_WRITE(host->base, SYSCTL, - (calc_divisor(ios) << 6) | (DTO << 16)); - OMAP_HSMMC_WRITE(host->base, SYSCTL, - OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); - - timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); - while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS - && time_before(jiffies, timeout)) - ; - - omap_hsmmc_start_clock(host); + omap_hsmmc_set_clock(host); con = OMAP_HSMMC_READ(host->base, CON); if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) @@ -1614,8 +1628,6 @@ static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) { struct omap_hsmmc_host *host = mmc_priv(mmc); - unsigned long regval; - unsigned long timeout; u32 con; int do_send_init_stream = 0; @@ -1677,22 +1689,7 @@ static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) } } - omap_hsmmc_stop_clock(host); - - regval = OMAP_HSMMC_READ(host->base, SYSCTL); - regval = regval & ~(CLKD_MASK); - regval = regval | (calc_divisor(ios) << 6) | (DTO << 16); - OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); - OMAP_HSMMC_WRITE(host->base, SYSCTL, - OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); - - /* Wait till the ICS bit is set */ - timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); - while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS - && time_before(jiffies, timeout)) - msleep(1); - - omap_hsmmc_start_clock(host); + omap_hsmmc_set_clock(host); if (do_send_init_stream) send_init_stream(host);