From 0a7afcc2ebe62ed233e671f543181d2becda2ef2 Mon Sep 17 00:00:00 2001 From: Stephen Hemminger Date: Tue, 21 Aug 2007 14:34:02 -0700 Subject: [PATCH] --- yaml --- r: 64424 b: refs/heads/master c: b23457737f073eaf5a7b797c2a195f83633e003d h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/sky2.c | 7 ++++++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 4d7267efb420..9e1951a14828 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c46ac9463fbdee41723dd9fd108b2c1ffd30615f +refs/heads/master: b23457737f073eaf5a7b797c2a195f83633e003d diff --git a/trunk/drivers/net/sky2.c b/trunk/drivers/net/sky2.c index 757592436390..33ba3486389e 100644 --- a/trunk/drivers/net/sky2.c +++ b/trunk/drivers/net/sky2.c @@ -219,9 +219,12 @@ static void sky2_power_on(struct sky2_hw *hw) else sky2_write8(hw, B2_Y2_CLK_GATE, 0); - if (hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX) { + if (hw->chip_id == CHIP_ID_YUKON_EC_U || + hw->chip_id == CHIP_ID_YUKON_EX) { u32 reg; + sky2_pci_write32(hw, PCI_DEV_REG3, 0); + reg = sky2_pci_read32(hw, PCI_DEV_REG4); /* set all bits to 0 except bits 15..12 and 8 */ reg &= P_ASPM_CONTROL_MSK; @@ -238,6 +241,8 @@ static void sky2_power_on(struct sky2_hw *hw) reg = sky2_read32(hw, B2_GP_IO); reg |= GLB_GPIO_STAT_RACE_DIS; sky2_write32(hw, B2_GP_IO, reg); + + sky2_read32(hw, B2_GP_IO); } }