From 0d41296651c1b1d87c261354b2087e7df825b12e Mon Sep 17 00:00:00 2001 From: Bjorn Helgaas Date: Wed, 26 Dec 2012 10:39:23 -0700 Subject: [PATCH] --- yaml --- r: 348125 b: refs/heads/master c: 130f1b8f35f14d27c43da755f3c9226318c17f57 h: refs/heads/master i: 348123: 2342c5505202c38bcefb7ca75b47d7caa97b4020 v: v3 --- [refs] | 2 +- trunk/include/uapi/linux/pci_regs.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 157b29db6115..0610de008b82 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 1278998f8ff6d66044ed00b581bbf14aacaba215 +refs/heads/master: 130f1b8f35f14d27c43da755f3c9226318c17f57 diff --git a/trunk/include/uapi/linux/pci_regs.h b/trunk/include/uapi/linux/pci_regs.h index 6b7b6f1e2fd6..ebfadc56d1b4 100644 --- a/trunk/include/uapi/linux/pci_regs.h +++ b/trunk/include/uapi/linux/pci_regs.h @@ -458,6 +458,8 @@ #define PCI_EXP_DEVSTA_TRPND 0x20 /* Transactions Pending */ #define PCI_EXP_LNKCAP 12 /* Link Capabilities */ #define PCI_EXP_LNKCAP_SLS 0x0000000f /* Supported Link Speeds */ +#define PCI_EXP_LNKCAP_SLS_2_5GB 0x1 /* LNKCAP2 SLS Vector bit 0 (2.5GT/s) */ +#define PCI_EXP_LNKCAP_SLS_5_0GB 0x2 /* LNKCAP2 SLS Vector bit 1 (5.0GT/s) */ #define PCI_EXP_LNKCAP_MLW 0x000003f0 /* Maximum Link Width */ #define PCI_EXP_LNKCAP_ASPMS 0x00000c00 /* ASPM Support */ #define PCI_EXP_LNKCAP_L0SEL 0x00007000 /* L0s Exit Latency */