From 0d6c57a81da90a285fcef5e88c4470a1e577e9ae Mon Sep 17 00:00:00 2001
From: Matthew McClintock <msm@freescale.com>
Date: Wed, 26 Oct 2011 13:46:57 -0500
Subject: [PATCH] --- yaml --- r: 274239 b: refs/heads/master c:
 44f16fcf2fba79cffb268d8f3c1f744efefa5dc9 h: refs/heads/master i:   274237:
 3ba465659aff7e52403f14987d758889088e88b1   274235:
 27cb0aa035e404ece89e24e3eaa7ca98d47dd99e   274231:
 4dfd044571c0e9927c3feb266337199c65ac6c21   274223:
 18229edffd1417d00401d086acd1032197de7250   274207:
 e649712a00e894910f378cbb391b8874dc07c66b   274175:
 2216270fbabf696b01b7024492e5f2b8e33f827c v: v3

---
 [refs]                           |  2 +-
 trunk/arch/powerpc/sysdev/mpic.c | 10 ++++++++++
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 4cf1b82edbac..2acce4a4db22 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: cfadd83852eb6b9a015bc1ea396b98f395f073e0
+refs/heads/master: 44f16fcf2fba79cffb268d8f3c1f744efefa5dc9
diff --git a/trunk/arch/powerpc/sysdev/mpic.c b/trunk/arch/powerpc/sysdev/mpic.c
index 9678081dc4e2..0842c6f8a3e6 100644
--- a/trunk/arch/powerpc/sysdev/mpic.c
+++ b/trunk/arch/powerpc/sysdev/mpic.c
@@ -1748,6 +1748,7 @@ void mpic_reset_core(int cpu)
 	struct mpic *mpic = mpic_primary;
 	u32 pir;
 	int cpuid = get_hard_smp_processor_id(cpu);
+	int i;
 
 	/* Set target bit for core reset */
 	pir = mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));
@@ -1759,6 +1760,15 @@ void mpic_reset_core(int cpu)
 	pir &= ~(1 << cpuid);
 	mpic_write(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT), pir);
 	mpic_read(mpic->gregs, MPIC_INFO(GREG_PROCESSOR_INIT));
+
+	/* Perform 15 EOI on each reset core to clear pending interrupts.
+	 * This is required for FSL CoreNet based devices */
+	if (mpic->flags & MPIC_FSL) {
+		for (i = 0; i < 15; i++) {
+			_mpic_write(mpic->reg_type, &mpic->cpuregs[cpuid],
+				      MPIC_CPU_EOI, 0);
+		}
+	}
 }
 #endif /* CONFIG_SMP */