From 0dbf262062a3370252f8bc061f6f26a8c6022555 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Wed, 10 Aug 2011 02:36:59 +0800 Subject: [PATCH] --- yaml --- r: 262828 b: refs/heads/master c: 7ce5ae39c46f159aee3b3427844f1491e1ccac74 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-mmp/time.c | 15 +++++++++------ 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/[refs] b/[refs] index 80fbda5dcd48..990f1eab506a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4c22ea8f449ce837dd84965badca8e10f1f4094f +refs/heads/master: 7ce5ae39c46f159aee3b3427844f1491e1ccac74 diff --git a/trunk/arch/arm/mach-mmp/time.c b/trunk/arch/arm/mach-mmp/time.c index 99833b9485cf..09e88c25fe8e 100644 --- a/trunk/arch/arm/mach-mmp/time.c +++ b/trunk/arch/arm/mach-mmp/time.c @@ -145,23 +145,26 @@ static struct clocksource cksrc = { static void __init timer_config(void) { uint32_t ccr = __raw_readl(TIMERS_VIRT_BASE + TMR_CCR); - uint32_t cer = __raw_readl(TIMERS_VIRT_BASE + TMR_CER); - uint32_t cmr = __raw_readl(TIMERS_VIRT_BASE + TMR_CMR); - __raw_writel(cer & ~0x1, TIMERS_VIRT_BASE + TMR_CER); /* disable */ + __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_CER); /* disable */ - ccr &= (cpu_is_mmp2()) ? TMR_CCR_CS_0(0) : TMR_CCR_CS_0(3); + ccr &= (cpu_is_mmp2()) ? (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) : + (TMR_CCR_CS_0(3) | TMR_CCR_CS_1(3)); __raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR); /* free-running mode */ - __raw_writel(cmr | 0x01, TIMERS_VIRT_BASE + TMR_CMR); + __raw_writel(0x3, TIMERS_VIRT_BASE + TMR_CMR); __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_PLCR(0)); /* free-running */ __raw_writel(0x7, TIMERS_VIRT_BASE + TMR_ICR(0)); /* clear status */ __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(0)); + __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_PLCR(1)); /* free-running */ + __raw_writel(0x7, TIMERS_VIRT_BASE + TMR_ICR(1)); /* clear status */ + __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(1)); + /* enable timer counter */ - __raw_writel(cer | 0x01, TIMERS_VIRT_BASE + TMR_CER); + __raw_writel(0x3, TIMERS_VIRT_BASE + TMR_CER); } static struct irqaction timer_irq = {