From 0f24aacc6fd01bbf08784251d08bb84609cf2b78 Mon Sep 17 00:00:00 2001 From: Stephen Warren Date: Wed, 5 Jan 2011 14:32:20 -0700 Subject: [PATCH] --- yaml --- r: 235233 b: refs/heads/master c: 1ca00347c579f15b0eea1a6d4bab84e2cf56e745 h: refs/heads/master i: 235231: 632b1400dc965c0ee8b53249d4c7b624410d290d v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-tegra/dma.c | 14 ++++++++++++++ trunk/arch/arm/mach-tegra/tegra2_clocks.c | 6 ++++++ 3 files changed, 21 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index ded6425c750a..12b19b25e761 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 499ef7a5c48ea9fe8034b61de304ce9f6b753fe7 +refs/heads/master: 1ca00347c579f15b0eea1a6d4bab84e2cf56e745 diff --git a/trunk/arch/arm/mach-tegra/dma.c b/trunk/arch/arm/mach-tegra/dma.c index 4625e3ae766e..2d720f2b6c75 100644 --- a/trunk/arch/arm/mach-tegra/dma.c +++ b/trunk/arch/arm/mach-tegra/dma.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include #include @@ -675,6 +676,19 @@ int __init tegra_dma_init(void) int i; unsigned int irq; void __iomem *addr; + struct clk *c; + + c = clk_get_sys("tegra-dma", NULL); + if (IS_ERR(c)) { + pr_err("Unable to get clock for APB DMA\n"); + ret = PTR_ERR(c); + goto fail; + } + ret = clk_enable(c); + if (ret != 0) { + pr_err("Unable to enable clock for APB DMA\n"); + goto fail; + } addr = IO_ADDRESS(TEGRA_APB_DMA_BASE); writel(GEN_ENABLE, addr + APB_DMA_GEN); diff --git a/trunk/arch/arm/mach-tegra/tegra2_clocks.c b/trunk/arch/arm/mach-tegra/tegra2_clocks.c index 7a2926ae2fd4..49b3edaca496 100644 --- a/trunk/arch/arm/mach-tegra/tegra2_clocks.c +++ b/trunk/arch/arm/mach-tegra/tegra2_clocks.c @@ -1759,6 +1759,11 @@ static struct clk_mux_sel mux_clk_32k[] = { { 0, 0}, }; +static struct clk_mux_sel mux_pclk[] = { + { .input = &tegra_clk_pclk, .value = 0}, + { 0, 0}, +}; + #define PERIPH_CLK(_name, _dev, _con, _clk_num, _reg, _max, _inputs, _flags) \ { \ .name = _name, \ @@ -1775,6 +1780,7 @@ static struct clk_mux_sel mux_clk_32k[] = { } struct clk tegra_periph_clks[] = { + PERIPH_CLK("apbdma", "tegra-dma", NULL, 34, 0, 108000000, mux_pclk, 0), PERIPH_CLK("rtc", "rtc-tegra", NULL, 4, 0, 32768, mux_clk_32k, PERIPH_NO_RESET), PERIPH_CLK("timer", "timer", NULL, 5, 0, 26000000, mux_clk_m, 0), PERIPH_CLK("i2s1", "i2s.0", NULL, 11, 0x100, 26000000, mux_pllaout0_audio2x_pllp_clkm, MUX | DIV_U71),