From 0f8e45139f5b88060ab8edcfcbb58f91df42a412 Mon Sep 17 00:00:00 2001 From: Jesse Barnes Date: Wed, 6 Apr 2011 12:15:08 -0700 Subject: [PATCH] --- yaml --- r: 250617 b: refs/heads/master c: eceae4817e01a16f1487d8b47ac2f56c68f3b330 h: refs/heads/master i: 250615: 671649e89ea6813c3f4a57fed24f123e583146c2 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/i915_drv.h | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 1ff286d5f485..247a6102e123 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4b65177b27ede9dee3186bc3a58c737997ee4749 +refs/heads/master: eceae4817e01a16f1487d8b47ac2f56c68f3b330 diff --git a/trunk/drivers/gpu/drm/i915/i915_drv.h b/trunk/drivers/gpu/drm/i915/i915_drv.h index bb8e839d2ac8..356d33dbdced 100644 --- a/trunk/drivers/gpu/drm/i915/i915_drv.h +++ b/trunk/drivers/gpu/drm/i915/i915_drv.h @@ -975,8 +975,8 @@ enum intel_chip_family { #define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr) #define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc) -#define HAS_PCH_SPLIT(dev) (IS_GEN5(dev) || IS_GEN6(dev)) -#define HAS_PIPE_CONTROL(dev) (IS_GEN5(dev) || IS_GEN6(dev)) +#define HAS_PCH_SPLIT(dev) (IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev)) +#define HAS_PIPE_CONTROL(dev) (INTEL_INFO(dev)->gen >= 5) #define INTEL_PCH_TYPE(dev) (((struct drm_i915_private *)(dev)->dev_private)->pch_type) #define HAS_PCH_CPT(dev) (INTEL_PCH_TYPE(dev) == PCH_CPT)