From 0fb1ae904f0e29a45f25b53df81a3492468cb55d Mon Sep 17 00:00:00 2001 From: Matthew Wilcox Date: Wed, 1 Jul 2009 14:24:30 -0700 Subject: [PATCH] --- yaml --- r: 154980 b: refs/heads/master c: 46b952a3c3a94afa339bd4961a4f3d1482436599 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/pci/pci.c | 13 +++++++++++-- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 95b0040a8edf..5e8afb3afa61 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 944c54e7fc5ccf961bef2b5449958436b85de459 +refs/heads/master: 46b952a3c3a94afa339bd4961a4f3d1482436599 diff --git a/trunk/drivers/pci/pci.c b/trunk/drivers/pci/pci.c index d5d6f5667d83..dbd0f947f497 100644 --- a/trunk/drivers/pci/pci.c +++ b/trunk/drivers/pci/pci.c @@ -1517,11 +1517,20 @@ void pci_enable_ari(struct pci_dev *dev) * * Perform INTx swizzling for a device behind one level of bridge. This is * required by section 9.1 of the PCI-to-PCI bridge specification for devices - * behind bridges on add-in cards. + * behind bridges on add-in cards. For devices with ARI enabled, the slot + * number is always 0 (see the Implementation Note in section 2.2.8.1 of + * the PCI Express Base Specification, Revision 2.1) */ u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin) { - return (((pin - 1) + PCI_SLOT(dev->devfn)) % 4) + 1; + int slot; + + if (pci_ari_enabled(dev->bus)) + slot = 0; + else + slot = PCI_SLOT(dev->devfn); + + return (((pin - 1) + slot) % 4) + 1; } int