diff --git a/[refs] b/[refs] index eacf5e89dc05..77817919763e 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: aaa02ab55796341e713f798c57c5099153869278 +refs/heads/master: d84d3ea317ce0db89ce0903b4037f800c5d4c477 diff --git a/trunk/Documentation/powerpc/dts-bindings/fsl/i2c.txt b/trunk/Documentation/powerpc/dts-bindings/fsl/i2c.txt index 50da20310585..b6d2e21474f9 100644 --- a/trunk/Documentation/powerpc/dts-bindings/fsl/i2c.txt +++ b/trunk/Documentation/powerpc/dts-bindings/fsl/i2c.txt @@ -2,14 +2,15 @@ Required properties : + - device_type : Should be "i2c" - reg : Offset and length of the register set for the device - - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a - compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121, - mpc5200 or mpc5200b. For the mpc5121, an additional node - "fsl,mpc5121-i2c-ctrl" is required as shown in the example below. Recommended properties : + - compatible : compatibility list with 2 entries, the first should + be "fsl,CHIP-i2c" where CHIP is the name of a compatible processor, + e.g. mpc8313, mpc8543, mpc8544, mpc5200 or mpc5200b. The second one + should be "fsl-i2c". - interrupts : where a is the interrupt number and b is a field that represents an encoding of the sense and level information for the interrupt. This should be encoded based on @@ -23,40 +24,25 @@ Recommended properties : Examples : - /* MPC5121 based board */ - i2c@1740 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "fsl,mpc5121-i2c", "fsl-i2c"; - reg = <0x1740 0x20>; - interrupts = <11 0x8>; - interrupt-parent = <&ipic>; - clock-frequency = <100000>; - }; - - i2ccontrol@1760 { - compatible = "fsl,mpc5121-i2c-ctrl"; - reg = <0x1760 0x8>; - }; - - /* MPC5200B based board */ i2c@3d00 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; + cell-index = <0>; reg = <0x3d00 0x40>; interrupts = <2 15 0>; interrupt-parent = <&mpc5200_pic>; fsl,preserve-clocking; }; - /* MPC8544 base board */ i2c@3100 { #address-cells = <1>; #size-cells = <0>; + cell-index = <1>; compatible = "fsl,mpc8544-i2c", "fsl-i2c"; reg = <0x3100 0x100>; interrupts = <43 2>; interrupt-parent = <&mpic>; clock-frequency = <400000>; }; + diff --git a/trunk/drivers/i2c/busses/Kconfig b/trunk/drivers/i2c/busses/Kconfig index ecf079b7f931..10041813c6ed 100644 --- a/trunk/drivers/i2c/busses/Kconfig +++ b/trunk/drivers/i2c/busses/Kconfig @@ -419,12 +419,13 @@ config I2C_IXP2000 instead. config I2C_MPC - tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx" + tristate "MPC107/824x/85xx/52xx/86xx" depends on PPC32 help If you say yes to this option, support will be included for the - built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx, - MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors. + built-in I2C interface on the MPC107/Tsi107/MPC8240/MPC8245 and + MPC85xx/MPC8641 family processors. The driver may also work on 52xx + family processors, though interrupts are known not to work. This driver can also be built as a module. If so, the module will be called i2c-mpc. diff --git a/trunk/drivers/i2c/busses/i2c-mpc.c b/trunk/drivers/i2c/busses/i2c-mpc.c index 78a15af32942..f627001108b8 100644 --- a/trunk/drivers/i2c/busses/i2c-mpc.c +++ b/trunk/drivers/i2c/busses/i2c-mpc.c @@ -31,9 +31,6 @@ #define DRV_NAME "mpc-i2c" -#define MPC_I2C_CLOCK_LEGACY 0 -#define MPC_I2C_CLOCK_PRESERVE (~0U) - #define MPC_I2C_FDR 0x04 #define MPC_I2C_CR 0x08 #define MPC_I2C_SR 0x0c @@ -69,9 +66,10 @@ struct mpc_i2c_divider { u16 fdr; /* including dfsrr */ }; -struct mpc_i2c_data { - void (*setup)(struct device_node *node, struct mpc_i2c *i2c, - u32 clock, u32 prescaler); +struct mpc_i2c_match_data { + void (*setclock)(struct device_node *node, + struct mpc_i2c *i2c, + u32 clock, u32 prescaler); u32 prescaler; }; @@ -166,8 +164,8 @@ static int i2c_wait(struct mpc_i2c *i2c, unsigned timeout, int writing) return 0; } -#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_PPC_MPC512x) -static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] __devinitconst = { +#ifdef CONFIG_PPC_MPC52xx +static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] = { {20, 0x20}, {22, 0x21}, {24, 0x22}, {26, 0x23}, {28, 0x24}, {30, 0x01}, {32, 0x25}, {34, 0x02}, {36, 0x26}, {40, 0x27}, {44, 0x04}, {48, 0x28}, @@ -188,15 +186,14 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_52xx[] __devinitconst = { {10240, 0x9d}, {12288, 0x9e}, {15360, 0x9f} }; -static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, - int prescaler) +int mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, int prescaler) { const struct mpc_i2c_divider *div = NULL; unsigned int pvr = mfspr(SPRN_PVR); u32 divider; int i; - if (clock == MPC_I2C_CLOCK_LEGACY) + if (!clock) return -EINVAL; /* Determine divider value */ @@ -218,18 +215,12 @@ static int __devinit mpc_i2c_get_fdr_52xx(struct device_node *node, u32 clock, return div ? (int)div->fdr : -EINVAL; } -static void __devinit mpc_i2c_setup_52xx(struct device_node *node, - struct mpc_i2c *i2c, - u32 clock, u32 prescaler) +static void mpc_i2c_setclock_52xx(struct device_node *node, + struct mpc_i2c *i2c, + u32 clock, u32 prescaler) { int ret, fdr; - if (clock == MPC_I2C_CLOCK_PRESERVE) { - dev_dbg(i2c->dev, "using fdr %d\n", - readb(i2c->base + MPC_I2C_FDR)); - return; - } - ret = mpc_i2c_get_fdr_52xx(node, clock, prescaler); fdr = (ret >= 0) ? ret : 0x3f; /* backward compatibility */ @@ -238,52 +229,16 @@ static void __devinit mpc_i2c_setup_52xx(struct device_node *node, if (ret >= 0) dev_info(i2c->dev, "clock %d Hz (fdr=%d)\n", clock, fdr); } -#else /* !(CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x) */ -static void __devinit mpc_i2c_setup_52xx(struct device_node *node, - struct mpc_i2c *i2c, - u32 clock, u32 prescaler) -{ -} -#endif /* CONFIG_PPC_MPC52xx || CONFIG_PPC_MPC512x */ - -#ifdef CONFIG_PPC_MPC512x -static void __devinit mpc_i2c_setup_512x(struct device_node *node, - struct mpc_i2c *i2c, - u32 clock, u32 prescaler) -{ - struct device_node *node_ctrl; - void __iomem *ctrl; - const u32 *pval; - u32 idx; - - /* Enable I2C interrupts for mpc5121 */ - node_ctrl = of_find_compatible_node(NULL, NULL, - "fsl,mpc5121-i2c-ctrl"); - if (node_ctrl) { - ctrl = of_iomap(node_ctrl, 0); - if (ctrl) { - /* Interrupt enable bits for i2c-0/1/2: bit 24/26/28 */ - pval = of_get_property(node, "reg", NULL); - idx = (*pval & 0xff) / 0x20; - setbits32(ctrl, 1 << (24 + idx * 2)); - iounmap(ctrl); - } - of_node_put(node_ctrl); - } - - /* The clock setup for the 52xx works also fine for the 512x */ - mpc_i2c_setup_52xx(node, i2c, clock, prescaler); -} -#else /* CONFIG_PPC_MPC512x */ -static void __devinit mpc_i2c_setup_512x(struct device_node *node, - struct mpc_i2c *i2c, - u32 clock, u32 prescaler) +#else /* !CONFIG_PPC_MPC52xx */ +static void mpc_i2c_setclock_52xx(struct device_node *node, + struct mpc_i2c *i2c, + u32 clock, u32 prescaler) { } -#endif /* CONFIG_PPC_MPC512x */ +#endif /* CONFIG_PPC_MPC52xx*/ #ifdef CONFIG_FSL_SOC -static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] __devinitconst = { +static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] = { {160, 0x0120}, {192, 0x0121}, {224, 0x0122}, {256, 0x0123}, {288, 0x0100}, {320, 0x0101}, {352, 0x0601}, {384, 0x0102}, {416, 0x0602}, {448, 0x0126}, {480, 0x0103}, {512, 0x0127}, @@ -303,7 +258,7 @@ static const struct mpc_i2c_divider mpc_i2c_dividers_8xxx[] __devinitconst = { {49152, 0x011e}, {61440, 0x011f} }; -static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void) +u32 mpc_i2c_get_sec_cfg_8xxx(void) { struct device_node *node = NULL; u32 __iomem *reg; @@ -332,14 +287,13 @@ static u32 __devinit mpc_i2c_get_sec_cfg_8xxx(void) return val; } -static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, - u32 prescaler) +int mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, u32 prescaler) { const struct mpc_i2c_divider *div = NULL; u32 divider; int i; - if (clock == MPC_I2C_CLOCK_LEGACY) + if (!clock) return -EINVAL; /* Determine proper divider value */ @@ -366,19 +320,12 @@ static int __devinit mpc_i2c_get_fdr_8xxx(struct device_node *node, u32 clock, return div ? (int)div->fdr : -EINVAL; } -static void __devinit mpc_i2c_setup_8xxx(struct device_node *node, - struct mpc_i2c *i2c, - u32 clock, u32 prescaler) +static void mpc_i2c_setclock_8xxx(struct device_node *node, + struct mpc_i2c *i2c, + u32 clock, u32 prescaler) { int ret, fdr; - if (clock == MPC_I2C_CLOCK_PRESERVE) { - dev_dbg(i2c->dev, "using dfsrr %d, fdr %d\n", - readb(i2c->base + MPC_I2C_DFSRR), - readb(i2c->base + MPC_I2C_FDR)); - return; - } - ret = mpc_i2c_get_fdr_8xxx(node, clock, prescaler); fdr = (ret >= 0) ? ret : 0x1031; /* backward compatibility */ @@ -391,9 +338,9 @@ static void __devinit mpc_i2c_setup_8xxx(struct device_node *node, } #else /* !CONFIG_FSL_SOC */ -static void __devinit mpc_i2c_setup_8xxx(struct device_node *node, - struct mpc_i2c *i2c, - u32 clock, u32 prescaler) +static void mpc_i2c_setclock_8xxx(struct device_node *node, + struct mpc_i2c *i2c, + u32 clock, u32 prescaler) { } #endif /* CONFIG_FSL_SOC */ @@ -547,7 +494,7 @@ static int __devinit fsl_i2c_probe(struct of_device *op, { struct mpc_i2c *i2c; const u32 *prop; - u32 clock = MPC_I2C_CLOCK_LEGACY; + u32 clock = 0; int result = 0; int plen; @@ -576,21 +523,21 @@ static int __devinit fsl_i2c_probe(struct of_device *op, } } - if (of_get_property(op->node, "fsl,preserve-clocking", NULL)) { - clock = MPC_I2C_CLOCK_PRESERVE; - } else { + if (!of_get_property(op->node, "fsl,preserve-clocking", NULL)) { prop = of_get_property(op->node, "clock-frequency", &plen); if (prop && plen == sizeof(u32)) clock = *prop; - } - if (match->data) { - struct mpc_i2c_data *data = match->data; - data->setup(op->node, i2c, clock, data->prescaler); - } else { - /* Backwards compatibility */ - if (of_get_property(op->node, "dfsrr", NULL)) - mpc_i2c_setup_8xxx(op->node, i2c, clock, 0); + if (match->data) { + struct mpc_i2c_match_data *data = + (struct mpc_i2c_match_data *)match->data; + data->setclock(op->node, i2c, clock, data->prescaler); + } else { + /* Backwards compatibility */ + if (of_get_property(op->node, "dfsrr", NULL)) + mpc_i2c_setclock_8xxx(op->node, i2c, + clock, 0); + } } dev_set_drvdata(&op->dev, i2c); @@ -635,42 +582,47 @@ static int __devexit fsl_i2c_remove(struct of_device *op) return 0; }; -static struct mpc_i2c_data mpc_i2c_data_512x __devinitdata = { - .setup = mpc_i2c_setup_512x, -}; - -static struct mpc_i2c_data mpc_i2c_data_52xx __devinitdata = { - .setup = mpc_i2c_setup_52xx, -}; - -static struct mpc_i2c_data mpc_i2c_data_8313 __devinitdata = { - .setup = mpc_i2c_setup_8xxx, -}; - -static struct mpc_i2c_data mpc_i2c_data_8543 __devinitdata = { - .setup = mpc_i2c_setup_8xxx, - .prescaler = 2, -}; - -static struct mpc_i2c_data mpc_i2c_data_8544 __devinitdata = { - .setup = mpc_i2c_setup_8xxx, - .prescaler = 3, -}; - static const struct of_device_id mpc_i2c_of_match[] = { - {.compatible = "mpc5200-i2c", .data = &mpc_i2c_data_52xx, }, - {.compatible = "fsl,mpc5200b-i2c", .data = &mpc_i2c_data_52xx, }, - {.compatible = "fsl,mpc5200-i2c", .data = &mpc_i2c_data_52xx, }, - {.compatible = "fsl,mpc5121-i2c", .data = &mpc_i2c_data_512x, }, - {.compatible = "fsl,mpc8313-i2c", .data = &mpc_i2c_data_8313, }, - {.compatible = "fsl,mpc8543-i2c", .data = &mpc_i2c_data_8543, }, - {.compatible = "fsl,mpc8544-i2c", .data = &mpc_i2c_data_8544, }, + {.compatible = "mpc5200-i2c", + .data = &(struct mpc_i2c_match_data) { + .setclock = mpc_i2c_setclock_52xx, + }, + }, + {.compatible = "fsl,mpc5200b-i2c", + .data = &(struct mpc_i2c_match_data) { + .setclock = mpc_i2c_setclock_52xx, + }, + }, + {.compatible = "fsl,mpc5200-i2c", + .data = &(struct mpc_i2c_match_data) { + .setclock = mpc_i2c_setclock_52xx, + }, + }, + {.compatible = "fsl,mpc8313-i2c", + .data = &(struct mpc_i2c_match_data) { + .setclock = mpc_i2c_setclock_8xxx, + }, + }, + {.compatible = "fsl,mpc8543-i2c", + .data = &(struct mpc_i2c_match_data) { + .setclock = mpc_i2c_setclock_8xxx, + .prescaler = 2, + }, + }, + {.compatible = "fsl,mpc8544-i2c", + .data = &(struct mpc_i2c_match_data) { + .setclock = mpc_i2c_setclock_8xxx, + .prescaler = 3, + }, /* Backward compatibility */ + }, {.compatible = "fsl-i2c", }, {}, }; + MODULE_DEVICE_TABLE(of, mpc_i2c_of_match); + /* Structure for a device driver */ static struct of_platform_driver mpc_i2c_driver = { .match_table = mpc_i2c_of_match, @@ -703,5 +655,5 @@ module_exit(fsl_i2c_exit); MODULE_AUTHOR("Adrian Cox "); MODULE_DESCRIPTION("I2C-Bus adapter for MPC107 bridge and " - "MPC824x/83xx/85xx/86xx/512x/52xx processors"); + "MPC824x/85xx/52xx processors"); MODULE_LICENSE("GPL"); diff --git a/trunk/drivers/i2c/busses/i2c-omap.c b/trunk/drivers/i2c/busses/i2c-omap.c index 0037e31076ba..913abd7c172f 100644 --- a/trunk/drivers/i2c/busses/i2c-omap.c +++ b/trunk/drivers/i2c/busses/i2c-omap.c @@ -49,24 +49,24 @@ #define OMAP_I2C_TIMEOUT (msecs_to_jiffies(1000)) #define OMAP_I2C_REV_REG 0x00 -#define OMAP_I2C_IE_REG 0x04 -#define OMAP_I2C_STAT_REG 0x08 -#define OMAP_I2C_IV_REG 0x0c +#define OMAP_I2C_IE_REG 0x01 +#define OMAP_I2C_STAT_REG 0x02 +#define OMAP_I2C_IV_REG 0x03 /* For OMAP3 I2C_IV has changed to I2C_WE (wakeup enable) */ -#define OMAP_I2C_WE_REG 0x0c -#define OMAP_I2C_SYSS_REG 0x10 -#define OMAP_I2C_BUF_REG 0x14 -#define OMAP_I2C_CNT_REG 0x18 -#define OMAP_I2C_DATA_REG 0x1c -#define OMAP_I2C_SYSC_REG 0x20 -#define OMAP_I2C_CON_REG 0x24 -#define OMAP_I2C_OA_REG 0x28 -#define OMAP_I2C_SA_REG 0x2c -#define OMAP_I2C_PSC_REG 0x30 -#define OMAP_I2C_SCLL_REG 0x34 -#define OMAP_I2C_SCLH_REG 0x38 -#define OMAP_I2C_SYSTEST_REG 0x3c -#define OMAP_I2C_BUFSTAT_REG 0x40 +#define OMAP_I2C_WE_REG 0x03 +#define OMAP_I2C_SYSS_REG 0x04 +#define OMAP_I2C_BUF_REG 0x05 +#define OMAP_I2C_CNT_REG 0x06 +#define OMAP_I2C_DATA_REG 0x07 +#define OMAP_I2C_SYSC_REG 0x08 +#define OMAP_I2C_CON_REG 0x09 +#define OMAP_I2C_OA_REG 0x0a +#define OMAP_I2C_SA_REG 0x0b +#define OMAP_I2C_PSC_REG 0x0c +#define OMAP_I2C_SCLL_REG 0x0d +#define OMAP_I2C_SCLH_REG 0x0e +#define OMAP_I2C_SYSTEST_REG 0x0f +#define OMAP_I2C_BUFSTAT_REG 0x10 /* I2C Interrupt Enable Register (OMAP_I2C_IE): */ #define OMAP_I2C_IE_XDR (1 << 14) /* TX Buffer drain int enable */ @@ -161,6 +161,7 @@ struct omap_i2c_dev { struct device *dev; void __iomem *base; /* virtual */ int irq; + int reg_shift; /* bit shift for I2C register addresses */ struct clk *iclk; /* Interface clock */ struct clk *fclk; /* Functional clock */ struct completion cmd_complete; @@ -189,12 +190,12 @@ struct omap_i2c_dev { static inline void omap_i2c_write_reg(struct omap_i2c_dev *i2c_dev, int reg, u16 val) { - __raw_writew(val, i2c_dev->base + reg); + __raw_writew(val, i2c_dev->base + (reg << i2c_dev->reg_shift)); } static inline u16 omap_i2c_read_reg(struct omap_i2c_dev *i2c_dev, int reg) { - return __raw_readw(i2c_dev->base + reg); + return __raw_readw(i2c_dev->base + (reg << i2c_dev->reg_shift)); } static int __init omap_i2c_get_clocks(struct omap_i2c_dev *dev) @@ -924,6 +925,11 @@ omap_i2c_probe(struct platform_device *pdev) dev->b_hw = 1; /* Enable hardware fixes */ } + if (cpu_is_omap7xx()) + dev->reg_shift = 1; + else + dev->reg_shift = 2; + /* reset ASAP, clearing any IRQs */ omap_i2c_init(dev); diff --git a/trunk/drivers/i2c/busses/i2c-pnx.c b/trunk/drivers/i2c/busses/i2c-pnx.c index 9532dee6b580..2b0bd0b042d6 100644 --- a/trunk/drivers/i2c/busses/i2c-pnx.c +++ b/trunk/drivers/i2c/busses/i2c-pnx.c @@ -172,6 +172,12 @@ static int i2c_pnx_master_xmit(struct i2c_pnx_algo_data *alg_data) /* We still have something to talk about... */ val = *alg_data->mif.buf++; + if (alg_data->mif.len == 1) { + val |= stop_bit; + if (!alg_data->last) + val |= start_bit; + } + alg_data->mif.len--; iowrite32(val, I2C_REG_TX(alg_data)); @@ -245,6 +251,11 @@ static int i2c_pnx_master_rcv(struct i2c_pnx_algo_data *alg_data) __func__); if (alg_data->mif.len == 1) { + /* Last byte, do not acknowledge next rcv. */ + val |= stop_bit; + if (!alg_data->last) + val |= start_bit; + /* * Enable interrupt RFDAIE (data in Rx fifo), * and disable DRMIE (need data for Tx)