From 1014dfc4aad8d4b854a33e7b41865621e1ffa8c2 Mon Sep 17 00:00:00 2001 From: Olof Johansson Date: Mon, 17 Oct 2011 16:39:24 -0700 Subject: [PATCH] --- yaml --- r: 296076 b: refs/heads/master c: dee47183301983139fd0ed784d0defe0ba08f8f6 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-tegra/fuse.c | 14 ++++++++++++++ trunk/arch/arm/mach-tegra/fuse.h | 2 ++ 3 files changed, 17 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index fe116f6ac36e..5a085bf05eeb 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 9a1086da345cea8b2d1f01b47e5bbd81d640d642 +refs/heads/master: dee47183301983139fd0ed784d0defe0ba08f8f6 diff --git a/trunk/arch/arm/mach-tegra/fuse.c b/trunk/arch/arm/mach-tegra/fuse.c index b1895c53ed60..17fdd4086e6f 100644 --- a/trunk/arch/arm/mach-tegra/fuse.c +++ b/trunk/arch/arm/mach-tegra/fuse.c @@ -35,6 +35,17 @@ int tegra_cpu_process_id; int tegra_core_process_id; enum tegra_revision tegra_revision; +/* The BCT to use at boot is specified by board straps that can be read + * through a APB misc register and decoded. 2 bits, i.e. 4 possible BCTs. + */ +int tegra_bct_strapping; + +#define STRAP_OPT 0x008 +#define GMI_AD0 (1 << 4) +#define GMI_AD1 (1 << 5) +#define RAM_ID_MASK (GMI_AD0 | GMI_AD1) +#define RAM_CODE_SHIFT 4 + static const char *tegra_revision_name[TEGRA_REVISION_MAX] = { [TEGRA_REVISION_UNKNOWN] = "unknown", [TEGRA_REVISION_A01] = "A01", @@ -93,6 +104,9 @@ void tegra_init_fuse(void) reg = tegra_fuse_readl(FUSE_SPARE_BIT); tegra_core_process_id = (reg >> 12) & 3; + reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT); + tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT; + tegra_revision = tegra_get_revision(); pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n", diff --git a/trunk/arch/arm/mach-tegra/fuse.h b/trunk/arch/arm/mach-tegra/fuse.h index 7576aaf6865c..d65d2abf803b 100644 --- a/trunk/arch/arm/mach-tegra/fuse.h +++ b/trunk/arch/arm/mach-tegra/fuse.h @@ -40,6 +40,8 @@ extern int tegra_cpu_process_id; extern int tegra_core_process_id; extern enum tegra_revision tegra_revision; +extern int tegra_bct_strapping; + unsigned long long tegra_chip_uid(void); void tegra_init_fuse(void);