From 111221b89714651bcc86dcf001ba446e40a5cfdd Mon Sep 17 00:00:00 2001
From: Maarten Lankhorst <maarten.lankhorst@canonical.com>
Date: Fri, 16 Nov 2012 17:47:16 +0100
Subject: [PATCH] --- yaml --- r: 335881 b: refs/heads/master c:
 d9c390561d1c4e520773e62781bbf89bb6845353 h: refs/heads/master i:   335879:
 ff1a410e319713274d37a6f2dbab7bcac606f057 v: v3

---
 [refs]                                        |  2 +-
 .../drm/nouveau/core/include/subdev/clock.h   |  3 ++-
 .../gpu/drm/nouveau/core/subdev/clock/nva3.c  | 19 +++++++++++++++++++
 .../gpu/drm/nouveau/core/subdev/clock/nvc0.c  |  1 +
 4 files changed, 23 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index 1f1e47da8c52..d0fd81cce985 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: bf7e438bcaff4b732f86bb2eb48fc4fee04dc31b
+refs/heads/master: d9c390561d1c4e520773e62781bbf89bb6845353
diff --git a/trunk/drivers/gpu/drm/nouveau/core/include/subdev/clock.h b/trunk/drivers/gpu/drm/nouveau/core/include/subdev/clock.h
index 39e73b91d360..41b7a6a76f19 100644
--- a/trunk/drivers/gpu/drm/nouveau/core/include/subdev/clock.h
+++ b/trunk/drivers/gpu/drm/nouveau/core/include/subdev/clock.h
@@ -54,6 +54,7 @@ int nv04_clock_pll_calc(struct nouveau_clock *, struct nvbios_pll *,
 			int clk, struct nouveau_pll_vals *);
 int nv04_clock_pll_prog(struct nouveau_clock *, u32 reg1,
 			struct nouveau_pll_vals *);
-
+int nva3_clock_pll_calc(struct nouveau_clock *, struct nvbios_pll *,
+			int clk, struct nouveau_pll_vals *);
 
 #endif
diff --git a/trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c b/trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
index cc8d7d162d7c..9068c98b96f6 100644
--- a/trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
+++ b/trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
@@ -66,6 +66,24 @@ nva3_clock_pll_set(struct nouveau_clock *clk, u32 type, u32 freq)
 	return ret;
 }
 
+int
+nva3_clock_pll_calc(struct nouveau_clock *clock, struct nvbios_pll *info,
+		    int clk, struct nouveau_pll_vals *pv)
+{
+	int ret, N, M, P;
+
+	ret = nva3_pll_calc(clock, info, clk, &N, NULL, &M, &P);
+
+	if (ret > 0) {
+		pv->refclk = info->refclk;
+		pv->N1 = N;
+		pv->M1 = M;
+		pv->log2P = P;
+	}
+	return ret;
+}
+
+
 static int
 nva3_clock_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 		struct nouveau_oclass *oclass, void *data, u32 size,
@@ -80,6 +98,7 @@ nva3_clock_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 		return ret;
 
 	priv->base.pll_set = nva3_clock_pll_set;
+	priv->base.pll_calc = nva3_clock_pll_calc;
 	return 0;
 }
 
diff --git a/trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c b/trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c
index 5ccce0b17bf3..f6962c9b6c36 100644
--- a/trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c
+++ b/trunk/drivers/gpu/drm/nouveau/core/subdev/clock/nvc0.c
@@ -79,6 +79,7 @@ nvc0_clock_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
 		return ret;
 
 	priv->base.pll_set = nvc0_clock_pll_set;
+	priv->base.pll_calc = nva3_clock_pll_calc;
 	return 0;
 }