From 113132241a5676c4eaebcfebeed4d0ee8ef3af8c Mon Sep 17 00:00:00 2001
From: Peter Zijlstra <a.p.zijlstra@chello.nl>
Date: Mon, 29 Mar 2010 16:37:17 +0200
Subject: [PATCH] --- yaml --- r: 191159 b: refs/heads/master c:
 40b91cd10f000b4c4934e48e2e5c0bec66def144 h: refs/heads/master i:   191157:
 e1ed7c853df16e423b66ca9570a23422977fd714   191155:
 43a4a29407ba82d1d6665974361e6a56ebe7253d   191151:
 431e9197b0382e906882eb64ac6007e70974191d v: v3

---
 [refs]                                       | 2 +-
 trunk/arch/x86/kernel/cpu/perf_event_intel.c | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 075ba378d366..a7268e105000 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: caaa8be3b6707cb9664e573a28b00f845ce9f32e
+refs/heads/master: 40b91cd10f000b4c4934e48e2e5c0bec66def144
diff --git a/trunk/arch/x86/kernel/cpu/perf_event_intel.c b/trunk/arch/x86/kernel/cpu/perf_event_intel.c
index 1957e3f14c04..f168b4030d40 100644
--- a/trunk/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/trunk/arch/x86/kernel/cpu/perf_event_intel.c
@@ -488,6 +488,7 @@ static void intel_pmu_enable_all(int added)
  * Workaround for:
  *   Intel Errata AAK100 (model 26)
  *   Intel Errata AAP53  (model 30)
+ *   Intel Errata BD53   (model 44)
  *
  * These chips need to be 'reset' when adding counters by programming
  * the magic three (non counting) events 0x4300D2, 0x4300B1 and 0x4300B5
@@ -980,6 +981,7 @@ static __init int intel_pmu_init(void)
 		intel_pmu_lbr_init_nhm();
 
 		x86_pmu.event_constraints = intel_westmere_event_constraints;
+		x86_pmu.enable_all = intel_pmu_nhm_enable_all;
 		pr_cont("Westmere events, ");
 		break;