From 11ec70e876801e8b3b381a8bd665d6f1af2eca2c Mon Sep 17 00:00:00 2001 From: Gary Hade Date: Mon, 6 Nov 2006 15:39:23 -0800 Subject: [PATCH] --- yaml --- r: 39643 b: refs/heads/master c: d7a1944e8da5e91859b98259189aaaa4d8b7fa07 h: refs/heads/master i: 39641: 837a08215f90f795bc0f85d67f2aece7cb918b6d 39639: d09208fd9c5406d0c5ea4e3412a197b43784e4f2 v: v3 --- [refs] | 2 +- trunk/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index f3d2952a3e1e..15941656f449 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4e74663c5d7eefc1f953b9b0bdacab09917b4eac +refs/heads/master: d7a1944e8da5e91859b98259189aaaa4d8b7fa07 diff --git a/trunk/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c b/trunk/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c index d2d9caf00a2f..e3fa03ab19ab 100644 --- a/trunk/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c +++ b/trunk/arch/i386/kernel/cpu/cpufreq/speedstep-centrino.c @@ -463,6 +463,10 @@ static int centrino_cpu_init_acpi(struct cpufreq_policy *policy) } for (i=0; istate_count; i++) { + /* clear high bits (set by some BIOSes) that are non-relevant and + problematic for this driver's MSR only frequency transition code */ + p->states[i].control &= 0xffff; + if (p->states[i].control != p->states[i].status) { dprintk("Different control (%llu) and status values (%llu)\n", p->states[i].control, p->states[i].status);