diff --git a/[refs] b/[refs]
index e2d82973fc6f..9b3adcd0b08e 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: a654ddac0892eb8495d75cbd7f45646895cc5e5f
+refs/heads/master: bada55371fb2b3615983ba231cad61ef21bdf9c3
diff --git a/trunk/drivers/video/exynos/exynos_dp_reg.c b/trunk/drivers/video/exynos/exynos_dp_reg.c
index 2db5b9aa250a..174c445e18c1 100644
--- a/trunk/drivers/video/exynos/exynos_dp_reg.c
+++ b/trunk/drivers/video/exynos/exynos_dp_reg.c
@@ -401,6 +401,7 @@ int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp)
 {
 	int reg;
 	int retval = 0;
+	int timeout_loop = 0;
 
 	/* Enable AUX CH operation */
 	reg = readl(dp->reg_base + EXYNOS_DP_AUX_CH_CTL_2);
@@ -409,8 +410,15 @@ int exynos_dp_start_aux_transaction(struct exynos_dp_device *dp)
 
 	/* Is AUX CH command reply received? */
 	reg = readl(dp->reg_base + EXYNOS_DP_INT_STA);
-	while (!(reg & RPLY_RECEIV))
+	while (!(reg & RPLY_RECEIV)) {
+		timeout_loop++;
+		if (DP_TIMEOUT_LOOP_COUNT < timeout_loop) {
+			dev_err(dp->dev, "AUX CH command reply failed!\n");
+			return -ETIMEDOUT;
+		}
 		reg = readl(dp->reg_base + EXYNOS_DP_INT_STA);
+		usleep_range(10, 11);
+	}
 
 	/* Clear interrupt source for AUX CH command reply */
 	writel(RPLY_RECEIV, dp->reg_base + EXYNOS_DP_INT_STA);