From 12a38569f09d266845328c4fbd395c10ae4a372d Mon Sep 17 00:00:00 2001
From: Andi Kleen <ak@suse.de>
Date: Mon, 21 May 2007 14:31:47 +0200
Subject: [PATCH] --- yaml --- r: 56671 b: refs/heads/master c:
 c12ceb766eb5ac975c1145d51236fcdcf81a6578 h: refs/heads/master i:   56669:
 e77c8318465a75e610ca6e1dbfd3618eb87be1db   56667:
 a7b07e569f285467961672c212aa8731de6929f2   56663:
 a55367f713dc8ad351f8380d7ef373b7ea9a26c0   56655:
 89df53355c90277237127791d3d23b7a8771ee45   56639:
 c36ded5cca4d770c2eedebdde260a9c7296fbbd0 v: v3

---
 [refs]                                 | 2 +-
 trunk/arch/i386/kernel/cpu/amd.c       | 4 ++++
 trunk/arch/i386/kernel/cpu/mcheck/k7.c | 6 +++---
 3 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/[refs] b/[refs]
index d65ac1b46cf4..d565cc2cf673 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 21124a82bb82e100369846ff2044dd5ea65fc934
+refs/heads/master: c12ceb766eb5ac975c1145d51236fcdcf81a6578
diff --git a/trunk/arch/i386/kernel/cpu/amd.c b/trunk/arch/i386/kernel/cpu/amd.c
index 4fec702afd7e..6f47eeeb93ea 100644
--- a/trunk/arch/i386/kernel/cpu/amd.c
+++ b/trunk/arch/i386/kernel/cpu/amd.c
@@ -280,6 +280,10 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 
 	if (c->x86 == 0x10 && !force_mwait)
 		clear_bit(X86_FEATURE_MWAIT, c->x86_capability);
+
+	/* K6s reports MCEs but don't actually have all the MSRs */
+	if (c->x86 < 6)
+		clear_bit(X86_FEATURE_MCE, c->x86_capability);
 }
 
 static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size)
diff --git a/trunk/arch/i386/kernel/cpu/mcheck/k7.c b/trunk/arch/i386/kernel/cpu/mcheck/k7.c
index f9fa4142551e..eef63e3630c2 100644
--- a/trunk/arch/i386/kernel/cpu/mcheck/k7.c
+++ b/trunk/arch/i386/kernel/cpu/mcheck/k7.c
@@ -72,12 +72,12 @@ void amd_mcheck_init(struct cpuinfo_x86 *c)
 	u32 l, h;
 	int i;
 
-	machine_check_vector = k7_machine_check;
-	wmb();
-
 	if (!cpu_has(c, X86_FEATURE_MCE))
 		return;
 
+	machine_check_vector = k7_machine_check;
+	wmb();
+
 	printk (KERN_INFO "Intel machine check architecture supported.\n");
 	rdmsr (MSR_IA32_MCG_CAP, l, h);
 	if (l & (1<<8))	/* Control register present ? */