From 137b0240fd3643dbe6575e49bf258859c4c90dda Mon Sep 17 00:00:00 2001
From: Stephen Warren <swarren@nvidia.com>
Date: Tue, 22 Jan 2013 17:12:25 -0700
Subject: [PATCH] --- yaml --- r: 355564 b: refs/heads/master c:
 540fc9d971a6b38339dfcccb5364640b907ae423 h: refs/heads/master v: v3

---
 [refs]                               | 2 +-
 trunk/arch/arm/boot/dts/tegra20.dtsi | 6 ++++++
 2 files changed, 7 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 62daba3131a2..a4e42942e891 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: e374b65c9b15c17685925e45a3f8e97c80a75e5e
+refs/heads/master: 540fc9d971a6b38339dfcccb5364640b907ae423
diff --git a/trunk/arch/arm/boot/dts/tegra20.dtsi b/trunk/arch/arm/boot/dts/tegra20.dtsi
index 3d7ab220ae49..649391579871 100644
--- a/trunk/arch/arm/boot/dts/tegra20.dtsi
+++ b/trunk/arch/arm/boot/dts/tegra20.dtsi
@@ -405,18 +405,24 @@
 		reg = <0xc5000400 0x3c00>;
 		phy_type = "utmi";
 		nvidia,has-legacy-mode;
+		clocks = <&tegra_car 22>, <&tegra_car 127>;
+		clock-names = "phy", "pll_u";
 	};
 
 	phy2: usb-phy@c5004400 {
 		compatible = "nvidia,tegra20-usb-phy";
 		reg = <0xc5004400 0x3c00>;
 		phy_type = "ulpi";
+		clocks = <&tegra_car 94>, <&tegra_car 127>;
+		clock-names = "phy", "pll_u";
 	};
 
 	phy3: usb-phy@c5008400 {
 		compatible = "nvidia,tegra20-usb-phy";
 		reg = <0xc5008400 0x3C00>;
 		phy_type = "utmi";
+		clocks = <&tegra_car 22>, <&tegra_car 127>;
+		clock-names = "phy", "pll_u";
 	};
 
 	usb@c5000000 {