From 13da4963d7211bb5f3e3d831a4026571e90dc4b3 Mon Sep 17 00:00:00 2001 From: Kuninori Morimoto Date: Mon, 15 Oct 2012 01:10:28 -0700 Subject: [PATCH] --- yaml --- r: 334617 b: refs/heads/master c: 11f93576b0b50bf391ffafa544b85e541f5e59a5 h: refs/heads/master i: 334615: 362fb9dd67178959d5ad69837d693ef9a09b5215 v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-shmobile/clock-r8a7779.c | 22 ++++++++++---------- 2 files changed, 12 insertions(+), 12 deletions(-) diff --git a/[refs] b/[refs] index 69882dc39363..b92d7709ac95 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: bc8b2428e73ce19aecbf2aac3f5d4c844adb3216 +refs/heads/master: 11f93576b0b50bf391ffafa544b85e541f5e59a5 diff --git a/trunk/arch/arm/mach-shmobile/clock-r8a7779.c b/trunk/arch/arm/mach-shmobile/clock-r8a7779.c index 3cafb6ab5e9a..37b2a3133b3b 100644 --- a/trunk/arch/arm/mach-shmobile/clock-r8a7779.c +++ b/trunk/arch/arm/mach-shmobile/clock-r8a7779.c @@ -24,17 +24,17 @@ #include #include -#define FRQMR 0xffc80014 -#define MSTPCR0 0xffc80030 -#define MSTPCR1 0xffc80034 -#define MSTPCR3 0xffc8003c -#define MSTPSR1 0xffc80044 -#define MSTPSR4 0xffc80048 -#define MSTPSR6 0xffc8004c -#define MSTPCR4 0xffc80050 -#define MSTPCR5 0xffc80054 -#define MSTPCR6 0xffc80058 -#define MSTPCR7 0xffc80040 +#define FRQMR IOMEM(0xffc80014) +#define MSTPCR0 IOMEM(0xffc80030) +#define MSTPCR1 IOMEM(0xffc80034) +#define MSTPCR3 IOMEM(0xffc8003c) +#define MSTPSR1 IOMEM(0xffc80044) +#define MSTPSR4 IOMEM(0xffc80048) +#define MSTPSR6 IOMEM(0xffc8004c) +#define MSTPCR4 IOMEM(0xffc80050) +#define MSTPCR5 IOMEM(0xffc80054) +#define MSTPCR6 IOMEM(0xffc80058) +#define MSTPCR7 IOMEM(0xffc80040) /* ioremap() through clock mapping mandatory to avoid * collision with ARM coherent DMA virtual memory range.