From 1430dc02b5798b5d7a73ae083a199591cb8246a1 Mon Sep 17 00:00:00 2001
From: Eugene Surovegin <ebs@ebshome.net>
Date: Sat, 3 Sep 2005 15:55:40 -0700
Subject: [PATCH] --- yaml --- r: 6914 b: refs/heads/master c:
 9149fb3b8e6913eeb0c80010afef9c55892f6e61 h: refs/heads/master v: v3

---
 [refs]                           |  2 +-
 trunk/arch/ppc/kernel/cputable.c | 10 ++++++++++
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 3256c6b5f538..e53a49664a55 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 39cdc4bfb5c587c617ab6a28083c19101154e149
+refs/heads/master: 9149fb3b8e6913eeb0c80010afef9c55892f6e61
diff --git a/trunk/arch/ppc/kernel/cputable.c b/trunk/arch/ppc/kernel/cputable.c
index 8a3d74f2531e..22c187c1f53f 100644
--- a/trunk/arch/ppc/kernel/cputable.c
+++ b/trunk/arch/ppc/kernel/cputable.c
@@ -922,6 +922,16 @@ struct cpu_spec	cpu_specs[] = {
 		.icache_bsize		= 32,
 		.dcache_bsize		= 32,
 	},
+	{ /* 440GX Rev. F */
+		.pvr_mask		= 0xf0000fff,
+		.pvr_value		= 0x50000894,
+		.cpu_name		= "440GX Rev. F",
+		.cpu_features		= CPU_FTR_SPLIT_ID_CACHE |
+			CPU_FTR_USE_TB,
+		.cpu_user_features	= PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
+		.icache_bsize		= 32,
+		.dcache_bsize		= 32,
+	},
 #endif /* CONFIG_44x */
 #ifdef CONFIG_FSL_BOOKE
 	{ 	/* e200z5 */