From 14ed63d1084aee33ab1f75fcf7a71599cae23a67 Mon Sep 17 00:00:00 2001 From: Jerome Glisse Date: Fri, 16 Apr 2010 18:46:35 +0200 Subject: [PATCH] --- yaml --- r: 190005 b: refs/heads/master c: 30f69f3fb20bd719b5e1bf879339914063d38f47 h: refs/heads/master i: 190003: 504bad6c560206ef6fd253d3e8de32ad13fb0c67 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/rs600.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 06be3911b6c9..7ec720ff6116 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 1b5331d9c6ae1f68db6359d227531ec42bc40d47 +refs/heads/master: 30f69f3fb20bd719b5e1bf879339914063d38f47 diff --git a/trunk/drivers/gpu/drm/radeon/rs600.c b/trunk/drivers/gpu/drm/radeon/rs600.c index abf824c2123d..a81bc7a21e14 100644 --- a/trunk/drivers/gpu/drm/radeon/rs600.c +++ b/trunk/drivers/gpu/drm/radeon/rs600.c @@ -159,7 +159,7 @@ void rs600_gart_tlb_flush(struct radeon_device *rdev) WREG32_MC(R_000100_MC_PT0_CNTL, tmp); tmp = RREG32_MC(R_000100_MC_PT0_CNTL); - tmp |= S_000100_INVALIDATE_ALL_L1_TLBS(1) & S_000100_INVALIDATE_L2_CACHE(1); + tmp |= S_000100_INVALIDATE_ALL_L1_TLBS(1) | S_000100_INVALIDATE_L2_CACHE(1); WREG32_MC(R_000100_MC_PT0_CNTL, tmp); tmp = RREG32_MC(R_000100_MC_PT0_CNTL);