From 15083064df985d1a043aadb6de8476afe346f1e6 Mon Sep 17 00:00:00 2001
From: Pawel Moll <pawel.moll@arm.com>
Date: Tue, 25 Jan 2011 15:53:03 +0100
Subject: [PATCH] --- yaml --- r: 232393 b: refs/heads/master c:
 baaece224570a935210a59257b5d9073e99843ea h: refs/heads/master i:   232391:
 dabd4a95d5c38c8b355c15bde3d43f6444505b23 v: v3

---
 [refs]                                      | 2 +-
 trunk/arch/arm/include/asm/hardware/sp810.h | 6 ++++++
 trunk/arch/arm/mach-vexpress/v2m.c          | 9 +++++++++
 3 files changed, 16 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 361d386c0745..d49147fe8239 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: e5310f611d17ed4e92e0d4e46fd9f6fb40e66df3
+refs/heads/master: baaece224570a935210a59257b5d9073e99843ea
diff --git a/trunk/arch/arm/include/asm/hardware/sp810.h b/trunk/arch/arm/include/asm/hardware/sp810.h
index a101f10bb5b1..721847dc68ab 100644
--- a/trunk/arch/arm/include/asm/hardware/sp810.h
+++ b/trunk/arch/arm/include/asm/hardware/sp810.h
@@ -50,6 +50,12 @@
 #define SCPCELLID2		0xFF8
 #define SCPCELLID3		0xFFC
 
+#define SCCTRL_TIMEREN0SEL_REFCLK	(0 << 15)
+#define SCCTRL_TIMEREN0SEL_TIMCLK	(1 << 15)
+
+#define SCCTRL_TIMEREN1SEL_REFCLK	(0 << 17)
+#define SCCTRL_TIMEREN1SEL_TIMCLK	(1 << 17)
+
 static inline void sysctl_soft_reset(void __iomem *base)
 {
 	/* writing any value to SCSYSSTAT reg will reset system */
diff --git a/trunk/arch/arm/mach-vexpress/v2m.c b/trunk/arch/arm/mach-vexpress/v2m.c
index a9ed3428a2fa..1edae65a0e72 100644
--- a/trunk/arch/arm/mach-vexpress/v2m.c
+++ b/trunk/arch/arm/mach-vexpress/v2m.c
@@ -19,6 +19,7 @@
 #include <asm/mach/time.h>
 #include <asm/hardware/arm_timer.h>
 #include <asm/hardware/timer-sp.h>
+#include <asm/hardware/sp810.h>
 
 #include <mach/motherboard.h>
 
@@ -50,8 +51,16 @@ void __init v2m_map_io(struct map_desc *tile, size_t num)
 
 static void __init v2m_timer_init(void)
 {
+	u32 scctrl;
+
 	versatile_sched_clock_init(MMIO_P2V(V2M_SYS_24MHZ), 24000000);
 
+	/* Select 1MHz TIMCLK as the reference clock for SP804 timers */
+	scctrl = readl(MMIO_P2V(V2M_SYSCTL + SCCTRL));
+	scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
+	scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
+	writel(scctrl, MMIO_P2V(V2M_SYSCTL + SCCTRL));
+
 	writel(0, MMIO_P2V(V2M_TIMER0) + TIMER_CTRL);
 	writel(0, MMIO_P2V(V2M_TIMER1) + TIMER_CTRL);