From 15a5a4d5eb8a3b243c8d53f81bf1a1585828c67a Mon Sep 17 00:00:00 2001 From: Shinya Kuribayashi Date: Wed, 18 Mar 2009 09:04:01 +0900 Subject: [PATCH] --- yaml --- r: 132567 b: refs/heads/master c: 5864810bc50de57e1b4757850d3208f69579af7f h: refs/heads/master i: 132565: 1e0853a4755b4032dd1645fbe29826c1c7c103ff 132563: e8b0e6ac5e203fc4bb9e6d439277ef8af71ec626 132559: 6c6c8f55b9e43cac90d52efde7ceb0ef893fe8a9 v: v3 --- [refs] | 2 +- trunk/arch/mips/mm/c-r4k.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 720cfb36b070..ff705bc35094 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d7001198366bffce4506ba21b7b0fee2de194f73 +refs/heads/master: 5864810bc50de57e1b4757850d3208f69579af7f diff --git a/trunk/arch/mips/mm/c-r4k.c b/trunk/arch/mips/mm/c-r4k.c index c43f4b26a690..871e828bc62a 100644 --- a/trunk/arch/mips/mm/c-r4k.c +++ b/trunk/arch/mips/mm/c-r4k.c @@ -780,7 +780,7 @@ static void __cpuinit probe_pcache(void) c->dcache.ways = 2; c->dcache.waybit = 0; - c->options |= MIPS_CPU_CACHE_CDEX_P; + c->options |= MIPS_CPU_CACHE_CDEX_P | MIPS_CPU_PREFETCH; break; case CPU_TX49XX: