From 18239b32ef9f7ed60a05c5d9d1d80791bfe57eac Mon Sep 17 00:00:00 2001 From: Alan Cox Date: Tue, 24 Jul 2007 15:17:48 +0100 Subject: [PATCH] --- yaml --- r: 62832 b: refs/heads/master c: 64a8170975947978ea4094dd6c4b1f41119d6ae6 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/ata/pata_hpt37x.c | 14 +++++++------- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/[refs] b/[refs] index 4550142ab6ef..62aba1030e59 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 5c8d52015c09b42632a73896f8a80cff64c5c1d1 +refs/heads/master: 64a8170975947978ea4094dd6c4b1f41119d6ae6 diff --git a/trunk/drivers/ata/pata_hpt37x.c b/trunk/drivers/ata/pata_hpt37x.c index b0af65aadde3..84d9c5568567 100644 --- a/trunk/drivers/ata/pata_hpt37x.c +++ b/trunk/drivers/ata/pata_hpt37x.c @@ -26,7 +26,7 @@ #include #define DRV_NAME "pata_hpt37x" -#define DRV_VERSION "0.6.6" +#define DRV_VERSION "0.6.7" struct hpt_clock { u8 xfer_speed; @@ -1103,17 +1103,17 @@ static int hpt37x_init_one(struct pci_dev *dev, const struct pci_device_id *id) /* Select the DPLL clock. */ pci_write_config_byte(dev, 0x5b, 0x21); - pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low); + pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100); for(adjust = 0; adjust < 8; adjust++) { if (hpt37x_calibrate_dpll(dev)) break; /* See if it'll settle at a fractionally different clock */ - if ((adjust & 3) == 3) { - f_low --; - f_high ++; - } - pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low); + if (adjust & 1) + f_low -= adjust >> 1; + else + f_high += adjust >> 1; + pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100); } if (adjust == 8) { printk(KERN_WARNING "hpt37x: DPLL did not stabilize.\n");