From 184468c9a1ed4eb3f00e1a141fbf07cc8c82eb8b Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 26 Jun 2006 16:16:06 -0700 Subject: [PATCH] --- yaml --- r: 31673 b: refs/heads/master c: eca9e56eb8dfcf2b8b966c1c49e4622196f0586d h: refs/heads/master i: 31671: 3b424db6a790098f59079f81889298a5c39f1d66 v: v3 --- [refs] | 2 +- trunk/arch/arm/plat-omap/dma.c | 6 ++++++ 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 5ab5dea299e1..2a7601617372 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: e8cdf7bdf3efbb1e285fd82a86a3f8fae5ae2665 +refs/heads/master: eca9e56eb8dfcf2b8b966c1c49e4622196f0586d diff --git a/trunk/arch/arm/plat-omap/dma.c b/trunk/arch/arm/plat-omap/dma.c index 5dac4230360d..aa1cf79f9543 100644 --- a/trunk/arch/arm/plat-omap/dma.c +++ b/trunk/arch/arm/plat-omap/dma.c @@ -166,18 +166,24 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, if (cpu_is_omap24xx() && dma_trigger) { u32 val = OMAP_DMA_CCR_REG(lch); + val &= ~(3 << 19); if (dma_trigger > 63) val |= 1 << 20; if (dma_trigger > 31) val |= 1 << 19; + val &= ~(0x1f); val |= (dma_trigger & 0x1f); if (sync_mode & OMAP_DMA_SYNC_FRAME) val |= 1 << 5; + else + val &= ~(1 << 5); if (sync_mode & OMAP_DMA_SYNC_BLOCK) val |= 1 << 18; + else + val &= ~(1 << 18); if (src_or_dst_synch) val |= 1 << 24; /* source synch */