From 1903c6688c7a364a11b1833001833062d4305c6a Mon Sep 17 00:00:00 2001
From: "John W. Linville" <linville@tuxdriver.com>
Date: Fri, 13 May 2011 15:18:35 -0400
Subject: [PATCH] --- yaml --- r: 247657 b: refs/heads/master c:
 b376704bf57e1b731fe2dd6e9aa83a1d42a45ef9 h: refs/heads/master i:   247655:
 2a4e2624cceb2f90c8c3ef6f62cc817a42d70753 v: v3

---
 [refs]                   |  2 +-
 trunk/drivers/ssb/main.c | 14 ++++++++++----
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/[refs] b/[refs]
index a5e501753bd5..822dba8e3d8a 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 9439064cd9fce8a4db716a748dbf581eb234f9c7
+refs/heads/master: b376704bf57e1b731fe2dd6e9aa83a1d42a45ef9
diff --git a/trunk/drivers/ssb/main.c b/trunk/drivers/ssb/main.c
index ee2937c41424..f8a13f863217 100644
--- a/trunk/drivers/ssb/main.c
+++ b/trunk/drivers/ssb/main.c
@@ -1332,21 +1332,27 @@ EXPORT_SYMBOL(ssb_bus_powerup);
 static void ssb_broadcast_value(struct ssb_device *dev,
 				u32 address, u32 data)
 {
+#ifdef CONFIG_SSB_DRIVER_PCICORE
 	/* This is used for both, PCI and ChipCommon core, so be careful. */
 	BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
 	BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
+#endif
 
-	ssb_write32(dev, SSB_PCICORE_BCAST_ADDR, address);
-	ssb_read32(dev, SSB_PCICORE_BCAST_ADDR); /* flush */
-	ssb_write32(dev, SSB_PCICORE_BCAST_DATA, data);
-	ssb_read32(dev, SSB_PCICORE_BCAST_DATA); /* flush */
+	ssb_write32(dev, SSB_CHIPCO_BCAST_ADDR, address);
+	ssb_read32(dev, SSB_CHIPCO_BCAST_ADDR); /* flush */
+	ssb_write32(dev, SSB_CHIPCO_BCAST_DATA, data);
+	ssb_read32(dev, SSB_CHIPCO_BCAST_DATA); /* flush */
 }
 
 void ssb_commit_settings(struct ssb_bus *bus)
 {
 	struct ssb_device *dev;
 
+#ifdef CONFIG_SSB_DRIVER_PCICORE
 	dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
+#else
+	dev = bus->chipco.dev;
+#endif
 	if (WARN_ON(!dev))
 		return;
 	/* This forces an update of the cached registers. */