From 19bf75c730096132ada1a03a36d29ae5ff1a627c Mon Sep 17 00:00:00 2001 From: Dave Kleikamp Date: Mon, 1 Aug 2011 12:41:00 -0500 Subject: [PATCH] --- yaml --- r: 262997 b: refs/heads/master c: 1c8007b0769d37aa5fcb343b383b0af89ade2f71 h: refs/heads/master i: 262995: 0a0cd37afd809850432f2b052ea85a355b9e23e3 v: v3 --- [refs] | 2 +- trunk/Documentation/00-INDEX | 2 - trunk/Documentation/ABI/testing/pstore | 6 - .../ABI/testing/sysfs-platform-ideapad-laptop | 17 - trunk/Documentation/CodingStyle | 23 +- trunk/Documentation/SubmittingDrivers | 2 +- trunk/Documentation/SubmittingPatches | 2 +- trunk/Documentation/acpi/apei/einj.txt | 11 +- .../Documentation/device-mapper/dm-crypt.txt | 21 +- .../Documentation/device-mapper/dm-flakey.txt | 48 +- trunk/Documentation/device-mapper/dm-raid.txt | 138 +- .../devicetree/bindings/gpio/gpio_keys.txt | 2 +- .../devicetree/bindings/input/fsl-mma8450.txt | 11 - trunk/Documentation/dmaengine.txt | 234 +- trunk/Documentation/email-clients.txt | 12 +- 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4 +- trunk/include/linux/sched.h | 1 - trunk/include/linux/serial_sci.h | 75 - trunk/include/linux/sh_clk.h | 4 - trunk/include/linux/sh_dma.h | 8 - trunk/include/linux/shmem_fs.h | 17 +- trunk/include/linux/socket.h | 6 +- trunk/include/linux/swapops.h | 23 - trunk/include/linux/thermal.h | 22 + trunk/include/net/cipso_ipv4.h | 2 +- trunk/include/net/dst.h | 17 +- trunk/include/net/inet_sock.h | 2 +- trunk/include/net/netlabel.h | 2 +- trunk/include/net/secure_seq.h | 20 - trunk/include/scsi/osd_ore.h | 125 - trunk/include/sound/tlv320aic3x.h | 2 +- trunk/include/sound/{wm8996.h => wm8915.h} | 28 +- trunk/include/trace/events/ext4.h | 87 +- trunk/include/trace/events/jbd2.h | 36 +- trunk/include/video/omapdss.h | 26 +- trunk/init/main.c | 7 +- trunk/ipc/shm.c | 16 +- trunk/kernel/Makefile | 3 +- trunk/kernel/cred.c | 6 +- trunk/kernel/debug/gdbstub.c | 22 +- trunk/kernel/debug/kdb/kdb_bt.c | 5 +- trunk/kernel/debug/kdb/kdb_cmds | 4 + trunk/kernel/debug/kdb/kdb_debugger.c | 21 +- trunk/kernel/debug/kdb/kdb_io.c | 36 +- trunk/kernel/debug/kdb/kdb_main.c | 4 +- trunk/kernel/debug/kdb/kdb_private.h | 3 +- trunk/kernel/fork.c | 1 - trunk/kernel/futex.c | 54 +- trunk/kernel/kmod.c | 2 +- trunk/kernel/lockdep.c | 37 +- trunk/kernel/printk.c | 6 +- trunk/kernel/sys.c | 15 +- trunk/kernel/taskstats.c | 18 +- trunk/kernel/trace/Kconfig | 2 +- trunk/lib/Kconfig | 3 - trunk/lib/Makefile | 4 +- trunk/lib/bitmap.c | 2 + trunk/lib/fault-inject.c | 20 +- trunk/lib/genalloc.c | 300 +- trunk/lib/idr.c | 67 - trunk/lib/llist.c | 129 - trunk/lib/md5.c | 95 - trunk/lib/radix-tree.c | 121 +- trunk/lib/sha1.c | 212 +- trunk/mm/failslab.c | 14 +- trunk/mm/filemap.c | 106 +- trunk/mm/memcontrol.c | 78 +- trunk/mm/memory-failure.c | 92 - trunk/mm/mincore.c | 11 +- trunk/mm/oom_kill.c | 4 +- trunk/mm/page_alloc.c | 13 +- trunk/mm/shmem.c | 1493 ++++--- trunk/mm/slab.c | 92 +- trunk/mm/slub.c | 10 +- trunk/mm/swapfile.c | 20 +- trunk/mm/truncate.c | 8 - trunk/mm/vmalloc.c | 7 +- trunk/net/atm/br2684.c | 2 + trunk/net/bridge/br_if.c | 6 +- trunk/net/bridge/br_notify.c | 7 +- trunk/net/bridge/netfilter/ebtables.c | 3 +- trunk/net/core/Makefile | 2 +- trunk/net/core/scm.c | 2 +- trunk/net/core/secure_seq.c | 184 - trunk/net/core/skbuff.c | 17 +- trunk/net/dccp/ipv4.c | 1 - trunk/net/dccp/ipv6.c | 9 +- trunk/net/ipv4/igmp.c | 2 +- trunk/net/ipv4/inet_hashtables.c | 1 - trunk/net/ipv4/inetpeer.c | 1 - trunk/net/ipv4/ip_output.c | 11 +- trunk/net/ipv4/ip_sockglue.c | 9 +- trunk/net/ipv4/netfilter.c | 18 +- .../net/ipv4/netfilter/nf_nat_proto_common.c | 1 - trunk/net/ipv4/raw.c | 3 +- trunk/net/ipv4/route.c | 24 +- trunk/net/ipv4/syncookies.c | 2 +- trunk/net/ipv4/tcp_ipv4.c | 1 - trunk/net/ipv6/addrconf.c | 2 +- trunk/net/ipv6/datagram.c | 11 +- trunk/net/ipv6/inet6_hashtables.c | 1 - trunk/net/ipv6/ip6_fib.c | 2 +- trunk/net/ipv6/ip6_output.c | 13 +- trunk/net/ipv6/route.c | 35 +- trunk/net/ipv6/syncookies.c | 2 +- trunk/net/ipv6/tcp_ipv6.c | 1 - trunk/net/netfilter/ipvs/ip_vs_ctl.c | 1 - trunk/net/netfilter/nf_queue.c | 1 - trunk/net/netlabel/Makefile | 2 + trunk/net/netlabel/netlabel_addrlist.c | 2 +- trunk/net/netlabel/netlabel_addrlist.h | 2 +- trunk/net/netlabel/netlabel_cipso_v4.c | 2 +- trunk/net/netlabel/netlabel_cipso_v4.h | 2 +- trunk/net/netlabel/netlabel_domainhash.c | 2 +- trunk/net/netlabel/netlabel_domainhash.h | 2 +- trunk/net/netlabel/netlabel_kapi.c | 22 +- trunk/net/netlabel/netlabel_mgmt.c | 2 +- trunk/net/netlabel/netlabel_mgmt.h | 2 +- trunk/net/netlabel/netlabel_unlabeled.c | 2 +- trunk/net/netlabel/netlabel_unlabeled.h | 2 +- trunk/net/netlabel/netlabel_user.c | 2 +- trunk/net/netlabel/netlabel_user.h | 2 +- trunk/net/sched/sch_prio.c | 2 +- trunk/net/sched/sch_sfq.c | 7 +- trunk/net/socket.c | 73 +- trunk/net/sunrpc/xprt.c | 1 - trunk/net/wireless/nl80211.c | 2 +- trunk/net/xfrm/xfrm_algo.c | 4 +- trunk/security/selinux/hooks.c | 2 +- trunk/security/selinux/include/netif.h | 2 +- trunk/security/selinux/include/netlabel.h | 2 +- trunk/security/selinux/include/netnode.h | 2 +- trunk/security/selinux/include/netport.h | 2 +- trunk/security/selinux/netif.c | 2 +- trunk/security/selinux/netlabel.c | 2 +- trunk/security/selinux/netnode.c | 2 +- trunk/security/selinux/netport.c | 2 +- trunk/security/selinux/selinuxfs.c | 2 +- trunk/security/selinux/ss/ebitmap.c | 2 +- trunk/security/selinux/ss/mls.c | 2 +- trunk/security/selinux/ss/mls.h | 2 +- trunk/security/selinux/ss/policydb.c | 2 +- trunk/security/selinux/ss/services.c | 2 +- trunk/security/smack/smack_lsm.c | 2 +- trunk/security/tomoyo/common.c | 5 +- trunk/sound/core/pcm_compat.c | 2 +- trunk/sound/core/rtctimer.c | 2 +- trunk/sound/core/timer.c | 5 - trunk/sound/oss/pas2_pcm.c | 8 +- trunk/sound/oss/pss.c | 6 +- trunk/sound/pci/Kconfig | 10 +- trunk/sound/pci/asihpi/hpicmn.c | 5 +- trunk/sound/pci/asihpi/hpidspcd.c | 9 +- trunk/sound/pci/asihpi/hpioctl.c | 19 +- trunk/sound/pci/azt3328.c | 11 +- trunk/sound/pci/hda/alc269_quirks.c | 7 + trunk/sound/pci/hda/patch_realtek.c | 26 - trunk/sound/pci/hda/patch_sigmatel.c | 2 - trunk/sound/pci/hda/patch_via.c | 2 +- trunk/sound/pci/rme9652/hdspm.c | 128 +- trunk/sound/soc/codecs/Kconfig | 8 +- trunk/sound/soc/codecs/Makefile | 4 +- trunk/sound/soc/codecs/sgtl5000.c | 128 +- trunk/sound/soc/codecs/wm8750.c | 8 - trunk/sound/soc/codecs/wm8903.c | 5 - trunk/sound/soc/codecs/wm8915.c | 2995 +++++++++++++ trunk/sound/soc/codecs/wm8915.h | 3717 +++++++++++++++++ trunk/sound/soc/codecs/wm8994.c | 1 - trunk/sound/soc/codecs/wm8996.c | 2994 ------------- trunk/sound/soc/codecs/wm8996.h | 3717 ----------------- trunk/sound/soc/codecs/wm_hubs.c | 3 +- trunk/sound/soc/omap/n810.c | 4 +- trunk/sound/soc/omap/omap-mcbsp.c | 4 +- trunk/sound/soc/omap/omap-mcbsp.h | 2 +- trunk/sound/soc/omap/omap-pcm.c | 4 +- trunk/sound/soc/omap/omap-pcm.h | 2 +- trunk/sound/soc/omap/rx51.c | 2 +- trunk/sound/soc/samsung/Kconfig | 2 +- trunk/sound/soc/samsung/Makefile | 2 - trunk/sound/soc/samsung/idma.c | 453 -- trunk/sound/soc/samsung/idma.h | 26 - trunk/sound/soc/samsung/jive_wm8750.c | 2 +- trunk/sound/soc/samsung/speyside.c | 32 +- trunk/sound/soc/samsung/speyside_wm8962.c | 2 +- trunk/sound/soc/tegra/tegra_pcm.c | 9 +- trunk/sound/soc/tegra/tegra_wm8903.c | 15 +- trunk/sound/soc/txx9/txx9aclc.c | 1 - trunk/sound/usb/caiaq/audio.c | 6 +- trunk/sound/usb/caiaq/input.c | 2 +- trunk/sound/usb/endpoint.c | 2 +- trunk/sound/usb/mixer.c | 25 +- trunk/sound/usb/mixer.h | 1 - trunk/sound/usb/quirks-table.h | 40 - trunk/sound/usb/quirks.c | 2 +- trunk/tools/perf/Makefile | 21 +- trunk/tools/perf/builtin-lock.c | 8 +- trunk/tools/perf/builtin-record.c | 19 +- trunk/tools/perf/builtin-report.c | 15 +- trunk/tools/perf/builtin-sched.c | 24 +- trunk/tools/perf/util/config.c | 32 +- trunk/tools/perf/util/evlist.c | 13 - trunk/tools/perf/util/evlist.h | 2 - trunk/tools/perf/util/header.c | 8 +- trunk/tools/perf/util/probe-event.c | 12 +- trunk/tools/perf/util/python.c | 115 +- trunk/tools/perf/util/setup.py | 21 +- trunk/tools/perf/util/symbol.c | 11 - trunk/tools/power/x86/turbostat/turbostat.c | 46 +- .../x86_energy_perf_policy.c | 5 +- 1001 files changed, 19761 insertions(+), 28263 deletions(-) delete mode 100644 trunk/Documentation/devicetree/bindings/input/fsl-mma8450.txt delete mode 100644 trunk/Documentation/networking/scaling.txt delete mode 100644 trunk/Documentation/ramoops.txt create mode 100644 trunk/arch/arm/lib/sha1.S create mode 100644 trunk/arch/arm/mach-mmp/include/mach/mfp-gplugd.h rename trunk/{drivers/gpio/gpio-msm-v2.c => arch/arm/mach-msm/gpio-v2.c} (99%) create mode 100644 trunk/arch/arm/mach-msm/gpio.c create mode 100644 trunk/arch/arm/mach-msm/gpio_hw.h delete mode 100644 trunk/arch/arm/mach-msm/include/mach/msm_gpiomux.h delete mode 100644 trunk/arch/ia64/include/asm/gpio.h delete mode 100644 trunk/arch/sh/include/cpu-sh3/cpu/serial.h delete mode 100644 trunk/arch/sh/include/cpu-sh4a/cpu/serial.h delete mode 100644 trunk/arch/sh/kernel/cpu/sh3/serial-sh770x.c delete mode 100644 trunk/arch/sh/kernel/cpu/sh3/serial-sh7710.c delete mode 100644 trunk/arch/sh/kernel/cpu/sh3/serial-sh7720.c delete mode 100644 trunk/arch/sh/kernel/cpu/sh4a/serial-sh7722.c create mode 100644 trunk/arch/sparc/include/asm/div64.h create mode 100644 trunk/arch/sparc/include/asm/irq_regs.h create mode 100644 trunk/arch/sparc/include/asm/local.h create mode 100644 trunk/arch/sparc/include/asm/local64.h create mode 100644 trunk/arch/sparc/lib/NG2page.S delete mode 100644 trunk/arch/sparc/lib/ffs.S delete mode 100644 trunk/arch/sparc/lib/hweight.S create mode 100644 trunk/arch/tile/include/asm/bug.h create mode 100644 trunk/arch/tile/include/asm/bugs.h create mode 100644 trunk/arch/tile/include/asm/cputime.h create mode 100644 trunk/arch/tile/include/asm/device.h create mode 100644 trunk/arch/tile/include/asm/div64.h create mode 100644 trunk/arch/tile/include/asm/emergency-restart.h create mode 100644 trunk/arch/tile/include/asm/errno.h create mode 100644 trunk/arch/tile/include/asm/fb.h create mode 100644 trunk/arch/tile/include/asm/fcntl.h create mode 100644 trunk/arch/tile/include/asm/ioctl.h create mode 100644 trunk/arch/tile/include/asm/ioctls.h create mode 100644 trunk/arch/tile/include/asm/ipc.h create mode 100644 trunk/arch/tile/include/asm/ipcbuf.h create mode 100644 trunk/arch/tile/include/asm/irq_regs.h create mode 100644 trunk/arch/tile/include/asm/kdebug.h create mode 100644 trunk/arch/tile/include/asm/local.h create mode 100644 trunk/arch/tile/include/asm/module.h create mode 100644 trunk/arch/tile/include/asm/msgbuf.h create mode 100644 trunk/arch/tile/include/asm/mutex.h create mode 100644 trunk/arch/tile/include/asm/param.h create mode 100644 trunk/arch/tile/include/asm/parport.h create mode 100644 trunk/arch/tile/include/asm/poll.h create mode 100644 trunk/arch/tile/include/asm/posix_types.h create mode 100644 trunk/arch/tile/include/asm/resource.h create mode 100644 trunk/arch/tile/include/asm/scatterlist.h create mode 100644 trunk/arch/tile/include/asm/sembuf.h create mode 100644 trunk/arch/tile/include/asm/serial.h create mode 100644 trunk/arch/tile/include/asm/shmbuf.h create mode 100644 trunk/arch/tile/include/asm/shmparam.h create mode 100644 trunk/arch/tile/include/asm/socket.h create mode 100644 trunk/arch/tile/include/asm/sockios.h create mode 100644 trunk/arch/tile/include/asm/statfs.h create mode 100644 trunk/arch/tile/include/asm/termbits.h create mode 100644 trunk/arch/tile/include/asm/termios.h create mode 100644 trunk/arch/tile/include/asm/types.h create mode 100644 trunk/arch/tile/include/asm/ucontext.h create mode 100644 trunk/arch/tile/include/asm/xor.h delete mode 100644 trunk/arch/tile/include/hv/drv_srom_intf.h delete mode 100644 trunk/arch/x86/kernel/vsyscall_trace.h delete mode 100644 trunk/arch/x86/platform/mrst/pmu.c delete mode 100644 trunk/arch/x86/platform/mrst/pmu.h delete mode 100644 trunk/drivers/char/tile-srom.c delete mode 100644 trunk/drivers/gpio/gpio-msm-v1.c delete mode 100644 trunk/drivers/platform/x86/samsung-q10.c rename trunk/drivers/staging/zcache/{zcache-main.c => zcache.c} (99%) create mode 100644 trunk/fs/btrfs/ref-cache.c create mode 100644 trunk/fs/btrfs/ref-cache.h rename trunk/fs/exofs/{ore.c => ios.c} (61%) create mode 100644 trunk/fs/exofs/pnfs.h delete mode 100644 trunk/fs/ext4/indirect.c delete mode 100644 trunk/fs/ext4/truncate.h delete mode 100644 trunk/include/linux/llist.h delete mode 100644 trunk/include/net/secure_seq.h delete mode 100644 trunk/include/scsi/osd_ore.h rename trunk/include/sound/{wm8996.h => wm8915.h} (63%) delete mode 100644 trunk/lib/llist.c delete mode 100644 trunk/lib/md5.c delete mode 100644 trunk/net/core/secure_seq.c create mode 100644 trunk/sound/soc/codecs/wm8915.c create mode 100644 trunk/sound/soc/codecs/wm8915.h delete mode 100644 trunk/sound/soc/codecs/wm8996.c delete mode 100644 trunk/sound/soc/codecs/wm8996.h delete mode 100644 trunk/sound/soc/samsung/idma.c delete mode 100644 trunk/sound/soc/samsung/idma.h diff --git a/[refs] b/[refs] index 7bfea52baec3..12644f8d9aa7 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4cb5aa1d01c9794623df6a2320dcd6398cbe5e8e +refs/heads/master: 1c8007b0769d37aa5fcb343b383b0af89ade2f71 diff --git a/trunk/Documentation/00-INDEX b/trunk/Documentation/00-INDEX index 65bbd2622396..1f89424c36a6 100644 --- a/trunk/Documentation/00-INDEX +++ b/trunk/Documentation/00-INDEX @@ -272,8 +272,6 @@ printk-formats.txt - how to get printk format specifiers right prio_tree.txt - info on radix-priority-search-tree use for indexing vmas. -ramoops.txt - - documentation of the ramoops oops/panic logging module. rbtree.txt - info on what red-black trees are and what they are for. robust-futex-ABI.txt diff --git a/trunk/Documentation/ABI/testing/pstore b/trunk/Documentation/ABI/testing/pstore index ff1df4e3b059..ddf451ee2a08 100644 --- a/trunk/Documentation/ABI/testing/pstore +++ b/trunk/Documentation/ABI/testing/pstore @@ -39,9 +39,3 @@ Description: Generic interface to platform dependent persistent storage. multiple) files based on the record size of the underlying persistent storage until at least this amount is reached. Default is 10 Kbytes. - - Pstore only supports one backend at a time. If multiple - backends are available, the preferred backend may be - set by passing the pstore.backend= argument to the kernel at - boot time. - diff --git a/trunk/Documentation/ABI/testing/sysfs-platform-ideapad-laptop b/trunk/Documentation/ABI/testing/sysfs-platform-ideapad-laptop index ff53183c3848..807fca2ae2a4 100644 --- a/trunk/Documentation/ABI/testing/sysfs-platform-ideapad-laptop +++ b/trunk/Documentation/ABI/testing/sysfs-platform-ideapad-laptop @@ -4,20 +4,3 @@ KernelVersion: 2.6.37 Contact: "Ike Panhc " Description: Control the power of camera module. 1 means on, 0 means off. - -What: /sys/devices/platform/ideapad/cfg -Date: Jun 2011 -KernelVersion: 3.1 -Contact: "Ike Panhc " -Description: - Ideapad capability bits. - Bit 8-10: 1 - Intel graphic only - 2 - ATI graphic only - 3 - Nvidia graphic only - 4 - Intel and ATI graphic - 5 - Intel and Nvidia graphic - Bit 16: Bluetooth exist (1 for exist) - Bit 17: 3G exist (1 for exist) - Bit 18: Wifi exist (1 for exist) - Bit 19: Camera exist (1 for exist) - diff --git a/trunk/Documentation/CodingStyle b/trunk/Documentation/CodingStyle index c940239d9678..fa6e25b94a54 100644 --- a/trunk/Documentation/CodingStyle +++ b/trunk/Documentation/CodingStyle @@ -80,13 +80,22 @@ available tools. The limit on the length of lines is 80 columns and this is a strongly preferred limit. -Statements longer than 80 columns will be broken into sensible chunks, unless -exceeding 80 columns significantly increases readability and does not hide -information. Descendants are always substantially shorter than the parent and -are placed substantially to the right. The same applies to function headers -with a long argument list. However, never break user-visible strings such as -printk messages, because that breaks the ability to grep for them. - +Statements longer than 80 columns will be broken into sensible chunks. +Descendants are always substantially shorter than the parent and are placed +substantially to the right. The same applies to function headers with a long +argument list. Long strings are as well broken into shorter strings. The +only exception to this is where exceeding 80 columns significantly increases +readability and does not hide information. + +void fun(int a, int b, int c) +{ + if (condition) + printk(KERN_WARNING "Warning this is a long printk with " + "3 parameters a: %u b: %u " + "c: %u \n", a, b, c); + else + next_statement; +} Chapter 3: Placing Braces and Spaces diff --git a/trunk/Documentation/SubmittingDrivers b/trunk/Documentation/SubmittingDrivers index 36d16bbf72c6..319baa8b60dd 100644 --- a/trunk/Documentation/SubmittingDrivers +++ b/trunk/Documentation/SubmittingDrivers @@ -130,7 +130,7 @@ Linux kernel master tree: ftp.??.kernel.org:/pub/linux/kernel/... ?? == your country code, such as "us", "uk", "fr", etc. - http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git + http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git Linux kernel mailing list: linux-kernel@vger.kernel.org diff --git a/trunk/Documentation/SubmittingPatches b/trunk/Documentation/SubmittingPatches index 4468ce24427c..569f3532e138 100644 --- a/trunk/Documentation/SubmittingPatches +++ b/trunk/Documentation/SubmittingPatches @@ -303,7 +303,7 @@ patches that are being emailed around. The sign-off is a simple line at the end of the explanation for the patch, which certifies that you wrote it or otherwise have the right to -pass it on as an open-source patch. The rules are pretty simple: if you +pass it on as a open-source patch. The rules are pretty simple: if you can certify the below: Developer's Certificate of Origin 1.1 diff --git a/trunk/Documentation/acpi/apei/einj.txt b/trunk/Documentation/acpi/apei/einj.txt index 5cc699ba5453..dfab71848dc8 100644 --- a/trunk/Documentation/acpi/apei/einj.txt +++ b/trunk/Documentation/acpi/apei/einj.txt @@ -48,19 +48,12 @@ directory apei/einj. The following files are provided. - param1 This file is used to set the first error parameter value. Effect of parameter depends on error_type specified. For memory error, this is - physical memory address. Only available if param_extension module - parameter is specified. + physical memory address. - param2 This file is used to set the second error parameter value. Effect of parameter depends on error_type specified. For memory error, this is - physical memory address mask. Only available if param_extension - module parameter is specified. - -Injecting parameter support is a BIOS version specific extension, that -is, it only works on some BIOS version. If you want to use it, please -make sure your BIOS version has the proper support and specify -"param_extension=y" in module parameter. + physical memory address mask. For more information about EINJ, please refer to ACPI specification version 4.0, section 17.5. diff --git a/trunk/Documentation/device-mapper/dm-crypt.txt b/trunk/Documentation/device-mapper/dm-crypt.txt index 2c656ae43ba7..6b5c42dbbe84 100644 --- a/trunk/Documentation/device-mapper/dm-crypt.txt +++ b/trunk/Documentation/device-mapper/dm-crypt.txt @@ -4,8 +4,7 @@ dm-crypt Device-Mapper's "crypt" target provides transparent encryption of block devices using the kernel crypto API. -Parameters: \ - [<#opt_params> ] +Parameters: Encryption cipher and an optional IV generation mode. @@ -38,24 +37,6 @@ Parameters: \ Starting sector within the device where the encrypted data begins. -<#opt_params> - Number of optional parameters. If there are no optional parameters, - the optional paramaters section can be skipped or #opt_params can be zero. - Otherwise #opt_params is the number of following arguments. - - Example of optional parameters section: - 1 allow_discards - -allow_discards - Block discard requests (a.k.a. TRIM) are passed through the crypt device. - The default is to ignore discard requests. - - WARNING: Assess the specific security risks carefully before enabling this - option. For example, allowing discards on encrypted devices may lead to - the leak of information about the ciphertext device (filesystem type, - used space etc.) if the discarded blocks can be located easily on the - device later. - Example scripts =============== LUKS (Linux Unified Key Setup) is now the preferred way to set up disk diff --git a/trunk/Documentation/device-mapper/dm-flakey.txt b/trunk/Documentation/device-mapper/dm-flakey.txt index 6ff5c2327227..c8efdfd19a65 100644 --- a/trunk/Documentation/device-mapper/dm-flakey.txt +++ b/trunk/Documentation/device-mapper/dm-flakey.txt @@ -1,53 +1,17 @@ dm-flakey ========= -This target is the same as the linear target except that it exhibits -unreliable behaviour periodically. It's been found useful in simulating -failing devices for testing purposes. +This target is the same as the linear target except that it returns I/O +errors periodically. It's been found useful in simulating failing +devices for testing purposes. Starting from the time the table is loaded, the device is available for - seconds, then exhibits unreliable behaviour for seconds, and then this cycle repeats. + seconds, then returns errors for seconds, +and then this cycle repeats. -Also, consider using this in combination with the dm-delay target too, -which can delay reads and writes and/or send them to different -underlying devices. - -Table parameters ----------------- - \ - [ []] - -Mandatory parameters: +Parameters: : Full pathname to the underlying block-device, or a "major:minor" device-number. : Starting sector within the device. : Number of seconds device is available. : Number of seconds device returns errors. - -Optional feature parameters: - If no feature parameters are present, during the periods of - unreliability, all I/O returns errors. - - drop_writes: - All write I/O is silently ignored. - Read I/O is handled correctly. - - corrupt_bio_byte : - During , replace of the data of - each matching bio with . - - : The offset of the byte to replace. - Counting starts at 1, to replace the first byte. - : Either 'r' to corrupt reads or 'w' to corrupt writes. - 'w' is incompatible with drop_writes. - : The value (from 0-255) to write. - : Perform the replacement only if bio->bi_rw has all the - selected flags set. - -Examples: - corrupt_bio_byte 32 r 1 0 - - replaces the 32nd byte of READ bios with the value 1 - - corrupt_bio_byte 224 w 0 32 - - replaces the 224th byte of REQ_META (=32) bios with the value 0 diff --git a/trunk/Documentation/device-mapper/dm-raid.txt b/trunk/Documentation/device-mapper/dm-raid.txt index 2a8c11331d2d..33b6b7071ac8 100644 --- a/trunk/Documentation/device-mapper/dm-raid.txt +++ b/trunk/Documentation/device-mapper/dm-raid.txt @@ -1,108 +1,70 @@ -dm-raid -------- +Device-mapper RAID (dm-raid) is a bridge from DM to MD. It +provides a way to use device-mapper interfaces to access the MD RAID +drivers. -The device-mapper RAID (dm-raid) target provides a bridge from DM to MD. -It allows the MD RAID drivers to be accessed using a device-mapper -interface. +As with all device-mapper targets, the nominal public interfaces are the +constructor (CTR) tables and the status outputs (both STATUSTYPE_INFO +and STATUSTYPE_TABLE). The CTR table looks like the following: -The target is named "raid" and it accepts the following parameters: - - <#raid_params> \ - <#raid_devs> [.. ] - -: - raid1 RAID1 mirroring - raid4 RAID4 dedicated parity disk - raid5_la RAID5 left asymmetric - - rotating parity 0 with data continuation - raid5_ra RAID5 right asymmetric - - rotating parity N with data continuation - raid5_ls RAID5 left symmetric - - rotating parity 0 with data restart - raid5_rs RAID5 right symmetric - - rotating parity N with data restart - raid6_zr RAID6 zero restart - - rotating parity zero (left-to-right) with data restart - raid6_nr RAID6 N restart - - rotating parity N (right-to-left) with data restart - raid6_nc RAID6 N continue - - rotating parity N (right-to-left) with data continuation - - Refererence: Chapter 4 of - http://www.snia.org/sites/default/files/SNIA_DDF_Technical_Position_v2.0.pdf - -<#raid_params>: The number of parameters that follow. - - consists of - Mandatory parameters: - : Chunk size in sectors. This parameter is often known as - "stripe size". It is the only mandatory parameter and - is placed first. - - followed by optional parameters (in any order): - [sync|nosync] Force or prevent RAID initialization. - - [rebuild ] Rebuild drive number idx (first drive is 0). - - [daemon_sleep ] - Interval between runs of the bitmap daemon that - clear bits. A longer interval means less bitmap I/O but - resyncing after a failure is likely to take longer. - - [min_recovery_rate ] Throttle RAID initialization - [max_recovery_rate ] Throttle RAID initialization - [write_mostly ] Drive index is write-mostly - [max_write_behind ] See '-write-behind=' (man mdadm) - [stripe_cache ] Stripe cache size (higher RAIDs only) - [region_size ] - The region_size multiplied by the number of regions is the - logical size of the array. The bitmap records the device - synchronisation state for each region. - -<#raid_devs>: The number of devices composing the array. - Each device consists of two entries. The first is the device - containing the metadata (if any); the second is the one containing the - data. - - If a drive has failed or is missing at creation time, a '-' can be - given for both the metadata and data drives for a given position. - - -Example tables --------------- -# RAID4 - 4 data drives, 1 parity (no metadata devices) +1: raid \ +2: <#raid_params> \ +3: <#raid_devs> .. + +Line 1 contains the standard first three arguments to any device-mapper +target - the start, length, and target type fields. The target type in +this case is "raid". + +Line 2 contains the arguments that define the particular raid +type/personality/level, the required arguments for that raid type, and +any optional arguments. Possible raid types include: raid4, raid5_la, +raid5_ls, raid5_rs, raid6_zr, raid6_nr, and raid6_nc. (raid1 is +planned for the future.) The list of required and optional parameters +is the same for all the current raid types. The required parameters are +positional, while the optional parameters are given as key/value pairs. +The possible parameters are as follows: + Chunk size in sectors. + [[no]sync] Force/Prevent RAID initialization + [rebuild ] Rebuild the drive indicated by the index + [daemon_sleep ] Time between bitmap daemon work to clear bits + [min_recovery_rate ] Throttle RAID initialization + [max_recovery_rate ] Throttle RAID initialization + [max_write_behind ] See '-write-behind=' (man mdadm) + [stripe_cache ] Stripe cache size for higher RAIDs + +Line 3 contains the list of devices that compose the array in +metadata/data device pairs. If the metadata is stored separately, a '-' +is given for the metadata device position. If a drive has failed or is +missing at creation time, a '-' can be given for both the metadata and +data drives for a given position. + +NB. Currently all metadata devices must be specified as '-'. + +Examples: +# RAID4 - 4 data drives, 1 parity # No metadata devices specified to hold superblock/bitmap info # Chunk size of 1MiB # (Lines separated for easy reading) - 0 1960893648 raid \ raid4 1 2048 \ 5 - 8:17 - 8:33 - 8:49 - 8:65 - 8:81 -# RAID4 - 4 data drives, 1 parity (with metadata devices) +# RAID4 - 4 data drives, 1 parity (no metadata devices) # Chunk size of 1MiB, force RAID initialization, # min recovery rate at 20 kiB/sec/disk - 0 1960893648 raid \ - raid4 4 2048 sync min_recovery_rate 20 \ - 5 8:17 8:18 8:33 8:34 8:49 8:50 8:65 8:66 8:81 8:82 + raid4 4 2048 min_recovery_rate 20 sync\ + 5 - 8:17 - 8:33 - 8:49 - 8:65 - 8:81 -'dmsetup table' displays the table used to construct the mapping. -The optional parameters are always printed in the order listed -above with "sync" or "nosync" always output ahead of the other -arguments, regardless of the order used when originally loading the table. -Arguments that can be repeated are ordered by value. +Performing a 'dmsetup table' should display the CTR table used to +construct the mapping (with possible reordering of optional +parameters). -'dmsetup status' yields information on the state and health of the -array. -The output is as follows: +Performing a 'dmsetup status' will yield information on the state and +health of the array. The output is as follows: 1: raid \ 2: <#devices> <1 health char for each dev> -Line 1 is the standard output produced by device-mapper. -Line 2 is produced by the raid target, and best explained by example: +Line 1 is standard DM output. Line 2 is best shown by example: 0 1960893648 raid raid4 5 AAAAA 2/490221568 Here we can see the RAID type is raid4, there are 5 devices - all of which are 'A'live, and the array is 2/490221568 complete with recovery. -Faulty or missing devices are marked 'D'. Devices that are out-of-sync -are marked 'a'. diff --git a/trunk/Documentation/devicetree/bindings/gpio/gpio_keys.txt b/trunk/Documentation/devicetree/bindings/gpio/gpio_keys.txt index 5c2c02140a62..7190c99d7611 100644 --- a/trunk/Documentation/devicetree/bindings/gpio/gpio_keys.txt +++ b/trunk/Documentation/devicetree/bindings/gpio/gpio_keys.txt @@ -10,7 +10,7 @@ Optional properties: Each button (key) is represented as a sub-node of "gpio-keys": Subnode properties: - - gpios: OF device-tree gpio specification. + - gpios: OF devcie-tree gpio specificatin. - label: Descriptive name of the key. - linux,code: Keycode to emit. diff --git a/trunk/Documentation/devicetree/bindings/input/fsl-mma8450.txt b/trunk/Documentation/devicetree/bindings/input/fsl-mma8450.txt deleted file mode 100644 index a00c94ccbdee..000000000000 --- a/trunk/Documentation/devicetree/bindings/input/fsl-mma8450.txt +++ /dev/null @@ -1,11 +0,0 @@ -* Freescale MMA8450 3-Axis Accelerometer - -Required properties: -- compatible : "fsl,mma8450". - -Example: - -accelerometer: mma8450@1c { - compatible = "fsl,mma8450"; - reg = <0x1c>; -}; diff --git a/trunk/Documentation/dmaengine.txt b/trunk/Documentation/dmaengine.txt index 94b7e0f96b38..5a0cb1ef6164 100644 --- a/trunk/Documentation/dmaengine.txt +++ b/trunk/Documentation/dmaengine.txt @@ -10,181 +10,87 @@ NOTE: For DMA Engine usage in async_tx please see: Below is a guide to device driver writers on how to use the Slave-DMA API of the DMA Engine. This is applicable only for slave DMA usage only. -The slave DMA usage consists of following steps: +The slave DMA usage consists of following steps 1. Allocate a DMA slave channel 2. Set slave and controller specific parameters 3. Get a descriptor for transaction -4. Submit the transaction -5. Issue pending requests and wait for callback notification +4. Submit the transaction and wait for callback notification 1. Allocate a DMA slave channel - - Channel allocation is slightly different in the slave DMA context, - client drivers typically need a channel from a particular DMA - controller only and even in some cases a specific channel is desired. - To request a channel dma_request_channel() API is used. - - Interface: - struct dma_chan *dma_request_channel(dma_cap_mask_t mask, - dma_filter_fn filter_fn, - void *filter_param); - where dma_filter_fn is defined as: - typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param); - - The 'filter_fn' parameter is optional, but highly recommended for - slave and cyclic channels as they typically need to obtain a specific - DMA channel. - - When the optional 'filter_fn' parameter is NULL, dma_request_channel() - simply returns the first channel that satisfies the capability mask. - - Otherwise, the 'filter_fn' routine will be called once for each free - channel which has a capability in 'mask'. 'filter_fn' is expected to - return 'true' when the desired DMA channel is found. - - A channel allocated via this interface is exclusive to the caller, - until dma_release_channel() is called. +Channel allocation is slightly different in the slave DMA context, client +drivers typically need a channel from a particular DMA controller only and even +in some cases a specific channel is desired. To request a channel +dma_request_channel() API is used. + +Interface: +struct dma_chan *dma_request_channel(dma_cap_mask_t mask, + dma_filter_fn filter_fn, + void *filter_param); +where dma_filter_fn is defined as: +typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param); + +When the optional 'filter_fn' parameter is set to NULL dma_request_channel +simply returns the first channel that satisfies the capability mask. Otherwise, +when the mask parameter is insufficient for specifying the necessary channel, +the filter_fn routine can be used to disposition the available channels in the +system. The filter_fn routine is called once for each free channel in the +system. Upon seeing a suitable channel filter_fn returns DMA_ACK which flags +that channel to be the return value from dma_request_channel. A channel +allocated via this interface is exclusive to the caller, until +dma_release_channel() is called. 2. Set slave and controller specific parameters - - Next step is always to pass some specific information to the DMA - driver. Most of the generic information which a slave DMA can use - is in struct dma_slave_config. This allows the clients to specify - DMA direction, DMA addresses, bus widths, DMA burst lengths etc - for the peripheral. - - If some DMA controllers have more parameters to be sent then they - should try to embed struct dma_slave_config in their controller - specific structure. That gives flexibility to client to pass more - parameters, if required. - - Interface: - int dmaengine_slave_config(struct dma_chan *chan, - struct dma_slave_config *config) - - Please see the dma_slave_config structure definition in dmaengine.h - for a detailed explaination of the struct members. Please note - that the 'direction' member will be going away as it duplicates the - direction given in the prepare call. +Next step is always to pass some specific information to the DMA driver. Most of +the generic information which a slave DMA can use is in struct dma_slave_config. +It allows the clients to specify DMA direction, DMA addresses, bus widths, DMA +burst lengths etc. If some DMA controllers have more parameters to be sent then +they should try to embed struct dma_slave_config in their controller specific +structure. That gives flexibility to client to pass more parameters, if +required. + +Interface: +int dmaengine_slave_config(struct dma_chan *chan, + struct dma_slave_config *config) 3. Get a descriptor for transaction - - For slave usage the various modes of slave transfers supported by the - DMA-engine are: - - slave_sg - DMA a list of scatter gather buffers from/to a peripheral - dma_cyclic - Perform a cyclic DMA operation from/to a peripheral till the +For slave usage the various modes of slave transfers supported by the +DMA-engine are: +slave_sg - DMA a list of scatter gather buffers from/to a peripheral +dma_cyclic - Perform a cyclic DMA operation from/to a peripheral till the operation is explicitly stopped. - - A non-NULL return of this transfer API represents a "descriptor" for - the given transaction. - - Interface: - struct dma_async_tx_descriptor *(*chan->device->device_prep_slave_sg)( - struct dma_chan *chan, struct scatterlist *sgl, - unsigned int sg_len, enum dma_data_direction direction, +The non NULL return of this transfer API represents a "descriptor" for the given +transaction. + +Interface: +struct dma_async_tx_descriptor *(*chan->device->device_prep_dma_sg)( + struct dma_chan *chan, + struct scatterlist *dst_sg, unsigned int dst_nents, + struct scatterlist *src_sg, unsigned int src_nents, unsigned long flags); - - struct dma_async_tx_descriptor *(*chan->device->device_prep_dma_cyclic)( +struct dma_async_tx_descriptor *(*chan->device->device_prep_dma_cyclic)( struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, size_t period_len, enum dma_data_direction direction); - The peripheral driver is expected to have mapped the scatterlist for - the DMA operation prior to calling device_prep_slave_sg, and must - keep the scatterlist mapped until the DMA operation has completed. - The scatterlist must be mapped using the DMA struct device. So, - normal setup should look like this: - - nr_sg = dma_map_sg(chan->device->dev, sgl, sg_len); - if (nr_sg == 0) - /* error */ - - desc = chan->device->device_prep_slave_sg(chan, sgl, nr_sg, - direction, flags); - - Once a descriptor has been obtained, the callback information can be - added and the descriptor must then be submitted. Some DMA engine - drivers may hold a spinlock between a successful preparation and - submission so it is important that these two operations are closely - paired. - - Note: - Although the async_tx API specifies that completion callback - routines cannot submit any new operations, this is not the - case for slave/cyclic DMA. - - For slave DMA, the subsequent transaction may not be available - for submission prior to callback function being invoked, so - slave DMA callbacks are permitted to prepare and submit a new - transaction. - - For cyclic DMA, a callback function may wish to terminate the - DMA via dmaengine_terminate_all(). - - Therefore, it is important that DMA engine drivers drop any - locks before calling the callback function which may cause a - deadlock. - - Note that callbacks will always be invoked from the DMA - engines tasklet, never from interrupt context. - -4. Submit the transaction - - Once the descriptor has been prepared and the callback information - added, it must be placed on the DMA engine drivers pending queue. - - Interface: - dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc) - - This returns a cookie can be used to check the progress of DMA engine - activity via other DMA engine calls not covered in this document. - - dmaengine_submit() will not start the DMA operation, it merely adds - it to the pending queue. For this, see step 5, dma_async_issue_pending. - -5. Issue pending DMA requests and wait for callback notification - - The transactions in the pending queue can be activated by calling the - issue_pending API. If channel is idle then the first transaction in - queue is started and subsequent ones queued up. - - On completion of each DMA operation, the next in queue is started and - a tasklet triggered. The tasklet will then call the client driver - completion callback routine for notification, if set. - - Interface: - void dma_async_issue_pending(struct dma_chan *chan); - -Further APIs: - -1. int dmaengine_terminate_all(struct dma_chan *chan) - - This causes all activity for the DMA channel to be stopped, and may - discard data in the DMA FIFO which hasn't been fully transferred. - No callback functions will be called for any incomplete transfers. - -2. int dmaengine_pause(struct dma_chan *chan) - - This pauses activity on the DMA channel without data loss. - -3. int dmaengine_resume(struct dma_chan *chan) - - Resume a previously paused DMA channel. It is invalid to resume a - channel which is not currently paused. - -4. enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, - dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) - - This can be used to check the status of the channel. Please see - the documentation in include/linux/dmaengine.h for a more complete - description of this API. - - This can be used in conjunction with dma_async_is_complete() and - the cookie returned from 'descriptor->submit()' to check for - completion of a specific DMA transaction. - - Note: - Not all DMA engine drivers can return reliable information for - a running DMA channel. It is recommended that DMA engine users - pause or stop (via dmaengine_terminate_all) the channel before - using this API. +4. Submit the transaction and wait for callback notification +To schedule the transaction to be scheduled by dma device, the "descriptor" +returned in above (3) needs to be submitted. +To tell the dma driver that a transaction is ready to be serviced, the +descriptor->submit() callback needs to be invoked. This chains the descriptor to +the pending queue. +The transactions in the pending queue can be activated by calling the +issue_pending API. If channel is idle then the first transaction in queue is +started and subsequent ones queued up. +On completion of the DMA operation the next in queue is submitted and a tasklet +triggered. The tasklet would then call the client driver completion callback +routine for notification, if set. +Interface: +void dma_async_issue_pending(struct dma_chan *chan); + +============================================================================== + +Additional usage notes for dma driver writers +1/ Although DMA engine specifies that completion callback routines cannot submit +any new operations, but typically for slave DMA subsequent transaction may not +be available for submit prior to callback routine being called. This requirement +is not a requirement for DMA-slave devices. But they should take care to drop +the spin-lock they might be holding before calling the callback routine diff --git a/trunk/Documentation/email-clients.txt b/trunk/Documentation/email-clients.txt index 860c29a472ad..a0b58e29f911 100644 --- a/trunk/Documentation/email-clients.txt +++ b/trunk/Documentation/email-clients.txt @@ -199,16 +199,18 @@ to coerce it into behaving. To beat some sense out of the internal editor, do this: +- Under account settings, composition and addressing, uncheck "Compose + messages in HTML format". + - Edit your Thunderbird config settings so that it won't use format=flowed. Go to "edit->preferences->advanced->config editor" to bring up the thunderbird's registry editor, and set "mailnews.send_plaintext_flowed" to "false". -- Disable HTML Format: Set "mail.identity.id1.compose_html" to "false". - -- Enable "preformat" mode: Set "editor.quotesPreformatted" to "true". - -- Enable UTF8: Set "prefs.converted-to-utf8" to "true". +- Enable "preformat" mode: Shft-click on the Write icon to bring up the HTML + composer, select "Preformat" from the drop-down box just under the subject + line, then close the message without saving. (This setting also applies to + the text composer, but the only control for it is in the HTML composer.) - Install the "toggle wordwrap" extension. Download the file from: https://addons.mozilla.org/thunderbird/addon/2351/ diff --git a/trunk/Documentation/fault-injection/fault-injection.txt b/trunk/Documentation/fault-injection/fault-injection.txt index 82a5d250d75e..7be15e44d481 100644 --- a/trunk/Documentation/fault-injection/fault-injection.txt +++ b/trunk/Documentation/fault-injection/fault-injection.txt @@ -143,7 +143,8 @@ o provide a way to configure fault attributes failslab, fail_page_alloc, and fail_make_request use this way. Helper functions: - fault_create_debugfs_attr(name, parent, attr); + init_fault_attr_dentries(entries, attr, name); + void cleanup_fault_attr_dentries(entries); - module parameters diff --git a/trunk/Documentation/feature-removal-schedule.txt b/trunk/Documentation/feature-removal-schedule.txt index c4a6e148732a..ea0bace0124a 100644 --- a/trunk/Documentation/feature-removal-schedule.txt +++ b/trunk/Documentation/feature-removal-schedule.txt @@ -296,6 +296,15 @@ Who: Ravikiran Thirumalai --------------------------- +What: CONFIG_THERMAL_HWMON +When: January 2009 +Why: This option was introduced just to allow older lm-sensors userspace + to keep working over the upgrade to 2.6.26. At the scheduled time of + removal fixed lm-sensors (2.x or 3.x) should be readily available. +Who: Rene Herman + +--------------------------- + What: Code that is now under CONFIG_WIRELESS_EXT_SYSFS (in net/core/net-sysfs.c) When: After the only user (hal) has seen a release with the patches @@ -581,14 +590,3 @@ Why: This driver has been superseded by g_mass_storage. Who: Alan Stern ---------------------------- - -What: threeg and interface sysfs files in /sys/devices/platform/acer-wmi -When: 2012 -Why: In 3.0, we can now autodetect internal 3G device and already have - the threeg rfkill device. So, we plan to remove threeg sysfs support - for it's no longer necessary. - - We also plan to remove interface sysfs file that exposed which ACPI-WMI - interface that was used by acer-wmi driver. It will replaced by - information log when acer-wmi initial. -Who: Lee, Chun-Yi diff --git a/trunk/Documentation/filesystems/befs.txt b/trunk/Documentation/filesystems/befs.txt index da45e6c842b8..6e49c363938e 100644 --- a/trunk/Documentation/filesystems/befs.txt +++ b/trunk/Documentation/filesystems/befs.txt @@ -27,7 +27,7 @@ His original code can still be found at: Does anyone know of a more current email address for Makoto? He doesn't respond to the address given above... -This filesystem doesn't have a maintainer. +Current maintainer: Sergey S. Kostyliov WHAT IS THIS DRIVER? ================== diff --git a/trunk/Documentation/frv/booting.txt b/trunk/Documentation/frv/booting.txt index 37c4d84a0e57..ace200b7c214 100644 --- a/trunk/Documentation/frv/booting.txt +++ b/trunk/Documentation/frv/booting.txt @@ -106,20 +106,13 @@ separated by spaces: To use the first on-chip serial port at baud rate 115200, no parity, 8 bits, and no flow control. - (*) root= + (*) root=/dev/ - This specifies the device upon which the root filesystem resides. It - may be specified by major and minor number, device path, or even - partition uuid, if supported. For example: + This specifies the device upon which the root filesystem resides. For + example: /dev/nfs NFS root filesystem /dev/mtdblock3 Fourth RedBoot partition on the System Flash - PARTUUID=00112233-4455-6677-8899-AABBCCDDEEFF/PARTNROFF=1 - first partition after the partition with the given UUID - 253:0 Device with major 253 and minor 0 - - Authoritative information can be found in - "Documentation/kernel-parameters.txt". (*) rw diff --git a/trunk/Documentation/ioctl/ioctl-number.txt b/trunk/Documentation/ioctl/ioctl-number.txt index 845a191004b1..72ba8d51dbc1 100644 --- a/trunk/Documentation/ioctl/ioctl-number.txt +++ b/trunk/Documentation/ioctl/ioctl-number.txt @@ -292,7 +292,6 @@ Code Seq#(hex) Include File Comments 0xA0 all linux/sdp/sdp.h Industrial Device Project -0xA2 00-0F arch/tile/include/asm/hardwall.h 0xA3 80-8F Port ACL in development: 0xA3 90-9F linux/dtlk.h diff --git a/trunk/Documentation/kernel-docs.txt b/trunk/Documentation/kernel-docs.txt index 0e0734b509d8..9a8674629a07 100644 --- a/trunk/Documentation/kernel-docs.txt +++ b/trunk/Documentation/kernel-docs.txt @@ -620,6 +620,17 @@ (including this document itself) have been moved there, and might be more up to date than the web version. + * Name: "Linux Source Driver" + URL: http://lsd.linux.cz + Keywords: Browsing source code. + Description: "Linux Source Driver (LSD) is an application, which + can make browsing source codes of Linux kernel easier than you can + imagine. You can select between multiple versions of kernel (e.g. + 0.01, 1.0.0, 2.0.33, 2.0.34pre13, 2.0.0, 2.1.101 etc.). With LSD + you can search Linux kernel (fulltext, macros, types, functions + and variables) and LSD can generate patches for you on the fly + (files, directories or kernel)". + * Name: "Linux Kernel Source Reference" Author: Thomas Graichen. URL: http://marc.info/?l=linux-kernel&m=96446640102205&w=4 diff --git a/trunk/Documentation/kernel-parameters.txt b/trunk/Documentation/kernel-parameters.txt index 6ca1f5cb71e0..4ca93898fbd3 100644 --- a/trunk/Documentation/kernel-parameters.txt +++ b/trunk/Documentation/kernel-parameters.txt @@ -40,7 +40,6 @@ parameter is applicable: ALSA ALSA sound support is enabled. APIC APIC support is enabled. APM Advanced Power Management support is enabled. - ARM ARM architecture is enabled. AVR32 AVR32 architecture is enabled. AX25 Appropriate AX.25 support is enabled. BLACKFIN Blackfin architecture is enabled. @@ -50,7 +49,6 @@ parameter is applicable: EFI EFI Partitioning (GPT) is enabled EIDE EIDE/ATAPI support is enabled. FB The frame buffer device is enabled. - FTRACE Function tracing enabled. GCOV GCOV profiling is enabled. HW Appropriate hardware is enabled. IA-64 IA-64 architecture is enabled. @@ -71,7 +69,6 @@ parameter is applicable: Documentation/m68k/kernel-options.txt. MCA MCA bus support is enabled. MDA MDA console support is enabled. - MIPS MIPS architecture is enabled. MOUSE Appropriate mouse support is enabled. MSI Message Signaled Interrupts (PCI). MTD MTD (Memory Technology Device) support is enabled. @@ -103,6 +100,7 @@ parameter is applicable: SPARC Sparc architecture is enabled. SWSUSP Software suspend (hibernation) is enabled. SUSPEND System suspend states are enabled. + FTRACE Function tracing enabled. TPM TPM drivers are enabled. TS Appropriate touchscreen support is enabled. UMS USB Mass Storage support is enabled. @@ -117,7 +115,7 @@ parameter is applicable: X86-64 X86-64 architecture is enabled. More X86-64 boot options can be found in Documentation/x86/x86_64/boot-options.txt . - X86 Either 32-bit or 64-bit x86 (same as X86-32+X86-64) + X86 Either 32bit or 64bit x86 (same as X86-32+X86-64) XEN Xen support is enabled In addition, the following text indicates that the option: @@ -165,11 +163,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. See also Documentation/power/pm.txt, pci=noacpi - acpi_rsdp= [ACPI,EFI,KEXEC] - Pass the RSDP address to the kernel, mostly used - on machines running EFI runtime service to boot the - second kernel for kdump. - acpi_apic_instance= [ACPI, IOAPIC] Format: 2: use 2nd APIC table, if available @@ -378,7 +371,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. atkbd.softrepeat= [HW] Use software keyboard repeat - autotest [IA-64] + autotest [IA64] baycom_epp= [HW,AX25] Format: , @@ -553,9 +546,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. /proc//coredump_filter. See also Documentation/filesystems/proc.txt. - cpuidle.off=1 [CPU_IDLE] - disable the cpuidle sub-system - cpcihp_generic= [HW,PCI] Generic port I/O CompactPCI driver Format: ,,,[,] @@ -683,8 +673,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted. uart[8250],mmio32,[,options] Start an early, polled-mode console on the 8250/16550 UART at the specified I/O port or MMIO address. - MMIO inter-register address stride is either 8-bit - (mmio) or 32-bit (mmio32). + MMIO inter-register address stride is either 8bit (mmio) + or 32bit (mmio32). The options are the same as for ttyS, above. earlyprintk= [X86,SH,BLACKFIN] @@ -727,7 +717,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. See Documentation/block/as-iosched.txt and Documentation/block/deadline-iosched.txt for details. - elfcorehdr= [IA-64,PPC,SH,X86] + elfcorehdr= [IA64,PPC,SH,X86] Specifies physical address of start of kernel core image elf header. Generally kexec loader will pass this option to capture kernel. @@ -793,7 +783,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. tracer at boot up. function-list is a comma separated list of functions. This list can be changed at run time by the set_ftrace_filter file in the debugfs - tracing directory. + tracing directory. ftrace_notrace=[function-list] [FTRACE] Do not trace the functions specified in @@ -831,7 +821,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. hashdist= [KNL,NUMA] Large hashes allocated during boot are distributed across NUMA nodes. Defaults on - for 64-bit NUMA, off otherwise. + for 64bit NUMA, off otherwise. Format: 0 | 1 (for off | on) hcl= [IA-64] SGI's Hardware Graph compatibility layer @@ -1000,10 +990,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. DMA. forcedac [x86_64] With this option iommu will not optimize to look - for io virtual address below 32-bit forcing dual + for io virtual address below 32 bit forcing dual address cycle on pci bus for cards supporting greater - than 32-bit addressing. The default is to look - for translation below 32-bit and if not available + than 32 bit addressing. The default is to look + for translation below 32 bit and if not available then look in the higher range. strict [Default Off] With this option on every unmap_single operation will @@ -1019,7 +1009,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. off disable Interrupt Remapping nosid disable Source ID checking - inttest= [IA-64] + inttest= [IA64] iomem= Disable strict checking of access to MMIO memory strict regions from userspace. @@ -1036,7 +1026,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. nomerge forcesac soft - pt [x86, IA-64] + pt [x86, IA64] io7= [HW] IO7 for Marvel based alpha systems See comment before marvel_specify_io7 in @@ -1167,7 +1157,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. kvm-amd.npt= [KVM,AMD] Disable nested paging (virtualized MMU) for all guests. - Default is 1 (enabled) if in 64-bit or 32-bit PAE mode. + Default is 1 (enabled) if in 64bit or 32bit-PAE mode kvm-intel.ept= [KVM,Intel] Disable extended page tables (virtualized MMU) support on capable Intel chips. @@ -1204,10 +1194,10 @@ bytes respectively. Such letter suffixes can also be entirely omitted. libata.dma=0 Disable all PATA and SATA DMA libata.dma=1 PATA and SATA Disk DMA only libata.dma=2 ATAPI (CDROM) DMA only - libata.dma=4 Compact Flash DMA only + libata.dma=4 Compact Flash DMA only Combinations also work, so libata.dma=3 enables DMA for disks and CDROMs, but not CFs. - + libata.ignore_hpa= [LIBATA] Ignore HPA limit libata.ignore_hpa=0 keep BIOS limits (default) libata.ignore_hpa=1 ignore limits, using full disk @@ -1333,7 +1323,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. ltpc= [NET] Format: ,, - machvec= [IA-64] Force the use of a particular machine-vector + machvec= [IA64] Force the use of a particular machine-vector (machvec) in a generic kernel. Example: machvec=hpzx1_swiotlb @@ -1736,7 +1726,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. nointroute [IA-64] - nojitter [IA-64] Disables jitter checking for ITC timers. + nojitter [IA64] Disables jitter checking for ITC timers. no-kvmclock [X86,KVM] Disable paravirtualized KVM clock driver @@ -1802,7 +1792,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. nox2apic [X86-64,APIC] Do not enable x2APIC mode. - nptcg= [IA-64] Override max number of concurrent global TLB + nptcg= [IA64] Override max number of concurrent global TLB purges which is reported from either PAL_VM_SUMMARY or SAL PALO. @@ -2079,7 +2069,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted. Format: { parport | timid | 0 } See also Documentation/parport.txt. - pmtmr= [X86] Manual setup of pmtmr I/O Port. + pmtmr= [X86] Manual setup of pmtmr I/O Port. Override pmtimer IOPort with a hex value. e.g. pmtmr=0x508 @@ -2163,8 +2153,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. [HW,MOUSE] Controls Logitech smartscroll autorepeat. 0 = disabled, 1 = enabled (default). - pstore.backend= Specify the name of the pstore backend to use - pt. [PARIDE] See Documentation/blockdev/paride.txt. @@ -2250,7 +2238,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. ro [KNL] Mount root device read-only on boot root= [KNL] Root filesystem - See name_to_dev_t comment in init/do_mounts.c. rootdelay= [KNL] Delay (in seconds) to pause before attempting to mount the root filesystem @@ -2637,16 +2624,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. medium is write-protected). Example: quirks=0419:aaf5:rl,0421:0433:rc - user_debug= [KNL,ARM] - Format: - See arch/arm/Kconfig.debug help text. - 1 - undefined instruction events - 2 - system calls - 4 - invalid data aborts - 8 - SIGSEGV faults - 16 - SIGBUS faults - Example: user_debug=31 - userpte= [X86] Flags controlling user PTE allocations. @@ -2692,27 +2669,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted. vmpoff= [KNL,S390] Perform z/VM CP command after power off. Format: - vsyscall= [X86-64] - Controls the behavior of vsyscalls (i.e. calls to - fixed addresses of 0xffffffffff600x00 from legacy - code). Most statically-linked binaries and older - versions of glibc use these calls. Because these - functions are at fixed addresses, they make nice - targets for exploits that can control RIP. - - emulate [default] Vsyscalls turn into traps and are - emulated reasonably safely. - - native Vsyscalls are native syscall instructions. - This is a little bit faster than trapping - and makes a few dynamic recompilers work - better than they would in emulation mode. - It also makes exploits much easier to write. - - none Vsyscalls don't work at all. This makes - them quite hard to use for exploits but - might break your system. - vt.cur_default= [VT] Default cursor shape. Format: 0xCCBBAA, where AA, BB, and CC are the same as the parameters of the [?A;B;Cc escape sequence; diff --git a/trunk/Documentation/m68k/kernel-options.txt b/trunk/Documentation/m68k/kernel-options.txt index 97d45f276fe6..c93bed66e25d 100644 --- a/trunk/Documentation/m68k/kernel-options.txt +++ b/trunk/Documentation/m68k/kernel-options.txt @@ -129,20 +129,6 @@ decimal 11 is the major of SCSI CD-ROMs, and the minor 0 stands for the first of these. You can find out all valid major numbers by looking into include/linux/major.h. -In addition to major and minor numbers, if the device containing your -root partition uses a partition table format with unique partition -identifiers, then you may use them. For instance, -"root=PARTUUID=00112233-4455-6677-8899-AABBCCDDEEFF". It is also -possible to reference another partition on the same device using a -known partition UUID as the starting point. For example, -if partition 5 of the device has the UUID of -00112233-4455-6677-8899-AABBCCDDEEFF then partition 3 may be found as -follows: - PARTUUID=00112233-4455-6677-8899-AABBCCDDEEFF/PARTNROFF=-2 - -Authoritative information can be found in -"Documentation/kernel-parameters.txt". - 2.2) ro, rw ----------- diff --git a/trunk/Documentation/networking/bonding.txt b/trunk/Documentation/networking/bonding.txt index 91df678fb7f8..675612ff41ae 100644 --- a/trunk/Documentation/networking/bonding.txt +++ b/trunk/Documentation/networking/bonding.txt @@ -238,18 +238,6 @@ ad_select This option was added in bonding version 3.4.0. -all_slaves_active - - Specifies that duplicate frames (received on inactive ports) should be - dropped (0) or delivered (1). - - Normally, bonding will drop duplicate frames (received on inactive - ports), which is desirable for most users. But there are some times - it is nice to allow duplicate frames to be delivered. - - The default value is 0 (drop duplicate frames received on inactive - ports). - arp_interval Specifies the ARP link monitoring frequency in milliseconds. @@ -445,23 +433,6 @@ miimon determined. See the High Availability section for additional information. The default value is 0. -min_links - - Specifies the minimum number of links that must be active before - asserting carrier. It is similar to the Cisco EtherChannel min-links - feature. This allows setting the minimum number of member ports that - must be up (link-up state) before marking the bond device as up - (carrier on). This is useful for situations where higher level services - such as clustering want to ensure a minimum number of low bandwidth - links are active before switchover. This option only affect 802.3ad - mode. - - The default value is 0. This will cause carrier to be asserted (for - 802.3ad mode) whenever there is an active aggregator, regardless of the - number of available links in that aggregator. Note that, because an - aggregator cannot be active without at least one available link, - setting this option to 0 or to 1 has the exact same effect. - mode Specifies one of the bonding policies. The default is @@ -628,7 +599,7 @@ num_unsol_na affect only the active-backup mode. These options were added for bonding versions 3.3.0 and 3.4.0 respectively. - From Linux 3.0 and bonding version 3.7.1, these notifications + From Linux 2.6.40 and bonding version 3.7.1, these notifications are generated by the ipv4 and ipv6 code and the numbers of repetitions cannot be set independently. diff --git a/trunk/Documentation/networking/scaling.txt b/trunk/Documentation/networking/scaling.txt deleted file mode 100644 index 7254b4b5910e..000000000000 --- a/trunk/Documentation/networking/scaling.txt +++ /dev/null @@ -1,371 +0,0 @@ -Scaling in the Linux Networking Stack - - -Introduction -============ - -This document describes a set of complementary techniques in the Linux -networking stack to increase parallelism and improve performance for -multi-processor systems. - -The following technologies are described: - - RSS: Receive Side Scaling - RPS: Receive Packet Steering - RFS: Receive Flow Steering - Accelerated Receive Flow Steering - XPS: Transmit Packet Steering - - -RSS: Receive Side Scaling -========================= - -Contemporary NICs support multiple receive and transmit descriptor queues -(multi-queue). On reception, a NIC can send different packets to different -queues to distribute processing among CPUs. The NIC distributes packets by -applying a filter to each packet that assigns it to one of a small number -of logical flows. Packets for each flow are steered to a separate receive -queue, which in turn can be processed by separate CPUs. This mechanism is -generally known as “Receive-side Scaling” (RSS). The goal of RSS and -the other scaling techniques to increase performance uniformly. -Multi-queue distribution can also be used for traffic prioritization, but -that is not the focus of these techniques. - -The filter used in RSS is typically a hash function over the network -and/or transport layer headers-- for example, a 4-tuple hash over -IP addresses and TCP ports of a packet. The most common hardware -implementation of RSS uses a 128-entry indirection table where each entry -stores a queue number. The receive queue for a packet is determined -by masking out the low order seven bits of the computed hash for the -packet (usually a Toeplitz hash), taking this number as a key into the -indirection table and reading the corresponding value. - -Some advanced NICs allow steering packets to queues based on -programmable filters. For example, webserver bound TCP port 80 packets -can be directed to their own receive queue. Such “n-tuple” filters can -be configured from ethtool (--config-ntuple). - -==== RSS Configuration - -The driver for a multi-queue capable NIC typically provides a kernel -module parameter for specifying the number of hardware queues to -configure. In the bnx2x driver, for instance, this parameter is called -num_queues. A typical RSS configuration would be to have one receive queue -for each CPU if the device supports enough queues, or otherwise at least -one for each cache domain at a particular cache level (L1, L2, etc.). - -The indirection table of an RSS device, which resolves a queue by masked -hash, is usually programmed by the driver at initialization. The -default mapping is to distribute the queues evenly in the table, but the -indirection table can be retrieved and modified at runtime using ethtool -commands (--show-rxfh-indir and --set-rxfh-indir). Modifying the -indirection table could be done to give different queues different -relative weights. - -== RSS IRQ Configuration - -Each receive queue has a separate IRQ associated with it. The NIC triggers -this to notify a CPU when new packets arrive on the given queue. The -signaling path for PCIe devices uses message signaled interrupts (MSI-X), -that can route each interrupt to a particular CPU. The active mapping -of queues to IRQs can be determined from /proc/interrupts. By default, -an IRQ may be handled on any CPU. Because a non-negligible part of packet -processing takes place in receive interrupt handling, it is advantageous -to spread receive interrupts between CPUs. To manually adjust the IRQ -affinity of each interrupt see Documentation/IRQ-affinity. Some systems -will be running irqbalance, a daemon that dynamically optimizes IRQ -assignments and as a result may override any manual settings. - -== Suggested Configuration - -RSS should be enabled when latency is a concern or whenever receive -interrupt processing forms a bottleneck. Spreading load between CPUs -decreases queue length. For low latency networking, the optimal setting -is to allocate as many queues as there are CPUs in the system (or the -NIC maximum, if lower). Because the aggregate number of interrupts grows -with each additional queue, the most efficient high-rate configuration -is likely the one with the smallest number of receive queues where no -CPU that processes receive interrupts reaches 100% utilization. Per-cpu -load can be observed using the mpstat utility. - - -RPS: Receive Packet Steering -============================ - -Receive Packet Steering (RPS) is logically a software implementation of -RSS. Being in software, it is necessarily called later in the datapath. -Whereas RSS selects the queue and hence CPU that will run the hardware -interrupt handler, RPS selects the CPU to perform protocol processing -above the interrupt handler. This is accomplished by placing the packet -on the desired CPU’s backlog queue and waking up the CPU for processing. -RPS has some advantages over RSS: 1) it can be used with any NIC, -2) software filters can easily be added to hash over new protocols, -3) it does not increase hardware device interrupt rate (although it does -introduce inter-processor interrupts (IPIs)). - -RPS is called during bottom half of the receive interrupt handler, when -a driver sends a packet up the network stack with netif_rx() or -netif_receive_skb(). These call the get_rps_cpu() function, which -selects the queue that should process a packet. - -The first step in determining the target CPU for RPS is to calculate a -flow hash over the packet’s addresses or ports (2-tuple or 4-tuple hash -depending on the protocol). This serves as a consistent hash of the -associated flow of the packet. The hash is either provided by hardware -or will be computed in the stack. Capable hardware can pass the hash in -the receive descriptor for the packet; this would usually be the same -hash used for RSS (e.g. computed Toeplitz hash). The hash is saved in -skb->rx_hash and can be used elsewhere in the stack as a hash of the -packet’s flow. - -Each receive hardware queue has an associated list of CPUs to which -RPS may enqueue packets for processing. For each received packet, -an index into the list is computed from the flow hash modulo the size -of the list. The indexed CPU is the target for processing the packet, -and the packet is queued to the tail of that CPU’s backlog queue. At -the end of the bottom half routine, IPIs are sent to any CPUs for which -packets have been queued to their backlog queue. The IPI wakes backlog -processing on the remote CPU, and any queued packets are then processed -up the networking stack. - -==== RPS Configuration - -RPS requires a kernel compiled with the CONFIG_RPS kconfig symbol (on -by default for SMP). Even when compiled in, RPS remains disabled until -explicitly configured. The list of CPUs to which RPS may forward traffic -can be configured for each receive queue using a sysfs file entry: - - /sys/class/net//queues/rx-/rps_cpus - -This file implements a bitmap of CPUs. RPS is disabled when it is zero -(the default), in which case packets are processed on the interrupting -CPU. Documentation/IRQ-affinity.txt explains how CPUs are assigned to -the bitmap. - -== Suggested Configuration - -For a single queue device, a typical RPS configuration would be to set -the rps_cpus to the CPUs in the same cache domain of the interrupting -CPU. If NUMA locality is not an issue, this could also be all CPUs in -the system. At high interrupt rate, it might be wise to exclude the -interrupting CPU from the map since that already performs much work. - -For a multi-queue system, if RSS is configured so that a hardware -receive queue is mapped to each CPU, then RPS is probably redundant -and unnecessary. If there are fewer hardware queues than CPUs, then -RPS might be beneficial if the rps_cpus for each queue are the ones that -share the same cache domain as the interrupting CPU for that queue. - - -RFS: Receive Flow Steering -========================== - -While RPS steers packets solely based on hash, and thus generally -provides good load distribution, it does not take into account -application locality. This is accomplished by Receive Flow Steering -(RFS). The goal of RFS is to increase datacache hitrate by steering -kernel processing of packets to the CPU where the application thread -consuming the packet is running. RFS relies on the same RPS mechanisms -to enqueue packets onto the backlog of another CPU and to wake up that -CPU. - -In RFS, packets are not forwarded directly by the value of their hash, -but the hash is used as index into a flow lookup table. This table maps -flows to the CPUs where those flows are being processed. The flow hash -(see RPS section above) is used to calculate the index into this table. -The CPU recorded in each entry is the one which last processed the flow. -If an entry does not hold a valid CPU, then packets mapped to that entry -are steered using plain RPS. Multiple table entries may point to the -same CPU. Indeed, with many flows and few CPUs, it is very likely that -a single application thread handles flows with many different flow hashes. - -rps_sock_table is a global flow table that contains the *desired* CPU for -flows: the CPU that is currently processing the flow in userspace. Each -table value is a CPU index that is updated during calls to recvmsg and -sendmsg (specifically, inet_recvmsg(), inet_sendmsg(), inet_sendpage() -and tcp_splice_read()). - -When the scheduler moves a thread to a new CPU while it has outstanding -receive packets on the old CPU, packets may arrive out of order. To -avoid this, RFS uses a second flow table to track outstanding packets -for each flow: rps_dev_flow_table is a table specific to each hardware -receive queue of each device. Each table value stores a CPU index and a -counter. The CPU index represents the *current* CPU onto which packets -for this flow are enqueued for further kernel processing. Ideally, kernel -and userspace processing occur on the same CPU, and hence the CPU index -in both tables is identical. This is likely false if the scheduler has -recently migrated a userspace thread while the kernel still has packets -enqueued for kernel processing on the old CPU. - -The counter in rps_dev_flow_table values records the length of the current -CPU's backlog when a packet in this flow was last enqueued. Each backlog -queue has a head counter that is incremented on dequeue. A tail counter -is computed as head counter + queue length. In other words, the counter -in rps_dev_flow_table[i] records the last element in flow i that has -been enqueued onto the currently designated CPU for flow i (of course, -entry i is actually selected by hash and multiple flows may hash to the -same entry i). - -And now the trick for avoiding out of order packets: when selecting the -CPU for packet processing (from get_rps_cpu()) the rps_sock_flow table -and the rps_dev_flow table of the queue that the packet was received on -are compared. If the desired CPU for the flow (found in the -rps_sock_flow table) matches the current CPU (found in the rps_dev_flow -table), the packet is enqueued onto that CPU’s backlog. If they differ, -the current CPU is updated to match the desired CPU if one of the -following is true: - -- The current CPU's queue head counter >= the recorded tail counter - value in rps_dev_flow[i] -- The current CPU is unset (equal to NR_CPUS) -- The current CPU is offline - -After this check, the packet is sent to the (possibly updated) current -CPU. These rules aim to ensure that a flow only moves to a new CPU when -there are no packets outstanding on the old CPU, as the outstanding -packets could arrive later than those about to be processed on the new -CPU. - -==== RFS Configuration - -RFS is only available if the kconfig symbol CONFIG_RFS is enabled (on -by default for SMP). The functionality remains disabled until explicitly -configured. The number of entries in the global flow table is set through: - - /proc/sys/net/core/rps_sock_flow_entries - -The number of entries in the per-queue flow table are set through: - - /sys/class/net//queues/tx-/rps_flow_cnt - -== Suggested Configuration - -Both of these need to be set before RFS is enabled for a receive queue. -Values for both are rounded up to the nearest power of two. The -suggested flow count depends on the expected number of active connections -at any given time, which may be significantly less than the number of open -connections. We have found that a value of 32768 for rps_sock_flow_entries -works fairly well on a moderately loaded server. - -For a single queue device, the rps_flow_cnt value for the single queue -would normally be configured to the same value as rps_sock_flow_entries. -For a multi-queue device, the rps_flow_cnt for each queue might be -configured as rps_sock_flow_entries / N, where N is the number of -queues. So for instance, if rps_flow_entries is set to 32768 and there -are 16 configured receive queues, rps_flow_cnt for each queue might be -configured as 2048. - - -Accelerated RFS -=============== - -Accelerated RFS is to RFS what RSS is to RPS: a hardware-accelerated load -balancing mechanism that uses soft state to steer flows based on where -the application thread consuming the packets of each flow is running. -Accelerated RFS should perform better than RFS since packets are sent -directly to a CPU local to the thread consuming the data. The target CPU -will either be the same CPU where the application runs, or at least a CPU -which is local to the application thread’s CPU in the cache hierarchy. - -To enable accelerated RFS, the networking stack calls the -ndo_rx_flow_steer driver function to communicate the desired hardware -queue for packets matching a particular flow. The network stack -automatically calls this function every time a flow entry in -rps_dev_flow_table is updated. The driver in turn uses a device specific -method to program the NIC to steer the packets. - -The hardware queue for a flow is derived from the CPU recorded in -rps_dev_flow_table. The stack consults a CPU to hardware queue map which -is maintained by the NIC driver. This is an auto-generated reverse map of -the IRQ affinity table shown by /proc/interrupts. Drivers can use -functions in the cpu_rmap (“CPU affinity reverse map”) kernel library -to populate the map. For each CPU, the corresponding queue in the map is -set to be one whose processing CPU is closest in cache locality. - -==== Accelerated RFS Configuration - -Accelerated RFS is only available if the kernel is compiled with -CONFIG_RFS_ACCEL and support is provided by the NIC device and driver. -It also requires that ntuple filtering is enabled via ethtool. The map -of CPU to queues is automatically deduced from the IRQ affinities -configured for each receive queue by the driver, so no additional -configuration should be necessary. - -== Suggested Configuration - -This technique should be enabled whenever one wants to use RFS and the -NIC supports hardware acceleration. - -XPS: Transmit Packet Steering -============================= - -Transmit Packet Steering is a mechanism for intelligently selecting -which transmit queue to use when transmitting a packet on a multi-queue -device. To accomplish this, a mapping from CPU to hardware queue(s) is -recorded. The goal of this mapping is usually to assign queues -exclusively to a subset of CPUs, where the transmit completions for -these queues are processed on a CPU within this set. This choice -provides two benefits. First, contention on the device queue lock is -significantly reduced since fewer CPUs contend for the same queue -(contention can be eliminated completely if each CPU has its own -transmit queue). Secondly, cache miss rate on transmit completion is -reduced, in particular for data cache lines that hold the sk_buff -structures. - -XPS is configured per transmit queue by setting a bitmap of CPUs that -may use that queue to transmit. The reverse mapping, from CPUs to -transmit queues, is computed and maintained for each network device. -When transmitting the first packet in a flow, the function -get_xps_queue() is called to select a queue. This function uses the ID -of the running CPU as a key into the CPU-to-queue lookup table. If the -ID matches a single queue, that is used for transmission. If multiple -queues match, one is selected by using the flow hash to compute an index -into the set. - -The queue chosen for transmitting a particular flow is saved in the -corresponding socket structure for the flow (e.g. a TCP connection). -This transmit queue is used for subsequent packets sent on the flow to -prevent out of order (ooo) packets. The choice also amortizes the cost -of calling get_xps_queues() over all packets in the connection. To avoid -ooo packets, the queue for a flow can subsequently only be changed if -skb->ooo_okay is set for a packet in the flow. This flag indicates that -there are no outstanding packets in the flow, so the transmit queue can -change without the risk of generating out of order packets. The -transport layer is responsible for setting ooo_okay appropriately. TCP, -for instance, sets the flag when all data for a connection has been -acknowledged. - -==== XPS Configuration - -XPS is only available if the kconfig symbol CONFIG_XPS is enabled (on by -default for SMP). The functionality remains disabled until explicitly -configured. To enable XPS, the bitmap of CPUs that may use a transmit -queue is configured using the sysfs file entry: - -/sys/class/net//queues/tx-/xps_cpus - -== Suggested Configuration - -For a network device with a single transmission queue, XPS configuration -has no effect, since there is no choice in this case. In a multi-queue -system, XPS is preferably configured so that each CPU maps onto one queue. -If there are as many queues as there are CPUs in the system, then each -queue can also map onto one CPU, resulting in exclusive pairings that -experience no contention. If there are fewer queues than CPUs, then the -best CPUs to share a given queue are probably those that share the cache -with the CPU that processes transmit completions for that queue -(transmit interrupts). - - -Further Information -=================== -RPS and RFS were introduced in kernel 2.6.35. XPS was incorporated into -2.6.38. Original patches were submitted by Tom Herbert -(therbert@google.com) - -Accelerated RFS was introduced in 2.6.35. Original patches were -submitted by Ben Hutchings (bhutchings@solarflare.com) - -Authors: -Tom Herbert (therbert@google.com) -Willem de Bruijn (willemb@google.com) diff --git a/trunk/Documentation/power/runtime_pm.txt b/trunk/Documentation/power/runtime_pm.txt index 4ce5450ab6e8..14dd3c6ad97e 100644 --- a/trunk/Documentation/power/runtime_pm.txt +++ b/trunk/Documentation/power/runtime_pm.txt @@ -54,10 +54,11 @@ referred to as subsystem-level callbacks in what follows. By default, the callbacks are always invoked in process context with interrupts enabled. However, subsystems can use the pm_runtime_irq_safe() helper function to tell the PM core that a device's ->runtime_suspend() and ->runtime_resume() -callbacks should be invoked in atomic context with interrupts disabled. -This implies that these callback routines must not block or sleep, but it also -means that the synchronous helper functions listed at the end of Section 4 can -be used within an interrupt handler or in an atomic context. +callbacks should be invoked in atomic context with interrupts disabled +(->runtime_idle() is still invoked the default way). This implies that these +callback routines must not block or sleep, but it also means that the +synchronous helper functions listed at the end of Section 4 can be used within +an interrupt handler or in an atomic context. The subsystem-level suspend callback is _entirely_ _responsible_ for handling the suspend of the device as appropriate, which may, but need not include @@ -482,7 +483,6 @@ pm_runtime_suspend() pm_runtime_autosuspend() pm_runtime_resume() pm_runtime_get_sync() -pm_runtime_put_sync() pm_runtime_put_sync_suspend() 5. Runtime PM Initialization, Device Probing and Removal diff --git a/trunk/Documentation/ramoops.txt b/trunk/Documentation/ramoops.txt deleted file mode 100644 index 8fb1ba7fe7bf..000000000000 --- a/trunk/Documentation/ramoops.txt +++ /dev/null @@ -1,76 +0,0 @@ -Ramoops oops/panic logger -========================= - -Sergiu Iordache - -Updated: 8 August 2011 - -0. Introduction - -Ramoops is an oops/panic logger that writes its logs to RAM before the system -crashes. It works by logging oopses and panics in a circular buffer. Ramoops -needs a system with persistent RAM so that the content of that area can -survive after a restart. - -1. Ramoops concepts - -Ramoops uses a predefined memory area to store the dump. The start and size of -the memory area are set using two variables: - * "mem_address" for the start - * "mem_size" for the size. The memory size will be rounded down to a - power of two. - -The memory area is divided into "record_size" chunks (also rounded down to -power of two) and each oops/panic writes a "record_size" chunk of -information. - -Dumping both oopses and panics can be done by setting 1 in the "dump_oops" -variable while setting 0 in that variable dumps only the panics. - -The module uses a counter to record multiple dumps but the counter gets reset -on restart (i.e. new dumps after the restart will overwrite old ones). - -2. Setting the parameters - -Setting the ramoops parameters can be done in 2 different manners: - 1. Use the module parameters (which have the names of the variables described - as before). - 2. Use a platform device and set the platform data. The parameters can then - be set through that platform data. An example of doing that is: - -#include -[...] - -static struct ramoops_platform_data ramoops_data = { - .mem_size = <...>, - .mem_address = <...>, - .record_size = <...>, - .dump_oops = <...>, -}; - -static struct platform_device ramoops_dev = { - .name = "ramoops", - .dev = { - .platform_data = &ramoops_data, - }, -}; - -[... inside a function ...] -int ret; - -ret = platform_device_register(&ramoops_dev); -if (ret) { - printk(KERN_ERR "unable to register platform device\n"); - return ret; -} - -3. Dump format - -The data dump begins with a header, currently defined as "====" followed by a -timestamp and a new line. The dump then continues with the actual data. - -4. Reading the data - -The dump data can be read from memory (through /dev/mem or other means). -Getting the module parameters, which are needed in order to parse the data, can -be done through /sys/module/ramoops/parameters/* . diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 1d445f572987..c9c6324a7a9f 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -2643,8 +2643,9 @@ S: Maintained F: arch/x86/math-emu/ FRAME RELAY DLCI/FRAD (Sangoma drivers too) +M: Mike McLagan L: netdev@vger.kernel.org -S: Orphan +S: Maintained F: drivers/net/wan/dlci.c F: drivers/net/wan/sdla.c @@ -3366,12 +3367,6 @@ F: drivers/net/ixgb/ F: drivers/net/ixgbe/ F: drivers/net/ixgbevf/ -INTEL MRST PMU DRIVER -M: Len Brown -L: linux-pm@lists.linux-foundation.org -S: Supported -F: arch/x86/platform/mrst/pmu.* - INTEL PRO/WIRELESS 2100 NETWORK CONNECTION SUPPORT L: linux-wireless@vger.kernel.org S: Orphan @@ -3905,9 +3900,9 @@ F: arch/powerpc/platforms/powermac/ F: drivers/macintosh/ LINUX FOR POWERPC EMBEDDED MPC5XXX -M: Anatolij Gustschin +M: Grant Likely L: linuxppc-dev@lists.ozlabs.org -T: git git://git.denx.de/linux-2.6-agust.git +T: git git://git.secretlab.ca/git/linux-2.6.git S: Maintained F: arch/powerpc/platforms/512x/ F: arch/powerpc/platforms/52xx/ @@ -4414,10 +4409,10 @@ F: net/*/netfilter/ F: net/netfilter/ NETLABEL -M: Paul Moore +M: Paul Moore W: http://netlabel.sf.net L: netdev@vger.kernel.org -S: Maintained +S: Supported F: Documentation/netlabel/ F: include/net/netlabel.h F: net/netlabel/ @@ -4462,6 +4457,7 @@ F: include/linux/netdevice.h NETWORKING [IPv4/IPv6] M: "David S. Miller" M: Alexey Kuznetsov +M: "Pekka Savola (ipv6)" M: James Morris M: Hideaki YOSHIFUJI M: Patrick McHardy @@ -4474,7 +4470,7 @@ F: include/net/ip* F: arch/x86/net/* NETWORKING [LABELED] (NetLabel, CIPSO, Labeled IPsec, SECMARK) -M: Paul Moore +M: Paul Moore L: netdev@vger.kernel.org S: Maintained @@ -4604,7 +4600,7 @@ F: arch/arm/mach-omap2/clockdomain2xxx_3xxx.c F: arch/arm/mach-omap2/clockdomain44xx.c OMAP AUDIO SUPPORT -M: Jarkko Nikula +M: Jarkko Nikula L: alsa-devel@alsa-project.org (subscribers-only) L: linux-omap@vger.kernel.org S: Maintained @@ -4726,7 +4722,6 @@ S: Maintained F: drivers/of F: include/linux/of*.h K: of_get_property -K: of_match_table OPENRISC ARCHITECTURE M: Jonas Bonn @@ -6323,7 +6318,6 @@ F: include/linux/sysv_fs.h TARGET SUBSYSTEM M: Nicholas A. Bellinger L: linux-scsi@vger.kernel.org -L: target-devel@vger.kernel.org L: http://groups.google.com/group/linux-iscsi-target-dev W: http://www.linux-iscsi.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/nab/lio-core-2.6.git master @@ -7357,7 +7351,7 @@ THE REST M: Linus Torvalds L: linux-kernel@vger.kernel.org Q: http://patchwork.kernel.org/project/LKML/list/ -T: git git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git +T: git git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git S: Buried alive in reporters F: * F: */ diff --git a/trunk/Makefile b/trunk/Makefile index 3241d41dfbff..f676d15cd348 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,8 +1,8 @@ VERSION = 3 -PATCHLEVEL = 1 +PATCHLEVEL = 0 SUBLEVEL = 0 -EXTRAVERSION = -rc2 -NAME = Wet Seal +EXTRAVERSION = +NAME = Sneaky Weasel # *DOCUMENTATION* # To see a list of typical targets execute "make help" diff --git a/trunk/arch/Kconfig b/trunk/arch/Kconfig index 4b0669cbb3b0..26b0e2397a57 100644 --- a/trunk/arch/Kconfig +++ b/trunk/arch/Kconfig @@ -178,7 +178,4 @@ config HAVE_ARCH_MUTEX_CPU_RELAX config HAVE_RCU_TABLE_FREE bool -config ARCH_HAVE_NMI_SAFE_CMPXCHG - bool - source "kernel/gcov/Kconfig" diff --git a/trunk/arch/alpha/Kconfig b/trunk/arch/alpha/Kconfig index 60cde53d266c..ca2da8da6e9c 100644 --- a/trunk/arch/alpha/Kconfig +++ b/trunk/arch/alpha/Kconfig @@ -14,7 +14,6 @@ config ALPHA select AUTO_IRQ_AFFINITY if SMP select GENERIC_IRQ_SHOW select ARCH_WANT_OPTIONAL_GPIOLIB - select ARCH_HAVE_NMI_SAFE_CMPXCHG help The Alpha is a 64-bit general-purpose processor designed and marketed by the Digital Equipment Corporation of blessed memory, diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 5ebc5d922ea1..2c71a8f3535a 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -195,7 +195,8 @@ config VECTORS_BASE The base address of exception vectors. config ARM_PATCH_PHYS_VIRT - bool "Patch physical to virtual translations at runtime" + bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)" + depends on EXPERIMENTAL depends on !XIP_KERNEL && MMU depends on !ARCH_REALVIEW || !SPARSEMEM help diff --git a/trunk/arch/arm/kernel/armksyms.c b/trunk/arch/arm/kernel/armksyms.c index aeef960ff795..acca35aebe28 100644 --- a/trunk/arch/arm/kernel/armksyms.c +++ b/trunk/arch/arm/kernel/armksyms.c @@ -112,6 +112,9 @@ EXPORT_SYMBOL(__put_user_4); EXPORT_SYMBOL(__put_user_8); #endif + /* crypto hash */ +EXPORT_SYMBOL(sha_transform); + /* gcc lib functions */ EXPORT_SYMBOL(__ashldi3); EXPORT_SYMBOL(__ashrdi3); diff --git a/trunk/arch/arm/kernel/iwmmxt.S b/trunk/arch/arm/kernel/iwmmxt.S index a08783823b32..7fa3bb0d2397 100644 --- a/trunk/arch/arm/kernel/iwmmxt.S +++ b/trunk/arch/arm/kernel/iwmmxt.S @@ -195,10 +195,10 @@ ENTRY(iwmmxt_task_disable) @ enable access to CP0 and CP1 XSC(mrc p15, 0, r4, c15, c1, 0) - XSC(orr r4, r4, #0x3) + XSC(orr r4, r4, #0xf) XSC(mcr p15, 0, r4, c15, c1, 0) PJ4(mrc p15, 0, r4, c1, c0, 2) - PJ4(orr r4, r4, #0xf) + PJ4(orr r4, r4, #0x3) PJ4(mcr p15, 0, r4, c1, c0, 2) mov r0, #0 @ nothing to load @@ -313,7 +313,7 @@ ENTRY(iwmmxt_task_switch) teq r2, r3 @ next task owns it? movne pc, lr @ no: leave Concan disabled -1: @ flip Concan access +1: @ flip Conan access XSC(eor r1, r1, #0x3) XSC(mcr p15, 0, r1, c15, c1, 0) PJ4(eor r1, r1, #0xf) diff --git a/trunk/arch/arm/kernel/module.c b/trunk/arch/arm/kernel/module.c index cc2020c2c709..05b377616fd5 100644 --- a/trunk/arch/arm/kernel/module.c +++ b/trunk/arch/arm/kernel/module.c @@ -323,11 +323,7 @@ int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs, #endif s = find_mod_section(hdr, sechdrs, ".alt.smp.init"); if (s && !is_smp()) -#ifdef CONFIG_SMP_ON_UP fixup_smp((void *)s->sh_addr, s->sh_size); -#else - return -EINVAL; -#endif return 0; } diff --git a/trunk/arch/arm/kernel/process.c b/trunk/arch/arm/kernel/process.c index 1a347f481e5e..5e1e54197227 100644 --- a/trunk/arch/arm/kernel/process.c +++ b/trunk/arch/arm/kernel/process.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include @@ -197,8 +196,7 @@ void cpu_idle(void) cpu_relax(); } else { stop_critical_timings(); - if (cpuidle_idle_call()) - pm_idle(); + pm_idle(); start_critical_timings(); /* * This will eventually be removed - pm_idle diff --git a/trunk/arch/arm/lib/Makefile b/trunk/arch/arm/lib/Makefile index cf73a7f742dd..59ff42ddf0ae 100644 --- a/trunk/arch/arm/lib/Makefile +++ b/trunk/arch/arm/lib/Makefile @@ -12,7 +12,7 @@ lib-y := backtrace.o changebit.o csumipv6.o csumpartial.o \ strchr.o strrchr.o \ testchangebit.o testclearbit.o testsetbit.o \ ashldi3.o ashrdi3.o lshrdi3.o muldi3.o \ - ucmpdi2.o lib1funcs.o div64.o \ + ucmpdi2.o lib1funcs.o div64.o sha1.o \ io-readsb.o io-writesb.o io-readsl.o io-writesl.o mmu-y := clear_user.o copy_page.o getuser.o putuser.o diff --git a/trunk/arch/arm/lib/sha1.S b/trunk/arch/arm/lib/sha1.S new file mode 100644 index 000000000000..eb0edb80d7b8 --- /dev/null +++ b/trunk/arch/arm/lib/sha1.S @@ -0,0 +1,211 @@ +/* + * linux/arch/arm/lib/sha1.S + * + * SHA transform optimized for ARM + * + * Copyright: (C) 2005 by Nicolas Pitre + * Created: September 17, 2005 + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * The reference implementation for this code is linux/lib/sha1.c + */ + +#include + + .text + + +/* + * void sha_transform(__u32 *digest, const char *in, __u32 *W) + * + * Note: the "in" ptr may be unaligned. + */ + +ENTRY(sha_transform) + + stmfd sp!, {r4 - r8, lr} + + @ for (i = 0; i < 16; i++) + @ W[i] = be32_to_cpu(in[i]); + +#ifdef __ARMEB__ + mov r4, r0 + mov r0, r2 + mov r2, #64 + bl memcpy + mov r2, r0 + mov r0, r4 +#else + mov r3, r2 + mov lr, #16 +1: ldrb r4, [r1], #1 + ldrb r5, [r1], #1 + ldrb r6, [r1], #1 + ldrb r7, [r1], #1 + subs lr, lr, #1 + orr r5, r5, r4, lsl #8 + orr r6, r6, r5, lsl #8 + orr r7, r7, r6, lsl #8 + str r7, [r3], #4 + bne 1b +#endif + + @ for (i = 0; i < 64; i++) + @ W[i+16] = ror(W[i+13] ^ W[i+8] ^ W[i+2] ^ W[i], 31); + + sub r3, r2, #4 + mov lr, #64 +2: ldr r4, [r3, #4]! + subs lr, lr, #1 + ldr r5, [r3, #8] + ldr r6, [r3, #32] + ldr r7, [r3, #52] + eor r4, r4, r5 + eor r4, r4, r6 + eor r4, r4, r7 + mov r4, r4, ror #31 + str r4, [r3, #64] + bne 2b + + /* + * The SHA functions are: + * + * f1(B,C,D) = (D ^ (B & (C ^ D))) + * f2(B,C,D) = (B ^ C ^ D) + * f3(B,C,D) = ((B & C) | (D & (B | C))) + * + * Then the sub-blocks are processed as follows: + * + * A' = ror(A, 27) + f(B,C,D) + E + K + *W++ + * B' = A + * C' = ror(B, 2) + * D' = C + * E' = D + * + * We therefore unroll each loop 5 times to avoid register shuffling. + * Also the ror for C (and also D and E which are successivelyderived + * from it) is applied in place to cut on an additional mov insn for + * each round. + */ + + .macro sha_f1, A, B, C, D, E + ldr r3, [r2], #4 + eor ip, \C, \D + add \E, r1, \E, ror #2 + and ip, \B, ip, ror #2 + add \E, \E, \A, ror #27 + eor ip, ip, \D, ror #2 + add \E, \E, r3 + add \E, \E, ip + .endm + + .macro sha_f2, A, B, C, D, E + ldr r3, [r2], #4 + add \E, r1, \E, ror #2 + eor ip, \B, \C, ror #2 + add \E, \E, \A, ror #27 + eor ip, ip, \D, ror #2 + add \E, \E, r3 + add \E, \E, ip + .endm + + .macro sha_f3, A, B, C, D, E + ldr r3, [r2], #4 + add \E, r1, \E, ror #2 + orr ip, \B, \C, ror #2 + add \E, \E, \A, ror #27 + and ip, ip, \D, ror #2 + add \E, \E, r3 + and r3, \B, \C, ror #2 + orr ip, ip, r3 + add \E, \E, ip + .endm + + ldmia r0, {r4 - r8} + + mov lr, #4 + ldr r1, .L_sha_K + 0 + + /* adjust initial values */ + mov r6, r6, ror #30 + mov r7, r7, ror #30 + mov r8, r8, ror #30 + +3: subs lr, lr, #1 + sha_f1 r4, r5, r6, r7, r8 + sha_f1 r8, r4, r5, r6, r7 + sha_f1 r7, r8, r4, r5, r6 + sha_f1 r6, r7, r8, r4, r5 + sha_f1 r5, r6, r7, r8, r4 + bne 3b + + ldr r1, .L_sha_K + 4 + mov lr, #4 + +4: subs lr, lr, #1 + sha_f2 r4, r5, r6, r7, r8 + sha_f2 r8, r4, r5, r6, r7 + sha_f2 r7, r8, r4, r5, r6 + sha_f2 r6, r7, r8, r4, r5 + sha_f2 r5, r6, r7, r8, r4 + bne 4b + + ldr r1, .L_sha_K + 8 + mov lr, #4 + +5: subs lr, lr, #1 + sha_f3 r4, r5, r6, r7, r8 + sha_f3 r8, r4, r5, r6, r7 + sha_f3 r7, r8, r4, r5, r6 + sha_f3 r6, r7, r8, r4, r5 + sha_f3 r5, r6, r7, r8, r4 + bne 5b + + ldr r1, .L_sha_K + 12 + mov lr, #4 + +6: subs lr, lr, #1 + sha_f2 r4, r5, r6, r7, r8 + sha_f2 r8, r4, r5, r6, r7 + sha_f2 r7, r8, r4, r5, r6 + sha_f2 r6, r7, r8, r4, r5 + sha_f2 r5, r6, r7, r8, r4 + bne 6b + + ldmia r0, {r1, r2, r3, ip, lr} + add r4, r1, r4 + add r5, r2, r5 + add r6, r3, r6, ror #2 + add r7, ip, r7, ror #2 + add r8, lr, r8, ror #2 + stmia r0, {r4 - r8} + + ldmfd sp!, {r4 - r8, pc} + +ENDPROC(sha_transform) + + .align 2 +.L_sha_K: + .word 0x5a827999, 0x6ed9eba1, 0x8f1bbcdc, 0xca62c1d6 + + +/* + * void sha_init(__u32 *buf) + */ + + .align 2 +.L_sha_initial_digest: + .word 0x67452301, 0xefcdab89, 0x98badcfe, 0x10325476, 0xc3d2e1f0 + +ENTRY(sha_init) + + str lr, [sp, #-4]! + adr r1, .L_sha_initial_digest + ldmia r1, {r1, r2, r3, ip, lr} + stmia r0, {r1, r2, r3, ip, lr} + ldr pc, [sp], #4 + +ENDPROC(sha_init) diff --git a/trunk/arch/arm/mach-imx/clock-imx25.c b/trunk/arch/arm/mach-imx/clock-imx25.c index e63e23504fe5..0fc7ba56d616 100644 --- a/trunk/arch/arm/mach-imx/clock-imx25.c +++ b/trunk/arch/arm/mach-imx/clock-imx25.c @@ -331,9 +331,6 @@ int __init mx25_clocks_init(void) __raw_writel(__raw_readl(CRM_BASE+0x64) | (1 << 7) | (1 << 0), CRM_BASE + 0x64); - /* Clock source for gpt is ahb_div */ - __raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5), CRM_BASE + 0x64); - mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); return 0; diff --git a/trunk/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/trunk/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 6778f8193bc6..6707de0ab716 100644 --- a/trunk/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/trunk/arch/arm/mach-imx/mach-imx27_visstrim_m10.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include #include @@ -197,17 +196,6 @@ static struct pca953x_platform_data visstrim_m10_pca9555_pdata = { .invert = 0, }; -static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = { - .power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN | - AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE | - AIC32X4_PWR_AIC32X4_LDO_ENABLE | - AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 | - AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED, - .micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K | - AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K, - .swapdacs = false, -}; - static struct i2c_board_info visstrim_m10_i2c_devices[] = { { I2C_BOARD_INFO("pca9555", 0x20), @@ -215,7 +203,6 @@ static struct i2c_board_info visstrim_m10_i2c_devices[] = { }, { I2C_BOARD_INFO("tlv320aic32x4", 0x18), - .platform_data = &visstrim_m10_aic32x4_pdata, } }; diff --git a/trunk/arch/arm/mach-imx/mach-mx31ads.c b/trunk/arch/arm/mach-imx/mach-mx31ads.c index 29ca8907a780..0ce49478a479 100644 --- a/trunk/arch/arm/mach-imx/mach-mx31ads.c +++ b/trunk/arch/arm/mach-imx/mach-mx31ads.c @@ -468,7 +468,7 @@ static struct i2c_board_info __initdata mx31ads_i2c1_devices[] = { #endif }; -static void __init mxc_init_i2c(void) +static void mxc_init_i2c(void) { i2c_register_board_info(1, mx31ads_i2c1_devices, ARRAY_SIZE(mx31ads_i2c1_devices)); @@ -486,7 +486,7 @@ static unsigned int ssi_pins[] = { MX31_PIN_STXD5__STXD5, }; -static void __init mxc_init_audio(void) +static void mxc_init_audio(void) { imx31_add_imx_ssi(0, NULL); mxc_iomux_setup_multiple_pins(ssi_pins, ARRAY_SIZE(ssi_pins), "ssi"); diff --git a/trunk/arch/arm/mach-imx/mach-mx31lilly.c b/trunk/arch/arm/mach-imx/mach-mx31lilly.c index 126913ad106a..750368ddf0f9 100644 --- a/trunk/arch/arm/mach-imx/mach-mx31lilly.c +++ b/trunk/arch/arm/mach-imx/mach-mx31lilly.c @@ -192,7 +192,7 @@ static struct mxc_usbh_platform_data usbh2_pdata __initdata = { .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT, }; -static void __init lilly1131_usb_init(void) +static void lilly1131_usb_init(void) { imx31_add_mxc_ehci_hs(1, &usbh1_pdata); diff --git a/trunk/arch/arm/mach-mmp/gplugd.c b/trunk/arch/arm/mach-mmp/gplugd.c index 98e25d9aaab6..c070c24255f4 100644 --- a/trunk/arch/arm/mach-mmp/gplugd.c +++ b/trunk/arch/arm/mach-mmp/gplugd.c @@ -16,18 +16,16 @@ #include #include #include +#include #include "common.h" static unsigned long gplugd_pin_config[] __initdata = { /* UART3 */ - GPIO8_UART3_TXD, - GPIO9_UART3_RXD, - GPIO1O_UART3_CTS, - GPIO11_UART3_RTS, - - /* USB OTG PEN */ - GPIO18_GPIO, + GPIO8_UART3_SOUT, + GPIO9_UART3_SIN, + GPI1O_UART3_CTS, + GPI11_UART3_RTS, /* MMC2 */ GPIO28_MMC2_CMD, @@ -111,12 +109,6 @@ static unsigned long gplugd_pin_config[] __initdata = { GPIO105_CI2C_SDA, GPIO106_CI2C_SCL, - /* SPI NOR Flash on SSP2 */ - GPIO107_SSP2_RXD, - GPIO108_SSP2_TXD, - GPIO110_GPIO, /* SPI_CSn */ - GPIO111_SSP2_CLK, - /* Select JTAG */ GPIO109_GPIO, @@ -162,7 +154,7 @@ static void __init select_disp_freq(void) "frequency\n"); } else { gpio_direction_output(35, 1); - gpio_free(35); + gpio_free(104); } if (unlikely(gpio_request(85, "DISP_FREQ_SEL_2"))) { @@ -170,7 +162,7 @@ static void __init select_disp_freq(void) "frequency\n"); } else { gpio_direction_output(85, 0); - gpio_free(85); + gpio_free(104); } } diff --git a/trunk/arch/arm/mach-mmp/include/mach/mfp-gplugd.h b/trunk/arch/arm/mach-mmp/include/mach/mfp-gplugd.h new file mode 100644 index 000000000000..b8cf38d85600 --- /dev/null +++ b/trunk/arch/arm/mach-mmp/include/mach/mfp-gplugd.h @@ -0,0 +1,52 @@ +/* + * linux/arch/arm/mach-mmp/include/mach/mfp-gplugd.h + * + * MFP definitions used in gplugD + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __MACH_MFP_GPLUGD_H +#define __MACH_MFP_GPLUGD_H + +#include +#include + +/* UART3 */ +#define GPIO8_UART3_SOUT MFP_CFG(GPIO8, AF2) +#define GPIO9_UART3_SIN MFP_CFG(GPIO9, AF2) +#define GPI1O_UART3_CTS MFP_CFG(GPIO10, AF2) +#define GPI11_UART3_RTS MFP_CFG(GPIO11, AF2) + +/* MMC2 */ +#define GPIO28_MMC2_CMD MFP_CFG_DRV(GPIO28, AF6, FAST) +#define GPIO29_MMC2_CLK MFP_CFG_DRV(GPIO29, AF6, FAST) +#define GPIO30_MMC2_DAT0 MFP_CFG_DRV(GPIO30, AF6, FAST) +#define GPIO31_MMC2_DAT1 MFP_CFG_DRV(GPIO31, AF6, FAST) +#define GPIO32_MMC2_DAT2 MFP_CFG_DRV(GPIO32, AF6, FAST) +#define GPIO33_MMC2_DAT3 MFP_CFG_DRV(GPIO33, AF6, FAST) + +/* I2S */ +#undef GPIO114_I2S_FRM +#undef GPIO115_I2S_BCLK + +#define GPIO114_I2S_FRM MFP_CFG_DRV(GPIO114, AF1, FAST) +#define GPIO115_I2S_BCLK MFP_CFG_DRV(GPIO115, AF1, FAST) +#define GPIO116_I2S_TXD MFP_CFG_DRV(GPIO116, AF1, FAST) + +/* MMC4 */ +#define GPIO125_MMC4_DAT3 MFP_CFG_DRV(GPIO125, AF7, FAST) +#define GPIO126_MMC4_DAT2 MFP_CFG_DRV(GPIO126, AF7, FAST) +#define GPIO127_MMC4_DAT1 MFP_CFG_DRV(GPIO127, AF7, FAST) +#define GPIO0_2_MMC4_DAT0 MFP_CFG_DRV(GPIO0_2, AF7, FAST) +#define GPIO1_2_MMC4_CMD MFP_CFG_DRV(GPIO1_2, AF7, FAST) +#define GPIO2_2_MMC4_CLK MFP_CFG_DRV(GPIO2_2, AF7, FAST) + +/* OTG GPIO */ +#define GPIO_USB_OTG_PEN 18 +#define GPIO_USB_OIDIR 20 + +/* Other GPIOs are 35, 84, 85 */ +#endif /* __MACH_MFP_GPLUGD_H */ diff --git a/trunk/arch/arm/mach-mmp/include/mach/mfp-pxa168.h b/trunk/arch/arm/mach-mmp/include/mach/mfp-pxa168.h index 92aaa3c19d61..8c782328b21c 100644 --- a/trunk/arch/arm/mach-mmp/include/mach/mfp-pxa168.h +++ b/trunk/arch/arm/mach-mmp/include/mach/mfp-pxa168.h @@ -203,10 +203,6 @@ #define GPIO33_CF_nCD2 MFP_CFG(GPIO33, AF3) /* UART */ -#define GPIO8_UART3_TXD MFP_CFG(GPIO8, AF2) -#define GPIO9_UART3_RXD MFP_CFG(GPIO9, AF2) -#define GPIO1O_UART3_CTS MFP_CFG(GPIO10, AF2) -#define GPIO11_UART3_RTS MFP_CFG(GPIO11, AF2) #define GPIO88_UART2_TXD MFP_CFG(GPIO88, AF2) #define GPIO89_UART2_RXD MFP_CFG(GPIO89, AF2) #define GPIO107_UART1_TXD MFP_CFG_DRV(GPIO107, AF1, FAST) @@ -236,22 +232,6 @@ #define GPIO53_MMC1_CD MFP_CFG(GPIO53, AF1) #define GPIO46_MMC1_WP MFP_CFG(GPIO46, AF1) -/* MMC2 */ -#define GPIO28_MMC2_CMD MFP_CFG_DRV(GPIO28, AF6, FAST) -#define GPIO29_MMC2_CLK MFP_CFG_DRV(GPIO29, AF6, FAST) -#define GPIO30_MMC2_DAT0 MFP_CFG_DRV(GPIO30, AF6, FAST) -#define GPIO31_MMC2_DAT1 MFP_CFG_DRV(GPIO31, AF6, FAST) -#define GPIO32_MMC2_DAT2 MFP_CFG_DRV(GPIO32, AF6, FAST) -#define GPIO33_MMC2_DAT3 MFP_CFG_DRV(GPIO33, AF6, FAST) - -/* MMC4 */ -#define GPIO125_MMC4_DAT3 MFP_CFG_DRV(GPIO125, AF7, FAST) -#define GPIO126_MMC4_DAT2 MFP_CFG_DRV(GPIO126, AF7, FAST) -#define GPIO127_MMC4_DAT1 MFP_CFG_DRV(GPIO127, AF7, FAST) -#define GPIO0_2_MMC4_DAT0 MFP_CFG_DRV(GPIO0_2, AF7, FAST) -#define GPIO1_2_MMC4_CMD MFP_CFG_DRV(GPIO1_2, AF7, FAST) -#define GPIO2_2_MMC4_CLK MFP_CFG_DRV(GPIO2_2, AF7, FAST) - /* LCD */ #define GPIO84_LCD_CS MFP_CFG(GPIO84, AF1) #define GPIO60_LCD_DD0 MFP_CFG(GPIO60, AF1) @@ -289,12 +269,11 @@ #define GPIO106_CI2C_SCL MFP_CFG(GPIO106, AF1) /* I2S */ -#define GPIO113_I2S_MCLK MFP_CFG(GPIO113, AF6) -#define GPIO114_I2S_FRM MFP_CFG(GPIO114, AF1) -#define GPIO115_I2S_BCLK MFP_CFG(GPIO115, AF1) -#define GPIO116_I2S_RXD MFP_CFG(GPIO116, AF2) -#define GPIO116_I2S_TXD MFP_CFG(GPIO116, AF1) -#define GPIO117_I2S_TXD MFP_CFG(GPIO117, AF2) +#define GPIO113_I2S_MCLK MFP_CFG(GPIO113,AF6) +#define GPIO114_I2S_FRM MFP_CFG(GPIO114,AF1) +#define GPIO115_I2S_BCLK MFP_CFG(GPIO115,AF1) +#define GPIO116_I2S_RXD MFP_CFG(GPIO116,AF2) +#define GPIO117_I2S_TXD MFP_CFG(GPIO117,AF2) /* PWM */ #define GPIO96_PWM3_OUT MFP_CFG(GPIO96, AF1) @@ -345,10 +324,4 @@ #define GPIO101_MII_MDIO MFP_CFG(GPIO101, AF5) #define GPIO103_RX_DV MFP_CFG(GPIO103, AF5) -/* SSP2 */ -#define GPIO107_SSP2_RXD MFP_CFG(GPIO107, AF4) -#define GPIO108_SSP2_TXD MFP_CFG(GPIO108, AF4) -#define GPIO111_SSP2_CLK MFP_CFG(GPIO111, AF4) -#define GPIO112_SSP2_FRM MFP_CFG(GPIO112, AF4) - #endif /* __ASM_MACH_MFP_PXA168_H */ diff --git a/trunk/arch/arm/mach-mmp/time.c b/trunk/arch/arm/mach-mmp/time.c index 4e91ee6e27c8..99833b9485cf 100644 --- a/trunk/arch/arm/mach-mmp/time.c +++ b/trunk/arch/arm/mach-mmp/time.c @@ -51,12 +51,12 @@ static inline uint32_t timer_read(void) { int delay = 100; - __raw_writel(1, TIMERS_VIRT_BASE + TMR_CVWR(1)); + __raw_writel(1, TIMERS_VIRT_BASE + TMR_CVWR(0)); while (delay--) cpu_relax(); - return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(1)); + return __raw_readl(TIMERS_VIRT_BASE + TMR_CVWR(0)); } unsigned long long notrace sched_clock(void) @@ -75,51 +75,28 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id) { struct clock_event_device *c = dev_id; - /* - * Clear pending interrupt status. - */ - __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_ICR(0)); - - /* - * Disable timer 0. - */ - __raw_writel(0x02, TIMERS_VIRT_BASE + TMR_CER); - + /* disable and clear pending interrupt status */ + __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(0)); + __raw_writel(0x1, TIMERS_VIRT_BASE + TMR_ICR(0)); c->event_handler(c); - return IRQ_HANDLED; } static int timer_set_next_event(unsigned long delta, struct clock_event_device *dev) { - unsigned long flags; + unsigned long flags, next; local_irq_save(flags); - /* - * Disable timer 0. - */ - __raw_writel(0x02, TIMERS_VIRT_BASE + TMR_CER); - - /* - * Clear and enable timer match 0 interrupt. - */ + /* clear pending interrupt status and enable */ __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_ICR(0)); __raw_writel(0x01, TIMERS_VIRT_BASE + TMR_IER(0)); - /* - * Setup new clockevent timer value. - */ - __raw_writel(delta - 1, TIMERS_VIRT_BASE + TMR_TN_MM(0, 0)); - - /* - * Enable timer 0. - */ - __raw_writel(0x03, TIMERS_VIRT_BASE + TMR_CER); + next = timer_read() + delta; + __raw_writel(next, TIMERS_VIRT_BASE + TMR_TN_MM(0, 0)); local_irq_restore(flags); - return 0; } @@ -168,26 +145,23 @@ static struct clocksource cksrc = { static void __init timer_config(void) { uint32_t ccr = __raw_readl(TIMERS_VIRT_BASE + TMR_CCR); + uint32_t cer = __raw_readl(TIMERS_VIRT_BASE + TMR_CER); + uint32_t cmr = __raw_readl(TIMERS_VIRT_BASE + TMR_CMR); - __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_CER); /* disable */ + __raw_writel(cer & ~0x1, TIMERS_VIRT_BASE + TMR_CER); /* disable */ - ccr &= (cpu_is_mmp2()) ? (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) : - (TMR_CCR_CS_0(3) | TMR_CCR_CS_1(3)); + ccr &= (cpu_is_mmp2()) ? TMR_CCR_CS_0(0) : TMR_CCR_CS_0(3); __raw_writel(ccr, TIMERS_VIRT_BASE + TMR_CCR); - /* set timer 0 to periodic mode, and timer 1 to free-running mode */ - __raw_writel(0x2, TIMERS_VIRT_BASE + TMR_CMR); + /* free-running mode */ + __raw_writel(cmr | 0x01, TIMERS_VIRT_BASE + TMR_CMR); - __raw_writel(0x1, TIMERS_VIRT_BASE + TMR_PLCR(0)); /* periodic */ + __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_PLCR(0)); /* free-running */ __raw_writel(0x7, TIMERS_VIRT_BASE + TMR_ICR(0)); /* clear status */ __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(0)); - __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_PLCR(1)); /* free-running */ - __raw_writel(0x7, TIMERS_VIRT_BASE + TMR_ICR(1)); /* clear status */ - __raw_writel(0x0, TIMERS_VIRT_BASE + TMR_IER(1)); - - /* enable timer 1 counter */ - __raw_writel(0x2, TIMERS_VIRT_BASE + TMR_CER); + /* enable timer counter */ + __raw_writel(cer | 0x01, TIMERS_VIRT_BASE + TMR_CER); } static struct irqaction timer_irq = { diff --git a/trunk/arch/arm/mach-msm/Kconfig b/trunk/arch/arm/mach-msm/Kconfig index ebde97f5d5f0..888e92502e15 100644 --- a/trunk/arch/arm/mach-msm/Kconfig +++ b/trunk/arch/arm/mach-msm/Kconfig @@ -11,7 +11,6 @@ config ARCH_MSM7X00A select MSM_SMD select MSM_SMD_PKG3 select CPU_V6 - select GPIO_MSM_V1 select MSM_PROC_COMM select HAS_MSM_DEBUG_UART_PHYS @@ -23,7 +22,6 @@ config ARCH_MSM7X30 select MSM_VIC select CPU_V7 select MSM_GPIOMUX - select GPIO_MSM_V1 select MSM_PROC_COMM select HAS_MSM_DEBUG_UART_PHYS @@ -35,7 +33,6 @@ config ARCH_QSD8X50 select MSM_VIC select CPU_V7 select MSM_GPIOMUX - select GPIO_MSM_V1 select MSM_PROC_COMM select HAS_MSM_DEBUG_UART_PHYS @@ -47,7 +44,6 @@ config ARCH_MSM8X60 select ARM_GIC select CPU_V7 select MSM_V2_TLMM - select GPIO_MSM_V2 select MSM_GPIOMUX select MSM_SCM if SMP diff --git a/trunk/arch/arm/mach-msm/Makefile b/trunk/arch/arm/mach-msm/Makefile index 4285dfd80b6f..b70658c5ae00 100644 --- a/trunk/arch/arm/mach-msm/Makefile +++ b/trunk/arch/arm/mach-msm/Makefile @@ -29,3 +29,11 @@ obj-$(CONFIG_ARCH_MSM8960) += board-msm8960.o devices-msm8960.o obj-$(CONFIG_ARCH_MSM7X30) += gpiomux-v1.o gpiomux.o obj-$(CONFIG_ARCH_QSD8X50) += gpiomux-8x50.o gpiomux-v1.o gpiomux.o obj-$(CONFIG_ARCH_MSM8X60) += gpiomux-8x60.o gpiomux-v2.o gpiomux.o +ifdef CONFIG_MSM_V2_TLMM +ifndef CONFIG_ARCH_MSM8960 +# TODO: TLMM Mapping issues need to be resolved +obj-y += gpio-v2.o +endif +else +obj-y += gpio.o +endif diff --git a/trunk/drivers/gpio/gpio-msm-v2.c b/trunk/arch/arm/mach-msm/gpio-v2.c similarity index 99% rename from trunk/drivers/gpio/gpio-msm-v2.c rename to trunk/arch/arm/mach-msm/gpio-v2.c index 5cb1227d69cf..cc9c4fd7cccc 100644 --- a/trunk/drivers/gpio/gpio-msm-v2.c +++ b/trunk/arch/arm/mach-msm/gpio-v2.c @@ -1,4 +1,4 @@ -/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved. +/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and @@ -30,8 +30,8 @@ #include -#include #include +#include "gpiomux.h" /* Bits of interest in the GPIO_IN_OUT register. */ diff --git a/trunk/arch/arm/mach-msm/gpio.c b/trunk/arch/arm/mach-msm/gpio.c new file mode 100644 index 000000000000..5ea273b00da8 --- /dev/null +++ b/trunk/arch/arm/mach-msm/gpio.c @@ -0,0 +1,376 @@ +/* linux/arch/arm/mach-msm/gpio.c + * + * Copyright (C) 2007 Google, Inc. + * Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include +#include +#include "gpio_hw.h" +#include "gpiomux.h" + +#define FIRST_GPIO_IRQ MSM_GPIO_TO_INT(0) + +#define MSM_GPIO_BANK(bank, first, last) \ + { \ + .regs = { \ + .out = MSM_GPIO_OUT_##bank, \ + .in = MSM_GPIO_IN_##bank, \ + .int_status = MSM_GPIO_INT_STATUS_##bank, \ + .int_clear = MSM_GPIO_INT_CLEAR_##bank, \ + .int_en = MSM_GPIO_INT_EN_##bank, \ + .int_edge = MSM_GPIO_INT_EDGE_##bank, \ + .int_pos = MSM_GPIO_INT_POS_##bank, \ + .oe = MSM_GPIO_OE_##bank, \ + }, \ + .chip = { \ + .base = (first), \ + .ngpio = (last) - (first) + 1, \ + .get = msm_gpio_get, \ + .set = msm_gpio_set, \ + .direction_input = msm_gpio_direction_input, \ + .direction_output = msm_gpio_direction_output, \ + .to_irq = msm_gpio_to_irq, \ + .request = msm_gpio_request, \ + .free = msm_gpio_free, \ + } \ + } + +#define MSM_GPIO_BROKEN_INT_CLEAR 1 + +struct msm_gpio_regs { + void __iomem *out; + void __iomem *in; + void __iomem *int_status; + void __iomem *int_clear; + void __iomem *int_en; + void __iomem *int_edge; + void __iomem *int_pos; + void __iomem *oe; +}; + +struct msm_gpio_chip { + spinlock_t lock; + struct gpio_chip chip; + struct msm_gpio_regs regs; +#if MSM_GPIO_BROKEN_INT_CLEAR + unsigned int_status_copy; +#endif + unsigned int both_edge_detect; + unsigned int int_enable[2]; /* 0: awake, 1: sleep */ +}; + +static int msm_gpio_write(struct msm_gpio_chip *msm_chip, + unsigned offset, unsigned on) +{ + unsigned mask = BIT(offset); + unsigned val; + + val = readl(msm_chip->regs.out); + if (on) + writel(val | mask, msm_chip->regs.out); + else + writel(val & ~mask, msm_chip->regs.out); + return 0; +} + +static void msm_gpio_update_both_edge_detect(struct msm_gpio_chip *msm_chip) +{ + int loop_limit = 100; + unsigned pol, val, val2, intstat; + do { + val = readl(msm_chip->regs.in); + pol = readl(msm_chip->regs.int_pos); + pol = (pol & ~msm_chip->both_edge_detect) | + (~val & msm_chip->both_edge_detect); + writel(pol, msm_chip->regs.int_pos); + intstat = readl(msm_chip->regs.int_status); + val2 = readl(msm_chip->regs.in); + if (((val ^ val2) & msm_chip->both_edge_detect & ~intstat) == 0) + return; + } while (loop_limit-- > 0); + printk(KERN_ERR "msm_gpio_update_both_edge_detect, " + "failed to reach stable state %x != %x\n", val, val2); +} + +static int msm_gpio_clear_detect_status(struct msm_gpio_chip *msm_chip, + unsigned offset) +{ + unsigned bit = BIT(offset); + +#if MSM_GPIO_BROKEN_INT_CLEAR + /* Save interrupts that already triggered before we loose them. */ + /* Any interrupt that triggers between the read of int_status */ + /* and the write to int_clear will still be lost though. */ + msm_chip->int_status_copy |= readl(msm_chip->regs.int_status); + msm_chip->int_status_copy &= ~bit; +#endif + writel(bit, msm_chip->regs.int_clear); + msm_gpio_update_both_edge_detect(msm_chip); + return 0; +} + +static int msm_gpio_direction_input(struct gpio_chip *chip, unsigned offset) +{ + struct msm_gpio_chip *msm_chip; + unsigned long irq_flags; + + msm_chip = container_of(chip, struct msm_gpio_chip, chip); + spin_lock_irqsave(&msm_chip->lock, irq_flags); + writel(readl(msm_chip->regs.oe) & ~BIT(offset), msm_chip->regs.oe); + spin_unlock_irqrestore(&msm_chip->lock, irq_flags); + return 0; +} + +static int +msm_gpio_direction_output(struct gpio_chip *chip, unsigned offset, int value) +{ + struct msm_gpio_chip *msm_chip; + unsigned long irq_flags; + + msm_chip = container_of(chip, struct msm_gpio_chip, chip); + spin_lock_irqsave(&msm_chip->lock, irq_flags); + msm_gpio_write(msm_chip, offset, value); + writel(readl(msm_chip->regs.oe) | BIT(offset), msm_chip->regs.oe); + spin_unlock_irqrestore(&msm_chip->lock, irq_flags); + return 0; +} + +static int msm_gpio_get(struct gpio_chip *chip, unsigned offset) +{ + struct msm_gpio_chip *msm_chip; + + msm_chip = container_of(chip, struct msm_gpio_chip, chip); + return (readl(msm_chip->regs.in) & (1U << offset)) ? 1 : 0; +} + +static void msm_gpio_set(struct gpio_chip *chip, unsigned offset, int value) +{ + struct msm_gpio_chip *msm_chip; + unsigned long irq_flags; + + msm_chip = container_of(chip, struct msm_gpio_chip, chip); + spin_lock_irqsave(&msm_chip->lock, irq_flags); + msm_gpio_write(msm_chip, offset, value); + spin_unlock_irqrestore(&msm_chip->lock, irq_flags); +} + +static int msm_gpio_to_irq(struct gpio_chip *chip, unsigned offset) +{ + return MSM_GPIO_TO_INT(chip->base + offset); +} + +#ifdef CONFIG_MSM_GPIOMUX +static int msm_gpio_request(struct gpio_chip *chip, unsigned offset) +{ + return msm_gpiomux_get(chip->base + offset); +} + +static void msm_gpio_free(struct gpio_chip *chip, unsigned offset) +{ + msm_gpiomux_put(chip->base + offset); +} +#else +#define msm_gpio_request NULL +#define msm_gpio_free NULL +#endif + +struct msm_gpio_chip msm_gpio_chips[] = { +#if defined(CONFIG_ARCH_MSM7X00A) + MSM_GPIO_BANK(0, 0, 15), + MSM_GPIO_BANK(1, 16, 42), + MSM_GPIO_BANK(2, 43, 67), + MSM_GPIO_BANK(3, 68, 94), + MSM_GPIO_BANK(4, 95, 106), + MSM_GPIO_BANK(5, 107, 121), +#elif defined(CONFIG_ARCH_MSM7X25) || defined(CONFIG_ARCH_MSM7X27) + MSM_GPIO_BANK(0, 0, 15), + MSM_GPIO_BANK(1, 16, 42), + MSM_GPIO_BANK(2, 43, 67), + MSM_GPIO_BANK(3, 68, 94), + MSM_GPIO_BANK(4, 95, 106), + MSM_GPIO_BANK(5, 107, 132), +#elif defined(CONFIG_ARCH_MSM7X30) + MSM_GPIO_BANK(0, 0, 15), + MSM_GPIO_BANK(1, 16, 43), + MSM_GPIO_BANK(2, 44, 67), + MSM_GPIO_BANK(3, 68, 94), + MSM_GPIO_BANK(4, 95, 106), + MSM_GPIO_BANK(5, 107, 133), + MSM_GPIO_BANK(6, 134, 150), + MSM_GPIO_BANK(7, 151, 181), +#elif defined(CONFIG_ARCH_QSD8X50) + MSM_GPIO_BANK(0, 0, 15), + MSM_GPIO_BANK(1, 16, 42), + MSM_GPIO_BANK(2, 43, 67), + MSM_GPIO_BANK(3, 68, 94), + MSM_GPIO_BANK(4, 95, 103), + MSM_GPIO_BANK(5, 104, 121), + MSM_GPIO_BANK(6, 122, 152), + MSM_GPIO_BANK(7, 153, 164), +#endif +}; + +static void msm_gpio_irq_ack(struct irq_data *d) +{ + unsigned long irq_flags; + struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); + spin_lock_irqsave(&msm_chip->lock, irq_flags); + msm_gpio_clear_detect_status(msm_chip, + d->irq - gpio_to_irq(msm_chip->chip.base)); + spin_unlock_irqrestore(&msm_chip->lock, irq_flags); +} + +static void msm_gpio_irq_mask(struct irq_data *d) +{ + unsigned long irq_flags; + struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); + unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base); + + spin_lock_irqsave(&msm_chip->lock, irq_flags); + /* level triggered interrupts are also latched */ + if (!(readl(msm_chip->regs.int_edge) & BIT(offset))) + msm_gpio_clear_detect_status(msm_chip, offset); + msm_chip->int_enable[0] &= ~BIT(offset); + writel(msm_chip->int_enable[0], msm_chip->regs.int_en); + spin_unlock_irqrestore(&msm_chip->lock, irq_flags); +} + +static void msm_gpio_irq_unmask(struct irq_data *d) +{ + unsigned long irq_flags; + struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); + unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base); + + spin_lock_irqsave(&msm_chip->lock, irq_flags); + /* level triggered interrupts are also latched */ + if (!(readl(msm_chip->regs.int_edge) & BIT(offset))) + msm_gpio_clear_detect_status(msm_chip, offset); + msm_chip->int_enable[0] |= BIT(offset); + writel(msm_chip->int_enable[0], msm_chip->regs.int_en); + spin_unlock_irqrestore(&msm_chip->lock, irq_flags); +} + +static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) +{ + unsigned long irq_flags; + struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); + unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base); + + spin_lock_irqsave(&msm_chip->lock, irq_flags); + + if (on) + msm_chip->int_enable[1] |= BIT(offset); + else + msm_chip->int_enable[1] &= ~BIT(offset); + + spin_unlock_irqrestore(&msm_chip->lock, irq_flags); + return 0; +} + +static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) +{ + unsigned long irq_flags; + struct msm_gpio_chip *msm_chip = irq_data_get_irq_chip_data(d); + unsigned offset = d->irq - gpio_to_irq(msm_chip->chip.base); + unsigned val, mask = BIT(offset); + + spin_lock_irqsave(&msm_chip->lock, irq_flags); + val = readl(msm_chip->regs.int_edge); + if (flow_type & IRQ_TYPE_EDGE_BOTH) { + writel(val | mask, msm_chip->regs.int_edge); + __irq_set_handler_locked(d->irq, handle_edge_irq); + } else { + writel(val & ~mask, msm_chip->regs.int_edge); + __irq_set_handler_locked(d->irq, handle_level_irq); + } + if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { + msm_chip->both_edge_detect |= mask; + msm_gpio_update_both_edge_detect(msm_chip); + } else { + msm_chip->both_edge_detect &= ~mask; + val = readl(msm_chip->regs.int_pos); + if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_HIGH)) + writel(val | mask, msm_chip->regs.int_pos); + else + writel(val & ~mask, msm_chip->regs.int_pos); + } + spin_unlock_irqrestore(&msm_chip->lock, irq_flags); + return 0; +} + +static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) +{ + int i, j, mask; + unsigned val; + + for (i = 0; i < ARRAY_SIZE(msm_gpio_chips); i++) { + struct msm_gpio_chip *msm_chip = &msm_gpio_chips[i]; + val = readl(msm_chip->regs.int_status); + val &= msm_chip->int_enable[0]; + while (val) { + mask = val & -val; + j = fls(mask) - 1; + /* printk("%s %08x %08x bit %d gpio %d irq %d\n", + __func__, v, m, j, msm_chip->chip.start + j, + FIRST_GPIO_IRQ + msm_chip->chip.start + j); */ + val &= ~mask; + generic_handle_irq(FIRST_GPIO_IRQ + + msm_chip->chip.base + j); + } + } + desc->irq_data.chip->irq_ack(&desc->irq_data); +} + +static struct irq_chip msm_gpio_irq_chip = { + .name = "msmgpio", + .irq_ack = msm_gpio_irq_ack, + .irq_mask = msm_gpio_irq_mask, + .irq_unmask = msm_gpio_irq_unmask, + .irq_set_wake = msm_gpio_irq_set_wake, + .irq_set_type = msm_gpio_irq_set_type, +}; + +static int __init msm_init_gpio(void) +{ + int i, j = 0; + + for (i = FIRST_GPIO_IRQ; i < FIRST_GPIO_IRQ + NR_GPIO_IRQS; i++) { + if (i - FIRST_GPIO_IRQ >= + msm_gpio_chips[j].chip.base + + msm_gpio_chips[j].chip.ngpio) + j++; + irq_set_chip_data(i, &msm_gpio_chips[j]); + irq_set_chip_and_handler(i, &msm_gpio_irq_chip, + handle_edge_irq); + set_irq_flags(i, IRQF_VALID); + } + + for (i = 0; i < ARRAY_SIZE(msm_gpio_chips); i++) { + spin_lock_init(&msm_gpio_chips[i].lock); + writel(0, msm_gpio_chips[i].regs.int_en); + gpiochip_add(&msm_gpio_chips[i].chip); + } + + irq_set_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler); + irq_set_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler); + irq_set_irq_wake(INT_GPIO_GROUP1, 1); + irq_set_irq_wake(INT_GPIO_GROUP2, 2); + return 0; +} + +postcore_initcall(msm_init_gpio); diff --git a/trunk/arch/arm/mach-msm/gpio_hw.h b/trunk/arch/arm/mach-msm/gpio_hw.h new file mode 100644 index 000000000000..6b5066038baa --- /dev/null +++ b/trunk/arch/arm/mach-msm/gpio_hw.h @@ -0,0 +1,278 @@ +/* arch/arm/mach-msm/gpio_hw.h + * + * Copyright (C) 2007 Google, Inc. + * Author: Brian Swetland + * Copyright (c) 2008-2010, Code Aurora Forum. All rights reserved. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __ARCH_ARM_MACH_MSM_GPIO_HW_H +#define __ARCH_ARM_MACH_MSM_GPIO_HW_H + +#include + +/* see 80-VA736-2 Rev C pp 695-751 +** +** These are actually the *shadow* gpio registers, since the +** real ones (which allow full access) are only available to the +** ARM9 side of the world. +** +** Since the _BASE need to be page-aligned when we're mapping them +** to virtual addresses, adjust for the additional offset in these +** macros. +*/ + +#if defined(CONFIG_ARCH_MSM7X30) +#define MSM_GPIO1_REG(off) (MSM_GPIO1_BASE + (off)) +#define MSM_GPIO2_REG(off) (MSM_GPIO2_BASE + 0x400 + (off)) +#else +#define MSM_GPIO1_REG(off) (MSM_GPIO1_BASE + 0x800 + (off)) +#define MSM_GPIO2_REG(off) (MSM_GPIO2_BASE + 0xC00 + (off)) +#endif + +#if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_MSM7X25) ||\ + defined(CONFIG_ARCH_MSM7X27) + +/* output value */ +#define MSM_GPIO_OUT_0 MSM_GPIO1_REG(0x00) /* gpio 15-0 */ +#define MSM_GPIO_OUT_1 MSM_GPIO2_REG(0x00) /* gpio 42-16 */ +#define MSM_GPIO_OUT_2 MSM_GPIO1_REG(0x04) /* gpio 67-43 */ +#define MSM_GPIO_OUT_3 MSM_GPIO1_REG(0x08) /* gpio 94-68 */ +#define MSM_GPIO_OUT_4 MSM_GPIO1_REG(0x0C) /* gpio 106-95 */ +#define MSM_GPIO_OUT_5 MSM_GPIO1_REG(0x50) /* gpio 107-121 */ + +/* same pin map as above, output enable */ +#define MSM_GPIO_OE_0 MSM_GPIO1_REG(0x10) +#define MSM_GPIO_OE_1 MSM_GPIO2_REG(0x08) +#define MSM_GPIO_OE_2 MSM_GPIO1_REG(0x14) +#define MSM_GPIO_OE_3 MSM_GPIO1_REG(0x18) +#define MSM_GPIO_OE_4 MSM_GPIO1_REG(0x1C) +#define MSM_GPIO_OE_5 MSM_GPIO1_REG(0x54) + +/* same pin map as above, input read */ +#define MSM_GPIO_IN_0 MSM_GPIO1_REG(0x34) +#define MSM_GPIO_IN_1 MSM_GPIO2_REG(0x20) +#define MSM_GPIO_IN_2 MSM_GPIO1_REG(0x38) +#define MSM_GPIO_IN_3 MSM_GPIO1_REG(0x3C) +#define MSM_GPIO_IN_4 MSM_GPIO1_REG(0x40) +#define MSM_GPIO_IN_5 MSM_GPIO1_REG(0x44) + +/* same pin map as above, 1=edge 0=level interrup */ +#define MSM_GPIO_INT_EDGE_0 MSM_GPIO1_REG(0x60) +#define MSM_GPIO_INT_EDGE_1 MSM_GPIO2_REG(0x50) +#define MSM_GPIO_INT_EDGE_2 MSM_GPIO1_REG(0x64) +#define MSM_GPIO_INT_EDGE_3 MSM_GPIO1_REG(0x68) +#define MSM_GPIO_INT_EDGE_4 MSM_GPIO1_REG(0x6C) +#define MSM_GPIO_INT_EDGE_5 MSM_GPIO1_REG(0xC0) + +/* same pin map as above, 1=positive 0=negative */ +#define MSM_GPIO_INT_POS_0 MSM_GPIO1_REG(0x70) +#define MSM_GPIO_INT_POS_1 MSM_GPIO2_REG(0x58) +#define MSM_GPIO_INT_POS_2 MSM_GPIO1_REG(0x74) +#define MSM_GPIO_INT_POS_3 MSM_GPIO1_REG(0x78) +#define MSM_GPIO_INT_POS_4 MSM_GPIO1_REG(0x7C) +#define MSM_GPIO_INT_POS_5 MSM_GPIO1_REG(0xBC) + +/* same pin map as above, interrupt enable */ +#define MSM_GPIO_INT_EN_0 MSM_GPIO1_REG(0x80) +#define MSM_GPIO_INT_EN_1 MSM_GPIO2_REG(0x60) +#define MSM_GPIO_INT_EN_2 MSM_GPIO1_REG(0x84) +#define MSM_GPIO_INT_EN_3 MSM_GPIO1_REG(0x88) +#define MSM_GPIO_INT_EN_4 MSM_GPIO1_REG(0x8C) +#define MSM_GPIO_INT_EN_5 MSM_GPIO1_REG(0xB8) + +/* same pin map as above, write 1 to clear interrupt */ +#define MSM_GPIO_INT_CLEAR_0 MSM_GPIO1_REG(0x90) +#define MSM_GPIO_INT_CLEAR_1 MSM_GPIO2_REG(0x68) +#define MSM_GPIO_INT_CLEAR_2 MSM_GPIO1_REG(0x94) +#define MSM_GPIO_INT_CLEAR_3 MSM_GPIO1_REG(0x98) +#define MSM_GPIO_INT_CLEAR_4 MSM_GPIO1_REG(0x9C) +#define MSM_GPIO_INT_CLEAR_5 MSM_GPIO1_REG(0xB4) + +/* same pin map as above, 1=interrupt pending */ +#define MSM_GPIO_INT_STATUS_0 MSM_GPIO1_REG(0xA0) +#define MSM_GPIO_INT_STATUS_1 MSM_GPIO2_REG(0x70) +#define MSM_GPIO_INT_STATUS_2 MSM_GPIO1_REG(0xA4) +#define MSM_GPIO_INT_STATUS_3 MSM_GPIO1_REG(0xA8) +#define MSM_GPIO_INT_STATUS_4 MSM_GPIO1_REG(0xAC) +#define MSM_GPIO_INT_STATUS_5 MSM_GPIO1_REG(0xB0) + +#endif + +#if defined(CONFIG_ARCH_QSD8X50) +/* output value */ +#define MSM_GPIO_OUT_0 MSM_GPIO1_REG(0x00) /* gpio 15-0 */ +#define MSM_GPIO_OUT_1 MSM_GPIO2_REG(0x00) /* gpio 42-16 */ +#define MSM_GPIO_OUT_2 MSM_GPIO1_REG(0x04) /* gpio 67-43 */ +#define MSM_GPIO_OUT_3 MSM_GPIO1_REG(0x08) /* gpio 94-68 */ +#define MSM_GPIO_OUT_4 MSM_GPIO1_REG(0x0C) /* gpio 103-95 */ +#define MSM_GPIO_OUT_5 MSM_GPIO1_REG(0x10) /* gpio 121-104 */ +#define MSM_GPIO_OUT_6 MSM_GPIO1_REG(0x14) /* gpio 152-122 */ +#define MSM_GPIO_OUT_7 MSM_GPIO1_REG(0x18) /* gpio 164-153 */ + +/* same pin map as above, output enable */ +#define MSM_GPIO_OE_0 MSM_GPIO1_REG(0x20) +#define MSM_GPIO_OE_1 MSM_GPIO2_REG(0x08) +#define MSM_GPIO_OE_2 MSM_GPIO1_REG(0x24) +#define MSM_GPIO_OE_3 MSM_GPIO1_REG(0x28) +#define MSM_GPIO_OE_4 MSM_GPIO1_REG(0x2C) +#define MSM_GPIO_OE_5 MSM_GPIO1_REG(0x30) +#define MSM_GPIO_OE_6 MSM_GPIO1_REG(0x34) +#define MSM_GPIO_OE_7 MSM_GPIO1_REG(0x38) + +/* same pin map as above, input read */ +#define MSM_GPIO_IN_0 MSM_GPIO1_REG(0x50) +#define MSM_GPIO_IN_1 MSM_GPIO2_REG(0x20) +#define MSM_GPIO_IN_2 MSM_GPIO1_REG(0x54) +#define MSM_GPIO_IN_3 MSM_GPIO1_REG(0x58) +#define MSM_GPIO_IN_4 MSM_GPIO1_REG(0x5C) +#define MSM_GPIO_IN_5 MSM_GPIO1_REG(0x60) +#define MSM_GPIO_IN_6 MSM_GPIO1_REG(0x64) +#define MSM_GPIO_IN_7 MSM_GPIO1_REG(0x68) + +/* same pin map as above, 1=edge 0=level interrup */ +#define MSM_GPIO_INT_EDGE_0 MSM_GPIO1_REG(0x70) +#define MSM_GPIO_INT_EDGE_1 MSM_GPIO2_REG(0x50) +#define MSM_GPIO_INT_EDGE_2 MSM_GPIO1_REG(0x74) +#define MSM_GPIO_INT_EDGE_3 MSM_GPIO1_REG(0x78) +#define MSM_GPIO_INT_EDGE_4 MSM_GPIO1_REG(0x7C) +#define MSM_GPIO_INT_EDGE_5 MSM_GPIO1_REG(0x80) +#define MSM_GPIO_INT_EDGE_6 MSM_GPIO1_REG(0x84) +#define MSM_GPIO_INT_EDGE_7 MSM_GPIO1_REG(0x88) + +/* same pin map as above, 1=positive 0=negative */ +#define MSM_GPIO_INT_POS_0 MSM_GPIO1_REG(0x90) +#define MSM_GPIO_INT_POS_1 MSM_GPIO2_REG(0x58) +#define MSM_GPIO_INT_POS_2 MSM_GPIO1_REG(0x94) +#define MSM_GPIO_INT_POS_3 MSM_GPIO1_REG(0x98) +#define MSM_GPIO_INT_POS_4 MSM_GPIO1_REG(0x9C) +#define MSM_GPIO_INT_POS_5 MSM_GPIO1_REG(0xA0) +#define MSM_GPIO_INT_POS_6 MSM_GPIO1_REG(0xA4) +#define MSM_GPIO_INT_POS_7 MSM_GPIO1_REG(0xA8) + +/* same pin map as above, interrupt enable */ +#define MSM_GPIO_INT_EN_0 MSM_GPIO1_REG(0xB0) +#define MSM_GPIO_INT_EN_1 MSM_GPIO2_REG(0x60) +#define MSM_GPIO_INT_EN_2 MSM_GPIO1_REG(0xB4) +#define MSM_GPIO_INT_EN_3 MSM_GPIO1_REG(0xB8) +#define MSM_GPIO_INT_EN_4 MSM_GPIO1_REG(0xBC) +#define MSM_GPIO_INT_EN_5 MSM_GPIO1_REG(0xC0) +#define MSM_GPIO_INT_EN_6 MSM_GPIO1_REG(0xC4) +#define MSM_GPIO_INT_EN_7 MSM_GPIO1_REG(0xC8) + +/* same pin map as above, write 1 to clear interrupt */ +#define MSM_GPIO_INT_CLEAR_0 MSM_GPIO1_REG(0xD0) +#define MSM_GPIO_INT_CLEAR_1 MSM_GPIO2_REG(0x68) +#define MSM_GPIO_INT_CLEAR_2 MSM_GPIO1_REG(0xD4) +#define MSM_GPIO_INT_CLEAR_3 MSM_GPIO1_REG(0xD8) +#define MSM_GPIO_INT_CLEAR_4 MSM_GPIO1_REG(0xDC) +#define MSM_GPIO_INT_CLEAR_5 MSM_GPIO1_REG(0xE0) +#define MSM_GPIO_INT_CLEAR_6 MSM_GPIO1_REG(0xE4) +#define MSM_GPIO_INT_CLEAR_7 MSM_GPIO1_REG(0xE8) + +/* same pin map as above, 1=interrupt pending */ +#define MSM_GPIO_INT_STATUS_0 MSM_GPIO1_REG(0xF0) +#define MSM_GPIO_INT_STATUS_1 MSM_GPIO2_REG(0x70) +#define MSM_GPIO_INT_STATUS_2 MSM_GPIO1_REG(0xF4) +#define MSM_GPIO_INT_STATUS_3 MSM_GPIO1_REG(0xF8) +#define MSM_GPIO_INT_STATUS_4 MSM_GPIO1_REG(0xFC) +#define MSM_GPIO_INT_STATUS_5 MSM_GPIO1_REG(0x100) +#define MSM_GPIO_INT_STATUS_6 MSM_GPIO1_REG(0x104) +#define MSM_GPIO_INT_STATUS_7 MSM_GPIO1_REG(0x108) + +#endif + +#if defined(CONFIG_ARCH_MSM7X30) + +/* output value */ +#define MSM_GPIO_OUT_0 MSM_GPIO1_REG(0x00) /* gpio 15-0 */ +#define MSM_GPIO_OUT_1 MSM_GPIO2_REG(0x00) /* gpio 43-16 */ +#define MSM_GPIO_OUT_2 MSM_GPIO1_REG(0x04) /* gpio 67-44 */ +#define MSM_GPIO_OUT_3 MSM_GPIO1_REG(0x08) /* gpio 94-68 */ +#define MSM_GPIO_OUT_4 MSM_GPIO1_REG(0x0C) /* gpio 106-95 */ +#define MSM_GPIO_OUT_5 MSM_GPIO1_REG(0x50) /* gpio 133-107 */ +#define MSM_GPIO_OUT_6 MSM_GPIO1_REG(0xC4) /* gpio 150-134 */ +#define MSM_GPIO_OUT_7 MSM_GPIO1_REG(0x214) /* gpio 181-151 */ + +/* same pin map as above, output enable */ +#define MSM_GPIO_OE_0 MSM_GPIO1_REG(0x10) +#define MSM_GPIO_OE_1 MSM_GPIO2_REG(0x08) +#define MSM_GPIO_OE_2 MSM_GPIO1_REG(0x14) +#define MSM_GPIO_OE_3 MSM_GPIO1_REG(0x18) +#define MSM_GPIO_OE_4 MSM_GPIO1_REG(0x1C) +#define MSM_GPIO_OE_5 MSM_GPIO1_REG(0x54) +#define MSM_GPIO_OE_6 MSM_GPIO1_REG(0xC8) +#define MSM_GPIO_OE_7 MSM_GPIO1_REG(0x218) + +/* same pin map as above, input read */ +#define MSM_GPIO_IN_0 MSM_GPIO1_REG(0x34) +#define MSM_GPIO_IN_1 MSM_GPIO2_REG(0x20) +#define MSM_GPIO_IN_2 MSM_GPIO1_REG(0x38) +#define MSM_GPIO_IN_3 MSM_GPIO1_REG(0x3C) +#define MSM_GPIO_IN_4 MSM_GPIO1_REG(0x40) +#define MSM_GPIO_IN_5 MSM_GPIO1_REG(0x44) +#define MSM_GPIO_IN_6 MSM_GPIO1_REG(0xCC) +#define MSM_GPIO_IN_7 MSM_GPIO1_REG(0x21C) + +/* same pin map as above, 1=edge 0=level interrup */ +#define MSM_GPIO_INT_EDGE_0 MSM_GPIO1_REG(0x60) +#define MSM_GPIO_INT_EDGE_1 MSM_GPIO2_REG(0x50) +#define MSM_GPIO_INT_EDGE_2 MSM_GPIO1_REG(0x64) +#define MSM_GPIO_INT_EDGE_3 MSM_GPIO1_REG(0x68) +#define MSM_GPIO_INT_EDGE_4 MSM_GPIO1_REG(0x6C) +#define MSM_GPIO_INT_EDGE_5 MSM_GPIO1_REG(0xC0) +#define MSM_GPIO_INT_EDGE_6 MSM_GPIO1_REG(0xD0) +#define MSM_GPIO_INT_EDGE_7 MSM_GPIO1_REG(0x240) + +/* same pin map as above, 1=positive 0=negative */ +#define MSM_GPIO_INT_POS_0 MSM_GPIO1_REG(0x70) +#define MSM_GPIO_INT_POS_1 MSM_GPIO2_REG(0x58) +#define MSM_GPIO_INT_POS_2 MSM_GPIO1_REG(0x74) +#define MSM_GPIO_INT_POS_3 MSM_GPIO1_REG(0x78) +#define MSM_GPIO_INT_POS_4 MSM_GPIO1_REG(0x7C) +#define MSM_GPIO_INT_POS_5 MSM_GPIO1_REG(0xBC) +#define MSM_GPIO_INT_POS_6 MSM_GPIO1_REG(0xD4) +#define MSM_GPIO_INT_POS_7 MSM_GPIO1_REG(0x228) + +/* same pin map as above, interrupt enable */ +#define MSM_GPIO_INT_EN_0 MSM_GPIO1_REG(0x80) +#define MSM_GPIO_INT_EN_1 MSM_GPIO2_REG(0x60) +#define MSM_GPIO_INT_EN_2 MSM_GPIO1_REG(0x84) +#define MSM_GPIO_INT_EN_3 MSM_GPIO1_REG(0x88) +#define MSM_GPIO_INT_EN_4 MSM_GPIO1_REG(0x8C) +#define MSM_GPIO_INT_EN_5 MSM_GPIO1_REG(0xB8) +#define MSM_GPIO_INT_EN_6 MSM_GPIO1_REG(0xD8) +#define MSM_GPIO_INT_EN_7 MSM_GPIO1_REG(0x22C) + +/* same pin map as above, write 1 to clear interrupt */ +#define MSM_GPIO_INT_CLEAR_0 MSM_GPIO1_REG(0x90) +#define MSM_GPIO_INT_CLEAR_1 MSM_GPIO2_REG(0x68) +#define MSM_GPIO_INT_CLEAR_2 MSM_GPIO1_REG(0x94) +#define MSM_GPIO_INT_CLEAR_3 MSM_GPIO1_REG(0x98) +#define MSM_GPIO_INT_CLEAR_4 MSM_GPIO1_REG(0x9C) +#define MSM_GPIO_INT_CLEAR_5 MSM_GPIO1_REG(0xB4) +#define MSM_GPIO_INT_CLEAR_6 MSM_GPIO1_REG(0xDC) +#define MSM_GPIO_INT_CLEAR_7 MSM_GPIO1_REG(0x230) + +/* same pin map as above, 1=interrupt pending */ +#define MSM_GPIO_INT_STATUS_0 MSM_GPIO1_REG(0xA0) +#define MSM_GPIO_INT_STATUS_1 MSM_GPIO2_REG(0x70) +#define MSM_GPIO_INT_STATUS_2 MSM_GPIO1_REG(0xA4) +#define MSM_GPIO_INT_STATUS_3 MSM_GPIO1_REG(0xA8) +#define MSM_GPIO_INT_STATUS_4 MSM_GPIO1_REG(0xAC) +#define MSM_GPIO_INT_STATUS_5 MSM_GPIO1_REG(0xB0) +#define MSM_GPIO_INT_STATUS_6 MSM_GPIO1_REG(0xE0) +#define MSM_GPIO_INT_STATUS_7 MSM_GPIO1_REG(0x234) + +#endif + +#endif diff --git a/trunk/arch/arm/mach-msm/gpiomux.h b/trunk/arch/arm/mach-msm/gpiomux.h index 00459f6ee13c..b178d9cb742f 100644 --- a/trunk/arch/arm/mach-msm/gpiomux.h +++ b/trunk/arch/arm/mach-msm/gpiomux.h @@ -19,7 +19,6 @@ #include #include -#include #if defined(CONFIG_MSM_V2_TLMM) #include "gpiomux-v2.h" @@ -72,6 +71,12 @@ enum { */ extern struct msm_gpiomux_config msm_gpiomux_configs[GPIOMUX_NGPIOS]; +/* Increment a gpio's reference count, possibly activating the line. */ +int __must_check msm_gpiomux_get(unsigned gpio); + +/* Decrement a gpio's reference count, possibly suspending the line. */ +int msm_gpiomux_put(unsigned gpio); + /* Install a new configuration to the gpio line. To avoid overwriting * a configuration, leave the VALID bit out. */ @@ -89,6 +94,16 @@ int msm_gpiomux_write(unsigned gpio, */ void __msm_gpiomux_write(unsigned gpio, gpiomux_config_t val); #else +static inline int __must_check msm_gpiomux_get(unsigned gpio) +{ + return -ENOSYS; +} + +static inline int msm_gpiomux_put(unsigned gpio) +{ + return -ENOSYS; +} + static inline int msm_gpiomux_write(unsigned gpio, gpiomux_config_t active, gpiomux_config_t suspended) diff --git a/trunk/arch/arm/mach-msm/include/mach/msm_gpiomux.h b/trunk/arch/arm/mach-msm/include/mach/msm_gpiomux.h deleted file mode 100644 index 0c7d3936e02f..000000000000 --- a/trunk/arch/arm/mach-msm/include/mach/msm_gpiomux.h +++ /dev/null @@ -1,38 +0,0 @@ -/* Copyright (c) 2011, Code Aurora Forum. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 and - * only version 2 as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef _LINUX_MSM_GPIOMUX_H -#define _LINUX_MSM_GPIOMUX_H - -#ifdef CONFIG_MSM_GPIOMUX - -/* Increment a gpio's reference count, possibly activating the line. */ -int __must_check msm_gpiomux_get(unsigned gpio); - -/* Decrement a gpio's reference count, possibly suspending the line. */ -int msm_gpiomux_put(unsigned gpio); - -#else - -static inline int __must_check msm_gpiomux_get(unsigned gpio) -{ - return -ENOSYS; -} - -static inline int msm_gpiomux_put(unsigned gpio) -{ - return -ENOSYS; -} - -#endif - -#endif /* _LINUX_MSM_GPIOMUX_H */ diff --git a/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h b/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h index 94fe9fe6feb3..8f99d97615a0 100644 --- a/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h +++ b/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x00.h @@ -55,11 +55,13 @@ #define MSM_DMOV_PHYS 0xA9700000 #define MSM_DMOV_SIZE SZ_4K -#define MSM7X00_GPIO1_PHYS 0xA9200000 -#define MSM7X00_GPIO1_SIZE SZ_4K +#define MSM_GPIO1_BASE IOMEM(0xE0003000) +#define MSM_GPIO1_PHYS 0xA9200000 +#define MSM_GPIO1_SIZE SZ_4K -#define MSM7X00_GPIO2_PHYS 0xA9300000 -#define MSM7X00_GPIO2_SIZE SZ_4K +#define MSM_GPIO2_BASE IOMEM(0xE0004000) +#define MSM_GPIO2_PHYS 0xA9300000 +#define MSM_GPIO2_SIZE SZ_4K #define MSM_CLK_CTL_BASE IOMEM(0xE0005000) #define MSM_CLK_CTL_PHYS 0xA8600000 diff --git a/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h b/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h index 37694442d1bd..4d84be15955e 100644 --- a/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h +++ b/trunk/arch/arm/mach-msm/include/mach/msm_iomap-7x30.h @@ -46,11 +46,13 @@ #define MSM_DMOV_PHYS 0xAC400000 #define MSM_DMOV_SIZE SZ_4K -#define MSM7X30_GPIO1_PHYS 0xAC001000 -#define MSM7X30_GPIO1_SIZE SZ_4K +#define MSM_GPIO1_BASE IOMEM(0xE0003000) +#define MSM_GPIO1_PHYS 0xAC001000 +#define MSM_GPIO1_SIZE SZ_4K -#define MSM7X30_GPIO2_PHYS 0xAC101000 -#define MSM7X30_GPIO2_SIZE SZ_4K +#define MSM_GPIO2_BASE IOMEM(0xE0004000) +#define MSM_GPIO2_PHYS 0xAC101000 +#define MSM_GPIO2_SIZE SZ_4K #define MSM_CLK_CTL_BASE IOMEM(0xE0005000) #define MSM_CLK_CTL_PHYS 0xAB800000 diff --git a/trunk/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h b/trunk/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h index d67cd73316f4..d4143201999f 100644 --- a/trunk/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h +++ b/trunk/arch/arm/mach-msm/include/mach/msm_iomap-8x50.h @@ -46,11 +46,13 @@ #define MSM_DMOV_PHYS 0xA9700000 #define MSM_DMOV_SIZE SZ_4K -#define QSD8X50_GPIO1_PHYS 0xA9000000 -#define QSD8X50_GPIO1_SIZE SZ_4K +#define MSM_GPIO1_BASE IOMEM(0xE0003000) +#define MSM_GPIO1_PHYS 0xA9000000 +#define MSM_GPIO1_SIZE SZ_4K -#define QSD8X50_GPIO2_PHYS 0xA9100000 -#define QSD8X50_GPIO2_SIZE SZ_4K +#define MSM_GPIO2_BASE IOMEM(0xE0004000) +#define MSM_GPIO2_PHYS 0xA9100000 +#define MSM_GPIO2_SIZE SZ_4K #define MSM_CLK_CTL_BASE IOMEM(0xE0005000) #define MSM_CLK_CTL_PHYS 0xA8600000 diff --git a/trunk/arch/arm/mach-msm/include/mach/msm_iomap.h b/trunk/arch/arm/mach-msm/include/mach/msm_iomap.h index 4ded15238b60..2f494b6a9d0a 100644 --- a/trunk/arch/arm/mach-msm/include/mach/msm_iomap.h +++ b/trunk/arch/arm/mach-msm/include/mach/msm_iomap.h @@ -61,7 +61,5 @@ #define MSM_QGIC_CPU_BASE IOMEM(0xF0001000) #define MSM_TMR_BASE IOMEM(0xF0200000) #define MSM_TMR0_BASE IOMEM(0xF0201000) -#define MSM_GPIO1_BASE IOMEM(0xE0003000) -#define MSM_GPIO2_BASE IOMEM(0xE0004000) #endif diff --git a/trunk/arch/arm/mach-msm/io.c b/trunk/arch/arm/mach-msm/io.c index 140ddbbc3a8a..cec6ed1c91d3 100644 --- a/trunk/arch/arm/mach-msm/io.c +++ b/trunk/arch/arm/mach-msm/io.c @@ -43,8 +43,8 @@ static struct map_desc msm_io_desc[] __initdata = { MSM_DEVICE(VIC), MSM_CHIP_DEVICE(CSR, MSM7X00), MSM_DEVICE(DMOV), - MSM_CHIP_DEVICE(GPIO1, MSM7X00), - MSM_CHIP_DEVICE(GPIO2, MSM7X00), + MSM_DEVICE(GPIO1), + MSM_DEVICE(GPIO2), MSM_DEVICE(CLK_CTL), #ifdef CONFIG_MSM_DEBUG_UART MSM_DEVICE(DEBUG_UART), @@ -76,8 +76,8 @@ static struct map_desc qsd8x50_io_desc[] __initdata = { MSM_DEVICE(VIC), MSM_CHIP_DEVICE(CSR, QSD8X50), MSM_DEVICE(DMOV), - MSM_CHIP_DEVICE(GPIO1, QSD8X50), - MSM_CHIP_DEVICE(GPIO2, QSD8X50), + MSM_DEVICE(GPIO1), + MSM_DEVICE(GPIO2), MSM_DEVICE(CLK_CTL), MSM_DEVICE(SIRC), MSM_DEVICE(SCPLL), @@ -135,8 +135,8 @@ static struct map_desc msm7x30_io_desc[] __initdata = { MSM_DEVICE(VIC), MSM_CHIP_DEVICE(CSR, MSM7X30), MSM_DEVICE(DMOV), - MSM_CHIP_DEVICE(GPIO1, MSM7X30), - MSM_CHIP_DEVICE(GPIO2, MSM7X30), + MSM_DEVICE(GPIO1), + MSM_DEVICE(GPIO2), MSM_DEVICE(CLK_CTL), MSM_DEVICE(CLK_CTL_SH2), MSM_DEVICE(AD5), diff --git a/trunk/arch/arm/mach-mx5/board-cpuimx51.c b/trunk/arch/arm/mach-mx5/board-cpuimx51.c index 68934ea8725a..7c893fa70266 100644 --- a/trunk/arch/arm/mach-mx5/board-cpuimx51.c +++ b/trunk/arch/arm/mach-mx5/board-cpuimx51.c @@ -81,7 +81,7 @@ static struct plat_serial8250_port serial_platform_data[] = { .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP, }, { .mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000), - .irq = gpio_to_irq(CPUIMX51_QUARTD_GPIO), + .irq = irq_to_gpio(CPUIMX51_QUARTD_GPIO), .irqflags = IRQF_TRIGGER_HIGH, .uartclk = CPUIMX51_QUART_XTAL, .regshift = CPUIMX51_QUART_REGSHIFT, diff --git a/trunk/arch/arm/mach-mx5/board-mx51_babbage.c b/trunk/arch/arm/mach-mx5/board-mx51_babbage.c index 11b0ff67f89d..e400b09109ce 100644 --- a/trunk/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/trunk/arch/arm/mach-mx5/board-mx51_babbage.c @@ -369,7 +369,7 @@ static void __init mx51_babbage_init(void) ARRAY_SIZE(mx51babbage_pads)); imx51_add_imx_uart(0, &uart_pdata); - imx51_add_imx_uart(1, NULL); + imx51_add_imx_uart(1, &uart_pdata); imx51_add_imx_uart(2, &uart_pdata); babbage_fec_reset(); diff --git a/trunk/arch/arm/mach-mx5/board-mx51_efikamx.c b/trunk/arch/arm/mach-mx5/board-mx51_efikamx.c index 551daf85ff8c..f70700dc0ec1 100644 --- a/trunk/arch/arm/mach-mx5/board-mx51_efikamx.c +++ b/trunk/arch/arm/mach-mx5/board-mx51_efikamx.c @@ -108,9 +108,9 @@ static void __init mx51_efikamx_board_id(void) gpio_request(EFIKAMX_PCBID2, "pcbid2"); gpio_direction_input(EFIKAMX_PCBID2); - id = gpio_get_value(EFIKAMX_PCBID0) ? 1 : 0; - id |= (gpio_get_value(EFIKAMX_PCBID1) ? 1 : 0) << 1; - id |= (gpio_get_value(EFIKAMX_PCBID2) ? 1 : 0) << 2; + id = gpio_get_value(EFIKAMX_PCBID0); + id |= gpio_get_value(EFIKAMX_PCBID1) << 1; + id |= gpio_get_value(EFIKAMX_PCBID2) << 2; switch (id) { case 7: diff --git a/trunk/arch/arm/mach-mx5/board-mx51_efikasb.c b/trunk/arch/arm/mach-mx5/board-mx51_efikasb.c index 8a9bca22beb5..2e4d9d32a87c 100644 --- a/trunk/arch/arm/mach-mx5/board-mx51_efikasb.c +++ b/trunk/arch/arm/mach-mx5/board-mx51_efikasb.c @@ -156,24 +156,23 @@ static struct gpio_keys_button mx51_efikasb_keys[] = { { .code = KEY_POWER, .gpio = EFIKASB_PWRKEY, - .type = EV_KEY, + .type = EV_PWR, .desc = "Power Button", .wakeup = 1, - .active_low = 1, + .debounce_interval = 10, /* ms */ }, { .code = SW_LID, .gpio = EFIKASB_LID, .type = EV_SW, .desc = "Lid Switch", - .active_low = 1, }, { - .code = KEY_RFKILL, + /* SW_RFKILLALL vs KEY_RFKILL ? */ + .code = SW_RFKILL_ALL, .gpio = EFIKASB_RFKILL, - .type = EV_KEY, + .type = EV_SW, .desc = "rfkill", - .active_low = 1, }, }; @@ -225,8 +224,8 @@ static void __init mx51_efikasb_board_id(void) gpio_request(EFIKASB_PCBID1, "pcb id1"); gpio_direction_input(EFIKASB_PCBID1); - id = gpio_get_value(EFIKASB_PCBID0) ? 1 : 0; - id |= (gpio_get_value(EFIKASB_PCBID1) ? 1 : 0) << 1; + id = gpio_get_value(EFIKASB_PCBID0); + id |= gpio_get_value(EFIKASB_PCBID1) << 1; switch (id) { default: diff --git a/trunk/arch/arm/mach-mx5/clock-mx51-mx53.c b/trunk/arch/arm/mach-mx5/clock-mx51-mx53.c index f7bf996f463b..7f20308c4dbd 100644 --- a/trunk/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/trunk/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -271,11 +271,7 @@ static int _clk_pll_enable(struct clk *clk) int i = 0; pllbase = _get_pll_base(clk); - reg = __raw_readl(pllbase + MXC_PLL_DP_CTL); - if (reg & MXC_PLL_DP_CTL_UPEN) - return 0; - - reg |= MXC_PLL_DP_CTL_UPEN; + reg = __raw_readl(pllbase + MXC_PLL_DP_CTL) | MXC_PLL_DP_CTL_UPEN; __raw_writel(reg, pllbase + MXC_PLL_DP_CTL); /* Wait for lock */ diff --git a/trunk/arch/arm/mach-mx5/mx51_efika.c b/trunk/arch/arm/mach-mx5/mx51_efika.c index c9209454807a..4435e03cea5d 100644 --- a/trunk/arch/arm/mach-mx5/mx51_efika.c +++ b/trunk/arch/arm/mach-mx5/mx51_efika.c @@ -186,7 +186,7 @@ static int initialize_usbh1_port(struct platform_device *pdev) mdelay(10); - return mx51_initialize_usb_hw(pdev->id, MXC_EHCI_ITC_NO_THRESHOLD); + return mx51_initialize_usb_hw(0, MXC_EHCI_ITC_NO_THRESHOLD); } static struct mxc_usbh_platform_data usbh1_config = { diff --git a/trunk/arch/arm/mach-omap2/Kconfig b/trunk/arch/arm/mach-omap2/Kconfig index 57b66d590c52..4ae6257b39a4 100644 --- a/trunk/arch/arm/mach-omap2/Kconfig +++ b/trunk/arch/arm/mach-omap2/Kconfig @@ -7,6 +7,7 @@ config ARCH_OMAP2PLUS_TYPICAL default y select AEABI select REGULATOR + select PM select PM_RUNTIME select VFP select NEON if ARCH_OMAP3 || ARCH_OMAP4 diff --git a/trunk/arch/arm/mach-omap2/board-am3517crane.c b/trunk/arch/arm/mach-omap2/board-am3517crane.c index 933e9353cb37..5f2b55ff04ff 100644 --- a/trunk/arch/arm/mach-omap2/board-am3517crane.c +++ b/trunk/arch/arm/mach-omap2/board-am3517crane.c @@ -45,6 +45,8 @@ static struct omap_board_config_kernel am3517_crane_config[] __initdata = { static struct omap_board_mux board_mux[] __initdata = { { .reg_offset = OMAP_MUX_TERMINATOR }, }; +#else +#define board_mux NULL #endif static void __init am3517_crane_init_early(void) diff --git a/trunk/arch/arm/mach-omap2/board-omap3beagle.c b/trunk/arch/arm/mach-omap2/board-omap3beagle.c index 3ae16b4e3f52..32f5f895568a 100644 --- a/trunk/arch/arm/mach-omap2/board-omap3beagle.c +++ b/trunk/arch/arm/mach-omap2/board-omap3beagle.c @@ -491,22 +491,23 @@ static void __init beagle_opp_init(void) /* Custom OPP enabled for all xM versions */ if (cpu_is_omap3630()) { - struct device *mpu_dev, *iva_dev; + struct omap_hwmod *mh = omap_hwmod_lookup("mpu"); + struct omap_hwmod *dh = omap_hwmod_lookup("iva"); + struct device *dev; - mpu_dev = omap2_get_mpuss_device(); - iva_dev = omap2_get_iva_device(); - - if (!mpu_dev || !iva_dev) { + if (!mh || !dh) { pr_err("%s: Aiee.. no mpu/dsp devices? %p %p\n", - __func__, mpu_dev, iva_dev); + __func__, mh, dh); return; } /* Enable MPU 1GHz and lower opps */ - r = opp_enable(mpu_dev, 800000000); + dev = &mh->od->pdev.dev; + r = opp_enable(dev, 800000000); /* TODO: MPU 1GHz needs SR and ABB */ /* Enable IVA 800MHz and lower opps */ - r |= opp_enable(iva_dev, 660000000); + dev = &dh->od->pdev.dev; + r |= opp_enable(dev, 660000000); /* TODO: DSP 800MHz needs SR and ABB */ if (r) { pr_err("%s: failed to enable higher opp %d\n", @@ -515,8 +516,10 @@ static void __init beagle_opp_init(void) * Cleanup - disable the higher freqs - we dont care * about the results */ - opp_disable(mpu_dev, 800000000); - opp_disable(iva_dev, 660000000); + dev = &mh->od->pdev.dev; + opp_disable(dev, 800000000); + dev = &dh->od->pdev.dev; + opp_disable(dev, 660000000); } } return; diff --git a/trunk/arch/arm/mach-omap2/cminst44xx.h b/trunk/arch/arm/mach-omap2/cminst44xx.h index a018a7327879..f2ea6453ade0 100644 --- a/trunk/arch/arm/mach-omap2/cminst44xx.h +++ b/trunk/arch/arm/mach-omap2/cminst44xx.h @@ -18,36 +18,13 @@ extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); - -# ifdef CONFIG_ARCH_OMAP4 -extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, - u16 clkctrl_offs); +extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); -# else - -static inline int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, - u16 clkctrl_offs) -{ - return 0; -} - -static inline void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, - s16 cdoffs, u16 clkctrl_offs) -{ -} - -static inline void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, - u16 clkctrl_offs) -{ -} - -# endif - /* * In an ideal world, we would not export these low-level functions, * but this will probably take some time to fix properly diff --git a/trunk/arch/arm/mach-omap2/display.c b/trunk/arch/arm/mach-omap2/display.c index a5b7a236aa5b..543fcb8b518c 100644 --- a/trunk/arch/arm/mach-omap2/display.c +++ b/trunk/arch/arm/mach-omap2/display.c @@ -25,7 +25,6 @@ #include