From 19da100c97347595be7edf1b68e88159ade3048c Mon Sep 17 00:00:00 2001 From: Jacob Keller Date: Sat, 16 Jun 2012 23:29:00 +0000 Subject: [PATCH] --- yaml --- r: 311357 b: refs/heads/master c: b6138ed60457ef1e9150692f6790eb4a2a696308 h: refs/heads/master i: 311355: 185a3b518826c3d49da60f57721c44118c46f7a8 v: v3 --- [refs] | 2 +- trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c | 13 +++++++++++-- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 624b095be0a7..77f5c7eb5a5a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 5481388bc705de27ca37241a42c6612c86f2cc3b +refs/heads/master: b6138ed60457ef1e9150692f6790eb4a2a696308 diff --git a/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c b/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c index ddc6a4d19302..dcebd128becf 100644 --- a/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c +++ b/trunk/drivers/net/ethernet/intel/ixgbe/ixgbe_ptp.c @@ -708,6 +708,7 @@ void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter) { struct ixgbe_hw *hw = &adapter->hw; u32 incval = 0; + u32 timinca = 0; u32 shift = 0; u32 cycle_speed; unsigned long flags; @@ -730,8 +731,16 @@ void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter) break; } - /* Bail if the cycle speed didn't change */ - if (adapter->cycle_speed == cycle_speed) + /* + * grab the current TIMINCA value from the register so that it can be + * double checked. If the register value has been cleared, it must be + * reset to the correct value for generating a cyclecounter. If + * TIMINCA is zero, the SYSTIME registers do not increment at all. + */ + timinca = IXGBE_READ_REG(hw, IXGBE_TIMINCA); + + /* Bail if the cycle speed didn't change and TIMINCA is non-zero */ + if (adapter->cycle_speed == cycle_speed && timinca) return; /* disable the SDP clock out */