From 1a106a3952bda8b63a0607cd81ddb66430dd9646 Mon Sep 17 00:00:00 2001 From: Mika Westerberg Date: Thu, 10 May 2012 13:01:22 +0300 Subject: [PATCH] --- yaml --- r: 307670 b: refs/heads/master c: c8f925b69fec7d147cb22cbeec50fbcb2ec5580b h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpio/gpio-langwell.c | 4 +--- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index e9eae090dc07..23e919e91983 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 465f2bd459c3143a4f93c2cf2de2c6ebb8f94947 +refs/heads/master: c8f925b69fec7d147cb22cbeec50fbcb2ec5580b diff --git a/trunk/drivers/gpio/gpio-langwell.c b/trunk/drivers/gpio/gpio-langwell.c index b0673574dc70..a1c8754f52cf 100644 --- a/trunk/drivers/gpio/gpio-langwell.c +++ b/trunk/drivers/gpio/gpio-langwell.c @@ -250,11 +250,9 @@ static void lnw_irq_handler(unsigned irq, struct irq_desc *desc) /* check GPIO controller to check which pin triggered the interrupt */ for (base = 0; base < lnw->chip.ngpio; base += 32) { gedr = gpio_reg(&lnw->chip, base, GEDR); - pending = readl(gedr); - while (pending) { + while ((pending = readl(gedr))) { gpio = __ffs(pending); mask = BIT(gpio); - pending &= ~mask; /* Clear before handling so we can't lose an edge */ writel(mask, gedr); generic_handle_irq(irq_find_mapping(lnw->domain,