From 1b7afc8a996f62f8675abdbac35c56cf438ad62c Mon Sep 17 00:00:00 2001 From: Alexander Graf Date: Mon, 2 Feb 2009 16:23:50 +0100 Subject: [PATCH] --- yaml --- r: 133737 b: refs/heads/master c: d20626936dd6aa783760e780dae5abb127564316 h: refs/heads/master i: 133735: fc3ffd5cf7611fa368d9a41c29a738729ca5a78c v: v3 --- [refs] | 2 +- trunk/arch/x86/include/asm/msr-index.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index fa941816428e..920d3d8ae989 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 44882eed2ebe7f75f8cdae5671ab1d6e0fa40dbc +refs/heads/master: d20626936dd6aa783760e780dae5abb127564316 diff --git a/trunk/arch/x86/include/asm/msr-index.h b/trunk/arch/x86/include/asm/msr-index.h index 46e9646e7a66..f4e505f286bc 100644 --- a/trunk/arch/x86/include/asm/msr-index.h +++ b/trunk/arch/x86/include/asm/msr-index.h @@ -19,12 +19,14 @@ #define _EFER_LMA 10 /* Long mode active (read-only) */ #define _EFER_NX 11 /* No execute enable */ #define _EFER_SVME 12 /* Enable virtualization */ +#define _EFER_FFXSR 14 /* Enable Fast FXSAVE/FXRSTOR */ #define EFER_SCE (1<<_EFER_SCE) #define EFER_LME (1<<_EFER_LME) #define EFER_LMA (1<<_EFER_LMA) #define EFER_NX (1<<_EFER_NX) #define EFER_SVME (1<<_EFER_SVME) +#define EFER_FFXSR (1<<_EFER_FFXSR) /* Intel MSRs. Some also available on other CPUs */ #define MSR_IA32_PERFCTR0 0x000000c1